; Test program for simultaneous reading of the DMEM. A random test pattern is initialy stored in the
; all DMEM lockations by cpu3 via local bus. Then cpu3 reads certain location of the DMEM and copy
; the data red to grf[3]. All cpus simultaneously read the same location of the DMEM and compare
; the result with grf[3]. The errors occured are accumulated and stored in D-bank at address 0xF00n
; for cpu(n).

#inc <conf_va.inc>

#def  DALAST=0xFFC
#def  DAFIRST=0x0
#def  DBFIRST=0xF000
#def  DBLAST=0xF100
#def  DMDELA_val = 8;
#def  DMDELS_val = 11;

#def  dmdel = r14;   DMDELA=r14 & 0xF, DMDELS=r14 >> 4, 8/11 or B8 was the best before!


        nop
        iext    0xF000
        mov     0xF000 r14
#ifdef cpu3
        not     c0, r0
wini:   sgio+   r0
        nop
        nop
        iext    0xF100
        cmp     r14, 0xF100
        jmp     cc_leu, wini
        iext    DBFIRST
        mov     DBFIRST r14
;        jmp cc_uncond, go_lp
#endif

; LOOP for DMDELA and DMDELS
nextpar:
        nop
#ifdef cpu3
	mov	DMDELA_val, r0	; write with fixed values
	mov	r14, r0		; or write with the loop values
        iext    DMDELA
        sgio    r0, DMDELA
        jmpr    cc_busy, 0
	mov	DMDELS_val, r0	; write with the fixed values
	shl	-4, r14, r0	; or write with the loop values
        iext    DMDELS
        sgio    r0, DMDELS
#endif

        mov     0 r10             ; error counter is r10 (cleared initialy)
        sem     0x8               ; mask for synchronization
#ifdef cpu3

        mov     b1_0_0_00_01_11111 r0  ; initializing the random test pattern
        spio    r0 0x201               ; generator
        iext    0xAAAAAAAA
        mov     0xAAAAAAAA r0
        spio    r0 0x200

        mov     DALAST r13
        mov     DAFIRST r15
	
nxt0:   sra+    r0
	not	r0, r0
        cmp     r13 r15
        jmp     cc_nzero nxt0

        mov     DALAST r13
        mov     DAFIRST r15

nxt:    lpio    0x202 r0
        sra+    r0
	nop
        cmp     r13 r15
        jmp     cc_nzero nxt
        mov     c0 g3
#else
        syn
#endif                            ; all cpus expect cpu3 to finish the initialization of the DMEM

        mov     DAFIRST r15
        mov     DALAST  r13
        sem     0x8
#ifdef cpu3
        mov     b1_0_0_00_01_11111 r0  ; initializing the random test pattern
        spio    r0 0x201               ; generator
        iext    0xAAAAAAAA
        mov     0xAAAAAAAA r0
        spio    r0 0x200
; init the DMDELA and S
        iext    DMDELA
        sgio    r14, DMDELA
        shl     -4, r14, r0
        jmpr    cc_busy, 0
        iext    DMDELS
        sgio    r0, DMDELS

        nop
        mov     c0 g3
#else
        syn
#endif                            ; all cpus expect cpu3 to finish the initialization of the DMEM

cyc:    sem     0x8

#ifdef  cpu3 ; generate again the pseudorandom sequnce!


        lpio    0x202 r0
        nop

        mov     r0 g3
#else
        syn
#endif

#ifdef cpu0qq
	nop
#endif
        lra4    r0
        lra4+   r0
        cmp     r0 g3
        jmpr    cc_zero 2
        add     r10 c1 r10
        cmp     r13 r15
        jmp     cc_nzero cyc

; truncate the result (number of errors) to 8 bits
        cmp     r10, 255
        jmpr    cc_leu, +2
        mov     255, r10

#ifdef  cpu0
        sem     0x8               ; mask for synchronization
        mov     r10, g0
        syn
        jmp     cc_uncond, nextpar
#endif
#ifdef  cpu1
        sem     0x8               ; mask for synchronization
        shl     8, r10, g1
        syn
        jmp     cc_uncond, nextpar
#endif
#ifdef  cpu2
        sem     0x8               ; mask for synchronization
        shl     8, r10, r10
        shl     8, r10, g2
        syn
        jmp     cc_uncond, nextpar
#endif
#ifdef cpu3
        ; wait a bit...
        nop
        nop
        nop
        nop
        nop
        shl     8, r10, r10
        shl     8, r10, r10
        shl     8, r10, r10
        ; put all error counters into r10
        or      r10, g0, r10
        or      r10, g1, r10
        or      r10, g2, r10
        ; store the error counter in DBK
        sgio+   r10
        nop
        nop
        mov     c0, g3
        ; check if all combinations are tested
        iext    DBLAST
        cmp     r14, DBLAST
        jmp     cc_ltu, nextpar
go_lp:
        ; switch off
        mov     0x12 r0
        jmpr    cc_busy 0
        sgio    r0 0xA04
#endif
        jmpr    cc_uncond 0