; Full test of the LUTs by the cpu3. ; The number of the errors is stored in 0xF000 for the 6-bit LUT and in 0xF001 for the 5-bit one . ; DEFINITIONS, USED IN THE PROGRAM CODE: #def work=PRF[1] ; register for current operations (CO) #def rdata=PRF[2] ; data red by test_programs and CO #def tdata=PRF[3] ; test_vector to be writen #def errnum=PRF[4] ; contains the number of err_ors #def return1=PRF[5] ; return address (at first level) #def return2=PRF[6] ; return address (at second level) #def return3=PRF[7] ; return address (at third level) #def tdgen=PRF[8] ; test data generator code label #def itdgen=PRF[9] ; init tdgen code label #def psrmask=PRF[10] ; mask for test_vector #def bitnum=PRF[12] ; =32 minus the number of bits of the tested area ; prf11 and prf13 are used inside the testing routine #def ioaddr=PRF[14] ; contains the autoincrementing address of I/O operations through GIO #def errstore=PRF[15] ; autoincrement address for RAM-access #def firstaddress=grf[1] ; first address of the tested area #def lastaddress=grf[2] ; last address of the tested area #def MEMRW=0xD000 ; the address of the register, controling R/W operations of IMEM/DMEMs #def IAFIRST=0xE000 ; first address of IMEM #def IADEND =0xEFFF ; last address of IMEM #def DAFRSTG=0xE000 ; first address of DMEM via GIO #def DADENDG=0xE3FF ; last address of DMEM via GIO #def DAFIRST=0x0000 ; first address of DMEM as RAM #def DADEND =0x0FFC ; last address of DMEM as RAM #def DBFST=0xF000 ; first address of DBANK (trap3) #def DBEND=0xF0FF ; last address of DBANK (trap3) ; masks of certain length #def BITMASK24=0x0FFFFFF #def BITMASK32=0xFFFFFFFF #def BITMASK12=0x00000FFF #def BITMASK13=0x00001FFF start: nop #ifdef cpu3 mov c0 errnum ; LUT test begin ... mov 0x3F psrmask mov 26 bitnum iext 0x3100 mov 0x3100 firstaddress iext 0x3140 mov 0x3140 lastaddress mvpcr +2 return1 jmp cc_uncond cltst jmpr cc_busy 0 iext 0xF000 sgio errnum 0xF000 ; store the err_ornum in DBK mov c0 errnum mov 0x1F psrmask mov 27 bitnum iext 0x3180 mov 0x3180 firstaddress iext 0x3200 mov 0x3200 lastaddress mvpcr +2 return1 jmp cc_uncond cltst ; ... end of the test of LUT jmpr cc_busy 0 iext 0xF001 sgio errnum 0xF001 ; store the err_ornum in DBK and ... lp: jmpr cc_busy 0 ; ... transition into ... mov b0_0111 work sgio work 0xA26 jmpr cc_busy 0 mov 0x012 work sgio work 0xA04 ; ... low power mode end: jmp cc_uncond, end ; END OF THE ENTIRE PROGRAM ; SUBROUTINES BELOW ; BEGIN THE TESTING ROUTINE (uses testing subroutine) cltst: mov 1 r11 mov 1 r13 nt: mov wlk0 tdgen ; call walking 0 test_routine mov iwlk0 itdgen mvpcr +2 return2 jmp cc_uncond tstgio mov wlk1 tdgen ; call walking 1 test_routine mov iwlk1 itdgen ; mvpcr +2 return2 jmp cc_uncond tstgio mov psr tdgen ; call pseudo random vector test_routine mov ipsr itdgen mvpcr +2 return2 jmp cc_uncond tstgio add r13 c3 r13 ; next initial vectors for all shl 1 r11 r11 ; testing routines jmp cc_carry return1 mov bitnum work mov 15 rdata mov r11 r0 cmp rdata bitnum jmpr cc_ncarry 3 shl 15 r0 r0 sub work rdata work shlt work r0 ; if MSB of the current register tested is set - stop! jmp cc_ncarry nt jmp cc_uncond return1 ; END OF THE TESTING ROUTINE ; BEGIN OF THE SUBROUTINE (used by testing routine above) ; rolls all addresses and tests by w/r through GIO tstgio: mvpcr +2 return3 jmp cc_uncond itdgen ; go to init the test data gen ; BEGIN WRITING THE TEST PATTERN mov firstaddress ioaddr wd: jmpr cc_busy 0 sgio+ tdata ; writing the test data in current address mvpcr +2 return3 ; runs the generator returning test vector jmp cc_uncond tdgen cmp ioaddr lastaddress ;IADEND ; is the last address reached? jmp cc_carry wd ; if yes: ; BEGIN COMPARING PART OF CODE mov firstaddress ioaddr mvpcr +2 return3 jmp cc_uncond itdgen ; and go to init for testing wc: jmpr cc_busy 0 ; here is the body of the cycle lgio+ 0 ; reading each address and jmpr cc_busy 0 ; comparing the result with lpio 0x300 rdata ; data stored befor cmp rdata tdata ; jmp cc_zero noerr ; if err_or detected add errnum c1 errnum ; errnum is incremented noerr: mvpcr +2 return3 jmp cc_uncond tdgen ; get next test_data to compare with cmp ioaddr lastaddress ; is tne last address tested? jmp cc_carry wc ; if not go to wc jmp cc_uncond return2 ; prepares the next data - walking 1 wlk1: shl 1 tdata tdata and tdata psrmask tdata jmp cc_nzero return3 mov c1 tdata jmp cc_uncond return3 ; end of walking 1 ; prepares the next data - walking 0 wlk0: com tdata tdata shl 1 tdata tdata and tdata psrmask tdata jmpr cc_nzero +2 mov 1 tdata com tdata tdata and tdata psrmask tdata jmp cc_uncond return3 ; end of walking 0 ; prepares the next data by pseudo random generator psr: lpio 0x202 tdata and tdata psrmask tdata jmp cc_uncond return3 ; end random generator ; init walking 1 iwlk1: mov r11 tdata jmp cc_uncond return3 ; init walking 0 iwlk0: com r11 tdata and tdata psrmask tdata jmp cc_uncond return3 ; init psr ;#ifdef trap3 ipsr: mov b1_0_0_00_01_11111 tdata ;#else ;ipsr: mov b1_0_0_00_01_1111 tdata ;#endif mov 31 r0 sub r0 bitnum r0 ;#ifdef trap3 ;#else ; cmp r0 16 ; jmpr cc_carry 2 ; mov 15 r0 ;#endif or tdata r0 tdata spio tdata 0x201 mov r13 tdata spio tdata 0x200 nop nop lpio 0x202 tdata jmp cc_uncond return3 #endif