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Slow Model Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 17.791 ns
From           : nADS
To             : coin_reference:I0|REG_DOUT[3]
From Clock     : --
To Clock       : LCLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 17.951 ns
From           : coin_reference:I0|MASK[2]
To             : C[6]
From Clock     : LCLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 16.673 ns
From           : IDE[2]
To             : E[21]
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.229 ns
From           : LAD[7]
To             : coin_reference:I0|CNT_VF_LIMIT[7]
From Clock     : --
To Clock       : LCLK
Failed Paths   : 0

Type           : Slow Model Clock Setup: 'pll_coinc:I5|altpll:altpll_component|_clk0'
Slack          : 0.405 ns
Required Time  : 200.40 MHz ( period = 4.990 ns )
Actual Time    : 218.10 MHz ( period = 4.585 ns )
From           : coin_reference:I0|BTM_SZ_CNT[4]
To             : coin_reference:I0|BTM_SZ_CNT[13]
From Clock     : pll_coinc:I5|altpll:altpll_component|_clk0
To Clock       : pll_coinc:I5|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Slow Model Clock Setup: 'GIN[0]'
Slack          : 0.819 ns
Required Time  : 40.08 MHz ( period = 24.950 ns )
Actual Time    : N/A
From           : coin_reference:I0|COINC_FAST
To             : coin_reference:I0|COINC_FAST_NEW
From Clock     : pll_coinc:I5|altpll:altpll_component|_clk0
To Clock       : GIN[0]
Failed Paths   : 0

Type           : Slow Model Clock Setup: 'LCLK'
Slack          : 11.394 ns
Required Time  : 40.00 MHz ( period = 25.000 ns )
Actual Time    : 73.50 MHz ( period = 13.606 ns )
From           : v1495usr_hal:I1|localbusif:I1|ADDR_s_12__Z
To             : coin_reference:I0|REG_DOUT[3]
From Clock     : LCLK
To Clock       : LCLK
Failed Paths   : 0

Type           : Slow Model Clock Hold: 'LCLK'
Slack          : 0.633 ns
Required Time  : 40.00 MHz ( period = 25.000 ns )
Actual Time    : N/A
From           : v1495usr_hal:I1|led_if:I8|TMONOSR
To             : v1495usr_hal:I1|led_if:I8|TMONOSR
From Clock     : LCLK
To Clock       : LCLK
Failed Paths   : 0

Type           : Slow Model Clock Hold: 'pll_coinc:I5|altpll:altpll_component|_clk0'
Slack          : 0.648 ns
Required Time  : 200.40 MHz ( period = 4.990 ns )
Actual Time    : N/A
From           : coin_reference:I0|T2_NOW_FAST
To             : coin_reference:I0|T2_LAST_FAST
From Clock     : pll_coinc:I5|altpll:altpll_component|_clk0
To Clock       : pll_coinc:I5|altpll:altpll_component|_clk0
Failed Paths   : 0

Type           : Slow Model Clock Hold: 'GIN[0]'
Slack          : 0.650 ns
Required Time  : 40.08 MHz ( period = 24.950 ns )
Actual Time    : N/A
From           : coin_reference:I0|ILA_ARM_R
To             : coin_reference:I0|ILA_ARM_RR
From Clock     : GIN[0]
To Clock       : GIN[0]
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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