Sample Waveforms for pll

Sample behavioral waveforms for design file pll_coinc.vhd

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design pll_coinc.vhd. The design pll_coinc.vhd has Cyclone AUTO pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 24950 ps.

Fig. 1 : Wave showing NORMAL mode operation.