include src/scsn_ids.tcs
include src/defines.tcs
include src/parameters.tcs
include src/eeprom_params.tcs

include wrk/cpu1_labels.tcs

write chip_mode, SEBDOU, mode_i2c;
write chip_mode, SEBDEN, 11b;

write chip_jtag, FILCLK, 1;     // enable filter clock cont.
write chip_jtag, SMCMD, CMD_LP; // stop

write chip_jtag,      IA1+IRQ_TST, lbl_TST_cpu1;   // set int_tst start addr for cpu1

write chip_jtag, SMCMD, CMD_LP;     // low power
expect chip_jtag, SMCMD, lp_state

write chip_jtag,srv_outdata+0, 0xDEAD0000
write chip_jtag,srv_outdata+1, 0xDEAD0001
write chip_jtag,srv_outdata+2, 0xDEAD0002
write chip_jtag,srv_outdata+3, 0xDEAD0003
write chip_jtag,srv_outdata+4, 0xDEAD0004
write chip_jtag,srv_outdata+5, 0xDEAD0005
write chip_jtag,srv_outdata+6, 0xDEAD0006
write chip_jtag,srv_outdata+7, 0xDEAD0007

device_address = i2c_addr_eep;
number_of_bytes = 1;

// ************ INIT I2C
write chip_jtag, srv_command, 0;              // init
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state

// ************ READ
start_address   = 0x0+eeprom_offs_addr;
number_of_bytes = 0x10;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read
// start
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state
//
expect chip_jtag,srv_outdata+0, BYTE_0
expect chip_jtag,srv_outdata+1, BYTE_1
expect chip_jtag,srv_outdata+2, BYTE_2
expect chip_jtag,srv_outdata+3, BYTE_3
expect chip_jtag,srv_outdata+4, BYTE_4
expect chip_jtag,srv_outdata+5, BYTE_5
expect chip_jtag,srv_outdata+6, BYTE_6
expect chip_jtag,srv_outdata+7, BYTE_7
expect chip_jtag,srv_outdata+8, BYTE_8
expect chip_jtag,srv_outdata+9, BYTE_9
expect chip_jtag,srv_outdata+0xA, BYTE_A
expect chip_jtag,srv_outdata+0xB, BYTE_B
expect chip_jtag,srv_outdata+0xC, BYTE_C
expect chip_jtag,srv_outdata+0xD, BYTE_D
expect chip_jtag,srv_outdata+0xE, BYTE_E
expect chip_jtag,srv_outdata+0xF, BYTE_F

expect chip_jtag, srv_command, 0;     // the number of timeouts

// ************ READ ser nr MSC
start_address  = 0x0+eeprom_offs_addr_ser;
number_of_bytes = 6;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read
// start
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state
//
expect chip_jtag,srv_outdata+0, 0xA000
expect chip_jtag,srv_outdata+1, 0xA100
expect chip_jtag,srv_outdata+2, 0xA200
expect chip_jtag,srv_outdata+3, 0xA300
expect chip_jtag,srv_outdata+4, 0xA400
expect chip_jtag,srv_outdata+5, 2

expect chip_jtag, srv_command, 0;     // the number of timeouts

// ************ READ ser nr PI
start_address  = 0x0+eeprom_offs_addr_PI;
number_of_bytes = 3;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read
// start
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state
//
expect chip_jtag,srv_outdata+0, 0x1000
expect chip_jtag,srv_outdata+1, 0x1100
expect chip_jtag,srv_outdata+2, 0x99

expect chip_jtag, srv_command, 0;     // the number of timeouts


restrict 1

write                 IA1+IRQ_TST, lbl_LPW_cpu1;   // restore int_tst

write chip_jtag, SMCMD, CMD_ACQ; // start again