// enable FILCLK for event buffer writing write chipTK, FILCLK, 1 // Channel 0 write chipTK, EBW+0x0000, 9*mask+(1-mask)*basel write chipTK, EBW+0x0001, 9*mask+(1-mask)*basel write chipTK, EBW+0x0002, 9*mask+(1-mask)*basel write chipTK, EBW+0x0003, 9*mask+(1-mask)*basel write chipTK, EBW+0x0004, 9*mask+(1-mask)*basel write chipTK, EBW+0x0005, 9*mask+(1-mask)*basel write chipTK, EBW+0x0006, 9*mask+(1-mask)*basel write chipTK, EBW+0x0007, 9*mask+(1-mask)*basel write chipTK, EBW+0x0008, 9*mask+(1-mask)*basel write chipTK, EBW+0x0009, 9*mask+(1-mask)*basel write chipTK, EBW+0x000A, 9*mask+(1-mask)*basel write chipTK, EBW+0x000B, 9*mask+(1-mask)*basel write chipTK, EBW+0x000C, 9*mask+(1-mask)*basel write chipTK, EBW+0x000D, 9*mask+(1-mask)*basel write chipTK, EBW+0x000E, 9*mask+(1-mask)*basel write chipTK, EBW+0x000F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0010, 9*mask+(1-mask)*basel write chipTK, EBW+0x0011, 9*mask+(1-mask)*basel write chipTK, EBW+0x0012, 9*mask+(1-mask)*basel write chipTK, EBW+0x0013, 9*mask+(1-mask)*basel write chipTK, EBW+0x0014, 9*mask+(1-mask)*basel write chipTK, EBW+0x0015, 9*mask+(1-mask)*basel write chipTK, EBW+0x0016, 9*mask+(1-mask)*basel write chipTK, EBW+0x0017, 9*mask+(1-mask)*basel write chipTK, EBW+0x0018, 9*mask+(1-mask)*basel write chipTK, EBW+0x0019, 9*mask+(1-mask)*basel write chipTK, EBW+0x001A, 9*mask+(1-mask)*basel write chipTK, EBW+0x001B, 9*mask+(1-mask)*basel write chipTK, EBW+0x001C, 9*mask+(1-mask)*basel write chipTK, EBW+0x001D, 9*mask+(1-mask)*basel write chipTK, EBW+0x001E, 9*mask+(1-mask)*basel write chipTK, EBW+0x001F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0020, 9*mask+(1-mask)*basel write chipTK, EBW+0x0021, 9*mask+(1-mask)*basel write chipTK, EBW+0x0022, 9*mask+(1-mask)*basel write chipTK, EBW+0x0023, 9*mask+(1-mask)*basel write chipTK, EBW+0x0024, 9*mask+(1-mask)*basel write chipTK, EBW+0x0025, 9*mask+(1-mask)*basel write chipTK, EBW+0x0026, 9*mask+(1-mask)*basel write chipTK, EBW+0x0027, 9*mask+(1-mask)*basel write chipTK, EBW+0x0028, 9*mask+(1-mask)*basel write chipTK, EBW+0x0029, 9*mask+(1-mask)*basel write chipTK, EBW+0x002A, 9*mask+(1-mask)*basel write chipTK, EBW+0x002B, 9*mask+(1-mask)*basel write chipTK, EBW+0x002C, 9*mask+(1-mask)*basel write chipTK, EBW+0x002D, 9*mask+(1-mask)*basel write chipTK, EBW+0x002E, 9*mask+(1-mask)*basel write chipTK, EBW+0x002F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0030, 9*mask+(1-mask)*basel write chipTK, EBW+0x0031, 9*mask+(1-mask)*basel write chipTK, EBW+0x0032, 9*mask+(1-mask)*basel write chipTK, EBW+0x0033, 9*mask+(1-mask)*basel write chipTK, EBW+0x0034, 9*mask+(1-mask)*basel write chipTK, EBW+0x0035, 9*mask+(1-mask)*basel write chipTK, EBW+0x0036, 9*mask+(1-mask)*basel write chipTK, EBW+0x0037, 9*mask+(1-mask)*basel write chipTK, EBW+0x0038, 9*mask+(1-mask)*basel write chipTK, EBW+0x0039, 9*mask+(1-mask)*basel write chipTK, EBW+0x003A, 9*mask+(1-mask)*basel write chipTK, EBW+0x003B, 9*mask+(1-mask)*basel write chipTK, EBW+0x003C, 9*mask+(1-mask)*basel write chipTK, EBW+0x003D, 9*mask+(1-mask)*basel write chipTK, EBW+0x003E, 9*mask+(1-mask)*basel write chipTK, EBW+0x003F, 9*mask+(1-mask)*basel // Channel 1 write chipTK, EBW+0x0080, 9*mask+(1-mask)*basel write chipTK, EBW+0x0081, 9*mask+(1-mask)*basel write chipTK, EBW+0x0082, 9*mask+(1-mask)*basel write chipTK, EBW+0x0083, 9*mask+(1-mask)*basel write chipTK, EBW+0x0084, 9*mask+(1-mask)*basel write chipTK, EBW+0x0085, 9*mask+(1-mask)*basel write chipTK, EBW+0x0086, 9*mask+(1-mask)*basel write chipTK, EBW+0x0087, 9*mask+(1-mask)*basel write chipTK, EBW+0x0088, 9*mask+(1-mask)*basel write chipTK, EBW+0x0089, 9*mask+(1-mask)*basel write chipTK, EBW+0x008A, 9*mask+(1-mask)*basel write chipTK, EBW+0x008B, 9*mask+(1-mask)*basel write chipTK, EBW+0x008C, 9*mask+(1-mask)*basel write chipTK, EBW+0x008D, 9*mask+(1-mask)*basel write chipTK, EBW+0x008E, 9*mask+(1-mask)*basel write chipTK, EBW+0x008F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0090, 9*mask+(1-mask)*basel write chipTK, EBW+0x0091, 9*mask+(1-mask)*basel write chipTK, EBW+0x0092, 9*mask+(1-mask)*basel write chipTK, EBW+0x0093, 9*mask+(1-mask)*basel write chipTK, EBW+0x0094, 9*mask+(1-mask)*basel write chipTK, EBW+0x0095, 9*mask+(1-mask)*basel write chipTK, EBW+0x0096, 9*mask+(1-mask)*basel write chipTK, EBW+0x0097, 9*mask+(1-mask)*basel write chipTK, EBW+0x0098, 9*mask+(1-mask)*basel write chipTK, EBW+0x0099, 9*mask+(1-mask)*basel write chipTK, EBW+0x009A, 9*mask+(1-mask)*basel write chipTK, EBW+0x009B, 9*mask+(1-mask)*basel write chipTK, EBW+0x009C, 9*mask+(1-mask)*basel write chipTK, EBW+0x009D, 9*mask+(1-mask)*basel write chipTK, EBW+0x009E, 9*mask+(1-mask)*basel write chipTK, EBW+0x009F, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x00A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x00AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x00B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x00BF, 9*mask+(1-mask)*basel // Channel 2 write chipTK, EBW+0x0100, 9*mask+(1-mask)*basel write chipTK, EBW+0x0101, 9*mask+(1-mask)*basel write chipTK, EBW+0x0102, 9*mask+(1-mask)*basel write chipTK, EBW+0x0103, 9*mask+(1-mask)*basel write chipTK, EBW+0x0104, 9*mask+(1-mask)*basel write chipTK, EBW+0x0105, 9*mask+(1-mask)*basel write chipTK, EBW+0x0106, 9*mask+(1-mask)*basel write chipTK, EBW+0x0107, 9*mask+(1-mask)*basel write chipTK, EBW+0x0108, 9*mask+(1-mask)*basel write chipTK, EBW+0x0109, 9*mask+(1-mask)*basel write chipTK, EBW+0x010A, 9*mask+(1-mask)*basel write chipTK, EBW+0x010B, 9*mask+(1-mask)*basel write chipTK, EBW+0x010C, 9*mask+(1-mask)*basel write chipTK, EBW+0x010D, 9*mask+(1-mask)*basel write chipTK, EBW+0x010E, 9*mask+(1-mask)*basel write chipTK, EBW+0x010F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0110, 9*mask+(1-mask)*basel write chipTK, EBW+0x0111, 9*mask+(1-mask)*basel write chipTK, EBW+0x0112, 9*mask+(1-mask)*basel write chipTK, EBW+0x0113, 9*mask+(1-mask)*basel write chipTK, EBW+0x0114, 9*mask+(1-mask)*basel write chipTK, EBW+0x0115, 9*mask+(1-mask)*basel write chipTK, EBW+0x0116, 9*mask+(1-mask)*basel write chipTK, EBW+0x0117, 9*mask+(1-mask)*basel write chipTK, EBW+0x0118, 9*mask+(1-mask)*basel write chipTK, EBW+0x0119, 9*mask+(1-mask)*basel write chipTK, EBW+0x011A, 9*mask+(1-mask)*basel write chipTK, EBW+0x011B, 9*mask+(1-mask)*basel write chipTK, EBW+0x011C, 9*mask+(1-mask)*basel write chipTK, EBW+0x011D, 9*mask+(1-mask)*basel write chipTK, EBW+0x011E, 9*mask+(1-mask)*basel write chipTK, EBW+0x011F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0120, 9*mask+(1-mask)*basel write chipTK, EBW+0x0121, 9*mask+(1-mask)*basel write chipTK, EBW+0x0122, 9*mask+(1-mask)*basel write chipTK, EBW+0x0123, 9*mask+(1-mask)*basel write chipTK, EBW+0x0124, 9*mask+(1-mask)*basel write chipTK, EBW+0x0125, 9*mask+(1-mask)*basel write chipTK, EBW+0x0126, 9*mask+(1-mask)*basel write chipTK, EBW+0x0127, 9*mask+(1-mask)*basel write chipTK, EBW+0x0128, 9*mask+(1-mask)*basel write chipTK, EBW+0x0129, 9*mask+(1-mask)*basel write chipTK, EBW+0x012A, 9*mask+(1-mask)*basel write chipTK, EBW+0x012B, 9*mask+(1-mask)*basel write chipTK, EBW+0x012C, 9*mask+(1-mask)*basel write chipTK, EBW+0x012D, 9*mask+(1-mask)*basel write chipTK, EBW+0x012E, 9*mask+(1-mask)*basel write chipTK, EBW+0x012F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0130, 9*mask+(1-mask)*basel write chipTK, EBW+0x0131, 9*mask+(1-mask)*basel write chipTK, EBW+0x0132, 9*mask+(1-mask)*basel write chipTK, EBW+0x0133, 9*mask+(1-mask)*basel write chipTK, EBW+0x0134, 9*mask+(1-mask)*basel write chipTK, EBW+0x0135, 9*mask+(1-mask)*basel write chipTK, EBW+0x0136, 9*mask+(1-mask)*basel write chipTK, EBW+0x0137, 9*mask+(1-mask)*basel write chipTK, EBW+0x0138, 9*mask+(1-mask)*basel write chipTK, EBW+0x0139, 9*mask+(1-mask)*basel write chipTK, EBW+0x013A, 9*mask+(1-mask)*basel write chipTK, EBW+0x013B, 9*mask+(1-mask)*basel write chipTK, EBW+0x013C, 9*mask+(1-mask)*basel write chipTK, EBW+0x013D, 9*mask+(1-mask)*basel write chipTK, EBW+0x013E, 9*mask+(1-mask)*basel write chipTK, EBW+0x013F, 9*mask+(1-mask)*basel // Channel 3 write chipTK, EBW+0x0180, 9*mask+(1-mask)*basel write chipTK, EBW+0x0181, 9*mask+(1-mask)*basel write chipTK, EBW+0x0182, 9*mask+(1-mask)*basel write chipTK, EBW+0x0183, 9*mask+(1-mask)*basel write chipTK, EBW+0x0184, 9*mask+(1-mask)*basel write chipTK, EBW+0x0185, 9*mask+(1-mask)*basel write chipTK, EBW+0x0186, 9*mask+(1-mask)*basel write chipTK, EBW+0x0187, 9*mask+(1-mask)*basel write chipTK, EBW+0x0188, 9*mask+(1-mask)*basel write chipTK, EBW+0x0189, 9*mask+(1-mask)*basel write chipTK, EBW+0x018A, 9*mask+(1-mask)*basel write chipTK, EBW+0x018B, 9*mask+(1-mask)*basel write chipTK, EBW+0x018C, 9*mask+(1-mask)*basel write chipTK, EBW+0x018D, 9*mask+(1-mask)*basel write chipTK, EBW+0x018E, 9*mask+(1-mask)*basel write chipTK, EBW+0x018F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0190, 9*mask+(1-mask)*basel write chipTK, EBW+0x0191, 9*mask+(1-mask)*basel write chipTK, EBW+0x0192, 9*mask+(1-mask)*basel write chipTK, EBW+0x0193, 9*mask+(1-mask)*basel write chipTK, EBW+0x0194, 9*mask+(1-mask)*basel write chipTK, EBW+0x0195, 9*mask+(1-mask)*basel write chipTK, EBW+0x0196, 9*mask+(1-mask)*basel write chipTK, EBW+0x0197, 9*mask+(1-mask)*basel write chipTK, EBW+0x0198, 9*mask+(1-mask)*basel write chipTK, EBW+0x0199, 9*mask+(1-mask)*basel write chipTK, EBW+0x019A, 9*mask+(1-mask)*basel write chipTK, EBW+0x019B, 9*mask+(1-mask)*basel write chipTK, EBW+0x019C, 9*mask+(1-mask)*basel write chipTK, EBW+0x019D, 9*mask+(1-mask)*basel write chipTK, EBW+0x019E, 9*mask+(1-mask)*basel write chipTK, EBW+0x019F, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x01A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x01AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x01B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x01BF, 9*mask+(1-mask)*basel // Channel 4 write chipTK, EBW+0x0200, 9*mask+(1-mask)*basel write chipTK, EBW+0x0201, 9*mask+(1-mask)*basel write chipTK, EBW+0x0202, 9*mask+(1-mask)*basel write chipTK, EBW+0x0203, 9*mask+(1-mask)*basel write chipTK, EBW+0x0204, 9*mask+(1-mask)*basel write chipTK, EBW+0x0205, 9*mask+(1-mask)*basel write chipTK, EBW+0x0206, 9*mask+(1-mask)*basel write chipTK, EBW+0x0207, 9*mask+(1-mask)*basel write chipTK, EBW+0x0208, 9*mask+(1-mask)*basel write chipTK, EBW+0x0209, 9*mask+(1-mask)*basel write chipTK, EBW+0x020A, 9*mask+(1-mask)*basel write chipTK, EBW+0x020B, 9*mask+(1-mask)*basel write chipTK, EBW+0x020C, 9*mask+(1-mask)*basel write chipTK, EBW+0x020D, 9*mask+(1-mask)*basel write chipTK, EBW+0x020E, 9*mask+(1-mask)*basel write chipTK, EBW+0x020F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0210, 9*mask+(1-mask)*basel write chipTK, EBW+0x0211, 9*mask+(1-mask)*basel write chipTK, EBW+0x0212, 9*mask+(1-mask)*basel write chipTK, EBW+0x0213, 9*mask+(1-mask)*basel write chipTK, EBW+0x0214, 9*mask+(1-mask)*basel write chipTK, EBW+0x0215, 9*mask+(1-mask)*basel write chipTK, EBW+0x0216, 9*mask+(1-mask)*basel write chipTK, EBW+0x0217, 9*mask+(1-mask)*basel write chipTK, EBW+0x0218, 9*mask+(1-mask)*basel write chipTK, EBW+0x0219, 9*mask+(1-mask)*basel write chipTK, EBW+0x021A, 9*mask+(1-mask)*basel write chipTK, EBW+0x021B, 9*mask+(1-mask)*basel write chipTK, EBW+0x021C, 9*mask+(1-mask)*basel write chipTK, EBW+0x021D, 9*mask+(1-mask)*basel write chipTK, EBW+0x021E, 9*mask+(1-mask)*basel write chipTK, EBW+0x021F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0220, 9*mask+(1-mask)*basel write chipTK, EBW+0x0221, 9*mask+(1-mask)*basel write chipTK, EBW+0x0222, 9*mask+(1-mask)*basel write chipTK, EBW+0x0223, 9*mask+(1-mask)*basel write chipTK, EBW+0x0224, 9*mask+(1-mask)*basel write chipTK, EBW+0x0225, 9*mask+(1-mask)*basel write chipTK, EBW+0x0226, 9*mask+(1-mask)*basel write chipTK, EBW+0x0227, 9*mask+(1-mask)*basel write chipTK, EBW+0x0228, 9*mask+(1-mask)*basel write chipTK, EBW+0x0229, 9*mask+(1-mask)*basel write chipTK, EBW+0x022A, 9*mask+(1-mask)*basel write chipTK, EBW+0x022B, 9*mask+(1-mask)*basel write chipTK, EBW+0x022C, 9*mask+(1-mask)*basel write chipTK, EBW+0x022D, 9*mask+(1-mask)*basel write chipTK, EBW+0x022E, 9*mask+(1-mask)*basel write chipTK, EBW+0x022F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0230, 9*mask+(1-mask)*basel write chipTK, EBW+0x0231, 9*mask+(1-mask)*basel write chipTK, EBW+0x0232, 9*mask+(1-mask)*basel write chipTK, EBW+0x0233, 9*mask+(1-mask)*basel write chipTK, EBW+0x0234, 9*mask+(1-mask)*basel write chipTK, EBW+0x0235, 9*mask+(1-mask)*basel write chipTK, EBW+0x0236, 9*mask+(1-mask)*basel write chipTK, EBW+0x0237, 9*mask+(1-mask)*basel write chipTK, EBW+0x0238, 9*mask+(1-mask)*basel write chipTK, EBW+0x0239, 9*mask+(1-mask)*basel write chipTK, EBW+0x023A, 9*mask+(1-mask)*basel write chipTK, EBW+0x023B, 9*mask+(1-mask)*basel write chipTK, EBW+0x023C, 9*mask+(1-mask)*basel write chipTK, EBW+0x023D, 9*mask+(1-mask)*basel write chipTK, EBW+0x023E, 9*mask+(1-mask)*basel write chipTK, EBW+0x023F, 9*mask+(1-mask)*basel // Channel 5 write chipTK, EBW+0x0280, 9*mask+(1-mask)*basel write chipTK, EBW+0x0281, 9*mask+(1-mask)*basel write chipTK, EBW+0x0282, 9*mask+(1-mask)*basel write chipTK, EBW+0x0283, 9*mask+(1-mask)*basel write chipTK, EBW+0x0284, 9*mask+(1-mask)*basel write chipTK, EBW+0x0285, 9*mask+(1-mask)*basel write chipTK, EBW+0x0286, 9*mask+(1-mask)*basel write chipTK, EBW+0x0287, 9*mask+(1-mask)*basel write chipTK, EBW+0x0288, 9*mask+(1-mask)*basel write chipTK, EBW+0x0289, 9*mask+(1-mask)*basel write chipTK, EBW+0x028A, 9*mask+(1-mask)*basel write chipTK, EBW+0x028B, 9*mask+(1-mask)*basel write chipTK, EBW+0x028C, 9*mask+(1-mask)*basel write chipTK, EBW+0x028D, 9*mask+(1-mask)*basel write chipTK, EBW+0x028E, 9*mask+(1-mask)*basel write chipTK, EBW+0x028F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0290, 9*mask+(1-mask)*basel write chipTK, EBW+0x0291, 9*mask+(1-mask)*basel write chipTK, EBW+0x0292, 9*mask+(1-mask)*basel write chipTK, EBW+0x0293, 9*mask+(1-mask)*basel write chipTK, EBW+0x0294, 9*mask+(1-mask)*basel write chipTK, EBW+0x0295, 9*mask+(1-mask)*basel write chipTK, EBW+0x0296, 9*mask+(1-mask)*basel write chipTK, EBW+0x0297, 9*mask+(1-mask)*basel write chipTK, EBW+0x0298, 9*mask+(1-mask)*basel write chipTK, EBW+0x0299, 9*mask+(1-mask)*basel write chipTK, EBW+0x029A, 9*mask+(1-mask)*basel write chipTK, EBW+0x029B, 9*mask+(1-mask)*basel write chipTK, EBW+0x029C, 9*mask+(1-mask)*basel write chipTK, EBW+0x029D, 9*mask+(1-mask)*basel write chipTK, EBW+0x029E, 9*mask+(1-mask)*basel write chipTK, EBW+0x029F, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x02A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x02AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x02B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x02BF, 9*mask+(1-mask)*basel // Channel 6 write chipTK, EBW+0x0300, 9*mask+(1-mask)*basel write chipTK, EBW+0x0301, 9*mask+(1-mask)*basel write chipTK, EBW+0x0302, 9*mask+(1-mask)*basel write chipTK, EBW+0x0303, 9*mask+(1-mask)*basel write chipTK, EBW+0x0304, 9*mask+(1-mask)*basel write chipTK, EBW+0x0305, 9*mask+(1-mask)*basel write chipTK, EBW+0x0306, 9*mask+(1-mask)*basel write chipTK, EBW+0x0307, 9*mask+(1-mask)*basel write chipTK, EBW+0x0308, 9*mask+(1-mask)*basel write chipTK, EBW+0x0309, 9*mask+(1-mask)*basel write chipTK, EBW+0x030A, 9*mask+(1-mask)*basel write chipTK, EBW+0x030B, 9*mask+(1-mask)*basel write chipTK, EBW+0x030C, 9*mask+(1-mask)*basel write chipTK, EBW+0x030D, 9*mask+(1-mask)*basel write chipTK, EBW+0x030E, 9*mask+(1-mask)*basel write chipTK, EBW+0x030F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0310, 9*mask+(1-mask)*basel write chipTK, EBW+0x0311, 9*mask+(1-mask)*basel write chipTK, EBW+0x0312, 9*mask+(1-mask)*basel write chipTK, EBW+0x0313, 9*mask+(1-mask)*basel write chipTK, EBW+0x0314, 9*mask+(1-mask)*basel write chipTK, EBW+0x0315, 9*mask+(1-mask)*basel write chipTK, EBW+0x0316, 9*mask+(1-mask)*basel write chipTK, EBW+0x0317, 9*mask+(1-mask)*basel write chipTK, EBW+0x0318, 9*mask+(1-mask)*basel write chipTK, EBW+0x0319, 9*mask+(1-mask)*basel write chipTK, EBW+0x031A, 9*mask+(1-mask)*basel write chipTK, EBW+0x031B, 9*mask+(1-mask)*basel write chipTK, EBW+0x031C, 9*mask+(1-mask)*basel write chipTK, EBW+0x031D, 9*mask+(1-mask)*basel write chipTK, EBW+0x031E, 9*mask+(1-mask)*basel write chipTK, EBW+0x031F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0320, 9*mask+(1-mask)*basel write chipTK, EBW+0x0321, 9*mask+(1-mask)*basel write chipTK, EBW+0x0322, 9*mask+(1-mask)*basel write chipTK, EBW+0x0323, 9*mask+(1-mask)*basel write chipTK, EBW+0x0324, 9*mask+(1-mask)*basel write chipTK, EBW+0x0325, 9*mask+(1-mask)*basel write chipTK, EBW+0x0326, 9*mask+(1-mask)*basel write chipTK, EBW+0x0327, 9*mask+(1-mask)*basel write chipTK, EBW+0x0328, 9*mask+(1-mask)*basel write chipTK, EBW+0x0329, 9*mask+(1-mask)*basel write chipTK, EBW+0x032A, 9*mask+(1-mask)*basel write chipTK, EBW+0x032B, 9*mask+(1-mask)*basel write chipTK, EBW+0x032C, 9*mask+(1-mask)*basel write chipTK, EBW+0x032D, 9*mask+(1-mask)*basel write chipTK, EBW+0x032E, 9*mask+(1-mask)*basel write chipTK, EBW+0x032F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0330, 9*mask+(1-mask)*basel write chipTK, EBW+0x0331, 9*mask+(1-mask)*basel write chipTK, EBW+0x0332, 9*mask+(1-mask)*basel write chipTK, EBW+0x0333, 9*mask+(1-mask)*basel write chipTK, EBW+0x0334, 9*mask+(1-mask)*basel write chipTK, EBW+0x0335, 9*mask+(1-mask)*basel write chipTK, EBW+0x0336, 9*mask+(1-mask)*basel write chipTK, EBW+0x0337, 9*mask+(1-mask)*basel write chipTK, EBW+0x0338, 9*mask+(1-mask)*basel write chipTK, EBW+0x0339, 9*mask+(1-mask)*basel write chipTK, EBW+0x033A, 9*mask+(1-mask)*basel write chipTK, EBW+0x033B, 9*mask+(1-mask)*basel write chipTK, EBW+0x033C, 9*mask+(1-mask)*basel write chipTK, EBW+0x033D, 9*mask+(1-mask)*basel write chipTK, EBW+0x033E, 9*mask+(1-mask)*basel write chipTK, EBW+0x033F, 9*mask+(1-mask)*basel // Channel 7 write chipTK, EBW+0x0380, 9*mask+(1-mask)*basel write chipTK, EBW+0x0381, 9*mask+(1-mask)*basel write chipTK, EBW+0x0382, 9*mask+(1-mask)*basel write chipTK, EBW+0x0383, 9*mask+(1-mask)*basel write chipTK, EBW+0x0384, 9*mask+(1-mask)*basel write chipTK, EBW+0x0385, 9*mask+(1-mask)*basel write chipTK, EBW+0x0386, 9*mask+(1-mask)*basel write chipTK, EBW+0x0387, 9*mask+(1-mask)*basel write chipTK, EBW+0x0388, 9*mask+(1-mask)*basel write chipTK, EBW+0x0389, 9*mask+(1-mask)*basel write chipTK, EBW+0x038A, 9*mask+(1-mask)*basel write chipTK, EBW+0x038B, 9*mask+(1-mask)*basel write chipTK, EBW+0x038C, 9*mask+(1-mask)*basel write chipTK, EBW+0x038D, 9*mask+(1-mask)*basel write chipTK, EBW+0x038E, 9*mask+(1-mask)*basel write chipTK, EBW+0x038F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0390, 9*mask+(1-mask)*basel write chipTK, EBW+0x0391, 9*mask+(1-mask)*basel write chipTK, EBW+0x0392, 9*mask+(1-mask)*basel write chipTK, EBW+0x0393, 9*mask+(1-mask)*basel write chipTK, EBW+0x0394, 9*mask+(1-mask)*basel write chipTK, EBW+0x0395, 9*mask+(1-mask)*basel write chipTK, EBW+0x0396, 9*mask+(1-mask)*basel write chipTK, EBW+0x0397, 9*mask+(1-mask)*basel write chipTK, EBW+0x0398, 9*mask+(1-mask)*basel write chipTK, EBW+0x0399, 9*mask+(1-mask)*basel write chipTK, EBW+0x039A, 9*mask+(1-mask)*basel write chipTK, EBW+0x039B, 9*mask+(1-mask)*basel write chipTK, EBW+0x039C, 9*mask+(1-mask)*basel write chipTK, EBW+0x039D, 9*mask+(1-mask)*basel write chipTK, EBW+0x039E, 9*mask+(1-mask)*basel write chipTK, EBW+0x039F, 9*mask+(1-mask)*basel write chipTK, EBW+0x03A0, 9*mask+(1-mask)*basel + secch + earladc*15 write chipTK, EBW+0x03A1, 9*mask+(1-mask)*basel + secch + earladc*14 write chipTK, EBW+0x03A2, 9*mask+(1-mask)*basel + secch + earladc*13 write chipTK, EBW+0x03A3, 9*mask+(1-mask)*basel + secch + earladc*12 write chipTK, EBW+0x03A4, 9*mask+(1-mask)*basel + secch + earladc*11 write chipTK, EBW+0x03A5, 9*mask+(1-mask)*basel + secch + earladc*10 write chipTK, EBW+0x03A6, 9*mask+(1-mask)*basel + secch + earladc*9 write chipTK, EBW+0x03A7, 9*mask+(1-mask)*basel + secch + earladc*8 write chipTK, EBW+0x03A8, 9*mask+(1-mask)*basel + secch + earladc*7 write chipTK, EBW+0x03A9, 9*mask+(1-mask)*basel + secch + earladc*6 write chipTK, EBW+0x03AA, 9*mask+(1-mask)*basel + secch + earladc*5 write chipTK, EBW+0x03AB, 9*mask+(1-mask)*basel + secch + earladc*4 write chipTK, EBW+0x03AC, 9*mask+(1-mask)*basel + secch + earladc*3 write chipTK, EBW+0x03AD, 9*mask+(1-mask)*basel + secch + earladc*2 write chipTK, EBW+0x03AE, 9*mask+(1-mask)*basel + secch + earladc*1 write chipTK, EBW+0x03AF, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B0, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B1, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B2, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B3, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B4, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x03B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x03B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x03B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x03B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x03B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x03BF, 9*mask+(1-mask)*basel // Channel 8 write chipTK, EBW+0x0400, 9*mask+(1-mask)*basel write chipTK, EBW+0x0401, 9*mask+(1-mask)*basel write chipTK, EBW+0x0402, 9*mask+(1-mask)*basel write chipTK, EBW+0x0403, 9*mask+(1-mask)*basel write chipTK, EBW+0x0404, 9*mask+(1-mask)*basel write chipTK, EBW+0x0405, 9*mask+(1-mask)*basel write chipTK, EBW+0x0406, 9*mask+(1-mask)*basel write chipTK, EBW+0x0407, 9*mask+(1-mask)*basel write chipTK, EBW+0x0408, 9*mask+(1-mask)*basel write chipTK, EBW+0x0409, 9*mask+(1-mask)*basel write chipTK, EBW+0x040A, 9*mask+(1-mask)*basel write chipTK, EBW+0x040B, 9*mask+(1-mask)*basel write chipTK, EBW+0x040C, 9*mask+(1-mask)*basel write chipTK, EBW+0x040D, 9*mask+(1-mask)*basel write chipTK, EBW+0x040E, 9*mask+(1-mask)*basel write chipTK, EBW+0x040F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0410, 9*mask+(1-mask)*basel write chipTK, EBW+0x0411, 9*mask+(1-mask)*basel write chipTK, EBW+0x0412, 9*mask+(1-mask)*basel write chipTK, EBW+0x0413, 9*mask+(1-mask)*basel write chipTK, EBW+0x0414, 9*mask+(1-mask)*basel write chipTK, EBW+0x0415, 9*mask+(1-mask)*basel write chipTK, EBW+0x0416, 9*mask+(1-mask)*basel write chipTK, EBW+0x0417, 9*mask+(1-mask)*basel write chipTK, EBW+0x0418, 9*mask+(1-mask)*basel write chipTK, EBW+0x0419, 9*mask+(1-mask)*basel write chipTK, EBW+0x041A, 9*mask+(1-mask)*basel write chipTK, EBW+0x041B, 9*mask+(1-mask)*basel write chipTK, EBW+0x041C, 9*mask+(1-mask)*basel write chipTK, EBW+0x041D, 9*mask+(1-mask)*basel write chipTK, EBW+0x041E, 9*mask+(1-mask)*basel write chipTK, EBW+0x041F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0420, 9*mask+(1-mask)*basel + secch + lateadc*5 write chipTK, EBW+0x0421, 9*mask+(1-mask)*basel + secch + lateadc*1 write chipTK, EBW+0x0422, 9*mask+(1-mask)*basel + secch + lateadc*2 write chipTK, EBW+0x0423, 9*mask+(1-mask)*basel + secch + lateadc*3 write chipTK, EBW+0x0424, 9*mask+(1-mask)*basel + secch + lateadc*4 write chipTK, EBW+0x0425, 9*mask+(1-mask)*basel + secch + lateadc*5 write chipTK, EBW+0x0426, 9*mask+(1-mask)*basel + secch + lateadc*6 write chipTK, EBW+0x0427, 9*mask+(1-mask)*basel + secch + lateadc*7 write chipTK, EBW+0x0428, 9*mask+(1-mask)*basel + secch + lateadc*8 write chipTK, EBW+0x0429, 9*mask+(1-mask)*basel + secch + lateadc*9 write chipTK, EBW+0x042A, 9*mask+(1-mask)*basel + secch + lateadc*10 write chipTK, EBW+0x042B, 9*mask+(1-mask)*basel + secch + lateadc*11 write chipTK, EBW+0x042C, 9*mask+(1-mask)*basel + secch + lateadc*12 write chipTK, EBW+0x042D, 9*mask+(1-mask)*basel + secch + lateadc*13 write chipTK, EBW+0x042E, 9*mask+(1-mask)*basel + secch + lateadc*14 write chipTK, EBW+0x042F, 9*mask+(1-mask)*basel + secch + lateadc*15 write chipTK, EBW+0x0430, 9*mask+(1-mask)*basel + secch + lateadc*16 write chipTK, EBW+0x0431, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x0432, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x0433, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x0434, 9*mask+(1-mask)*basel + secch write chipTK, EBW+0x0435, 9*mask+(1-mask)*basel write chipTK, EBW+0x0436, 9*mask+(1-mask)*basel write chipTK, EBW+0x0437, 9*mask+(1-mask)*basel write chipTK, EBW+0x0438, 9*mask+(1-mask)*basel write chipTK, EBW+0x0439, 9*mask+(1-mask)*basel write chipTK, EBW+0x043A, 9*mask+(1-mask)*basel write chipTK, EBW+0x043B, 9*mask+(1-mask)*basel write chipTK, EBW+0x043C, 9*mask+(1-mask)*basel write chipTK, EBW+0x043D, 9*mask+(1-mask)*basel write chipTK, EBW+0x043E, 9*mask+(1-mask)*basel write chipTK, EBW+0x043F, 9*mask+(1-mask)*basel // Channel 9 write chipTK, EBW+0x0480, 9*mask+(1-mask)*basel write chipTK, EBW+0x0481, 9*mask+(1-mask)*basel write chipTK, EBW+0x0482, 9*mask+(1-mask)*basel write chipTK, EBW+0x0483, 9*mask+(1-mask)*basel write chipTK, EBW+0x0484, 9*mask+(1-mask)*basel write chipTK, EBW+0x0485, 9*mask+(1-mask)*basel write chipTK, EBW+0x0486, 9*mask+(1-mask)*basel write chipTK, EBW+0x0487, 9*mask+(1-mask)*basel write chipTK, EBW+0x0488, 9*mask+(1-mask)*basel write chipTK, EBW+0x0489, 9*mask+(1-mask)*basel write chipTK, EBW+0x048A, 9*mask+(1-mask)*basel write chipTK, EBW+0x048B, 9*mask+(1-mask)*basel write chipTK, EBW+0x048C, 9*mask+(1-mask)*basel write chipTK, EBW+0x048D, 9*mask+(1-mask)*basel write chipTK, EBW+0x048E, 9*mask+(1-mask)*basel write chipTK, EBW+0x048F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0490, 9*mask+(1-mask)*basel write chipTK, EBW+0x0491, 9*mask+(1-mask)*basel write chipTK, EBW+0x0492, 9*mask+(1-mask)*basel write chipTK, EBW+0x0493, 9*mask+(1-mask)*basel write chipTK, EBW+0x0494, 9*mask+(1-mask)*basel write chipTK, EBW+0x0495, 9*mask+(1-mask)*basel write chipTK, EBW+0x0496, 9*mask+(1-mask)*basel write chipTK, EBW+0x0497, 9*mask+(1-mask)*basel write chipTK, EBW+0x0498, 9*mask+(1-mask)*basel write chipTK, EBW+0x0499, 9*mask+(1-mask)*basel write chipTK, EBW+0x049A, 9*mask+(1-mask)*basel write chipTK, EBW+0x049B, 9*mask+(1-mask)*basel write chipTK, EBW+0x049C, 9*mask+(1-mask)*basel write chipTK, EBW+0x049D, 9*mask+(1-mask)*basel write chipTK, EBW+0x049E, 9*mask+(1-mask)*basel write chipTK, EBW+0x049F, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x04A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x04AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x04B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x04BF, 9*mask+(1-mask)*basel // Channel 10 write chipTK, EBW+0x0500, 9*mask+(1-mask)*basel write chipTK, EBW+0x0501, 9*mask+(1-mask)*basel write chipTK, EBW+0x0502, 9*mask+(1-mask)*basel write chipTK, EBW+0x0503, 9*mask+(1-mask)*basel write chipTK, EBW+0x0504, 9*mask+(1-mask)*basel write chipTK, EBW+0x0505, 9*mask+(1-mask)*basel write chipTK, EBW+0x0506, 9*mask+(1-mask)*basel write chipTK, EBW+0x0507, 9*mask+(1-mask)*basel write chipTK, EBW+0x0508, 9*mask+(1-mask)*basel write chipTK, EBW+0x0509, 9*mask+(1-mask)*basel write chipTK, EBW+0x050A, 9*mask+(1-mask)*basel write chipTK, EBW+0x050B, 9*mask+(1-mask)*basel write chipTK, EBW+0x050C, 9*mask+(1-mask)*basel write chipTK, EBW+0x050D, 9*mask+(1-mask)*basel write chipTK, EBW+0x050E, 9*mask+(1-mask)*basel write chipTK, EBW+0x050F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0510, 9*mask+(1-mask)*basel write chipTK, EBW+0x0511, 9*mask+(1-mask)*basel write chipTK, EBW+0x0512, 9*mask+(1-mask)*basel write chipTK, EBW+0x0513, 9*mask+(1-mask)*basel write chipTK, EBW+0x0514, 9*mask+(1-mask)*basel write chipTK, EBW+0x0515, 9*mask+(1-mask)*basel write chipTK, EBW+0x0516, 9*mask+(1-mask)*basel write chipTK, EBW+0x0517, 9*mask+(1-mask)*basel write chipTK, EBW+0x0518, 9*mask+(1-mask)*basel write chipTK, EBW+0x0519, 9*mask+(1-mask)*basel write chipTK, EBW+0x051A, 9*mask+(1-mask)*basel write chipTK, EBW+0x051B, 9*mask+(1-mask)*basel write chipTK, EBW+0x051C, 9*mask+(1-mask)*basel write chipTK, EBW+0x051D, 9*mask+(1-mask)*basel write chipTK, EBW+0x051E, 9*mask+(1-mask)*basel write chipTK, EBW+0x051F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0520, 9*mask+(1-mask)*basel write chipTK, EBW+0x0521, 9*mask+(1-mask)*basel write chipTK, EBW+0x0522, 9*mask+(1-mask)*basel write chipTK, EBW+0x0523, 9*mask+(1-mask)*basel write chipTK, EBW+0x0524, 9*mask+(1-mask)*basel write chipTK, EBW+0x0525, 9*mask+(1-mask)*basel write chipTK, EBW+0x0526, 9*mask+(1-mask)*basel write chipTK, EBW+0x0527, 9*mask+(1-mask)*basel write chipTK, EBW+0x0528, 9*mask+(1-mask)*basel write chipTK, EBW+0x0529, 9*mask+(1-mask)*basel write chipTK, EBW+0x052A, 9*mask+(1-mask)*basel write chipTK, EBW+0x052B, 9*mask+(1-mask)*basel write chipTK, EBW+0x052C, 9*mask+(1-mask)*basel write chipTK, EBW+0x052D, 9*mask+(1-mask)*basel write chipTK, EBW+0x052E, 9*mask+(1-mask)*basel write chipTK, EBW+0x052F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0530, 9*mask+(1-mask)*basel write chipTK, EBW+0x0531, 9*mask+(1-mask)*basel write chipTK, EBW+0x0532, 9*mask+(1-mask)*basel write chipTK, EBW+0x0533, 9*mask+(1-mask)*basel write chipTK, EBW+0x0534, 9*mask+(1-mask)*basel write chipTK, EBW+0x0535, 9*mask+(1-mask)*basel write chipTK, EBW+0x0536, 9*mask+(1-mask)*basel write chipTK, EBW+0x0537, 9*mask+(1-mask)*basel write chipTK, EBW+0x0538, 9*mask+(1-mask)*basel write chipTK, EBW+0x0539, 9*mask+(1-mask)*basel write chipTK, EBW+0x053A, 9*mask+(1-mask)*basel write chipTK, EBW+0x053B, 9*mask+(1-mask)*basel write chipTK, EBW+0x053C, 9*mask+(1-mask)*basel write chipTK, EBW+0x053D, 9*mask+(1-mask)*basel write chipTK, EBW+0x053E, 9*mask+(1-mask)*basel write chipTK, EBW+0x053F, 9*mask+(1-mask)*basel // Channel 11 write chipTK, EBW+0x0580, 9*mask+(1-mask)*basel write chipTK, EBW+0x0581, 9*mask+(1-mask)*basel write chipTK, EBW+0x0582, 9*mask+(1-mask)*basel write chipTK, EBW+0x0583, 9*mask+(1-mask)*basel write chipTK, EBW+0x0584, 9*mask+(1-mask)*basel write chipTK, EBW+0x0585, 9*mask+(1-mask)*basel write chipTK, EBW+0x0586, 9*mask+(1-mask)*basel write chipTK, EBW+0x0587, 9*mask+(1-mask)*basel write chipTK, EBW+0x0588, 9*mask+(1-mask)*basel write chipTK, EBW+0x0589, 9*mask+(1-mask)*basel write chipTK, EBW+0x058A, 9*mask+(1-mask)*basel write chipTK, EBW+0x058B, 9*mask+(1-mask)*basel write chipTK, EBW+0x058C, 9*mask+(1-mask)*basel write chipTK, EBW+0x058D, 9*mask+(1-mask)*basel write chipTK, EBW+0x058E, 9*mask+(1-mask)*basel write chipTK, EBW+0x058F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0590, 9*mask+(1-mask)*basel write chipTK, EBW+0x0591, 9*mask+(1-mask)*basel write chipTK, EBW+0x0592, 9*mask+(1-mask)*basel write chipTK, EBW+0x0593, 9*mask+(1-mask)*basel write chipTK, EBW+0x0594, 9*mask+(1-mask)*basel write chipTK, EBW+0x0595, 9*mask+(1-mask)*basel write chipTK, EBW+0x0596, 9*mask+(1-mask)*basel write chipTK, EBW+0x0597, 9*mask+(1-mask)*basel write chipTK, EBW+0x0598, 9*mask+(1-mask)*basel write chipTK, EBW+0x0599, 9*mask+(1-mask)*basel write chipTK, EBW+0x059A, 9*mask+(1-mask)*basel write chipTK, EBW+0x059B, 9*mask+(1-mask)*basel write chipTK, EBW+0x059C, 9*mask+(1-mask)*basel write chipTK, EBW+0x059D, 9*mask+(1-mask)*basel write chipTK, EBW+0x059E, 9*mask+(1-mask)*basel write chipTK, EBW+0x059F, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x05A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x05AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x05B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x05BF, 9*mask+(1-mask)*basel // Channel 12 write chipTK, EBW+0x0600, 9*mask+(1-mask)*basel write chipTK, EBW+0x0601, 9*mask+(1-mask)*basel write chipTK, EBW+0x0602, 9*mask+(1-mask)*basel write chipTK, EBW+0x0603, 9*mask+(1-mask)*basel write chipTK, EBW+0x0604, 9*mask+(1-mask)*basel write chipTK, EBW+0x0605, 9*mask+(1-mask)*basel write chipTK, EBW+0x0606, 9*mask+(1-mask)*basel write chipTK, EBW+0x0607, 9*mask+(1-mask)*basel write chipTK, EBW+0x0608, 9*mask+(1-mask)*basel write chipTK, EBW+0x0609, 9*mask+(1-mask)*basel write chipTK, EBW+0x060A, 9*mask+(1-mask)*basel write chipTK, EBW+0x060B, 9*mask+(1-mask)*basel write chipTK, EBW+0x060C, 9*mask+(1-mask)*basel write chipTK, EBW+0x060D, 9*mask+(1-mask)*basel write chipTK, EBW+0x060E, 9*mask+(1-mask)*basel write chipTK, EBW+0x060F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0610, 9*mask+(1-mask)*basel write chipTK, EBW+0x0611, 9*mask+(1-mask)*basel write chipTK, EBW+0x0612, 9*mask+(1-mask)*basel write chipTK, EBW+0x0613, 9*mask+(1-mask)*basel write chipTK, EBW+0x0614, 9*mask+(1-mask)*basel write chipTK, EBW+0x0615, 9*mask+(1-mask)*basel write chipTK, EBW+0x0616, 9*mask+(1-mask)*basel write chipTK, EBW+0x0617, 9*mask+(1-mask)*basel write chipTK, EBW+0x0618, 9*mask+(1-mask)*basel write chipTK, EBW+0x0619, 9*mask+(1-mask)*basel write chipTK, EBW+0x061A, 9*mask+(1-mask)*basel write chipTK, EBW+0x061B, 9*mask+(1-mask)*basel write chipTK, EBW+0x061C, 9*mask+(1-mask)*basel write chipTK, EBW+0x061D, 9*mask+(1-mask)*basel write chipTK, EBW+0x061E, 9*mask+(1-mask)*basel write chipTK, EBW+0x061F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0620, 9*mask+(1-mask)*basel write chipTK, EBW+0x0621, 9*mask+(1-mask)*basel write chipTK, EBW+0x0622, 9*mask+(1-mask)*basel write chipTK, EBW+0x0623, 9*mask+(1-mask)*basel write chipTK, EBW+0x0624, 9*mask+(1-mask)*basel write chipTK, EBW+0x0625, 9*mask+(1-mask)*basel write chipTK, EBW+0x0626, 9*mask+(1-mask)*basel write chipTK, EBW+0x0627, 9*mask+(1-mask)*basel write chipTK, EBW+0x0628, 9*mask+(1-mask)*basel write chipTK, EBW+0x0629, 9*mask+(1-mask)*basel write chipTK, EBW+0x062A, 9*mask+(1-mask)*basel write chipTK, EBW+0x062B, 9*mask+(1-mask)*basel write chipTK, EBW+0x062C, 9*mask+(1-mask)*basel write chipTK, EBW+0x062D, 9*mask+(1-mask)*basel write chipTK, EBW+0x062E, 9*mask+(1-mask)*basel write chipTK, EBW+0x062F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0630, 9*mask+(1-mask)*basel write chipTK, EBW+0x0631, 9*mask+(1-mask)*basel write chipTK, EBW+0x0632, 9*mask+(1-mask)*basel write chipTK, EBW+0x0633, 9*mask+(1-mask)*basel write chipTK, EBW+0x0634, 9*mask+(1-mask)*basel write chipTK, EBW+0x0635, 9*mask+(1-mask)*basel write chipTK, EBW+0x0636, 9*mask+(1-mask)*basel write chipTK, EBW+0x0637, 9*mask+(1-mask)*basel write chipTK, EBW+0x0638, 9*mask+(1-mask)*basel write chipTK, EBW+0x0639, 9*mask+(1-mask)*basel write chipTK, EBW+0x063A, 9*mask+(1-mask)*basel write chipTK, EBW+0x063B, 9*mask+(1-mask)*basel write chipTK, EBW+0x063C, 9*mask+(1-mask)*basel write chipTK, EBW+0x063D, 9*mask+(1-mask)*basel write chipTK, EBW+0x063E, 9*mask+(1-mask)*basel write chipTK, EBW+0x063F, 9*mask+(1-mask)*basel // Channel 13 write chipTK, EBW+0x0680, 9*mask+(1-mask)*basel write chipTK, EBW+0x0681, 9*mask+(1-mask)*basel write chipTK, EBW+0x0682, 9*mask+(1-mask)*basel write chipTK, EBW+0x0683, 9*mask+(1-mask)*basel write chipTK, EBW+0x0684, 9*mask+(1-mask)*basel write chipTK, EBW+0x0685, 9*mask+(1-mask)*basel write chipTK, EBW+0x0686, 9*mask+(1-mask)*basel write chipTK, EBW+0x0687, 9*mask+(1-mask)*basel write chipTK, EBW+0x0688, 9*mask+(1-mask)*basel write chipTK, EBW+0x0689, 9*mask+(1-mask)*basel write chipTK, EBW+0x068A, 9*mask+(1-mask)*basel write chipTK, EBW+0x068B, 9*mask+(1-mask)*basel write chipTK, EBW+0x068C, 9*mask+(1-mask)*basel write chipTK, EBW+0x068D, 9*mask+(1-mask)*basel write chipTK, EBW+0x068E, 9*mask+(1-mask)*basel write chipTK, EBW+0x068F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0690, 9*mask+(1-mask)*basel write chipTK, EBW+0x0691, 9*mask+(1-mask)*basel write chipTK, EBW+0x0692, 9*mask+(1-mask)*basel write chipTK, EBW+0x0693, 9*mask+(1-mask)*basel write chipTK, EBW+0x0694, 9*mask+(1-mask)*basel write chipTK, EBW+0x0695, 9*mask+(1-mask)*basel write chipTK, EBW+0x0696, 9*mask+(1-mask)*basel write chipTK, EBW+0x0697, 9*mask+(1-mask)*basel write chipTK, EBW+0x0698, 9*mask+(1-mask)*basel write chipTK, EBW+0x0699, 9*mask+(1-mask)*basel write chipTK, EBW+0x069A, 9*mask+(1-mask)*basel write chipTK, EBW+0x069B, 9*mask+(1-mask)*basel write chipTK, EBW+0x069C, 9*mask+(1-mask)*basel write chipTK, EBW+0x069D, 9*mask+(1-mask)*basel write chipTK, EBW+0x069E, 9*mask+(1-mask)*basel write chipTK, EBW+0x069F, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x06A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x06AF, 9*mask+(1-mask)*basel + secadc*5 write chipTK, EBW+0x06B0, 9*mask+(1-mask)*basel + secadc*1 write chipTK, EBW+0x06B1, 9*mask+(1-mask)*basel + secadc*2 write chipTK, EBW+0x06B2, 9*mask+(1-mask)*basel + secadc*3 write chipTK, EBW+0x06B3, 9*mask+(1-mask)*basel + secadc*4 write chipTK, EBW+0x06B4, 9*mask+(1-mask)*basel + secadc*5 write chipTK, EBW+0x06B5, 9*mask+(1-mask)*basel + secadc*6 write chipTK, EBW+0x06B6, 9*mask+(1-mask)*basel + secadc*7 write chipTK, EBW+0x06B7, 9*mask+(1-mask)*basel + secadc*8 write chipTK, EBW+0x06B8, 9*mask+(1-mask)*basel + secadc*9 write chipTK, EBW+0x06B9, 9*mask+(1-mask)*basel + secadc*10 write chipTK, EBW+0x06BA, 9*mask+(1-mask)*basel + secadc*11 write chipTK, EBW+0x06BB, 9*mask+(1-mask)*basel + secadc*12 write chipTK, EBW+0x06BC, 9*mask+(1-mask)*basel + secadc*13 write chipTK, EBW+0x06BD, 9*mask+(1-mask)*basel + secadc*14 write chipTK, EBW+0x06BE, 9*mask+(1-mask)*basel + secadc*15 write chipTK, EBW+0x06BF, 9*mask+(1-mask)*basel + secadc*16 // Channel 14 write chipTK, EBW+0x0700, 9*mask+(1-mask)*basel write chipTK, EBW+0x0701, 9*mask+(1-mask)*basel write chipTK, EBW+0x0702, 9*mask+(1-mask)*basel write chipTK, EBW+0x0703, 9*mask+(1-mask)*basel write chipTK, EBW+0x0704, 9*mask+(1-mask)*basel write chipTK, EBW+0x0705, 9*mask+(1-mask)*basel write chipTK, EBW+0x0706, 9*mask+(1-mask)*basel write chipTK, EBW+0x0707, 9*mask+(1-mask)*basel write chipTK, EBW+0x0708, 9*mask+(1-mask)*basel write chipTK, EBW+0x0709, 9*mask+(1-mask)*basel write chipTK, EBW+0x070A, 9*mask+(1-mask)*basel write chipTK, EBW+0x070B, 9*mask+(1-mask)*basel write chipTK, EBW+0x070C, 9*mask+(1-mask)*basel write chipTK, EBW+0x070D, 9*mask+(1-mask)*basel write chipTK, EBW+0x070E, 9*mask+(1-mask)*basel write chipTK, EBW+0x070F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0710, 9*mask+(1-mask)*basel write chipTK, EBW+0x0711, 9*mask+(1-mask)*basel write chipTK, EBW+0x0712, 9*mask+(1-mask)*basel write chipTK, EBW+0x0713, 9*mask+(1-mask)*basel write chipTK, EBW+0x0714, 9*mask+(1-mask)*basel write chipTK, EBW+0x0715, 9*mask+(1-mask)*basel write chipTK, EBW+0x0716, 9*mask+(1-mask)*basel write chipTK, EBW+0x0717, 9*mask+(1-mask)*basel write chipTK, EBW+0x0718, 9*mask+(1-mask)*basel write chipTK, EBW+0x0719, 9*mask+(1-mask)*basel write chipTK, EBW+0x071A, 9*mask+(1-mask)*basel write chipTK, EBW+0x071B, 9*mask+(1-mask)*basel write chipTK, EBW+0x071C, 9*mask+(1-mask)*basel write chipTK, EBW+0x071D, 9*mask+(1-mask)*basel write chipTK, EBW+0x071E, 9*mask+(1-mask)*basel write chipTK, EBW+0x071F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0720, 9*mask+(1-mask)*basel write chipTK, EBW+0x0721, 9*mask+(1-mask)*basel write chipTK, EBW+0x0722, 9*mask+(1-mask)*basel write chipTK, EBW+0x0723, 9*mask+(1-mask)*basel write chipTK, EBW+0x0724, 9*mask+(1-mask)*basel write chipTK, EBW+0x0725, 9*mask+(1-mask)*basel write chipTK, EBW+0x0726, 9*mask+(1-mask)*basel write chipTK, EBW+0x0727, 9*mask+(1-mask)*basel write chipTK, EBW+0x0728, 9*mask+(1-mask)*basel write chipTK, EBW+0x0729, 9*mask+(1-mask)*basel write chipTK, EBW+0x072A, 9*mask+(1-mask)*basel write chipTK, EBW+0x072B, 9*mask+(1-mask)*basel write chipTK, EBW+0x072C, 9*mask+(1-mask)*basel write chipTK, EBW+0x072D, 9*mask+(1-mask)*basel write chipTK, EBW+0x072E, 9*mask+(1-mask)*basel write chipTK, EBW+0x072F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0730, 9*mask+(1-mask)*basel write chipTK, EBW+0x0731, 9*mask+(1-mask)*basel write chipTK, EBW+0x0732, 9*mask+(1-mask)*basel write chipTK, EBW+0x0733, 9*mask+(1-mask)*basel write chipTK, EBW+0x0734, 9*mask+(1-mask)*basel write chipTK, EBW+0x0735, 9*mask+(1-mask)*basel write chipTK, EBW+0x0736, 9*mask+(1-mask)*basel write chipTK, EBW+0x0737, 9*mask+(1-mask)*basel write chipTK, EBW+0x0738, 9*mask+(1-mask)*basel write chipTK, EBW+0x0739, 9*mask+(1-mask)*basel write chipTK, EBW+0x073A, 9*mask+(1-mask)*basel write chipTK, EBW+0x073B, 9*mask+(1-mask)*basel write chipTK, EBW+0x073C, 9*mask+(1-mask)*basel write chipTK, EBW+0x073D, 9*mask+(1-mask)*basel write chipTK, EBW+0x073E, 9*mask+(1-mask)*basel write chipTK, EBW+0x073F, 9*mask+(1-mask)*basel // Channel 15 write chipTK, EBW+0x0780, 9*mask+(1-mask)*basel write chipTK, EBW+0x0781, 9*mask+(1-mask)*basel write chipTK, EBW+0x0782, 9*mask+(1-mask)*basel write chipTK, EBW+0x0783, 9*mask+(1-mask)*basel write chipTK, EBW+0x0784, 9*mask+(1-mask)*basel write chipTK, EBW+0x0785, 9*mask+(1-mask)*basel write chipTK, EBW+0x0786, 9*mask+(1-mask)*basel write chipTK, EBW+0x0787, 9*mask+(1-mask)*basel write chipTK, EBW+0x0788, 9*mask+(1-mask)*basel write chipTK, EBW+0x0789, 9*mask+(1-mask)*basel write chipTK, EBW+0x078A, 9*mask+(1-mask)*basel write chipTK, EBW+0x078B, 9*mask+(1-mask)*basel write chipTK, EBW+0x078C, 9*mask+(1-mask)*basel write chipTK, EBW+0x078D, 9*mask+(1-mask)*basel write chipTK, EBW+0x078E, 9*mask+(1-mask)*basel write chipTK, EBW+0x078F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0790, 9*mask+(1-mask)*basel write chipTK, EBW+0x0791, 9*mask+(1-mask)*basel write chipTK, EBW+0x0792, 9*mask+(1-mask)*basel write chipTK, EBW+0x0793, 9*mask+(1-mask)*basel write chipTK, EBW+0x0794, 9*mask+(1-mask)*basel write chipTK, EBW+0x0795, 9*mask+(1-mask)*basel write chipTK, EBW+0x0796, 9*mask+(1-mask)*basel write chipTK, EBW+0x0797, 9*mask+(1-mask)*basel write chipTK, EBW+0x0798, 9*mask+(1-mask)*basel write chipTK, EBW+0x0799, 9*mask+(1-mask)*basel write chipTK, EBW+0x079A, 9*mask+(1-mask)*basel write chipTK, EBW+0x079B, 9*mask+(1-mask)*basel write chipTK, EBW+0x079C, 9*mask+(1-mask)*basel write chipTK, EBW+0x079D, 9*mask+(1-mask)*basel write chipTK, EBW+0x079E, 9*mask+(1-mask)*basel write chipTK, EBW+0x079F, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x07A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x07AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x07B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x07BF, 9*mask+(1-mask)*basel // Channel 16 write chipTK, EBW+0x0800, 9*mask+(1-mask)*basel write chipTK, EBW+0x0801, 9*mask+(1-mask)*basel write chipTK, EBW+0x0802, 9*mask+(1-mask)*basel write chipTK, EBW+0x0803, 9*mask+(1-mask)*basel write chipTK, EBW+0x0804, 9*mask+(1-mask)*basel write chipTK, EBW+0x0805, 9*mask+(1-mask)*basel write chipTK, EBW+0x0806, 9*mask+(1-mask)*basel write chipTK, EBW+0x0807, 9*mask+(1-mask)*basel write chipTK, EBW+0x0808, 9*mask+(1-mask)*basel write chipTK, EBW+0x0809, 9*mask+(1-mask)*basel write chipTK, EBW+0x080A, 9*mask+(1-mask)*basel write chipTK, EBW+0x080B, 9*mask+(1-mask)*basel write chipTK, EBW+0x080C, 9*mask+(1-mask)*basel write chipTK, EBW+0x080D, 9*mask+(1-mask)*basel write chipTK, EBW+0x080E, 9*mask+(1-mask)*basel write chipTK, EBW+0x080F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0810, 9*mask+(1-mask)*basel write chipTK, EBW+0x0811, 9*mask+(1-mask)*basel write chipTK, EBW+0x0812, 9*mask+(1-mask)*basel write chipTK, EBW+0x0813, 9*mask+(1-mask)*basel write chipTK, EBW+0x0814, 9*mask+(1-mask)*basel write chipTK, EBW+0x0815, 9*mask+(1-mask)*basel write chipTK, EBW+0x0816, 9*mask+(1-mask)*basel write chipTK, EBW+0x0817, 9*mask+(1-mask)*basel write chipTK, EBW+0x0818, 9*mask+(1-mask)*basel write chipTK, EBW+0x0819, 9*mask+(1-mask)*basel write chipTK, EBW+0x081A, 9*mask+(1-mask)*basel write chipTK, EBW+0x081B, 9*mask+(1-mask)*basel write chipTK, EBW+0x081C, 9*mask+(1-mask)*basel write chipTK, EBW+0x081D, 9*mask+(1-mask)*basel write chipTK, EBW+0x081E, 9*mask+(1-mask)*basel write chipTK, EBW+0x081F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0820, 9*mask+(1-mask)*basel + lateadc*2 write chipTK, EBW+0x0821, 9*mask+(1-mask)*basel + lateadc*1 write chipTK, EBW+0x0822, 9*mask+(1-mask)*basel + lateadc*2 write chipTK, EBW+0x0823, 9*mask+(1-mask)*basel + lateadc*3 write chipTK, EBW+0x0824, 9*mask+(1-mask)*basel + lateadc*4 write chipTK, EBW+0x0825, 9*mask+(1-mask)*basel + lateadc*5 write chipTK, EBW+0x0826, 9*mask+(1-mask)*basel + lateadc*6 write chipTK, EBW+0x0827, 9*mask+(1-mask)*basel + lateadc*7 write chipTK, EBW+0x0828, 9*mask+(1-mask)*basel + lateadc*8 write chipTK, EBW+0x0829, 9*mask+(1-mask)*basel + lateadc*9 write chipTK, EBW+0x082A, 9*mask+(1-mask)*basel + lateadc*10 write chipTK, EBW+0x082B, 9*mask+(1-mask)*basel + lateadc*11 write chipTK, EBW+0x082C, 9*mask+(1-mask)*basel + lateadc*12 write chipTK, EBW+0x082D, 9*mask+(1-mask)*basel + lateadc*13 write chipTK, EBW+0x082E, 9*mask+(1-mask)*basel + lateadc*14 write chipTK, EBW+0x082F, 9*mask+(1-mask)*basel + lateadc*15 write chipTK, EBW+0x0830, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0831, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0832, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0833, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0834, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0835, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0836, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0837, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0838, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x0839, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083A, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083B, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083C, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083D, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083E, 9*mask+(1-mask)*basel + lateadc*16 write chipTK, EBW+0x083F, 9*mask+(1-mask)*basel + lateadc*16 // Channel 17 write chipTK, EBW+0x0880, 9*mask+(1-mask)*basel write chipTK, EBW+0x0881, 9*mask+(1-mask)*basel write chipTK, EBW+0x0882, 9*mask+(1-mask)*basel write chipTK, EBW+0x0883, 9*mask+(1-mask)*basel write chipTK, EBW+0x0884, 9*mask+(1-mask)*basel write chipTK, EBW+0x0885, 9*mask+(1-mask)*basel write chipTK, EBW+0x0886, 9*mask+(1-mask)*basel write chipTK, EBW+0x0887, 9*mask+(1-mask)*basel write chipTK, EBW+0x0888, 9*mask+(1-mask)*basel write chipTK, EBW+0x0889, 9*mask+(1-mask)*basel write chipTK, EBW+0x088A, 9*mask+(1-mask)*basel write chipTK, EBW+0x088B, 9*mask+(1-mask)*basel write chipTK, EBW+0x088C, 9*mask+(1-mask)*basel write chipTK, EBW+0x088D, 9*mask+(1-mask)*basel write chipTK, EBW+0x088E, 9*mask+(1-mask)*basel write chipTK, EBW+0x088F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0890, 9*mask+(1-mask)*basel write chipTK, EBW+0x0891, 9*mask+(1-mask)*basel write chipTK, EBW+0x0892, 9*mask+(1-mask)*basel write chipTK, EBW+0x0893, 9*mask+(1-mask)*basel write chipTK, EBW+0x0894, 9*mask+(1-mask)*basel write chipTK, EBW+0x0895, 9*mask+(1-mask)*basel write chipTK, EBW+0x0896, 9*mask+(1-mask)*basel write chipTK, EBW+0x0897, 9*mask+(1-mask)*basel write chipTK, EBW+0x0898, 9*mask+(1-mask)*basel write chipTK, EBW+0x0899, 9*mask+(1-mask)*basel write chipTK, EBW+0x089A, 9*mask+(1-mask)*basel write chipTK, EBW+0x089B, 9*mask+(1-mask)*basel write chipTK, EBW+0x089C, 9*mask+(1-mask)*basel write chipTK, EBW+0x089D, 9*mask+(1-mask)*basel write chipTK, EBW+0x089E, 9*mask+(1-mask)*basel write chipTK, EBW+0x089F, 9*mask+(1-mask)*basel write chipTK, EBW+0x08A0, 9*mask+(1-mask)*basel + earladc*15 write chipTK, EBW+0x08A1, 9*mask+(1-mask)*basel + earladc*14 write chipTK, EBW+0x08A2, 9*mask+(1-mask)*basel + earladc*13 write chipTK, EBW+0x08A3, 9*mask+(1-mask)*basel + earladc*12 write chipTK, EBW+0x08A4, 9*mask+(1-mask)*basel + earladc*11 write chipTK, EBW+0x08A5, 9*mask+(1-mask)*basel + earladc*10 write chipTK, EBW+0x08A6, 9*mask+(1-mask)*basel + earladc*9 write chipTK, EBW+0x08A7, 9*mask+(1-mask)*basel + earladc*8 write chipTK, EBW+0x08A8, 9*mask+(1-mask)*basel + earladc*7 write chipTK, EBW+0x08A9, 9*mask+(1-mask)*basel + earladc*6 write chipTK, EBW+0x08AA, 9*mask+(1-mask)*basel + earladc*5 write chipTK, EBW+0x08AB, 9*mask+(1-mask)*basel + earladc*4 write chipTK, EBW+0x08AC, 9*mask+(1-mask)*basel + earladc*3 write chipTK, EBW+0x08AD, 9*mask+(1-mask)*basel + earladc*2 write chipTK, EBW+0x08AE, 9*mask+(1-mask)*basel + earladc*1 write chipTK, EBW+0x08AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x08B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x08BF, 9*mask+(1-mask)*basel // Channel 18 write chipTK, EBW+0x0900, 9*mask+(1-mask)*basel write chipTK, EBW+0x0901, 9*mask+(1-mask)*basel write chipTK, EBW+0x0902, 9*mask+(1-mask)*basel write chipTK, EBW+0x0903, 9*mask+(1-mask)*basel write chipTK, EBW+0x0904, 9*mask+(1-mask)*basel write chipTK, EBW+0x0905, 9*mask+(1-mask)*basel write chipTK, EBW+0x0906, 9*mask+(1-mask)*basel write chipTK, EBW+0x0907, 9*mask+(1-mask)*basel write chipTK, EBW+0x0908, 9*mask+(1-mask)*basel write chipTK, EBW+0x0909, 9*mask+(1-mask)*basel write chipTK, EBW+0x090A, 9*mask+(1-mask)*basel write chipTK, EBW+0x090B, 9*mask+(1-mask)*basel write chipTK, EBW+0x090C, 9*mask+(1-mask)*basel write chipTK, EBW+0x090D, 9*mask+(1-mask)*basel write chipTK, EBW+0x090E, 9*mask+(1-mask)*basel write chipTK, EBW+0x090F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0910, 9*mask+(1-mask)*basel write chipTK, EBW+0x0911, 9*mask+(1-mask)*basel write chipTK, EBW+0x0912, 9*mask+(1-mask)*basel write chipTK, EBW+0x0913, 9*mask+(1-mask)*basel write chipTK, EBW+0x0914, 9*mask+(1-mask)*basel write chipTK, EBW+0x0915, 9*mask+(1-mask)*basel write chipTK, EBW+0x0916, 9*mask+(1-mask)*basel write chipTK, EBW+0x0917, 9*mask+(1-mask)*basel write chipTK, EBW+0x0918, 9*mask+(1-mask)*basel write chipTK, EBW+0x0919, 9*mask+(1-mask)*basel write chipTK, EBW+0x091A, 9*mask+(1-mask)*basel write chipTK, EBW+0x091B, 9*mask+(1-mask)*basel write chipTK, EBW+0x091C, 9*mask+(1-mask)*basel write chipTK, EBW+0x091D, 9*mask+(1-mask)*basel write chipTK, EBW+0x091E, 9*mask+(1-mask)*basel write chipTK, EBW+0x091F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0920, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0921, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0922, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0923, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0924, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0925, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0926, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0927, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0928, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0929, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092A, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092B, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092C, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092D, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092E, cadc*mask+(1-mask)*basel write chipTK, EBW+0x092F, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0930, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0931, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0932, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0933, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0934, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0935, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0936, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0937, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0938, cadc*mask+(1-mask)*basel write chipTK, EBW+0x0939, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093A, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093B, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093C, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093D, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093E, cadc*mask+(1-mask)*basel write chipTK, EBW+0x093F, cadc*mask+(1-mask)*basel // Channel 19 write chipTK, EBW+0x0980, 9*mask+(1-mask)*basel write chipTK, EBW+0x0981, 9*mask+(1-mask)*basel write chipTK, EBW+0x0982, 9*mask+(1-mask)*basel write chipTK, EBW+0x0983, 9*mask+(1-mask)*basel write chipTK, EBW+0x0984, 9*mask+(1-mask)*basel write chipTK, EBW+0x0985, 9*mask+(1-mask)*basel write chipTK, EBW+0x0986, 9*mask+(1-mask)*basel write chipTK, EBW+0x0987, 9*mask+(1-mask)*basel write chipTK, EBW+0x0988, 9*mask+(1-mask)*basel write chipTK, EBW+0x0989, 9*mask+(1-mask)*basel write chipTK, EBW+0x098A, 9*mask+(1-mask)*basel write chipTK, EBW+0x098B, 9*mask+(1-mask)*basel write chipTK, EBW+0x098C, 9*mask+(1-mask)*basel write chipTK, EBW+0x098D, 9*mask+(1-mask)*basel write chipTK, EBW+0x098E, 9*mask+(1-mask)*basel write chipTK, EBW+0x098F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0990, 9*mask+(1-mask)*basel write chipTK, EBW+0x0991, 9*mask+(1-mask)*basel write chipTK, EBW+0x0992, 9*mask+(1-mask)*basel write chipTK, EBW+0x0993, 9*mask+(1-mask)*basel write chipTK, EBW+0x0994, 9*mask+(1-mask)*basel write chipTK, EBW+0x0995, 9*mask+(1-mask)*basel write chipTK, EBW+0x0996, 9*mask+(1-mask)*basel write chipTK, EBW+0x0997, 9*mask+(1-mask)*basel write chipTK, EBW+0x0998, 9*mask+(1-mask)*basel write chipTK, EBW+0x0999, 9*mask+(1-mask)*basel write chipTK, EBW+0x099A, 9*mask+(1-mask)*basel write chipTK, EBW+0x099B, 9*mask+(1-mask)*basel write chipTK, EBW+0x099C, 9*mask+(1-mask)*basel write chipTK, EBW+0x099D, 9*mask+(1-mask)*basel write chipTK, EBW+0x099E, 9*mask+(1-mask)*basel write chipTK, EBW+0x099F, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A0, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A1, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A2, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A3, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A4, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A5, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A6, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A7, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A8, 9*mask+(1-mask)*basel write chipTK, EBW+0x09A9, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AA, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AB, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AC, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AD, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AE, 9*mask+(1-mask)*basel write chipTK, EBW+0x09AF, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B0, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B1, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B2, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B3, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B4, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B5, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B6, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B7, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B8, 9*mask+(1-mask)*basel write chipTK, EBW+0x09B9, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BA, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BB, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BC, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BD, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BE, 9*mask+(1-mask)*basel write chipTK, EBW+0x09BF, 9*mask+(1-mask)*basel // Channel 20 write chipTK, EBW+0x0A00, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A01, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A02, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A03, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A04, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A05, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A06, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A07, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A08, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A09, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0A, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0B, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0C, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0D, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0E, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A0F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A10, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A11, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A12, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A13, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A14, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A15, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A16, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A17, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A18, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A19, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1A, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1B, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1C, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1D, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1E, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A1F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A20, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A21, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A22, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A23, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A24, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A25, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A26, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A27, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A28, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A29, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2A, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2B, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2C, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2D, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2E, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A2F, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A30, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A31, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A32, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A33, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A34, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A35, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A36, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A37, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A38, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A39, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3A, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3B, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3C, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3D, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3E, 9*mask+(1-mask)*basel write chipTK, EBW+0x0A3F, 9*mask+(1-mask)*basel // reset FILCLK register write chipTK, FILCLK, 7