const dut = 1;
// enable hamming correction
write MEMCOR, 0x1FF
// DMEM conf
write DMDELA, 8
write DMDELS, 11

const nchips = 1;

const nwords = 63;

const cnt_mode = 1; // 1 or 0 for counter/pseudorandom
//const simple_test_n  = 0xFFFF; // counter or pseudorandom
//const simple_test_n  = 0xFFFF0000; // only two test pattern words
const simple_test_n  = 0x0000FFFF; // or 0

const oase_mode  = 1; // 1 or 0

const root_flag  = 1; // 1 or 0

const L0time= 0x00004050;
const L1time= 0x000042BC+100;   // the start of readout, no confirm, used only internally
const L2time= 0x00004230+24+100; // this is for ALICE the L1A

// all delays can be from 0 to 7

// configuration for DUT -> FPGA readout
// all delays:    min .best. max
const f_ctrl_delay = 3;  // 2 .3. 4 stable

const f_data_delay0 = 3; //
const f_data_delay1 = 3; //
const f_data_delay2 = 3; //
const f_data_delay3 = 3; //
const f_data_delay4 = 3; //   3..6
const f_data_delay5 = 3; //
const f_data_delay6 = 3; //
const f_data_delay7 = 3; //
const f_data_delay8 = 3; //
const f_data_delay9 = 3; //

const f_strb_delay = 3; //
const f_false_bit  = 8; // 0..9
const f_parit_bit  = 9; // 0..9