// Svn $Id: adc2cpu.tcs 1949 2008-02-18 20:13:19Z angelov $:

write ADCMSK, 0; // this is only for the event buffers
write NIODE, 0;  // minimize the power
// reprogram the start address of the IRQ ACQ
write IA0+IRQ_ACQ, lbl_ADC2CPU_cpu0;
write IA1+IRQ_ACQ, lbl_ADC2CPU_cpu1;
write IA2+IRQ_ACQ, lbl_ADC2CPU_cpu2;
write IA3+IRQ_ACQ, lbl_ADC2CPU_cpu3;

// Start Address  CPU   ADCs
// 0x100..0x107     0  0.. 7
// 0x100..0x107     1  5..12
// 0x100..0x107     2  9..16
// 0x100..0x107     3 13..20

restrict two_adcs_two_mcms
lio_adc1 = 0x107; // first ADC
lio_adc2 = 0x100; // second ADC
write  chip0,   C10CPU3, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO
write  chip3,   C10CPU0, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO

nwords_adc = 0x3000; // 3*size of IMEM

saddr_adc  = 0x8000; // IMEM0 + IMEM1 + IMEM2
write  chip0,   C11CPU3, ((nwords_adc-1) << 16) | saddr_adc;
saddr_adc  = 0x9000; // IMEM1 + IMEM2 + IMEM3
write  chip3,   C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;


restrict one_adc_one_mcm
lio_adc1 = 0x100; // first ADC
lio_adc2 = 0x000; // no second ADC
write  chip3,   C10CPU0, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO
write           C10CPU0, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO

nwords_adc = 0x3000; // 3*size of IMEM

saddr_adc  = 0x9000; // IMEM1 + IMEM2 + IMEM3
write  chip3,   C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;
write           C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;

restrict two_adcs_one_mcm
lio_adc1 = 0x107; // first ADC
lio_adc2 = 0x000; // no second ADC
write  chip3,   C10CPU0, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO
lio_adc1 = 0x102; // here the same ADC channel read by the other CPU
write  chip3,   C10CPU1, (lio_adc2 << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO

nwords_adc = 0x1000; // size of IMEM

saddr_adc  = 0xA000; // IMEM2
write  chip3,   C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;
saddr_adc  = 0xB000; // IMEM3
write  chip3,   C11CPU1, ((nwords_adc-1) << 16) | saddr_adc;

restrict one_adc_one_mcm_dec
lio_adc1 = 0x100; // first ADC
dec      = 100;
write  chip3,   C10CPU0, (1 << 31) | (dec << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO
write           C10CPU0, (1 << 31) | (dec << 16) | lio_adc1;  // the address(es) of the ADC(s) in LIO

nwords_adc = 0x3000; // 3*size of IMEM

saddr_adc  = 0x9000; // IMEM1 + IMEM2 + IMEM3
write  chip3,   C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;
write           C11CPU0, ((nwords_adc-1) << 16) | saddr_adc;