Assembler for MIMD-TRAP2/3 (c) V.Angelov, v3.6, Dec 2007 SVN Revision 0, SVN Date 2007-12-27 Please send any comments to: angelov@kip.uni-heidelberg.de 18:34:32 / 21 Apr 2008 Source code file: src/LUTtst.asm Memory initialisation file: Log file: wrk/cpu0.log Program memory size in words: 4096 Default constants, read from /cad/tools/bin/asm_mimd.inc 1 CPU0 = 2 CC_SIGNED = 0X14 3 CC_NSIGNED = 0X04 4 CC_ZERO = 0X11 5 CC_NZERO = 0X01 6 CC_OVERFL = 0X13 7 CC_NOVERFL = 0X03 8 CC_NEG = 0X12 9 CC_NNEG = 0X02 10 CC_CARRY = 0X10 11 CC_NCARRY = 0X00 12 CC_BUSY = 0X17 13 CC_NBUSY = 0X07 14 CC_DIVB = 0X15 15 CC_NDIVB = 0X05 16 CC_ERRDIV = 0X16 17 CC_NERRDIV = 0X06 18 CC_UNCOND = 0X0F 19 CC_EQ = 0X11 20 CC_NEQ = 0X01 21 CC_NEG = 0X12 22 CC_POS0 = 0X02 23 CC_LTS = 0X14 24 CC_GES = 0X04 25 CC_LTU = 0X10 26 CC_GEU = 0X00 27 CC_LES = 0X19 28 CC_GTS = 0X09 29 CC_LEU = 0X18 30 CC_GTU = 0X08 31 RR_BYTE = 3 32 RR_WORD = 1 33 RR_DWORD = 0 34 LRA1 = LRA 3, 35 LRA2 = LRA 1, 36 LRA4 = LRA 0, 37 LRA4+ = LRA+ 0, 38 XOR = EOR 39 NOT = COM 40 SHLT = SHL 41 ANDT = AND 42 R0 = PRF[0] 43 R1 = PRF[1] 44 R2 = PRF[2] 45 R3 = PRF[3] 46 R4 = PRF[4] 47 R5 = PRF[5] 48 R6 = PRF[6] 49 R7 = PRF[7] 50 R8 = PRF[8] 51 R9 = PRF[9] 52 R10 = PRF[10] 53 R11 = PRF[11] 54 R12 = PRF[12] 55 R13 = PRF[13] 56 R14 = PRF[14] 57 R15 = PRF[15] 58 G0 = GRF[0] 59 G1 = GRF[1] 60 G2 = GRF[2] 61 G3 = GRF[3] 62 G4 = GRF[4] 63 G5 = GRF[5] 64 G6 = GRF[6] 65 G7 = GRF[7] 66 G8 = GRF[8] 67 G9 = GRF[9] 68 G10 = GRF[10] 69 G11 = GRF[11] 70 G12 = GRF[12] 71 G13 = GRF[13] 72 G14 = GRF[14] 73 G15 = GRF[15] 74 F0 = FIT[0] 75 F1 = FIT[1] 76 F2 = FIT[2] 77 F3 = FIT[3] 78 F4 = FIT[4] 79 F5 = FIT[5] 80 F6 = FIT[6] 81 F7 = FIT[7] 82 F8 = FIT[8] 83 F9 = FIT[9] 84 F10 = FIT[10] 85 F11 = FIT[11] 86 F12 = FIT[12] 87 F13 = FIT[13] 88 F14 = FIT[14] 89 F15 = FIT[15] 90 C0 = CON[0] 91 C1 = CON[1] 92 C2 = CON[2] 93 C3 = CON[3] 94 C4 = CON[4] 95 C5 = CON[5] 96 C6 = CON[6] 97 C7 = CON[7] 98 C8 = CON[8] 99 C9 = CON[9] 100 C10 = CON[10] 101 C11 = CON[11] 102 C12 = CON[12] 103 C13 = CON[13] 104 C14 = CON[14] 105 C15 = CON[15] 106 ASM_SVN_REV = 0 1: ; Full test of the LUTs by the cpu3. 2: ; The number of the errors is stored in 0xF000 for 3: 4: ; DEFINITIONS, USED IN THE PROGRAM CODE: 5: 6: #def work=PRF[1] ; register for current opera 7: #def rdata=PRF[2] ; data red by test_programs 8: #def tdata=PRF[3] ; test_vector to be writen 9: #def errnum=PRF[4] ; contains the number of err 10: #def return1=PRF[5] ; return address (at first l 11: #def return2=PRF[6] ; return address (at second 12: #def return3=PRF[7] ; return address (at third l 13: #def tdgen=PRF[8] ; test data generator code l 14: #def itdgen=PRF[9] ; init tdgen code label 15: #def psrmask=PRF[10] ; mask for test_vector 16: #def bitnum=PRF[12] ; =32 minus the number of bi 17: ; prf11 and prf13 are used inside the testing rout 18: 19: #def ioaddr=PRF[14] ; contains the autoincrement 20: #def errstore=PRF[15] ; autoincrement address for 21: 22: #def firstaddress=grf[1] ; first address of the t 23: #def lastaddress=grf[2] ; last address of the te 24: 25: #def MEMRW=0xD000 ; the address of the registe 26: #def IAFIRST=0xE000 ; first address of IMEM 27: #def IADEND =0xEFFF ; last address of IMEM 28: #def DAFRSTG=0xE000 ; first address of DMEM via 29: #def DADENDG=0xE3FF ; last address of DMEM via G 30: #def DAFIRST=0x0000 ; first address of DMEM as R 31: #def DADEND =0x0FFC ; last address of DMEM as RA 32: #def DBFST=0xF000 ; first address of DBANK (tr 33: #def DBEND=0xF0FF ; last address of DBANK (tra 34: 35: ; masks of certain length 36: #def BITMASK24=0x0FFFFFF 37: #def BITMASK32=0xFFFFFFFF 38: #def BITMASK12=0x00000FFF 39: #def BITMASK13=0x00001FFF 40: 41: start: nop 0000 : 0000_0000_0000_0000_0000_0000 42: 43: #ifdef cpu3 44: mov c0 errnum 45: ; LUT tes 46: mov 0x3F psrmask 47: mov 26 bitnum 48: iext 0x3100 49: mov 0x3100 firstaddress 50: iext 0x3140 51: mov 0x3140 lastaddress 52: mvpcr +2 return1 53: jmp cc_uncond cltst 54: jmpr cc_busy 0 55: iext 0xF000 56: sgio errnum 0xF000 ; store th 57: 58: 59: mov c0 errnum 60: mov 0x1F psrmask 61: mov 27 bitnum 62: iext 0x3180 63: mov 0x3180 firstaddress 64: iext 0x3200 65: mov 0x3200 lastaddress 66: mvpcr +2 return1 67: jmp cc_uncond cltst ; ... end 68: 69: jmpr cc_busy 0 70: iext 0xF001 71: sgio errnum 0xF001 ; store th 72: 73: lp: jmpr cc_busy 0 ; ... tran 74: mov b0_0111 work 75: sgio work 0xA26 76: jmpr cc_busy 0 77: mov 0x012 work 78: sgio work 0xA04 ; ... low pow 79: end: jmp cc_uncond, end ; END OF TH 80: 81: 82: ; SUBROUTINES BELOW 83: ; BEGIN THE TESTING ROUTINE (use 84: cltst: mov 1 r11 85: mov 1 r13 86: 87: nt: mov wlk0 tdgen ; call walking 88: mov iwlk0 itdgen 89: mvpcr +2 return2 90: jmp cc_uncond tstgio 91: 92: mov wlk1 tdgen ; call walking 93: mov iwlk1 itdgen ; 94: mvpcr +2 return2 95: jmp cc_uncond tstgio 96: 97: mov psr tdgen ; call pseudo 98: mov ipsr itdgen 99: mvpcr +2 return2 100: jmp cc_uncond tstgio 101: 102: add r13 c3 r13 ; next initial vector 103: shl 1 r11 r11 ; testing routines 104: jmp cc_carry return1 105: mov bitnum work 106: mov 15 rdata 107: mov r11 r0 108: cmp rdata bitnum 109: jmpr cc_ncarry 3 110: shl 15 r0 r0 111: sub work rdata work 112: shlt work r0 ; if MSB of the cur 113: jmp cc_ncarry nt 114: jmp cc_uncond return1 115: 116: ; END OF THE TESTING ROUTINE 117: 118: 119: 120: ; BEGIN OF THE SUBROUTINE (used by testin 121: ; rolls all addresses and tests by w/r th 122: tstgio: mvpcr +2 return3 123: jmp cc_uncond itdgen ; go to init 124: ; BEGIN WRI 125: mov firstaddress ioaddr 126: wd: jmpr cc_busy 0 127: sgio+ tdata ; writing t 128: mvpcr +2 return3 ; runs the g 129: jmp cc_uncond tdgen 130: cmp ioaddr lastaddress ;IADEND 131: jmp cc_carry wd ; if yes: 132: 133: ; BEGIN COM 134: mov firstaddress ioaddr 135: 136: mvpcr +2 return3 137: jmp cc_uncond itdgen ; and go to 138: 139: wc: jmpr cc_busy 0 ; here is th 140: lgio+ 0 ; reading ea 141: jmpr cc_busy 0 ; comparing 142: lpio 0x300 rdata ; data stored 143: cmp rdata tdata ; 144: jmp cc_zero noerr ; if err_or 145: add errnum c1 errnum ; errnum is i 146: 147: noerr: mvpcr +2 return3 148: jmp cc_uncond tdgen ; get next 149: 150: cmp ioaddr lastaddress ; is tne l 151: jmp cc_carry wc ; if not g 152: 153: jmp cc_uncond return2 154: 155: ; prepares the next data - walking 1 156: wlk1: shl 1 tdata tdata 157: and tdata psrmask tdata 158: jmp cc_nzero return3 159: mov c1 tdata 160: jmp cc_uncond return3 161: ; end of walking 1 162: 163: ; prepares the next data - walking 0 164: wlk0: com tdata tdata 165: shl 1 tdata tdata 166: and tdata psrmask tdata 167: jmpr cc_nzero +2 168: mov 1 tdata 169: com tdata tdata 170: and tdata psrmask tdata 171: jmp cc_uncond return3 172: ; end of walking 0 173: 174: ; prepares the next data by pseudo random generato 175: psr: lpio 0x202 tdata 176: and tdata psrmask tdata 177: jmp cc_uncond return3 178: ; end random generator 179: 180: ; init walking 1 181: iwlk1: mov r11 tdata 182: jmp cc_uncond return3 183: 184: ; init walking 0 185: iwlk0: com r11 tdata 186: and tdata psrmask tdata 187: jmp cc_uncond return3 188: 189: ; init psr 190: ;#ifdef trap3 191: ipsr: mov b1_0_0_00_01_11111 tdata 192: ;#else 193: ;ipsr: mov b1_0_0_00_01_1111 tdata 194: ;#endif 195: mov 31 r0 196: sub r0 bitnum r0 197: ;#ifdef trap3 198: ;#else 199: ; cmp r0 16 200: ; jmpr cc_carry 2 201: ; mov 15 r0 202: ;#endif 203: or tdata r0 tdata 204: spio tdata 0x201 205: mov r13 tdata 206: spio tdata 0x200 207: nop 208: nop 209: lpio 0x202 tdata 210: jmp cc_uncond return3 211: #endif Source file read, 0 error(s), 0 warning(s).