Assembler for MIMD-TRAP2/3 (c) V.Angelov, v3.6, Dec 2007 SVN Revision 0, SVN Date 2007-12-27 Please send any comments to: angelov@kip.uni-heidelberg.de 17:58:26 / 21 Apr 2008 Source code file: src/IMMtst.asm Memory initialisation file: Log file: wrk/cpu2.log Program memory size in words: 4096 Default constants, read from /cad/tools/bin/asm_mimd.inc 1 CPU2 = 2 CC_SIGNED = 0X14 3 CC_NSIGNED = 0X04 4 CC_ZERO = 0X11 5 CC_NZERO = 0X01 6 CC_OVERFL = 0X13 7 CC_NOVERFL = 0X03 8 CC_NEG = 0X12 9 CC_NNEG = 0X02 10 CC_CARRY = 0X10 11 CC_NCARRY = 0X00 12 CC_BUSY = 0X17 13 CC_NBUSY = 0X07 14 CC_DIVB = 0X15 15 CC_NDIVB = 0X05 16 CC_ERRDIV = 0X16 17 CC_NERRDIV = 0X06 18 CC_UNCOND = 0X0F 19 CC_EQ = 0X11 20 CC_NEQ = 0X01 21 CC_NEG = 0X12 22 CC_POS0 = 0X02 23 CC_LTS = 0X14 24 CC_GES = 0X04 25 CC_LTU = 0X10 26 CC_GEU = 0X00 27 CC_LES = 0X19 28 CC_GTS = 0X09 29 CC_LEU = 0X18 30 CC_GTU = 0X08 31 RR_BYTE = 3 32 RR_WORD = 1 33 RR_DWORD = 0 34 LRA1 = LRA 3, 35 LRA2 = LRA 1, 36 LRA4 = LRA 0, 37 LRA4+ = LRA+ 0, 38 XOR = EOR 39 NOT = COM 40 SHLT = SHL 41 ANDT = AND 42 R0 = PRF[0] 43 R1 = PRF[1] 44 R2 = PRF[2] 45 R3 = PRF[3] 46 R4 = PRF[4] 47 R5 = PRF[5] 48 R6 = PRF[6] 49 R7 = PRF[7] 50 R8 = PRF[8] 51 R9 = PRF[9] 52 R10 = PRF[10] 53 R11 = PRF[11] 54 R12 = PRF[12] 55 R13 = PRF[13] 56 R14 = PRF[14] 57 R15 = PRF[15] 58 G0 = GRF[0] 59 G1 = GRF[1] 60 G2 = GRF[2] 61 G3 = GRF[3] 62 G4 = GRF[4] 63 G5 = GRF[5] 64 G6 = GRF[6] 65 G7 = GRF[7] 66 G8 = GRF[8] 67 G9 = GRF[9] 68 G10 = GRF[10] 69 G11 = GRF[11] 70 G12 = GRF[12] 71 G13 = GRF[13] 72 G14 = GRF[14] 73 G15 = GRF[15] 74 F0 = FIT[0] 75 F1 = FIT[1] 76 F2 = FIT[2] 77 F3 = FIT[3] 78 F4 = FIT[4] 79 F5 = FIT[5] 80 F6 = FIT[6] 81 F7 = FIT[7] 82 F8 = FIT[8] 83 F9 = FIT[9] 84 F10 = FIT[10] 85 F11 = FIT[11] 86 F12 = FIT[12] 87 F13 = FIT[13] 88 F14 = FIT[14] 89 F15 = FIT[15] 90 C0 = CON[0] 91 C1 = CON[1] 92 C2 = CON[2] 93 C3 = CON[3] 94 C4 = CON[4] 95 C5 = CON[5] 96 C6 = CON[6] 97 C7 = CON[7] 98 C8 = CON[8] 99 C9 = CON[9] 100 C10 = CON[10] 101 C11 = CON[11] 102 C12 = CON[12] 103 C13 = CON[13] 104 C14 = CON[14] 105 C15 = CON[15] 106 ASM_SVN_REV = 0 1: ; IMEM testing routine. Performs full test of IMEM 2: ; The number of the errors, counted by cpu(n) is s 3: 4: ; DEFINITIONS, USED IN THE PROGRAM CODE: 5: 6: #def work=PRF[1] ; register for current opera 7: #def rdata=PRF[2] ; data red by test_programs 8: #def tdata=PRF[3] ; test_vector to be writen 9: #def errnum=PRF[4] ; contains the number of err 10: #def return1=PRF[5] ; return address (at first l 11: #def return2=PRF[6] ; return address (at second 12: #def return3=PRF[7] ; return address (at third l 13: #def tdgen=PRF[8] ; test data generator code l 14: #def itdgen=PRF[9] ; init tdgen code label 15: #def psrmask=PRF[10] ; mask for test_vector 16: #def bitnum=PRF[12] ; =32 minus the number of bi 17: ; prf11 and prf13 are used inside the testing rout 18: 19: #def ioaddr=PRF[14] ; contains the autoincrement 20: #def errstore=PRF[15] ; autoincrement address for 21: 22: #def firstaddress=grf[1] ; first address of the t 23: #def lastaddress=grf[2] ; last address of the te 24: 25: #def MEMRW=0xD000 ; the address of the registe 26: #def IAFIRST=0xE000 ; first address of IMEM 27: #def IADEND =0xEFFF ; last address of IMEM 28: ;#def DAFRSTG=0xE000 ; first address of DMEM via 29: ;#def DADENDG=0xE3FF ; last address of DMEM via 30: ;#def DAFIRST=0x0000 ; first address of DMEM as 31: ;#def DADEND =0x0FFC ; last address of DMEM as R 32: #def DBFST=0xF000 ; first address of DBANK (tr 33: #def DBEND=0xF0FF ; last address of DBANK (tra 34: 35: ; masks of certain length 36: #def BITMASK24=0x0FFFFFF 37: #def BITMASK32=0xFFFFFFFF 38: #def BITMASK12=0x00000FFF 39: #def BITMASK13=0x00001FFF 40: 41: 42: #def IMMTST0=b0010_01_1 43: #def IMMTRS0=b0010_11_1 44: #def ITSCLK0=0xA20 45: #def NXTCLK0=0xA22 46: #def IMMTST1=b0100_10_1 47: #def IMMTRS1=b0100_00_1 48: #def ITSCLK1=0xA22 49: #def NXTCLK1=0xA24 50: #def IMMTST2=b1000_11_1 51: #def IMMTRS2=b1000_01_1 52: #def ITSCLK2=0xA24 53: #def NXTCLK2=0xA26 54: #def IMMTST3=b0001_00_1 55: #def IMMTRS3=b0001_10_1 56: #def ITSCLK3=0xA26 57: #def NXTCLK3=0xA20 58: 59: 60: nop 0000 : 0000_0000_0000_0000_0000_0000 61: 62: iext 0xF000 0001 : 0101_0000_0000_0000_0000_1111 63: mov 0xF000 r14 0002 : 1100_0110_0000_0000_0000_1110 64: add r14 c5 r14 0003 : 1000_0010_1110_0110_1010_1110 65: 66: iext 0xA5A5A5A5 0004 : 0101_0000_0101_1010_0101_1010 67: mov 0xA5A5A5A5 r0 0005 : 1100_0110_1011_0100_1010_0000 68: 69: jmpr cc_busy 0 0006 : 0000_0100_0000_0000_1101_0111 70: sgio+ r0 0007 : 0011_1100_0000_0000_0000_0000 71: 72: mov c0 errnum ; clear t 0008 : 1100_0010_0000_0110_0000_0100 73: ; in readout board, 74: mov c5 work ; in 0x3055 is the 0009 : 1100_0010_0000_0110_1010_0001 75: cmp work c0 000A : 1000_1000_0001_0110_0000_0000 76: cmp work c0 000B : 1000_1000_0001_0110_0000_0000 77: jmp cc_neq cp1 ; branch to 000C : 0000_0100_0000_0000_0000_0001 78: ; cpu0 tas 79: 80: iext 0x3055 ; following 000D : 0101_0000_0000_0000_0000_0011 81: mov 0x3055 r14 ; to make t 000E : 1100_0110_0000_1010_1010_1110 82: 83: lgio 0 r14 ; if in con 000F : 1110_1000_0000_0001_1100_0000 84: jmpr cc_busy 0 ; in 0x3055 0010 : 0000_0100_0000_0010_0001_0111 85: lpio 0x300 r0 ; will run 0011 : 1110_0110_0110_0000_0000_0000 86: jmpr cc_busy 0 ; otherwise 0012 : 0000_0100_0000_0010_0101_0111 87: ; this opti 88: and r0 c1 r0 ; if we wan 0013 : 1010_0110_0000_0110_0010_0000 89: cmp r0 c1 ; in some c 0014 : 1000_1000_0000_0110_0010_0000 90: cmp r0 c1 0015 : 1000_1000_0000_0110_0010_0000 91: jmp cc_zero go 0016 : 0000_0100_0000_0000_0001_0001 92: 93: ; mov c1 r1 94: ; jmpr cc_busy 0 95: ; sgio r1 r14 96: 97: jmpr cc_busy 0 0017 : 0000_0100_0000_0010_1111_0111 98: mov c0 r0 0018 : 1100_0010_0000_0110_0000_0000 99: sgio r0 ITSCLK0 0019 : 0010_1000_0000_1010_0010_0000 100: mov 0x12 r0 001A : 1100_0110_0000_0010_0100_0000 101: sgio r0 0xA04 001B : 0010_1000_0000_1010_0000_0100 102: jmpr cc_uncond 0 001C : 0000_0100_0000_0011_1000_1111 103: go: 104: mov c0 r1 ; when runnin 001D : 1100_0010_0000_0110_0000_0001 105: jmpr cc_busy 0 ; next pretri 001E : 0000_0100_0000_0011_1101_0111 106: sgio r1 r14 001F : 0010_0100_0001_0001_1100_0000 107: 108: mov IMMTST0 work ; initiate fo 0020 : 1100_0110_0000_0010_0110_0001 109: jmpr cc_busy 0 0021 : 0000_0100_0000_0100_0011_0111 110: iext MEMRW 0022 : 0101_0000_0000_0000_0000_1101 111: sgio work MEMRW 0023 : 0010_1000_0001_0000_0000_0000 112: 113: 114: iext IAFIRST ; initialy 0024 : 0101_0000_0000_0000_0000_1110 115: mov IAFIRST r14 0025 : 1100_0110_0000_0000_0000_1110 116: iext IADEND 0026 : 0101_0000_0000_0000_0000_1110 117: mov IADEND r0 0027 : 1100_0111_1111_1111_1110_0000 118: mov c0 r1 0028 : 1100_0010_0000_0110_0000_0001 119: sgio+ r1 0029 : 0011_1100_0001_0000_0000_0000 120: jmpr cc_busy 0 002A : 0000_0100_0000_0101_0101_0111 121: cmp r14 r0 002B : 1000_1000_1110_0000_0000_0000 122: jmpr cc_ltu -3 002C : 0000_0100_0000_0101_0011_0000 123: iext 0xD011 002D : 0101_0000_0000_0000_0000_1101 124: sgio r1 0xD011 ; clear HC 002E : 0010_1000_0001_0000_0001_0001 125: 126: mvpcr +2 return1 ; call ini 002F : 1100_0110_0000_0110_0010_0101 127: jmp cc_uncond iintst 0030 : 0000_0100_0000_0000_0000_1111 128: mvpcr +2 return1 ; call tes 0031 : 1100_0110_0000_0110_0110_0101 129: jmp cc_uncond cltst 0032 : 0000_0100_0000_0000_0000_1111 130: 131: iext 0xF000 0033 : 0101_0000_0000_0000_0000_1111 132: mov 0xF000 work 0034 : 1100_0110_0000_0000_0000_0001 133: add work c5 work 0035 : 1000_0010_0001_0110_1010_0001 134: sgio errnum work 0036 : 0010_0100_0100_0000_0010_0000 135: ; subroutine transfering previos IMEM into next IM 136: mov IMMTRS0 work 0037 : 1100_0110_0000_0010_1110_0001 137: mvpcr +2 return1 0038 : 1100_0110_0000_0111_0100_0101 138: jmp cc_uncond trsf 0039 : 0000_0100_0000_0000_0000_1111 139: ; end copying the IMEM 140: 141: ; turn_on next cpu clock 142: mov c1 work 003A : 1100_0010_0000_0110_0010_0001 143: jmpr cc_busy 0 003B : 0000_0100_0000_0111_0111_0111 144: sgio work NXTCLK0 003C : 0010_1000_0001_1010_0010_0010 145: jmpr cc_busy 0 003D : 0000_0100_0000_0111_1011_0111 146: mov c0 work 003E : 1100_0010_0000_0110_0000_0001 147: sgio work ITSCLK0 003F : 0010_1000_0001_1010_0010_0000 148: jmpr cc_uncond 0 0040 : 0000_0100_0000_1000_0000_1111 149: ; ... and stops itself 150: cp1: mov c5 work 0041 : 1100_0010_0000_0110_1010_0001 151: cmp work c1 0042 : 1000_1000_0001_0110_0010_0000 152: cmp work c1 0043 : 1000_1000_0001_0110_0010_0000 153: jmp cc_nzero cp2 0044 : 0000_0100_0000_0000_0000_0001 154: 155: mov IMMTST1 work ; initiate fo 0045 : 1100_0110_0000_0100_1010_0001 156: jmpr cc_busy 0 0046 : 0000_0100_0000_1000_1101_0111 157: iext MEMRW 0047 : 0101_0000_0000_0000_0000_1101 158: sgio work MEMRW 0048 : 0010_1000_0001_0000_0000_0000 159: 160: iext IAFIRST ; initialy 0049 : 0101_0000_0000_0000_0000_1110 161: mov IAFIRST r14 004A : 1100_0110_0000_0000_0000_1110 162: iext IADEND 004B : 0101_0000_0000_0000_0000_1110 163: mov IADEND r0 004C : 1100_0111_1111_1111_1110_0000 164: mov c0 r1 004D : 1100_0010_0000_0110_0000_0001 165: sgio+ r1 004E : 0011_1100_0001_0000_0000_0000 166: jmpr cc_busy 0 004F : 0000_0100_0000_1001_1111_0111 167: cmp r14 r0 0050 : 1000_1000_1110_0000_0000_0000 168: jmpr cc_ltu -3 0051 : 0000_0100_0000_1001_1101_0000 169: iext 0xD012 0052 : 0101_0000_0000_0000_0000_1101 170: sgio r1 0xD012 ; clear HC 0053 : 0010_1000_0001_0000_0001_0010 171: 172: mvpcr +2 return1 ; call ini 0054 : 1100_0110_0000_1010_1100_0101 173: jmp cc_uncond iintst 0055 : 0000_0100_0000_0000_0000_1111 174: mvpcr +2 return1 ; call tes 0056 : 1100_0110_0000_1011_0000_0101 175: jmp cc_uncond cltst 0057 : 0000_0100_0000_0000_0000_1111 176: 177: iext 0xF000 0058 : 0101_0000_0000_0000_0000_1111 178: mov 0xF000 work 0059 : 1100_0110_0000_0000_0000_0001 179: add work c5 work 005A : 1000_0010_0001_0110_1010_0001 180: sgio errnum work 005B : 0010_0100_0100_0000_0010_0000 181: ; subroutine transfering previos IMEM into next IM 182: mov IMMTRS1 work 005C : 1100_0110_0000_0100_0010_0001 183: mvpcr +2 return1 005D : 1100_0110_0000_1011_1110_0101 184: jmp cc_uncond trsf 005E : 0000_0100_0000_0000_0000_1111 185: ; end copying the IMEM 186: 187: ; turn_on next cpu clock 188: mov c1 work 005F : 1100_0010_0000_0110_0010_0001 189: jmpr cc_busy 0 0060 : 0000_0100_0000_1100_0001_0111 190: sgio work NXTCLK1 0061 : 0010_1000_0001_1010_0010_0100 191: jmpr cc_busy 0 0062 : 0000_0100_0000_1100_0101_0111 192: mov c0 work 0063 : 1100_0010_0000_0110_0000_0001 193: sgio work ITSCLK1 0064 : 0010_1000_0001_1010_0010_0010 194: jmpr cc_uncond 0 0065 : 0000_0100_0000_1100_1010_1111 195: ; ... and stops itself 196: 197: cp2: mov c5 work 0066 : 1100_0010_0000_0110_1010_0001 198: cmp work c2 0067 : 1000_1000_0001_0110_0100_0000 199: cmp work c2 0068 : 1000_1000_0001_0110_0100_0000 200: jmp cc_nzero cp3 0069 : 0000_0100_0000_0000_0000_0001 201: 202: mov IMMTST2 work ; initiate fo 006A : 1100_0110_0000_1000_1110_0001 203: jmpr cc_busy 0 006B : 0000_0100_0000_1101_0111_0111 204: iext MEMRW 006C : 0101_0000_0000_0000_0000_1101 205: sgio work MEMRW 006D : 0010_1000_0001_0000_0000_0000 206: 207: 208: iext IAFIRST ; initialy 006E : 0101_0000_0000_0000_0000_1110 209: mov IAFIRST r14 006F : 1100_0110_0000_0000_0000_1110 210: iext IADEND 0070 : 0101_0000_0000_0000_0000_1110 211: mov IADEND r0 0071 : 1100_0111_1111_1111_1110_0000 212: mov c0 r1 0072 : 1100_0010_0000_0110_0000_0001 213: sgio+ r1 0073 : 0011_1100_0001_0000_0000_0000 214: jmpr cc_busy 0 0074 : 0000_0100_0000_1110_1001_0111 215: cmp r14 r0 0075 : 1000_1000_1110_0000_0000_0000 216: jmpr cc_ltu -3 0076 : 0000_0100_0000_1110_0111_0000 217: iext 0xD013 0077 : 0101_0000_0000_0000_0000_1101 218: sgio r1 0xD013 ; clear HC 0078 : 0010_1000_0001_0000_0001_0011 219: 220: mvpcr +2 return1 ; call ini 0079 : 1100_0110_0000_1111_0110_0101 221: jmp cc_uncond iintst 007A : 0000_0100_0000_0000_0000_1111 222: mvpcr +2 return1 ; call tes 007B : 1100_0110_0000_1111_1010_0101 223: jmp cc_uncond cltst 007C : 0000_0100_0000_0000_0000_1111 224: 225: iext 0xF000 007D : 0101_0000_0000_0000_0000_1111 226: mov 0xF000 work 007E : 1100_0110_0000_0000_0000_0001 227: add work c5 work 007F : 1000_0010_0001_0110_1010_0001 228: sgio errnum work 0080 : 0010_0100_0100_0000_0010_0000 229: 230: ; subroutine transfering previos IMEM into next IM 231: mov IMMTRS2 work 0081 : 1100_0110_0000_1000_0110_0001 232: mvpcr +2 return1 0082 : 1100_0110_0001_0000_1000_0101 233: jmp cc_uncond trsf 0083 : 0000_0100_0000_0000_0000_1111 234: ; end copying the IMEM 235: 236: ; turn_on next cpu clock 237: mov c1 work 0084 : 1100_0010_0000_0110_0010_0001 238: jmpr cc_busy 0 0085 : 0000_0100_0001_0000_1011_0111 239: sgio work NXTCLK2 0086 : 0010_1000_0001_1010_0010_0110 240: jmpr cc_busy 0 0087 : 0000_0100_0001_0000_1111_0111 241: mov c0 work 0088 : 1100_0010_0000_0110_0000_0001 242: sgio work ITSCLK2 0089 : 0010_1000_0001_1010_0010_0100 243: jmpr cc_uncond 0 008A : 0000_0100_0001_0001_0100_1111 244: ; ... and stops itself 245: 246: cp3: 247: mov IMMTST3 work ; initiate fo 008B : 1100_0110_0000_0001_0010_0001 248: jmpr cc_busy 0 008C : 0000_0100_0001_0001_1001_0111 249: iext MEMRW 008D : 0101_0000_0000_0000_0000_1101 250: sgio work MEMRW 008E : 0010_1000_0001_0000_0000_0000 251: 252: 253: iext IAFIRST ; initialy 008F : 0101_0000_0000_0000_0000_1110 254: mov IAFIRST r14 0090 : 1100_0110_0000_0000_0000_1110 255: iext IADEND 0091 : 0101_0000_0000_0000_0000_1110 256: mov IADEND r0 0092 : 1100_0111_1111_1111_1110_0000 257: mov c0 r1 0093 : 1100_0010_0000_0110_0000_0001 258: sgio+ r1 0094 : 0011_1100_0001_0000_0000_0000 259: jmpr cc_busy 0 0095 : 0000_0100_0001_0010_1011_0111 260: cmp r14 r0 0096 : 1000_1000_1110_0000_0000_0000 261: jmpr cc_ltu -3 0097 : 0000_0100_0001_0010_1001_0000 262: iext 0xD010 0098 : 0101_0000_0000_0000_0000_1101 263: sgio r1 0xD010 ; clear HC 0099 : 0010_1000_0001_0000_0001_0000 264: 265: mvpcr +2 return1 ; call ini 009A : 1100_0110_0001_0011_1000_0101 266: jmp cc_uncond iintst 009B : 0000_0100_0000_0000_0000_1111 267: mvpcr +2 return1 ; call tes 009C : 1100_0110_0001_0011_1100_0101 268: jmp cc_uncond cltst 009D : 0000_0100_0000_0000_0000_1111 269: 270: iext 0xF000 009E : 0101_0000_0000_0000_0000_1111 271: mov 0xF000 work 009F : 1100_0110_0000_0000_0000_0001 272: add work c5 work 00A0 : 1000_0010_0001_0110_1010_0001 273: sgio errnum work 00A1 : 0010_0100_0100_0000_0010_0000 274: 275: ; subroutine transfering previos IMEM into next IM 276: mov IMMTRS3 work 00A2 : 1100_0110_0000_0001_1010_0001 277: mvpcr +2 return1 00A3 : 1100_0110_0001_0100_1010_0101 278: jmp cc_uncond trsf 00A4 : 0000_0100_0000_0000_0000_1111 279: ; end copying the IMEM 280: 281: lp: jmpr cc_busy 0 ; ... tran 00A5 : 0000_0100_0001_0100_1011_0111 282: ; mov c0 work 283: ; sgio work 0xA21 284: ; jmpr cc_busy 0 285: ; mov 0x7 work 286: ; sgio work NXTCLK3 287: jmpr cc_busy 0 00A6 : 0000_0100_0001_0100_1101_0111 288: mov c0 work 00A7 : 1100_0010_0000_0110_0000_0001 289: sgio work ITSCLK3 00A8 : 0010_1000_0001_1010_0010_0110 290: mov 0x012 work 00A9 : 1100_0110_0000_0010_0100_0001 291: sgio work 0xA04 ; ... low pow 00AA : 0010_1000_0001_1010_0000_0100 292: end: jmp cc_uncond end ; END OF THE 00AB : 0000_0100_0000_0000_0000_1111 293: 294: 295: 296: ; SUBROUTINES BELOW 297: 298: ; ROUTINE, TRANSFERING IMEM_(n+3)_mod_4 INTO IMEM 299: trsf: jmpr cc_busy 0 00AC : 0000_0100_0001_0101_1001_0111 300: iext MEMRW 00AD : 0101_0000_0000_0000_0000_1101 301: sgio work MEMRW 00AE : 0010_1000_0001_0000_0000_0000 302: 303: iext IAFIRST 00AF : 0101_0000_0000_0000_0000_1110 304: mov IAFIRST ioaddr ; init ioadd 00B0 : 1100_0110_0000_0000_0000_1110 305: mov length work 00B1 : 1100_0110_0000_0000_0000_0001 306: add work ioaddr work ; work = end p 00B2 : 1000_0010_0001_0001_1100_0001 307: add work c1 work 00B3 : 1000_0010_0001_0110_0010_0001 308: 309: wk: jmpr cc_busy 0 ; writing in 00B4 : 0000_0100_0001_0110_1001_0111 310: lgio 0 ioaddr 00B5 : 1110_1000_0000_0001_1100_0000 311: jmpr cc_busy 0 00B6 : 0000_0100_0001_0110_1101_0111 312: lpio 0x300 rdata 00B7 : 1110_0110_0110_0000_0000_0010 313: sgio+ rdata 00B8 : 0011_1100_0010_0000_0000_0000 314: cmp ioaddr work 00B9 : 1000_1000_1110_0000_0010_0000 315: cmp ioaddr work 00BA : 1000_1000_1110_0000_0010_0000 316: jmp cc_nzero wk ; end writing 00BB : 0000_0100_0000_0000_0000_0001 317: 318: iext IADEND ; the end ad 00BC : 0101_0000_0000_0000_0000_1110 319: mov IADEND ioaddr 00BD : 1100_0111_1111_1111_1110_1110 320: sub ioaddr c1 ioaddr 00BE : 1000_1010_1110_0110_0010_1110 321: jmpr cc_busy 0 00BF : 0000_0100_0001_0111_1111_0111 322: lgio 0 ioaddr 00C0 : 1110_1000_0000_0001_1100_0000 323: jmpr cc_busy 0 00C1 : 0000_0100_0001_1000_0011_0111 324: lpio 0x300 rdata 00C2 : 1110_0110_0110_0000_0000_0010 325: sgio rdata ioaddr ; also should 00C3 : 0010_0100_0010_0001_1100_0000 326: jmp cc_uncond return1 00C4 : 0000_1000_0101_0000_0000_1111 327: ; END THE ROUTINE, TRANSFERING IMEM_(n+3)_mod_4 I 328: 329: ; INITIALIZATION OF THE IMEM TESTING ROUTINE 330: 331: iintst: iext BITMASK24 ; this param 00C5 : 0101_0000_0000_1111_1111_1111 332: mov BITMASK24 psrmask 00C6 : 1100_0111_1111_1111_1110_1010 333: mov 8 bitnum 00C7 : 1100_0110_0000_0001_0000_1100 334: iext IAFIRST 00C8 : 0101_0000_0000_0000_0000_1110 335: mov IAFIRST firstaddress 00C9 : 1100_0110_0000_0000_0001_0001 336: iext IADEND 00CA : 0101_0000_0000_0000_0000_1110 337: mov IADEND lastaddress 00CB : 1100_0111_1111_1111_1111_0010 338: jmp cc_uncond return1 00CC : 0000_1000_0101_0000_0000_1111 339: 340: ; END INITIALIZATION 341: 342: 343: ; BEGIN THE TESTING ROUTINE (uses testin 344: cltst: mov 1 r11 00CD : 1100_0110_0000_0000_0010_1011 345: mov 1 r13 00CE : 1100_0110_0000_0000_0010_1101 346: 347: nt: mov wlk0 tdgen ; call walking 00CF : 1100_0110_0000_0000_0000_1000 348: mov iwlk0 itdgen 00D0 : 1100_0110_0000_0000_0000_1001 349: mvpcr +2 return2 00D1 : 1100_0110_0001_1010_0110_0110 350: jmp cc_uncond tstgio 00D2 : 0000_0100_0000_0000_0000_1111 351: 352: mov wlk1 tdgen ; call walking 00D3 : 1100_0110_0000_0000_0000_1000 353: mov iwlk1 itdgen ; 00D4 : 1100_0110_0000_0000_0000_1001 354: mvpcr +2 return2 00D5 : 1100_0110_0001_1010_1110_0110 355: jmp cc_uncond tstgio 00D6 : 0000_0100_0000_0000_0000_1111 356: 357: mov psr tdgen ; call pseudo 00D7 : 1100_0110_0000_0000_0000_1000 358: mov ipsr itdgen 00D8 : 1100_0110_0000_0000_0000_1001 359: mvpcr +2 return2 00D9 : 1100_0110_0001_1011_0110_0110 360: jmp cc_uncond tstgio 00DA : 0000_0100_0000_0000_0000_1111 361: 362: add r13 c3 r13 ; next initial vector 00DB : 1000_0010_1101_0110_0110_1101 363: shl 1 r11 r11 ; testing routines 00DC : 1011_0010_0001_0001_0110_1011 364: jmp cc_carry return1 00DD : 0000_1000_0101_0000_0001_0000 365: mov bitnum work 00DE : 1100_0010_0000_0001_1000_0001 366: mov 15 rdata 00DF : 1100_0110_0000_0001_1110_0010 367: mov r11 r0 00E0 : 1100_0010_0000_0001_0110_0000 368: cmp rdata bitnum 00E1 : 1000_1000_0010_0001_1000_0000 369: cmp rdata bitnum 00E2 : 1000_1000_0010_0001_1000_0000 370: jmpr cc_ncarry 3 00E3 : 0000_0100_0001_1100_1100_0000 371: shl 15 r0 r0 00E4 : 1011_0010_1111_0000_0000_0000 372: sub work rdata work 00E5 : 1000_1010_0001_0000_0100_0001 373: shlt work r0 ; if MSB of the cur 00E6 : 0111_0000_0001_0000_0000_0000 374: jmp cc_ncarry nt 00E7 : 0000_0100_0000_0000_0000_0000 375: jmp cc_uncond return1 00E8 : 0000_1000_0101_0000_0000_1111 376: ; END OF THE TESTING ROUTINE 377: 378: 379: 380: ; BEGIN OF THE SUBROUTINE (used by testin 381: ; rolls all addresses and tests by w/r th 382: tstgio: mvpcr +2 return3 00E9 : 1100_0110_0001_1101_0110_0111 383: jmp cc_uncond itdgen ; go to init 00EA : 0000_1000_1001_0000_0000_1111 384: ; BEGIN WRI 385: mov firstaddress ioaddr 00EB : 1100_0010_0000_0010_0010_1110 386: wd: jmpr cc_busy 0 00EC : 0000_0100_0001_1101_1001_0111 387: sgio+ tdata ; writing t 00ED : 0011_1100_0011_0000_0000_0000 388: mvpcr +2 return3 ; runs the g 00EE : 1100_0110_0001_1110_0000_0111 389: jmp cc_uncond tdgen 00EF : 0000_1000_1000_0000_0000_1111 390: cmp ioaddr lastaddress ;IADEND 00F0 : 1000_1000_1110_0010_0100_0000 391: cmp ioaddr lastaddress ;IADEND 00F1 : 1000_1000_1110_0010_0100_0000 392: jmp cc_carry wd ; if yes: 00F2 : 0000_0100_0000_0000_0001_0000 393: 394: ; BEGIN COM 395: mov firstaddress ioaddr 00F3 : 1100_0010_0000_0010_0010_1110 396: 397: mvpcr +2 return3 00F4 : 1100_0110_0001_1110_1100_0111 398: jmp cc_uncond itdgen ; and go to 00F5 : 0000_1000_1001_0000_0000_1111 399: 400: wc: jmpr cc_busy 0 ; here is th 00F6 : 0000_0100_0001_1110_1101_0111 401: lgio+ 0 ; reading ea 00F7 : 1111_0100_0000_0000_0000_0000 402: jmpr cc_busy 0 ; comparing 00F8 : 0000_0100_0001_1111_0001_0111 403: lpio 0x300 rdata ; data stored 00F9 : 1110_0110_0110_0000_0000_0010 404: cmp rdata tdata ; 00FA : 1000_1000_0010_0000_0110_0000 405: cmp rdata tdata ; 00FB : 1000_1000_0010_0000_0110_0000 406: jmp cc_zero noerr ; if err_or 00FC : 0000_0100_0000_0000_0001_0001 407: add errnum c1 errnum ; errnum is i 00FD : 1000_0010_0100_0110_0010_0100 408: 409: cmp errnum 0x40 ; first 63 er 00FE : 1100_1000_0100_0000_0100_0000 410: jmp cc_geu noerr ; lead to sto 00FF : 0000_0100_0000_0000_0000_0000 411: mov 0x3F work ; F004-F042 - 0100 : 1100_0110_0000_0111_1110_0001 412: mul32 work c5 work ; F043-F081 - 0101 : 1001_0000_0001_0110_1010_1001 413: iext 0xF003 ; F082-F0C0 - 0102 : 0101_0000_0000_0000_0000_1111 414: mov 0xF003 g4 ; F0C1-F0FF - 0103 : 1100_0110_0000_0000_0111_0100 415: add work g4 work 0104 : 1000_0010_0001_0010_1000_0001 416: add work errnum work 0105 : 1000_0010_0001_0000_1000_0001 417: sgio ioaddr work 0106 : 0010_0100_1110_0000_0010_0000 418: 419: noerr: mvpcr +2 return3 0107 : 1100_0110_0010_0001_0010_0111 420: jmp cc_uncond tdgen ; get next 0108 : 0000_1000_1000_0000_0000_1111 421: 422: cmp ioaddr lastaddress ; is tne l 0109 : 1000_1000_1110_0010_0100_0000 423: cmp ioaddr lastaddress ; is tne l 010A : 1000_1000_1110_0010_0100_0000 424: jmp cc_carry wc ; if not g 010B : 0000_0100_0000_0000_0001_0000 425: 426: jmp cc_uncond return2 010C : 0000_1000_0110_0000_0000_1111 427: 428: ; prepares the next data - walking 1 429: wlk1: shl 1 tdata tdata 010D : 1011_0010_0001_0000_0110_0011 430: and tdata psrmask tdata 010E : 1010_0110_0011_0001_0100_0011 431: jmp cc_nzero return3 010F : 0000_1000_0111_0000_0000_0001 432: mov c1 tdata 0110 : 1100_0010_0000_0110_0010_0011 433: jmp cc_uncond return3 0111 : 0000_1000_0111_0000_0000_1111 434: ; end of walking 1 435: 436: ; prepares the next data - walking 0 437: wlk0: com tdata tdata 0112 : 1011_1110_0000_0000_0110_0011 438: shl 1 tdata tdata 0113 : 1011_0010_0001_0000_0110_0011 439: and tdata psrmask tdata 0114 : 1010_0110_0011_0001_0100_0011 440: jmpr cc_nzero +2 0115 : 0000_0100_0010_0010_1110_0001 441: mov 1 tdata 0116 : 1100_0110_0000_0000_0010_0011 442: com tdata tdata 0117 : 1011_1110_0000_0000_0110_0011 443: and tdata psrmask tdata 0118 : 1010_0110_0011_0001_0100_0011 444: jmp cc_uncond return3 0119 : 0000_1000_0111_0000_0000_1111 445: ; end of walking 0 446: 447: ; prepares the next data by pseudo random generato 448: psr: lpio 0x202 tdata 011A : 1110_0110_0100_0000_0100_0011 449: and tdata psrmask tdata 011B : 1010_0110_0011_0001_0100_0011 450: jmp cc_uncond return3 011C : 0000_1000_0111_0000_0000_1111 451: ; end random generator 452: 453: ; init walking 1 454: iwlk1: mov r11 tdata 011D : 1100_0010_0000_0001_0110_0011 455: jmp cc_uncond return3 011E : 0000_1000_0111_0000_0000_1111 456: 457: ; init walking 0 458: iwlk0: com r11 tdata 011F : 1011_1110_0000_0001_0110_0011 459: and tdata psrmask tdata 0120 : 1010_0110_0011_0001_0100_0011 460: jmp cc_uncond return3 0121 : 0000_1000_0111_0000_0000_1111 461: 462: ; init psr 463: ;#ifdef trap3 464: ipsr: mov b1_0_0_00_01_10111 tdata 0122 : 1100_0111_0000_0110_1110_0011 465: ;#else 466: ;ipsr: mov b1_0_0_00_01_1111 tdata 467: ;#endif 468: mov 31 r0 0123 : 1100_0110_0000_0011_1110_0000 469: sub r0 bitnum r0 0124 : 1000_1010_0000_0001_1000_0000 470: ;#ifdef trap3 471: ;#else 472: ; cmp r0 16 473: ; jmpr cc_carry 2 474: ; mov 15 r0 475: ;#endif 476: or tdata r0 tdata 0125 : 1010_1010_0011_0000_0000_0011 477: spio tdata 0x201 0126 : 0010_0000_0011_0010_0000_0001 478: mov r13 tdata 0127 : 1100_0010_0000_0001_1010_0011 479: spio tdata 0x200 0128 : 0010_0000_0011_0010_0000_0000 480: nop 0129 : 0000_0000_0000_0000_0000_0000 481: nop 012A : 0000_0000_0000_0000_0000_0000 482: lpio 0x202 tdata 012B : 1110_0110_0100_0000_0100_0011 483: jmp cc_uncond return3 012C : 0000_1000_0111_0000_0000_1111 484: 485: length: nop; 012D : 0000_0000_0000_0000_0000_0000 Source file read, 0 error(s), 0 warning(s).