// Common Timer Delay -- Do not change due to NI LVDS timing
write TPPT0, 90;
//
// Event Buffer Data Acquisition End
write TPPAE, 32;
//
// Response Time to GSM
write TPPGR, 33;
//
// Event Buffer Input Delay
write EBD, 0;
//
// Event Buffer Storage Mode
write EBSF, 0;
//
// Event Buffer Acquisition Offset Address
write EBAQA, 0;
//
// Event Buffer Simulation Mode
write EBSIM, 0;
//
// Event Buffer Simulation Offset Address
write EBSIA, 32;
//
// Event Buffer Parity Bit Mask
write EBPP, 1;
//
// Event Buffer Single Indicator Threshold
write EBIS, 40;
//
// Event Buffer Sum Indicator Threshold
write EBIT, 30;
//
// Event Buffer Indicator Look-up Table
write EBIL, 0xF0;
//
// Event Buffer Indicator Neighbor Sensitivity
write EBIN, 1;