Assembler for MIMD-TRAP2/3 (c) V.Angelov, v3.6, Dec 2007 SVN Revision 0, SVN Date 2007-12-27 Please send any comments to: angelov@kip.uni-heidelberg.de 17:58:30 / 21 Apr 2008 Source code file: src/DMPtst.asm Memory initialisation file: Log file: wrk/cpu3.log Program memory size in words: 4096 Default constants, read from /cad/tools/bin/asm_mimd.inc 1 CPU3 = 2 CC_SIGNED = 0X14 3 CC_NSIGNED = 0X04 4 CC_ZERO = 0X11 5 CC_NZERO = 0X01 6 CC_OVERFL = 0X13 7 CC_NOVERFL = 0X03 8 CC_NEG = 0X12 9 CC_NNEG = 0X02 10 CC_CARRY = 0X10 11 CC_NCARRY = 0X00 12 CC_BUSY = 0X17 13 CC_NBUSY = 0X07 14 CC_DIVB = 0X15 15 CC_NDIVB = 0X05 16 CC_ERRDIV = 0X16 17 CC_NERRDIV = 0X06 18 CC_UNCOND = 0X0F 19 CC_EQ = 0X11 20 CC_NEQ = 0X01 21 CC_NEG = 0X12 22 CC_POS0 = 0X02 23 CC_LTS = 0X14 24 CC_GES = 0X04 25 CC_LTU = 0X10 26 CC_GEU = 0X00 27 CC_LES = 0X19 28 CC_GTS = 0X09 29 CC_LEU = 0X18 30 CC_GTU = 0X08 31 RR_BYTE = 3 32 RR_WORD = 1 33 RR_DWORD = 0 34 LRA1 = LRA 3, 35 LRA2 = LRA 1, 36 LRA4 = LRA 0, 37 LRA4+ = LRA+ 0, 38 XOR = EOR 39 NOT = COM 40 SHLT = SHL 41 ANDT = AND 42 R0 = PRF[0] 43 R1 = PRF[1] 44 R2 = PRF[2] 45 R3 = PRF[3] 46 R4 = PRF[4] 47 R5 = PRF[5] 48 R6 = PRF[6] 49 R7 = PRF[7] 50 R8 = PRF[8] 51 R9 = PRF[9] 52 R10 = PRF[10] 53 R11 = PRF[11] 54 R12 = PRF[12] 55 R13 = PRF[13] 56 R14 = PRF[14] 57 R15 = PRF[15] 58 G0 = GRF[0] 59 G1 = GRF[1] 60 G2 = GRF[2] 61 G3 = GRF[3] 62 G4 = GRF[4] 63 G5 = GRF[5] 64 G6 = GRF[6] 65 G7 = GRF[7] 66 G8 = GRF[8] 67 G9 = GRF[9] 68 G10 = GRF[10] 69 G11 = GRF[11] 70 G12 = GRF[12] 71 G13 = GRF[13] 72 G14 = GRF[14] 73 G15 = GRF[15] 74 F0 = FIT[0] 75 F1 = FIT[1] 76 F2 = FIT[2] 77 F3 = FIT[3] 78 F4 = FIT[4] 79 F5 = FIT[5] 80 F6 = FIT[6] 81 F7 = FIT[7] 82 F8 = FIT[8] 83 F9 = FIT[9] 84 F10 = FIT[10] 85 F11 = FIT[11] 86 F12 = FIT[12] 87 F13 = FIT[13] 88 F14 = FIT[14] 89 F15 = FIT[15] 90 C0 = CON[0] 91 C1 = CON[1] 92 C2 = CON[2] 93 C3 = CON[3] 94 C4 = CON[4] 95 C5 = CON[5] 96 C6 = CON[6] 97 C7 = CON[7] 98 C8 = CON[8] 99 C9 = CON[9] 100 C10 = CON[10] 101 C11 = CON[11] 102 C12 = CON[12] 103 C13 = CON[13] 104 C14 = CON[14] 105 C15 = CON[15] 106 ASM_SVN_REV = 0 1: ; Power test of DMEM 2: ; Write 0xFF..FF to all cells 3: ; Read and count the number of zeroes, store at th 4: 5: start: nop 0000 : 0000_0000_0000_0000_0000_0000 6: mov 0, r15; the address counter 0001 : 1100_0110_0000_0000_0000_1111 7: not c0, r1; writing 0xFF..FF 0002 : 1011_1110_0000_0110_0000_0001 8: 9: fill: 10: sra+ r1 0003 : 0011_1000_0001_0000_0000_0000 11: nop 0004 : 0000_0000_0000_0000_0000_0000 12: cmp r15, 0 0005 : 1100_1000_1111_0000_0000_0000 13: jmp cc_nzero, fill 0006 : 0000_0100_0000_0000_0000_0001 14: 15: mov 0, r2 ; the error counter 0007 : 1100_0110_0000_0000_0000_0010 16: readc: 17: lra4 r1 0008 : 1101_0010_0000_0000_0000_0001 18: lra4+ r1 0009 : 1111_0010_0000_0000_0000_0001 19: ; mov 0, r1; emulate errors 20: cmp r1, 0 000A : 1100_1000_0001_0000_0000_0000 21: jmpr cc_neq +2 000B : 0000_0100_0000_0001_1010_0001 22: add r2, c1, r2 000C : 1000_0010_0010_0110_0010_0010 23: 24: cmp r15, 0 000D : 1100_1000_1111_0000_0000_0000 25: jmp cc_nzero, readc 000E : 0000_0100_0000_0000_0000_0001 26: 27: iext 0xF000 000F : 0101_0000_0000_0000_0000_1111 28: sgio r2, 0xF000 0010 : 0010_1000_0010_0000_0000_0000 29: 30: mov 0x012, r1 0011 : 1100_0110_0000_0010_0100_0001 31: sgio r1, 0xA04 0012 : 0010_1000_0001_1010_0000_0100 32: end: jmpr cc_uncond 0 0013 : 0000_0100_0000_0010_0110_1111 33: nop 0014 : 0000_0000_0000_0000_0000_0000 Source file read, 0 error(s), 0 warning(s).