Assembler for MIMD-TRAP2/3 (c) V.Angelov, v3.6, Dec 2007 SVN Revision 0, SVN Date 2007-12-27 Please send any comments to: angelov@kip.uni-heidelberg.de 17:58:31 / 21 Apr 2008 Source code file: src/DMMtst.asm Memory initialisation file: Log file: wrk/cpu2.log Program memory size in words: 4096 Default constants, read from /cad/tools/bin/asm_mimd.inc 1 CPU2 = 2 CC_SIGNED = 0X14 3 CC_NSIGNED = 0X04 4 CC_ZERO = 0X11 5 CC_NZERO = 0X01 6 CC_OVERFL = 0X13 7 CC_NOVERFL = 0X03 8 CC_NEG = 0X12 9 CC_NNEG = 0X02 10 CC_CARRY = 0X10 11 CC_NCARRY = 0X00 12 CC_BUSY = 0X17 13 CC_NBUSY = 0X07 14 CC_DIVB = 0X15 15 CC_NDIVB = 0X05 16 CC_ERRDIV = 0X16 17 CC_NERRDIV = 0X06 18 CC_UNCOND = 0X0F 19 CC_EQ = 0X11 20 CC_NEQ = 0X01 21 CC_NEG = 0X12 22 CC_POS0 = 0X02 23 CC_LTS = 0X14 24 CC_GES = 0X04 25 CC_LTU = 0X10 26 CC_GEU = 0X00 27 CC_LES = 0X19 28 CC_GTS = 0X09 29 CC_LEU = 0X18 30 CC_GTU = 0X08 31 RR_BYTE = 3 32 RR_WORD = 1 33 RR_DWORD = 0 34 LRA1 = LRA 3, 35 LRA2 = LRA 1, 36 LRA4 = LRA 0, 37 LRA4+ = LRA+ 0, 38 XOR = EOR 39 NOT = COM 40 SHLT = SHL 41 ANDT = AND 42 R0 = PRF[0] 43 R1 = PRF[1] 44 R2 = PRF[2] 45 R3 = PRF[3] 46 R4 = PRF[4] 47 R5 = PRF[5] 48 R6 = PRF[6] 49 R7 = PRF[7] 50 R8 = PRF[8] 51 R9 = PRF[9] 52 R10 = PRF[10] 53 R11 = PRF[11] 54 R12 = PRF[12] 55 R13 = PRF[13] 56 R14 = PRF[14] 57 R15 = PRF[15] 58 G0 = GRF[0] 59 G1 = GRF[1] 60 G2 = GRF[2] 61 G3 = GRF[3] 62 G4 = GRF[4] 63 G5 = GRF[5] 64 G6 = GRF[6] 65 G7 = GRF[7] 66 G8 = GRF[8] 67 G9 = GRF[9] 68 G10 = GRF[10] 69 G11 = GRF[11] 70 G12 = GRF[12] 71 G13 = GRF[13] 72 G14 = GRF[14] 73 G15 = GRF[15] 74 F0 = FIT[0] 75 F1 = FIT[1] 76 F2 = FIT[2] 77 F3 = FIT[3] 78 F4 = FIT[4] 79 F5 = FIT[5] 80 F6 = FIT[6] 81 F7 = FIT[7] 82 F8 = FIT[8] 83 F9 = FIT[9] 84 F10 = FIT[10] 85 F11 = FIT[11] 86 F12 = FIT[12] 87 F13 = FIT[13] 88 F14 = FIT[14] 89 F15 = FIT[15] 90 C0 = CON[0] 91 C1 = CON[1] 92 C2 = CON[2] 93 C3 = CON[3] 94 C4 = CON[4] 95 C5 = CON[5] 96 C6 = CON[6] 97 C7 = CON[7] 98 C8 = CON[8] 99 C9 = CON[9] 100 C10 = CON[10] 101 C11 = CON[11] 102 C12 = CON[12] 103 C13 = CON[13] 104 C14 = CON[14] 105 C15 = CON[15] 106 ASM_SVN_REV = 0 1: ; Full test of the DMEM locations via global bus a 2: ; The number of the errors, counted by cpu(n) is s 3: 4: ; DEFINITIONS, USED IN THE PROGRAM CODE: 5: 6: #def work=PRF[1] ; register for current opera 7: #def rdata=PRF[2] ; data red by test_programs 8: #def tdata=PRF[3] ; test_vector to be writen 9: #def errnum=PRF[4] ; contains the number of err 10: #def return1=PRF[5] ; return address (at first l 11: #def return2=PRF[6] ; return address (at second 12: #def return3=PRF[7] ; return address (at third l 13: #def tdgen=PRF[8] ; test data generator code l 14: #def itdgen=PRF[9] ; init tdgen code label 15: #def psrmask=PRF[10] ; mask for test_vector 16: #def bitnum=PRF[12] ; =32 minus the number of bi 17: ; prf11 and prf13 are used inside the testing rout 18: 19: #def ioaddr=PRF[14] ; contains the autoincrement 20: #def errstore=PRF[15] ; autoincrement address for 21: 22: #def firstaddress=grf[1] ; first address of the t 23: #def lastaddress=grf[2] ; last address of the te 24: 25: #def MEMRW=0xD000 ; the address of the registe 26: ;#def IAFIRST=0xE000 ; first address of IMEM 27: ;#def IADEND =0xEFFF ; last address of IMEM 28: #def DAFRSTG=0xC000 ; first address of DMEM via 29: #def DADENDG=0xC3FF ; last address of DMEM via G 30: #def DAFIRST=0x0000 ; first address of DMEM as R 31: #def DADEND =0x0FFC ; last address of DMEM as RA 32: ;#def DBFST=0xF000 ; first address of DBANK (t 33: ;#def DBEND=0xF0FF ; last address of DBANK (tr 34: 35: ; masks of certain length 36: #def BITMASK24=0x0FFFFFF 37: #def BITMASK32=0xFFFFFFFF 38: #def BITMASK12=0x00000FFF 39: #def BITMASK13=0x00001FFF 40: 41: start: nop 0000 : 0000_0000_0000_0000_0000_0000 42: #ifdef cpu0 ; in re 43: iext 0xF005 44: mov 0xF005 r0 45: iext 0xF000 46: mov 0xF000 r14 47: iext 0xEF01 48: mov 0xEF01 r1 49: jmpr cc_busy 0 50: sgio+ r1 51: cmp r14 r0 52: jmpr cc_ltu -3 53: 54: iext 0x3055 55: mov 0x3055 r14 56: lgio 0 r14 57: jmpr cc_busy 0 58: lpio 0x300 r0 59: jmpr cc_busy 0 60: 61: and r0 c1 r0 62: cmp r0 c1 63: cmp r0 c1 64: jmp cc_eq go 65: 66: mov c1 r1 67: jmpr cc_busy 0 68: sgio r1 r14 69: 70: jmpr cc_busy 0 71: mov c0 r0 72: sgio r0 0xA21 73: 74: mov 0x012 work 75: sgio work 0xA04 76: jmpr cc_uncond 0 77: go: 78: 79: mov c0 r1 80: jmpr cc_busy 0 81: sgio r1 r14 82: #endif 83: 84: mov 0 errnum ; clear th 0001 : 1100_0110_0000_0000_0000_0100 85: 86: 87: #ifdef cpu0 88: ; mov b0001_00_0 work ; initiate 89: ; jmpr cc_busy 0 90: ; iext MEMRW 91: ; sgio work MEMRW 92: #def HCNTD0=0xD014 93: 94: iext DAFRSTG 95: mov DAFRSTG firstaddress 96: iext DADENDG 97: mov DADENDG lastaddress 98: mov c0 bitnum 99: iext BITMASK32 100: mov BITMASK32 psrmask 101: 102: mvpcr +2 return1 ; call tes 103: jmp cc_uncond cltst 104: 105: mov c0 work 106: iext HCNTD0 107: sgio work HCNTD0 108: 109: iext 0xF000 110: mov 0xF000 work 111: jmpr cc_busy 0 ; storage 112: sgio errnum work ; via GIO 113: mov c0 errnum 114: #endif 115: 116: mvpcr +2 return1 ; call tes 0002 : 1100_0110_0000_0000_1000_0101 117: jmp cc_uncond sltst 0003 : 0000_0100_0000_0000_0000_1111 118: 119: jmpr cc_busy 0 ; storage 0004 : 0000_0100_0000_0000_1001_0111 120: iext 0xF001 ; in 0xF0 0005 : 0101_0000_0000_0000_0000_1111 121: mov 0xF001 work 0006 : 1100_0110_0000_0000_0010_0001 122: add work c5 work 0007 : 1000_0010_0001_0110_1010_0001 123: sgio errnum work 0008 : 0010_0100_0100_0000_0010_0000 124: 125: #ifdef cpu3 126: jmpr cc_busy 0 127: mov c0 work 128: sgio work 0xA26 129: mov 0x012 work 130: sgio work 0xA04 131: jmpr cc_uncond 0 132: #else 133: ; turns on cpu N+1 ... 134: mov 1 rdata 0009 : 1100_0110_0000_0000_0010_0010 135: ; jmpr cc_busy 0 136: mov 1 ioaddr 000A : 1100_0110_0000_0000_0010_1110 137: add ioaddr c5 ioaddr 000B : 1000_0010_1110_0110_1010_1110 138: shl 1 ioaddr ioaddr 000C : 1011_0010_0001_0001_1100_1110 139: mov 0xA20 work 000D : 1100_0111_0100_0100_0000_0001 140: add ioaddr work ioaddr 000E : 1000_0010_1110_0000_0010_1110 141: sgio rdata ioaddr 000F : 0010_0100_0010_0001_1100_0000 142: jmpr cc_busy 0 0010 : 0000_0100_0000_0010_0001_0111 143: sub ioaddr c2 ioaddr 0011 : 1000_1010_1110_0110_0100_1110 144: mov c0 rdata 0012 : 1100_0010_0000_0110_0000_0010 145: #ifdef cpu0 146: add ioaddr c1 ioaddr 147: #endif 148: sgio rdata ioaddr 0013 : 0010_0100_0010_0001_1100_0000 149: jmpr cc_uncond 0 0014 : 0000_0100_0000_0010_1000_1111 150: ; ... and stops itself 151: #endif cpu3 152: 153: 154: ; BEGIN THE TESTING ROUTINE (uses testin 155: cltst: mov 1, prf[11] 0015 : 1100_0110_0000_0000_0010_1011 156: mov 1, prf[13] 0016 : 1100_0110_0000_0000_0010_1101 157: 158: nt: mov wlk0, tdgen ; call walkin 0017 : 1100_0110_0000_0000_0000_1000 159: mov iwlk0, itdgen 0018 : 1100_0110_0000_0000_0000_1001 160: mvpcr +2, return2 0019 : 1100_0110_0000_0011_0110_0110 161: jmp cc_uncond, tstgio 001A : 0000_0100_0000_0000_0000_1111 162: 163: mov wlk1, tdgen ; call walkin 001B : 1100_0110_0000_0000_0000_1000 164: mov iwlk1, itdgen ; 001C : 1100_0110_0000_0000_0000_1001 165: mvpcr +2, return2 001D : 1100_0110_0000_0011_1110_0110 166: jmp cc_uncond, tstgio 001E : 0000_0100_0000_0000_0000_1111 167: 168: mov psr, tdgen ; call pseudo 001F : 1100_0110_0000_0000_0000_1000 169: mov ipsr, itdgen 0020 : 1100_0110_0000_0000_0000_1001 170: mvpcr +2, return2 0021 : 1100_0110_0000_0100_0110_0110 171: jmp cc_uncond, tstgio 0022 : 0000_0100_0000_0000_0000_1111 172: 173: add prf[13], c3, prf[13] ; next init 0023 : 1000_0010_1101_0110_0110_1101 174: shl 1, prf[11], prf[11] ; testing r 0024 : 1011_0010_0001_0001_0110_1011 175: jmp cc_carry, return1 0025 : 0000_1000_0101_0000_0001_0000 176: mov bitnum work 0026 : 1100_0010_0000_0001_1000_0001 177: mov 15 rdata 0027 : 1100_0110_0000_0001_1110_0010 178: mov prf[11] prf[0] 0028 : 1100_0010_0000_0001_0110_0000 179: cmp rdata bitnum 0029 : 1000_1000_0010_0001_1000_0000 180: jmpr cc_ncarry 3 002A : 0000_0100_0000_0101_1010_0000 181: shl 15 prf[0] prf[0] 002B : 1011_0010_1111_0000_0000_0000 182: sub work rdata work 002C : 1000_1010_0001_0000_0100_0001 183: shlt work, prf[0] ; if MSB of th 002D : 0111_0000_0001_0000_0000_0000 184: jmp cc_ncarry, nt 002E : 0000_0100_0000_0000_0000_0000 185: jmp cc_uncond return1 002F : 0000_1000_0101_0000_0000_1111 186: ; END OF THE TESTING ROUTINE 187: 188: 189: 190: ; BEGIN OF THE SUBROUTINE (used by testin 191: ; rolls all addresses and tests by w/r th 192: tstgio: mvpcr +2, return3 0030 : 1100_0110_0000_0110_0100_0111 193: jmp cc_uncond, itdgen ; go to ini 0031 : 0000_1000_1001_0000_0000_1111 194: ; BEGIN WRI 195: mov firstaddress, ioaddr 0032 : 1100_0010_0000_0010_0010_1110 196: wd: jmpr cc_busy, 0 0033 : 0000_0100_0000_0110_0111_0111 197: ; mov c0 tdata 198: sgio+ tdata ; writing t 0034 : 0011_1100_0011_0000_0000_0000 199: mvpcr +2, return3 ; runs the 0035 : 1100_0110_0000_0110_1110_0111 200: jmp cc_uncond, tdgen 0036 : 0000_1000_1000_0000_0000_1111 201: cmp ioaddr, lastaddress ; 0037 : 1000_1000_1110_0010_0100_0000 202: jmp cc_carry, wd ; if yes: 0038 : 0000_0100_0000_0000_0001_0000 203: 204: ; BEGIN COM 205: mov firstaddress, ioaddr 0039 : 1100_0010_0000_0010_0010_1110 206: 207: mvpcr +2, return3 003A : 1100_0110_0000_0111_1000_0111 208: jmp cc_uncond, itdgen ; and go to 003B : 0000_1000_1001_0000_0000_1111 209: 210: wc: jmpr cc_busy, 0 ; here is t 003C : 0000_0100_0000_0111_1001_0111 211: lgio+ 0; ; reading e 003D : 1111_0100_0000_0000_0000_0000 212: jmpr cc_busy, 0 ; comparing 003E : 0000_0100_0000_0111_1101_0111 213: lpio 0x300, rdata ; data stor 003F : 1110_0110_0110_0000_0000_0010 214: cmp rdata, tdata ; 0040 : 1000_1000_0010_0000_0110_0000 215: jmp cc_zero, noerr ; if err_or 0041 : 0000_0100_0000_0000_0001_0001 216: add errnum, c1, errnum ; errnum is 0042 : 1000_0010_0100_0110_0010_0100 217: 218: 219: noerr: mvpcr +2, return3 0043 : 1100_0110_0000_1000_1010_0111 220: jmp cc_uncond, tdgen ; get nex 0044 : 0000_1000_1000_0000_0000_1111 221: 222: cmp ioaddr, lastaddress ; is tne 0045 : 1000_1000_1110_0010_0100_0000 223: jmp cc_carry, wc ; if not 0046 : 0000_0100_0000_0000_0001_0000 224: 225: jmp cc_uncond, return2 0047 : 0000_1000_0110_0000_0000_1111 226: 227: ; prepares the next data - walking 1 228: wlk1: shl 1, tdata, tdata 0048 : 1011_0010_0001_0000_0110_0011 229: and tdata, psrmask, tdata 0049 : 1010_0110_0011_0001_0100_0011 230: jmp cc_nzero, return3 004A : 0000_1000_0111_0000_0000_0001 231: mov 1, tdata 004B : 1100_0110_0000_0000_0010_0011 232: jmp cc_uncond, return3 004C : 0000_1000_0111_0000_0000_1111 233: ; end of walking 1 234: 235: ; prepares the next data - walking 0 236: wlk0: com tdata, tdata 004D : 1011_1110_0000_0000_0110_0011 237: shl 1, tdata, tdata 004E : 1011_0010_0001_0000_0110_0011 238: and tdata, psrmask, tdata 004F : 1010_0110_0011_0001_0100_0011 239: jmpr cc_nzero, +2 0050 : 0000_0100_0000_1010_0100_0001 240: mov 1, tdata 0051 : 1100_0110_0000_0000_0010_0011 241: com tdata, tdata 0052 : 1011_1110_0000_0000_0110_0011 242: and tdata, psrmask, tdata 0053 : 1010_0110_0011_0001_0100_0011 243: jmp cc_uncond, return3 0054 : 0000_1000_0111_0000_0000_1111 244: ; end of walking 0 245: 246: ; prepares the next data by pseudo random generato 247: psr: lpio 0x202, tdata 0055 : 1110_0110_0100_0000_0100_0011 248: and tdata, psrmask, tdata 0056 : 1010_0110_0011_0001_0100_0011 249: jmp cc_uncond, return3 0057 : 0000_1000_0111_0000_0000_1111 250: ; end random generator 251: 252: ; init walking 1 253: iwlk1: mov prf[11], tdata 0058 : 1100_0010_0000_0001_0110_0011 254: jmp cc_uncond, return3 0059 : 0000_1000_0111_0000_0000_1111 255: 256: ; init walking 0 257: iwlk0: com prf[11], tdata 005A : 1011_1110_0000_0001_0110_0011 258: and tdata, psrmask, tdata 005B : 1010_0110_0011_0001_0100_0011 259: jmp cc_uncond, return3 005C : 0000_1000_0111_0000_0000_1111 260: 261: ; init psr 262: ;#ifdef trap3 263: ipsr: mov b1_0_0_00_01_11111, tdata 005D : 1100_0111_0000_0111_1110_0011 264: ;#else 265: ;ipsr: mov b1_0_0_00_01_1111, tdata 266: ;#endif 267: mov 31 prf[0] 005E : 1100_0110_0000_0011_1110_0000 268: sub prf[0] bitnum prf[0] 005F : 1000_1010_0000_0001_1000_0000 269: ;#ifdef trap3 270: ;#else 271: ; cmp prf[0] 16 272: ; jmpr cc_carry 2 273: ; mov 15 prf[0] 274: ;#endif 275: or tdata prf[0] tdata 0060 : 1010_1010_0011_0000_0000_0011 276: spio tdata, 0x201 0061 : 0010_0000_0011_0010_0000_0001 277: mov prf[13], tdata 0062 : 1100_0010_0000_0001_1010_0011 278: spio tdata, 0x200 0063 : 0010_0000_0011_0010_0000_0000 279: nop 0064 : 0000_0000_0000_0000_0000_0000 280: nop 0065 : 0000_0000_0000_0000_0000_0000 281: lpio 0x202, tdata 0066 : 1110_0110_0100_0000_0100_0011 282: jmp cc_uncond, return3 0067 : 0000_1000_0111_0000_0000_1111 283: 284: ; BEGIN DIRECT DMEM TESTING 285: 286: dsra: mvpcr +2, return3 0068 : 1100_0110_0000_1101_0100_0111 287: jmp cc_uncond, itdgen 0069 : 0000_1000_1001_0000_0000_1111 288: 289: iext DAFIRST 006A : 0101_0000_0000_0000_0000_0000 290: mov DAFIRST, errstore 006B : 1100_0110_0000_0000_0000_1111 291: sd: ;mov c0 tdata 292: sra+ tdata 006C : 0011_1000_0011_0000_0000_0000 293: mvpcr +2, return3 006D : 1100_0110_0000_1101_1110_0111 294: jmp cc_uncond, tdgen 006E : 0000_1000_1000_0000_0000_1111 295: iext DADEND 006F : 0101_0000_0000_0000_0000_0000 296: cmp errstore, DADEND 0070 : 1100_1000_1111_1111_1111_1100 297: jmp cc_carry, sd 0071 : 0000_0100_0000_0000_0001_0000 298: 299: mvpcr +2, return3 0072 : 1100_0110_0000_1110_1000_0111 300: jmp cc_uncond, itdgen ; and go 0073 : 0000_1000_1001_0000_0000_1111 301: 302: iext DAFIRST 0074 : 0101_0000_0000_0000_0000_0000 303: mov DAFIRST, errstore 0075 : 1100_0110_0000_0000_0000_1111 304: nop 0076 : 0000_0000_0000_0000_0000_0000 305: ws: lra4 rdata ; this do 0077 : 1101_0010_0000_0000_0000_0010 306: lra4+ rdata ; in the 0078 : 1111_0010_0000_0000_0000_0010 307: cmp rdata, tdata 0079 : 1000_1000_0010_0000_0110_0000 308: jmp cc_zero, neerr 007A : 0000_0100_0000_0000_0001_0001 309: add errnum, c1, errnum 007B : 1000_0010_0100_0110_0010_0100 310: 311: cmp errnum 0x3F ; first 63 er 007C : 1100_1000_0100_0000_0011_1111 312: jmp cc_geu neerr ; lead to sto 007D : 0000_0100_0000_0000_0000_0000 313: mov 0x3E work ; F005-F042 - 007E : 1100_0110_0000_0111_1100_0001 314: mul32 work c5 work ; F043-F080 - 007F : 1001_0000_0001_0110_1010_1001 315: iext 0xF004 ; F081-F0BE - 0080 : 0101_0000_0000_0000_0000_1111 316: mov 0xF004 g4 ; F0BF-F0FC - 0081 : 1100_0110_0000_0000_1001_0100 317: add work g4 work 0082 : 1000_0010_0001_0010_1000_0001 318: add work errnum work 0083 : 1000_0010_0001_0000_1000_0001 319: sgio errstore work 0084 : 0010_0100_1111_0000_0010_0000 320: 321: neerr: mvpcr +2, return3 0085 : 1100_0110_0001_0000_1110_0111 322: jmp cc_uncond, tdgen ; get nex 0086 : 0000_1000_1000_0000_0000_1111 323: 324: iext DADEND 0087 : 0101_0000_0000_0000_0000_0000 325: cmp errstore, DADEND 0088 : 1100_1000_1111_1111_1111_1100 326: jmp cc_carry, ws ; if not 0089 : 0000_0100_0000_0000_0001_0000 327: jmp cc_uncond, return2 008A : 0000_1000_0110_0000_0000_1111 328: 329: ; END DIRECT DMEM TESTING 330: 331: ; BEGIN THE TESTING ROUTINE (uses testin 332: sltst: mov 1, prf[11] 008B : 1100_0110_0000_0000_0010_1011 333: mov 1, prf[13] 008C : 1100_0110_0000_0000_0010_1101 334: ;#ifdef dmem_as_ram 335: st: mov wlk0, tdgen ; call walk 008D : 1100_0110_0000_0000_0000_1000 336: mov iwlk0, itdgen 008E : 1100_0110_0000_0000_0000_1001 337: mvpcr +2, return2 008F : 1100_0110_0001_0010_0010_0110 338: jmp cc_uncond, dsra 0090 : 0000_0100_0000_0000_0000_1111 339: 340: mov wlk1, tdgen ; call walk 0091 : 1100_0110_0000_0000_0000_1000 341: mov iwlk1, itdgen 0092 : 1100_0110_0000_0000_0000_1001 342: mvpcr +2, return2 0093 : 1100_0110_0001_0010_1010_0110 343: jmp cc_uncond, dsra 0094 : 0000_0100_0000_0000_0000_1111 344: 345: mov psr, tdgen ; call pseu 0095 : 1100_0110_0000_0000_0000_1000 346: mov ipsr, itdgen 0096 : 1100_0110_0000_0000_0000_1001 347: mvpcr +2, return2 0097 : 1100_0110_0001_0011_0010_0110 348: jmp cc_uncond, dsra 0098 : 0000_0100_0000_0000_0000_1111 349: 350: add prf[13], c3, prf[13] ; next init 0099 : 1000_0010_1101_0110_0110_1101 351: shl 1, prf[11], prf[11] ; testing r 009A : 1011_0010_0001_0001_0110_1011 352: jmp cc_carry, return1 009B : 0000_1000_0101_0000_0001_0000 353: mov bitnum work 009C : 1100_0010_0000_0001_1000_0001 354: mov 15 rdata 009D : 1100_0110_0000_0001_1110_0010 355: mov prf[11] prf[0] 009E : 1100_0010_0000_0001_0110_0000 356: cmp rdata bitnum 009F : 1000_1000_0010_0001_1000_0000 357: jmpr cc_ncarry 3 00A0 : 0000_0100_0001_0100_0110_0000 358: shl 15 prf[0] prf[0] 00A1 : 1011_0010_1111_0000_0000_0000 359: sub work rdata work 00A2 : 1000_1010_0001_0000_0100_0001 360: shlt work, prf[0] ; if MSB of th 00A3 : 0111_0000_0001_0000_0000_0000 361: jmp cc_ncarry, st 00A4 : 0000_0100_0000_0000_0000_0000 362: ;#endif 363: jmp cc_uncond return1 00A5 : 0000_1000_0101_0000_0000_1111 364: ; END OF THE TESTING ROUTINE 365: 366: Source file read, 0 error(s), 0 warning(s).