/**************************************/
/* ALICE TRD                          */
/* Read-out board                     */
/* SCSN Configuration File            */
/*                                    */
/* 2004-03-15                         */
/*                                    */
/* for use with 4 chips               */
/*                                    */
/* Jan de Cuveland, Venelin Angelov   */
/**************************************/

// ----------------------------
//  define SCSN IDs for ring 0
// ----------------------------

include ../scsn_ids.tcs

// ------------------------------
//  Simulation-specific settings
// ------------------------------
pretrigger 6
wait -10000, 0, scheck

expect 127, 0xF000, 0x0    ; // errors in DMEM, tested by cpu3 via GB
expect 127, 0xF001, 0x0    ; // errors in DMEM, tested by cpu0 as RAM
expect 127, 0xF002, 0x0    ; // errors in DMEM, tested by cpu1 as RAM
expect 127, 0xF003, 0x0    ; // errors in DMEM, tested by cpu2 as RAM
expect 127, 0xF004, 0x0    ; // errors in DMEM, tested by cpu3 as RAM
expect  127, SADCAZ, 0
// next lines will give details in case of errors in DMEM
readseq 127, 0xF005, 0x3E ; // errors found by cpu0 in RAM address
readseq 127, 0xF043, 0x3E ; // errors found by cpu1 in RAM address
readseq 127, 0xF081, 0x3E ; // errors found by cpu2 in RAM address
readseq 127, 0xF0BF, 0x3E ; // errors found by cpu3 in RAM address