Assembler for MIMD-TRAP2/3 (c) V.Angelov, v3.6, Dec 2007 SVN Revision 0, SVN Date 2007-12-27 Please send any comments to: angelov@kip.uni-heidelberg.de 17:58:34 / 21 Apr 2008 Source code file: src/divtest.asm Memory initialisation file: Log file: wrk/cpu3.log Program memory size in words: 4096 Default constants, read from /cad/tools/bin/asm_mimd.inc 1 CPU3 = 2 TRAP3 = 3 CC_SIGNED = 0X14 4 CC_NSIGNED = 0X04 5 CC_ZERO = 0X11 6 CC_NZERO = 0X01 7 CC_OVERFL = 0X13 8 CC_NOVERFL = 0X03 9 CC_NEG = 0X12 10 CC_NNEG = 0X02 11 CC_CARRY = 0X10 12 CC_NCARRY = 0X00 13 CC_BUSY = 0X17 14 CC_NBUSY = 0X07 15 CC_DIVB = 0X15 16 CC_NDIVB = 0X05 17 CC_ERRDIV = 0X16 18 CC_NERRDIV = 0X06 19 CC_UNCOND = 0X0F 20 CC_EQ = 0X11 21 CC_NEQ = 0X01 22 CC_NEG = 0X12 23 CC_POS0 = 0X02 24 CC_LTS = 0X14 25 CC_GES = 0X04 26 CC_LTU = 0X10 27 CC_GEU = 0X00 28 CC_LES = 0X19 29 CC_GTS = 0X09 30 CC_LEU = 0X18 31 CC_GTU = 0X08 32 RR_BYTE = 3 33 RR_WORD = 1 34 RR_DWORD = 0 35 LRA1 = LRA 3, 36 LRA2 = LRA 1, 37 LRA4 = LRA 0, 38 LRA4+ = LRA+ 0, 39 XOR = EOR 40 NOT = COM 41 SHLT = SHL 42 ANDT = AND 43 R0 = PRF[0] 44 R1 = PRF[1] 45 R2 = PRF[2] 46 R3 = PRF[3] 47 R4 = PRF[4] 48 R5 = PRF[5] 49 R6 = PRF[6] 50 R7 = PRF[7] 51 R8 = PRF[8] 52 R9 = PRF[9] 53 R10 = PRF[10] 54 R11 = PRF[11] 55 R12 = PRF[12] 56 R13 = PRF[13] 57 R14 = PRF[14] 58 R15 = PRF[15] 59 G0 = GRF[0] 60 G1 = GRF[1] 61 G2 = GRF[2] 62 G3 = GRF[3] 63 G4 = GRF[4] 64 G5 = GRF[5] 65 G6 = GRF[6] 66 G7 = GRF[7] 67 G8 = GRF[8] 68 G9 = GRF[9] 69 G10 = GRF[10] 70 G11 = GRF[11] 71 G12 = GRF[12] 72 G13 = GRF[13] 73 G14 = GRF[14] 74 G15 = GRF[15] 75 F0 = FIT[0] 76 F1 = FIT[1] 77 F2 = FIT[2] 78 F3 = FIT[3] 79 F4 = FIT[4] 80 F5 = FIT[5] 81 F6 = FIT[6] 82 F7 = FIT[7] 83 F8 = FIT[8] 84 F9 = FIT[9] 85 F10 = FIT[10] 86 F11 = FIT[11] 87 F12 = FIT[12] 88 F13 = FIT[13] 89 F14 = FIT[14] 90 F15 = FIT[15] 91 C0 = CON[0] 92 C1 = CON[1] 93 C2 = CON[2] 94 C3 = CON[3] 95 C4 = CON[4] 96 C5 = CON[5] 97 C6 = CON[6] 98 C7 = CON[7] 99 C8 = CON[8] 100 C9 = CON[9] 101 C10 = CON[10] 102 C11 = CON[11] 103 C12 = CON[12] 104 C13 = CON[13] 105 C14 = CON[14] 106 C15 = CON[15] 107 ASM_SVN_REV = 0 1: ; on the next line we define a string constant 2: #def gsm_cmdrg=0xA04; 3: #def endp1=0xF100; 4: 5: lp: jmpr cc_uncond, 0 0000 : 0000_0100_0000_0000_0000_1111 6: nop 0001 : 0000_0000_0000_0000_0000_0000 7: 8: org 0x100 9: test: nop 0100 : 0000_0000_0000_0000_0000_0000 10: #ifdef cpu3 11: sem b0111 0101 : 0001_0000_0000_0000_0000_0111 12: #else 13: nop 14: #endif 15: ; later gsm_cmdrg will be used instead of 0x0A04 16: ; 17: mov b1110, r6 ; 0102 : 1100_0110_0000_0001_1100_0110 18: sgio r6, 0x0A3F ; arb 0103 : 0010_1000_0110_1010_0011_1111 19: 20: mov 0, r13 ; mul 0104 : 1100_0110_0000_0000_0000_1101 21: mov 0, r10 ; err 0105 : 1100_0110_0000_0000_0000_1010 22: iext 0xF000 ; 0106 : 0101_0000_0000_0000_0000_1111 23: mov 0xF000, r14 ; 0107 : 1100_0110_0000_0000_0000_1110 24: nop 0108 : 0000_0000_0000_0000_0000_0000 25: read: 26: ; read A 27: lgio+ 0 ; 0109 : 1111_0100_0000_0000_0000_0000 28: jmpr cc_busy, 0 ; 010A : 0000_0100_0010_0001_0101_0111 29: lpio 0x300, r1 ; A 010B : 1110_0110_0110_0000_0000_0001 30: 31: ; read B 32: lgio+ 1 ; 010C : 1111_0101_0000_0000_0000_0000 33: jmpr cc_busy, 0 ; 010D : 0000_0100_0010_0001_1011_0111 34: lpio 0x301, r2 ; B 010E : 1110_0110_0110_0000_0010_0010 35: 36: ; read D 37: lgio+ 0 ; 010F : 1111_0100_0000_0000_0000_0000 38: jmpr cc_busy, 0 ; 0110 : 0000_0100_0010_0010_0001_0111 39: lpio 0x300, r3 ; DIV 0111 : 1110_0110_0110_0000_0000_0011 40: 41: ; read RES 42: lgio+ 1 ; 0112 : 1111_0101_0000_0000_0000_0000 43: jmpr cc_busy, 0 ; 0113 : 0000_0100_0010_0010_0111_0111 44: lpio 0x301, r4 ; RES 0114 : 1110_0110_0110_0000_0010_0100 45: 46: ; start div 47: div r1, r2 ; 0115 : 1001_1000_0001_0000_0100_0000 48: nop ; 0116 : 0000_0000_0000_0000_0000_0000 49: jmpr cc_divb, 0 ; wai 0117 : 0000_0100_0010_0010_1111_0101 50: die r7 ; 0118 : 1001_1110_0000_0000_0000_0111 51: mul r7, r2, r5 ; 0119 : 1001_0000_0111_0000_0100_0101 52: cmp r3, r7 ; 011A : 1000_1000_0011_0000_1110_0000 53: jmpr cc_zero, 2 ; 011B : 0000_0100_0010_0011_1011_0001 54: add r10, c1, r10 ; 011C : 1000_0010_1010_0110_0010_1010 55: sub r1, r5, r11 ; 011D : 1000_1010_0001_0000_1010_1011 56: cmp r11, r4 ; 011E : 1000_1000_1011_0000_1000_0000 57: jmpr cc_zero, 2 ; 011F : 0000_0100_0010_0100_0011_0001 58: add r10, c1, r10 ; 0120 : 1000_0010_1010_0110_0010_1010 59: iext endp1 ; 0121 : 0101_0000_0000_0000_0000_1111 60: cmp r14, endp1 ; 0122 : 1100_1000_1110_0001_0000_0000 61: jmp cc_ltu, read ; 0123 : 0000_0100_0000_0000_0001_0000 62: 63: ; end, store the results in DBANK 64: quit: iext 0xF000 ; 0124 : 0101_0000_0000_0000_0000_1111 65: mov 0xF000, r14 ; 0125 : 1100_0110_0000_0000_0000_1110 66: add r14, c5, r14 0126 : 1000_0010_1110_0110_1010_1110 67: nop ; 0127 : 0000_0000_0000_0000_0000_0000 68: sgio+ r10 ; 0128 : 0011_1100_1010_0000_0000_0000 69: jmpr cc_busy, 0 ; 0129 : 0000_0100_0010_0101_0011_0111 70: 71: #ifdef cpu3 72: syn 012A : 0000_1100_0000_0000_0000_0000 73: 74: mov 0x012, r6 ; 012B : 1100_0110_0000_0010_0100_0110 75: sgio r6, gsm_cmdrg ; low 012C : 0010_1000_0110_1010_0000_0100 76: #endif 77: #ifdef cpu0 78: mov c0, g0 79: #endif 80: #ifdef cpu1 81: mov c0, g1 82: #endif 83: #ifdef cpu2 84: mov c0, g2 85: #endif 86: end: jmpr cc_uncond, 0 ; 012D : 0000_0100_0010_0101_1010_1111 87: endpr: nop 012E : 0000_0000_0000_0000_0000_0000 Source file read, 0 error(s), 0 warning(s).