-------------------------------------------------------------------------------
-- Resort signals to "New Numbering Scheme"
-- 
-- Input: first 18*16 signasl from A-side then 18*17 Siognals form C-side
-- Output: 18*32 Signals. Eauch 32 Block is first 16A, then 16C,
-- numbering, s. (tkrawuts_pretrigger_20090714.pdf)
-------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity trigger_input_sort is

  port (
    S_first_all_A_then_all_C : in  std_logic_vector(575 downto 0);
    S_SM_by_SM               : out std_logic_vector(575 downto 0));


end trigger_input_sort;

architecture behv of trigger_input_sort is

  signal Si : std_logic_vector(575 downto 0);

begin  -- behv
  
  sort_g : for i in 0 to 17 generate
    Si((i*32)+31 downto (i*32)) <= S_first_all_A_then_all_C((288 + (i*16) + 15) downto (288 + (i*16))) & S_first_all_A_then_all_C(((i*16) + 15) downto (i*16));
  end generate sort_g;

  S_SM_by_SM <= not Si;
  
end behv;