LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; library work; use work.ds_pack.all; entity program is port( raddr : in std_logic_vector( 4 downto 0); tres : in std_logic_vector( 1 downto 0); tL : in std_logic_vector( 7 downto 0); -- T low tH : in std_logic_vector( 7 downto 0); -- T high rdata : out std_logic_vector(11 downto 0)); end program; architecture a of program is constant skipROM : std_logic_vector(11 downto 0) := wr_cmd & X"CC"; constant stConv : std_logic_vector(11 downto 0) := wr_cmd & X"44"; constant wtConv : std_logic_vector(11 downto 0) := h_high & X"FF"; constant wrScrPd : std_logic_vector(11 downto 0) := wr_cmd & X"4E"; constant rdScrPd : std_logic_vector(11 downto 0) := wr_cmd & X"BE"; signal wrConf : std_logic_vector(11 downto 0); signal wr_tL : std_logic_vector(11 downto 0); signal wr_tH : std_logic_vector(11 downto 0); signal wtime : std_logic_vector( 7 downto 0); begin wrConf <= wr_cmd & '0' & tres & "11111"; wr_tL <= wr_cmd & tL; wr_tH <= wr_cmd & tH; with tres select wtime <= X"E0" when "11", X"70" when "10", X"38" when "01", X"1C" when "00", (others => '-') when others; process(raddr, wr_tL, wr_tH, wrConf, wtime) begin rdata <= (others => '-'); case raddr is when "00000" => rdata(rdata'high downto rdata'high-3) <= reset; when "00001" => rdata <= skipROM; -- when "00001" => rdata <= h_high & wtime; -- when "00010" => rdata(rdata'high downto rdata'high-3) <= stop; when "00010" => rdata <= wrScrPd; when "00011" => rdata <= wr_tH; when "00100" => rdata <= wr_tL; when "00101" => rdata <= wrConf; when "00110" => rdata(rdata'high downto rdata'high-3) <= reset; when "00111" => rdata <= skipROM; when "01000" => rdata <= stConv; when "01001" => rdata <= h_high & wtime; when "01010" => rdata(rdata'high downto rdata'high-3) <= reset; when "01011" => rdata <= skipROM; when "01100" => rdata <= rdScrPd; when "01101" => rdata <= rd_cmd & X"00"; when "01110" => rdata <= rd_cmd & X"01"; when "01111" => rdata <= rd_cmd & X"02"; when "10000" => rdata <= rd_cmd & X"03"; when "10001" => rdata <= rd_cmd & X"04"; when "10010" => rdata(rdata'high downto rdata'high-3) <= stop; when others => NULL; end case; end process; end;