library ieee;
use ieee.std_logic_1164.all;

library proasic3e;
use proasic3e.all;


entity ibufds is
port ( I  : in  std_logic;
       IB : in  std_logic;
       O  : out std_logic);
end ibufds;

architecture a of ibufds is

COMPONENT inbuf_lvds
    port(
      PADP   :  in    STD_ULOGIC;
      PADN   :  in    STD_ULOGIC;
      Y      :  out   STD_ULOGIC);
END COMPONENT;

begin

iib: inbuf_lvds port map(PADP => I, PADN => IB, Y => O);

end;