#NET "A_ECL"  LOC = "P8" | IOSTANDARD = LVTTL
#NET "B_Channel"  LOC = "P50"
#NET "B_ECL"  LOC = "P12"
#NET "BC_ECL"  LOC = "P18" | IOSTANDARD = LVTTL
NET "BUSY"  LOC = "P96" | IOSTANDARD = LVTTL;
#NET "CB_A"  LOC = "P97" | IOSTANDARD = LVTTL
#NET "CB_A" LOC = "P180"; # not right pin
NET "CB_C"  LOC = "P99"  | IOSTANDARD = LVTTL;
NET "CB_TOF"  LOC = "P94" | IOSTANDARD = LVTTL ;
#NET "PIMLINK2"  LOC = "P42"
NET "L_OUTS"  LOC = "P93" | IOSTANDARD = LVTTL ;
#NET "TTC_Rdy"  LOC = "P116"
# Pins for subboard IF17Y-1
#PACE: Start of Constraints generated by PACE
#PACE: Start of PACE I/O Pin Assignments
NET "CLK120n"  LOC = "P184"  | IOSTANDARD = LVDS_25;
NET "CLK120p"  LOC = "P183"  | IOSTANDARD = LVDS_25;
NET "CLK40n" LOC = "P186" | IOSTANDARD = LVDS_25;
NET "CLK40p" LOC = "P185" | IOSTANDARD = LVDS_25;
# NET "IF17x_SCSN_IN"  LOC = "P74" | IOSTANDARD = LVTTL
# NET "IF17x_SCSN_OUT"  LOC = "P75" | IOSTANDARD = LVTTL
NET "L1ACCEPTn"  LOC = "P193" | IOSTANDARD = LVDS_25 ;
NET "L1ACCEPTp"  LOC = "P192" | IOSTANDARD = LVDS_25 ;
# NET "CNRRL" LOC = "P25" | IOSTANDARD = LVTTL
NET "LED1"  LOC = "P102" | IOSTANDARD = LVTTL ;
NET "LED2"  LOC = "P100" | IOSTANDARD = LVTTL ;
# NET "SPA"  LOC = "P35" | IOSTANDARD = LVTTL
# NET "SPB"  LOC = "P42" | IOSTANDARD = LVTTL
# NET "SPC"  LOC = "P69" | IOSTANDARD = LVTTL
# NET "SPD"  LOC = "P68" | IOSTANDARD = LVTTL
#NET "S1_IN1"  LOC = "P2" | IOSTANDARD = LVTTL
#NET "S1_IN2"  LOC = "P3" | IOSTANDARD = LVTTL
#NET "S2_IN1"  LOC = "P4" | IOSTANDARD = LVTTL
#NET "S2_IN2"  LOC = "P9" | IOSTANDARD = LVTTL
#NET "S1_OUT1"  LOC = "P11" | IOSTANDARD = LVTTL
#NET "S1_OUT2"  LOC = "P15" | IOSTANDARD = LVTTL
#NET "S2_OUT1"  LOC = "P16" | IOSTANDARD = LVTTL
#NET "S2_OUT2"  LOC = "P19" | IOSTANDARD = LVTTL
NET "CLK40_T0"  LOC = "P2" | IOSTANDARD = LVTTL ;
NET "SCSNOUT_T0"  LOC = "P3" | IOSTANDARD = LVTTL ;
NET "SELECTOR_T0"  LOC = "P4" | IOSTANDARD = LVTTL ;
NET "KOINZ_T0"  LOC = "P9" | IOSTANDARD = LVTTL ;

NET "CLK40_V0"  LOC = "P15" | IOSTANDARD = LVTTL ;
NET "SCSNOUT_V0"  LOC = "P16" | IOSTANDARD = LVTTL ;
NET "SELECTOR_V0"  LOC = "P19" | IOSTANDARD = LVTTL ;
NET "KOINZ_V0"  LOC = "P22" | IOSTANDARD = LVTTL ;

NET "CLK40_V1"  LOC = "P31" | IOSTANDARD = LVTTL ;
NET "SCSNOUT_V1"  LOC = "P35" | IOSTANDARD = LVTTL ;
NET "SELECTOR_V1"  LOC = "P41" | IOSTANDARD = LVTTL ;
NET "KOINZ_V1"  LOC = "P48" | IOSTANDARD = LVTTL ;

NET "CLK40_V2"  LOC = "P56" | IOSTANDARD = LVTTL ;
NET "SCSNOUT_V2"  LOC = "P60" | IOSTANDARD = LVTTL ;
NET "SELECTOR_V2"  LOC = "P61" | IOSTANDARD = LVTTL ;
NET "KOINZ_V2"  LOC = "P62" | IOSTANDARD = LVTTL ;

NET "CLK40_V3"  LOC = "P64" | IOSTANDARD = LVTTL ;
NET "SCSNOUT_V3"  LOC = "P65" | IOSTANDARD = LVTTL ;
NET "SELECTOR_V3"  LOC = "P68" | IOSTANDARD = LVTTL ;
NET "KOINZ_V3"  LOC = "P69" | IOSTANDARD = LVTTL ;
#NET "T0"  LOC = "P65" | IOSTANDARD = LVTTL
#NET "T1"  LOC = "P64" | IOSTANDARD = LVTTL
NET "T2"  LOC = "P63" | IOSTANDARD = LVTTL ;
#NET "T3"  LOC = "P62" | IOSTANDARD = LVTTL
#NET "T4"  LOC = "P61" | IOSTANDARD = LVTTL
#NET "T5"  LOC = "P60" | IOSTANDARD = LVTTL
#NET "T6"  LOC = "P56" | IOSTANDARD = LVTTL
NET "T7"  LOC = "P55" | IOSTANDARD = LVTTL ;
# NET "PIMLINK0"  LOC = "P23" | IOSTANDARD = LVTTL
# NET "PIMLINK1"  LOC = "P33" | IOSTANDARD = LVTTL
NET "SCSNFEBinn"  LOC = "P197" | IOSTANDARD = LVDS_25 ;
NET "SCSNFEBINp"  LOC = "P196" | IOSTANDARD = LVDS_25 ;
NET "SCSNFEBOUTn"  LOC = "P200" | IOSTANDARD = LVDS_25 ;
NET "SCSNFEBOUTp"  LOC = "P199" | IOSTANDARD = LVDS_25 ;
NET "SCSNINn"  LOC = "P203"  | IOSTANDARD = LVDS_25;
NET "SCSNINp"  LOC = "P202"  | IOSTANDARD = LVDS_25;
NET "SCSNOUTn"  LOC = "P206"  | IOSTANDARD = LVDS_25;
NET "SCSNOUTp"  LOC = "P205"  | IOSTANDARD = LVDS_25;
#NET "IO_C0"  LOC = "P106" | IOSTANDARD = LVTTL
#NET "IO_C1"  LOC = "P107" | IOSTANDARD = LVTTL
#NET "IO_C2"  LOC = "P108" | IOSTANDARD = LVTTL
#NET "IO_C3"  LOC = "P109" | IOSTANDARD = LVTTL
#NET "IO_C4"  LOC = "P112" | IOSTANDARD = LVTTL ; LVDSp
#NET "IO_C5"  LOC = "P113" | IOSTANDARD = LVTTL ; LVDSn
#NET "IO_C6"  LOC = "P115" | IOSTANDARD = LVTTL ; LVDSp
#NET "IO_C7"  LOC = "P116" | IOSTANDARD = LVTTL ; LVDSn
#PACE: Start of PACE Area Constraints
#PACE: Start of PACE Prohibit Constraints
#PACE: End of Constraints generated by PACE
# remove internal resistors on LVDS inputs
#NET "S1_IN2" TNM_NET = "S1_IN2"
#TIMESPEC "TS_S1_IN2" = PERIOD "S1_IN2" 8 ns HIGH 50 %
NET "CLK120p" TNM_NET = "CLK120p";
TIMESPEC "TS_CLK120p" = PERIOD "CLK120p" 8 ns HIGH 50 %;
NET "CLK40p" TNM_NET = "CLK40p";
TIMESPEC "TS_CLK40p" = PERIOD "CLK40p" 25 ns HIGH 50 %;
#NET "S1_IN1" TNM_NET = "S1_IN1"
#TIMESPEC "TS_S1_IN1" = PERIOD "S1_IN1" 25 ns HIGH 50 %
#NET "CB_C" TNM_NET = "CB_C"
#TIMESPEC "TS_CB_C" = PERIOD "CB_C" 25 ns HIGH 50 %
#NET "Busy" TNM_NET = "Busy"
#TIMESPEC "TS_Busy" = PERIOD "Busy" 25 ns HIGH 50 %
#OFFSET = OUT 25 ns AFTER "CLK120p"
#OFFSET = OUT 25 ns AFTER "CLK40p"
#OFFSET = IN 6 ns BEFORE "CLK40p"
#OFFSET = IN 6 ns BEFORE "CLK120p"
#TIMESPEC "TS_P2P" = FROM "PADS" TO "PADS" 8 ns
#INST "scsn_dataout_reg_signal_0_1" IOB = TRUE
#INST "scsn_dataout_reg_signal_1_1" IOB = TRUE
INST "Inst_fiber_encode/encoded_signal" IOB = TRUE;