======================================= Pretrigger CheshireCat Manual for CBC/A ======================================= reset CBC/A ./CheshierCat CB_reset FEB input controlls ==================== pattern_sync_edge_sel_T0 ./CheshireCat CB_write 350 0/1 pattern_sync_set_delay_T0 ./CheshireCat CB_write 351 0..31 pattern_sync_edge_rate_T0 ./CheshireCat CB_read 352 dissable_FEB_input T0 ./CheshireCat CB_write 353 0..1 pattern_sync_edge_sel_V0 ./CheshireCat CB_write 310 0/1 pattern_sync_set_delay_V0 ./CheshireCat CB_write 311 0..31 pattern_sync_edge_rate_V0 ./CheshireCat CB_read 312 dissable_FEB_input V0 ./CheshireCat CB_write 313 0..1 pattern_sync_edge_sel_V1 ./CheshireCat CB_write 320 0/1 pattern_sync_set_delay_V1 ./CheshireCat CB_write 321 0..31 pattern_sync_edge_rate_V1 ./CheshireCat CB_read 322 dissable_FEB_input V1 ./CheshireCat CB_write 323 0..1 pattern_sync_edge_sel_V2 ./CheshireCat CB_write 330 0/1 pattern_sync_set_delay_V2 ./CheshireCat CB_write 331 0..31 pattern_sync_edge_rate_V2 ./CheshireCat CB_read 332 dissable_FEB_input V2 ./CheshireCat CB_write 333 0..1 pattern_sync_edge_sel_V3 ./CheshireCat CB_write 340 0/1 pattern_sync_set_delay_V3 ./CheshireCat CB_write 341 0..31 pattern_sync_edge_rate_V3 ./CheshireCat CB_read 342 dissable_FEB_input V3 ./CheshireCat CB_write 343 0..1 LUT configuration ================== LUT_data_in_signal ./CheshireCat CB_write 32768..33791 0..15 LUT_data_out_signal ./CheshireCat CB_read 32768..33791 0..15 pattern generator output to CBTOF ================================= fiber_output_pattern_mode ./CheshireCat CB_write 360 0/1 fiber_output_pattern ./CheshireCat CB_write 361 0..15 analyzer module configuration ============================= counter_no: x = 1..25 inp 0 = T0; inp 1 = V0; inp 2 = V1; inp 3 = V2; inp 4 = V3 analyzer_pattern_sel_input ./CheshireCat CB_write 500+(10*x) 0..4 analyzer_pattern_in ./CheshireCat CB_write 501+(10*x) 0..3 analyzer_pattern_out ./CheshireCat CB_write 502+(10*x) 0..15 analyzer_pattern_coinz_en ./CheshireCat CB_write 503+(10*x) 0/1 timing analyzer =============== clear timing analyzer ./CheshireCat CB_write 600 1..0 set trigger pattern ./CheshireCat CB_write 602 0..65535 active timing analyze ./CheshireCat CB_write 601 1..0 read timing analyze ./CheshireCat CB_read 16384 ... 16895 ./CheshireCat CB_analyzer_read done timing analyze ./CheshireCat CB_read 603 counter readout =============== counter_reset ./CheshireCat CB_write 50 0/1 counter_readout_req ./CheshireCat CB_write 51 0/1 counter_readout_done ./CheshireCat CB_read 52 counter_value(31 downto 0) ./CheshireCat CB_read 6400 + CounterNo counter_value(48 downto 32) ./CheshireCat CB_read 12800 + CounterNo counter_en(0) => '1', counter_en(24 downto 1) => analyzer_counter_en(24 downto 1), counter_en(26 downto 25) => zero_signal(26 downto 25), counter_en(28 downto 27) => T0_parallized_signal(1 downto 0), counter_en(30 downto 29) => V0_parallized_signal(1 downto 0), counter_en(32 downto 31) => V1_parallized_signal(1 downto 0), counter_en(34 downto 33) => V2_parallized_signal(1 downto 0), counter_en(36 downto 35) => V3_parallized_signal(1 downto 0), counter_en(37) => T0_coinzidence_signal, counter_en(38) => V0_coinzidence_signal, counter_en(39) => V1_coinzidence_signal, counter_en(40) => V2_coinzidence_signal, counter_en(41) => V3_coinzidence_signal, counter_en(45 downto 42) => selected_trigger_signal(3 downto 0), -- the bits that go on the fiber counter_en(62 downto 46) => zero_signal(62 downto 46), configure FPGA ============== mount dcsnfs nfsmount zimmer://home/stefan/CheshireCat/dcsnfs; cd /mnt remove std. driver rmmod jtag load jtag driver insmod jtagfeb.o select jtag echo '2' > /dev/jtagsel load design ./playxsvf -t /dev/jtagfeb cbcfpga.xsvf FEB controll ============ select jtag line echo '3' > /dev/jtagsel load design ./playxsvf -t /dev/jtagfeb febfpga.xsvf select_feb_to_configure ./CheshireCat CB_write 999 0..7 -- 5 for T0 FEB -- 1 for V0 FEB -- 2 for V1 FEB -- 3 for V2 FEB -- 4 for V3 FEB -- 0, 6, 7 for normal trigger operation there is no trigger while configuration reset work only in trigger mode T0_FEB_reset ./CheshireCat CB_write 450 0..1 V0_FEB_reset ./CheshireCat CB_write 410 0..1 V1_FEB_reset ./CheshireCat CB_write 420 0..1 V2_FEB_reset ./CheshireCat CB_write 430 0..1 V3_FEB_reset ./CheshireCat CB_write 440 0..1