module TTCB_parser (
	input clk,
	input reset,
	input TTC_B,
	output reg [11:0] BCID,
	output reg [23:0] OrbitID);

	reg [31:0] shiftreg;
	reg [3:0] state;

	parameter
		L1M_H 		= 4'h1,
		L1M_D 		= 4'h2,
		L2M_H 		= 4'h3,
		L2M_D 		= 4'h4,
		L2M_R 		= 4'h5,
		ROI_H 		= 4'h6,
		ROI_D 		= 4'h7,
		RES_CTP0 	= 4'h8,
		RES_CTP1 	= 4'h9,
		RES_CTP2 	= 4'ha,
		RES_CTP3 	= 4'hb;

	initial
	begin
		shiftreg	<= 0;
		BCID		<= 12'b1111_1111_1111;
		OrbitID		<= 24'b1111_1111_1111_1111_1111_1111;
		state		<= 0;
	end

	always @(posedge clk)
	begin
		shiftreg <= {shiftreg[30:0], TTC_B};
		if (reset == 1'b1)
		begin
			shiftreg <= 0;
			BCID		<= 12'b1111_1111_1111;
			OrbitID		<= 24'b1111_1111_1111_1111_1111_1111;
			state <= 0;
		end
		else
		begin
			if (shiftreg[31:16] == 16'h8001)
			begin
				case (shiftreg[15:12])
					L1M_H:
					begin
					end
	
					L1M_D:
					begin
					end
	
					L2M_H:
					begin
						BCID <= shiftreg[11:0];
						state <= 4'd1;
					end
	
					L2M_D:
					begin
						case (state)
							4'd0:
							begin
							end
	
							4'd1:
							begin
								OrbitID[23:12] <= shiftreg[11:0];
								state <= state + 1'b1;
							end
	
							4'd2:
							begin
								OrbitID[11:0] <= shiftreg[11:0];
								state <= state + 1'b1;
							end
						
							default:
							begin
								state <= 0;
							end
						endcase
					end
	
					L2M_R:
					begin
						BCID <= shiftreg[11:0];
					end
				endcase
			end
		end
	end

endmodule