Design Space Explorer Report ------------------------------------------------------------------------------- +------------------------------------------------------------------------+ | Report Information | +------------------------------------------------------------------------+ +--------------------+--------------------------------------------------------------------+ | Start Date & Time | Fri Apr 17 11:46:26 CEST 2015 | | Working Directory | /home/trd/projects/LTUT/Quartus-Files | | Project Name | LTU_T | | Revision Name | newStart | | Quartus II Version | Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version | +--------------------+--------------------------------------------------------------------+ Table of Contents Report Information Legal Notice Flow Messages Flow Summary +-----------------------------------------------------------------------------+ | Legal Notice | +-----------------------------------------------------------------------------+ Copyright (C) 1991-2013 Altera Corporation. All rights reserved. Any megafunction design, and related netlist (encrypted or decrypted), support information, device programming or simulation file, and any other associated documentation or information provided by Altera or a partner under Altera's Megafunction Partnership Program may be used only to program PLD devices (but not masked PLD devices) from Altera. Any other use of such megafunction design, netlist, support information, device programming or simulation file, or any other related documentation or information is prohibited for any other purpose, including, but not limited to modification, reverse engineering, de-compiling, or use with any other silicon devices, unless such use is explicitly licensed under a separate agreement with Altera or a megafunction partner. Title to the intellectual property, including patents, copyrights, trademarks, trade secrets, or maskworks, embodied in any such megafunction design, netlist, support information, device programming or simulation file, or any other related documentation or information provided by Altera or a megafunction partner, remains with Altera, the megafunction partner, or their respective licensors. No other licenses, including any licenses needed under any third party's intellectual property, are provided herein. +-----------------------------------------------------------------------------+ | Flow Messages | +-----------------------------------------------------------------------------+ Info: Loading space: LogicLock Restructuring Space Info: Loading space: Selective Performance Optimization Space for Quartus II Integrated Synthesis Projects Info: Loading space: Seeds Info: Registered slave gorilla.dyn.trd.net with DSE Info: Design space contains 16 points +-----------------------------------------------------------------------------+ | Settings for base | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+ | Setting | Value | +----------------------------------------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | | SEED | 6 | | STATE_MACHINE_PROCESSING | AUTO | | MUX_RESTRUCTURE | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | | FITTER_EFFORT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | +----------------------------------------------+--------------+ +-------------------------------------------------------------------------------+ | QSF Setting | +-------------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE AREA | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name SEED 6 | | set_global_assignment -name STATE_MACHINE_PROCESSING AUTO | | set_global_assignment -name MUX_RESTRUCTURE AUTO | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION AUTO | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1 | | set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION ON | +-------------------------------------------------------------------------------+ Info: Analyzing revision newStart Info: Creating archive of base settings Info: Setting up point 1 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 1 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+---------------------------------------------------------------------------------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+---------------------------------------------------------------------------------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | | -setup-script | quartus_cdb:/home/trd/altera/13.0sp1/quartus/common/tcl/packages/dse/llr_softener.tcl | | +----------------------------------------------+---------------------------------------------------------------------------------------+--------------+ Info: Setting up point 2 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 2 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------------------------------------------------------------------------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------------------------------------------------------------------------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | | -setup-script | quartus_cdb:/home/trd/altera/13.0sp1/quartus/common/tcl/packages/dse/llr_remover.tcl | | +----------------------------------------------+--------------------------------------------------------------------------------------+--------------+ Info: Preparing base compile for submission Info: Preparing point 1 for submission Info: Preparing point 2 for submission Info: All points are ready for submission Info: Exploring space Info: Point 0 is being started on client gorilla.dyn.trd.net Info: Point 0 is uploading files to client gorilla.dyn.trd.net Info: Point 0 is running on client gorilla.dyn.trd.net Info: Point 1 is being started on client gorilla.dyn.trd.net Info: Point 1 is uploading files to client gorilla.dyn.trd.net Info: Point 1 is running on client gorilla.dyn.trd.net Info: Point 0 is downloading results files from client gorilla.dyn.trd.net Info: Point 0 has finished Info: Found best results at point base +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 2 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 2 is being started on client gorilla.dyn.trd.net Info: Point 2 is uploading files to client gorilla.dyn.trd.net Info: Point 2 is running on client gorilla.dyn.trd.net Info: Point 2 is downloading results files from client gorilla.dyn.trd.net Info: Point 2 has finished Info: Found best results at point base +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 1 is downloading results files from client gorilla.dyn.trd.net Info: Point 1 has finished Info: Found best results at point base +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: All jobs have completed. Info: Loading results for base (base) Info: Loading results for point 1 (1) Info: Loading results for point 2 (2) Info: Setting up point 3 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 3 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | ON | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +-----------------------------------------------------------------------------+ | QSF Setting | +-----------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION ON | +-----------------------------------------------------------------------------+ Info: Setting up point 4 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 4 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Preparing point 3 for submission Info: Preparing point 4 for submission Info: All points are ready for submission Info: Exploring space Info: Point 3 is being started on client gorilla.dyn.trd.net Info: Point 4 is being started on client gorilla.dyn.trd.net Info: Point 3 is uploading files to client gorilla.dyn.trd.net Info: Point 4 is uploading files to client gorilla.dyn.trd.net Info: Point 3 is running on client gorilla.dyn.trd.net Info: Point 4 is running on client gorilla.dyn.trd.net Info: Point 4 is downloading results files from client gorilla.dyn.trd.net Info: Point 4 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 3 is downloading results files from client gorilla.dyn.trd.net Info: Point 3 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: All jobs have completed. Info: Loading results for point 3 (3) Info: Loading results for point 4 (4) Info: Found new best results at point 3 Info: Found new best results at point 4 Info: Setting up point 5 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 5 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | SPEED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | OFF | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name MUX_RESTRUCTURE OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 6 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 6 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | BALANCED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name STATE_MACHINE_PROCESSING AUTO | | set_global_assignment -name MUX_RESTRUCTURE AUTO | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 7 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 7 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | SPEED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name STATE_MACHINE_PROCESSING AUTO | | set_global_assignment -name MUX_RESTRUCTURE AUTO | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 8 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 8 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | SPEED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | OFF | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | ON | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name MUX_RESTRUCTURE OFF | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 9 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 9 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | BALANCED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | ON | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE BALANCED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name STATE_MACHINE_PROCESSING AUTO | | set_global_assignment -name MUX_RESTRUCTURE AUTO | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 10 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 10 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | SPEED | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | ON | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name STATE_MACHINE_PROCESSING AUTO | | set_global_assignment -name MUX_RESTRUCTURE AUTO | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PRE_MAPPING_RESYNTHESIS ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Preparing point 5 for submission Info: Preparing point 6 for submission Info: Preparing point 7 for submission Info: Preparing point 8 for submission Info: Preparing point 9 for submission Info: Preparing point 10 for submission Info: All points are ready for submission Info: Exploring space Info: Point 5 is being started on client gorilla.dyn.trd.net Info: Point 6 is being started on client gorilla.dyn.trd.net Info: Point 5 is uploading files to client gorilla.dyn.trd.net Info: Point 6 is uploading files to client gorilla.dyn.trd.net Info: Point 5 is running on client gorilla.dyn.trd.net Info: Point 6 is running on client gorilla.dyn.trd.net Info: Point 6 is downloading results files from client gorilla.dyn.trd.net Info: Point 6 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 8 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 9 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 10 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 7 is being started on client gorilla.dyn.trd.net Info: Point 7 is uploading files to client gorilla.dyn.trd.net Info: Point 7 is running on client gorilla.dyn.trd.net Info: Point 5 is downloading results files from client gorilla.dyn.trd.net Info: Point 5 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 8 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 9 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 10 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 10 is being started on client gorilla.dyn.trd.net Info: Point 10 is uploading files to client gorilla.dyn.trd.net Info: Point 10 is running on client gorilla.dyn.trd.net Info: Point 7 is downloading results files from client gorilla.dyn.trd.net Info: Point 7 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 9 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 10 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 8 is being started on client gorilla.dyn.trd.net Info: Point 8 is uploading files to client gorilla.dyn.trd.net Info: Point 8 is running on client gorilla.dyn.trd.net Info: Point 10 is downloading results files from client gorilla.dyn.trd.net Info: Point 10 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 9 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 9 is being started on client gorilla.dyn.trd.net Info: Point 9 is uploading files to client gorilla.dyn.trd.net Info: Point 9 is running on client gorilla.dyn.trd.net Info: Point 8 is downloading results files from client gorilla.dyn.trd.net Info: Point 8 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 9 is downloading results files from client gorilla.dyn.trd.net Info: Point 9 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: All jobs have completed. Info: Loading results for point 5 (5) Info: Loading results for point 6 (6) Info: Loading results for point 7 (7) Info: Loading results for point 8 (8) Info: Loading results for point 9 (9) Info: Loading results for point 10 (10) Info: Setting up point 11 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 11 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 1 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 1 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 12 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 12 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 2 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 2 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 13 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 13 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 3 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 3 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 14 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 14 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 4 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 4 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 15 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 15 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 5 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 5 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Setting up point 16 of 16 +-----------------------------------------------------------------------------+ | Settings for Point 16 of 16 | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name SEED 6 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ Info: Preparing point 11 for submission Info: Preparing point 12 for submission Info: Preparing point 13 for submission Info: Preparing point 14 for submission Info: Preparing point 15 for submission Info: Preparing point 16 for submission Info: All points are ready for submission Info: Exploring space Info: Point 15 is being started on client gorilla.dyn.trd.net Info: Point 16 is being started on client gorilla.dyn.trd.net Info: Point 15 is uploading files to client gorilla.dyn.trd.net Info: Point 16 is uploading files to client gorilla.dyn.trd.net Info: Point 15 is running on client gorilla.dyn.trd.net Info: Point 16 is running on client gorilla.dyn.trd.net Info: Point 15 is downloading results files from client gorilla.dyn.trd.net Info: Point 15 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 12 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 13 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 14 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 11 is being started on client gorilla.dyn.trd.net Info: Point 16 is downloading results files from client gorilla.dyn.trd.net Info: Point 11 is uploading files to client gorilla.dyn.trd.net Info: Point 11 is running on client gorilla.dyn.trd.net Info: Point 16 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 12 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 13 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 14 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 12 is being started on client gorilla.dyn.trd.net Info: Point 12 is uploading files to client gorilla.dyn.trd.net Info: Point 12 is running on client gorilla.dyn.trd.net Info: Point 11 is downloading results files from client gorilla.dyn.trd.net Info: Point 11 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.194 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1021 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 309 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.194 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 12 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 13 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 14 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 13 is being started on client gorilla.dyn.trd.net Info: Point 12 is downloading results files from client gorilla.dyn.trd.net Info: Point 13 is uploading files to client gorilla.dyn.trd.net Info: Point 12 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.194 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1021 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 309 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.194 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 12 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.16 ns | 23.159 ns | 0.000 ns | 43.18 MHz | 43.18 MHz | 1.791 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:02 | 00:02:30 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1026 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 24% / 26% | 1 / 2 ( 50 % ) | 0.470 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.791 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 13 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 14 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 14 is being started on client gorilla.dyn.trd.net Info: Point 13 is running on client gorilla.dyn.trd.net Info: Point 14 is uploading files to client gorilla.dyn.trd.net Info: Point 14 is running on client gorilla.dyn.trd.net Info: Point 13 is downloading results files from client gorilla.dyn.trd.net Info: Point 13 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.194 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1021 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 309 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.194 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 12 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.16 ns | 23.159 ns | 0.000 ns | 43.18 MHz | 43.18 MHz | 1.791 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:02 | 00:02:30 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1026 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 24% / 26% | 1 / 2 ( 50 % ) | 0.470 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.791 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 13 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 23.14 ns | 23.137 ns | 0.000 ns | 43.22 MHz | 43.22 MHz | 1.815 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1027 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.815 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 14 | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | unknown | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: Point 14 is downloading results files from client gorilla.dyn.trd.net Info: Point 14 has finished Info: Found best results at point 4 +-----------------------------------------------------------------------------+ | Detailed Cumulative Results | +-----------------------------------------------------------------------------+ +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.194 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1021 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 309 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.194 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 12 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.16 ns | 23.159 ns | 0.000 ns | 43.18 MHz | 43.18 MHz | 1.791 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:02 | 00:02:30 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1026 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 24% / 26% | 1 / 2 ( 50 % ) | 0.470 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.791 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 13 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 23.14 ns | 23.137 ns | 0.000 ns | 43.22 MHz | 43.22 MHz | 1.815 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1027 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.815 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 14 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 9% | 0.000 ns | 0.727 ns | 23.25 ns | 23.250 ns | 0.000 ns | 43.01 MHz | 43.01 MHz | 1.699 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1024 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 23% / 27% | 1 / 2 ( 50 % ) | 0.464 | unknown | 11628 | 317 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.699 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ Info: All jobs have completed. Info: Loading results for point 11 (11) Info: Loading results for point 12 (12) Info: Loading results for point 13 (13) Info: Loading results for point 14 (14) Info: Loading results for point 15 (15) Info: Loading results for point 16 (16) +-----------------------------------------------------------------------------+ | Flow Summary | +-----------------------------------------------------------------------------+ +-----------------------------------------------------------------------------+ | Detailed Results | +-----------------------------------------------------------------------------+ +----------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | Point | All Failing Paths | ASMI Blocks | Average fan-out | Average interconnect usage (total/H/V) | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | Clock Period: Geometric Mean | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | CRC blocks | Elapsed Time: Analysis & Synthesis | Elapsed Time: Assembler | Elapsed Time: EDA Netlist Writer | Elapsed Time: Fitter | Elapsed Time: TimeQuest Timing Analyzer | Elapsed Time: Total | Global clocks | Global signals | Highest non-global fan-out | I/O pins | I/O pins: Clock pins | JTAGs | Logic element usage by number of LUT inputs: 0 input functions | Logic element usage by number of LUT inputs: 1 input functions | Logic element usage by number of LUT inputs: 2 input functions | Logic element usage by number of LUT inputs: 3 input functions | Logic element usage by number of LUT inputs: 4 input functions | Logic elements by mode: arithmetic mode | Logic elements by mode: asynchronous clear/load mode | Logic elements by mode: normal mode | Logic elements by mode: qfbk mode | Logic elements by mode: register cascade mode | Logic elements by mode: synchronous clear/load mode | Logic elements in carry chains | M4Ks | Maximum fan-out | Number of I/O registers | Peak interconnect usage (total/H/V) | PLLs | Quality of Fit | Total block memory bits | Total fan-out | Total LABs | Total logic elements | Total logic elements: Combinational with a register | Total logic elements: Combinational with no register | Total logic elements: Register only | Total memory bits | Total RAM block bits | Total registers | Total Thermal Power Dissipation | Virtual pins | Worst-case Slack | +----------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ | base | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 1 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 2 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.763 ns | 0.000 ns | 43.93 MHz | 43.93 MHz | 2.189 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:54 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1023 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 305 / 1,206 ( 25 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 3 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.190 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 881 | 751 | 0 | 1879 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 24% / 24% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11632 | 305 / 1,206 ( 25 % ) | 2630 | 1283 | 996 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.190 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 4 (Best) | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 5 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:03 | 00:01:25 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 6 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.13 ns | 23.127 ns | 0.000 ns | 43.24 MHz | 43.24 MHz | 1.823 ns | 0 / 1 ( 0 % ) | 00:00:16 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:03 | 00:01:21 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 431 | 803 | 880 | 751 | 0 | 1883 | 273 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 29% | 1 / 2 ( 50 % ) | 0.472 | unknown | 11639 | 317 / 1,206 ( 26 % ) | 2634 | 1280 | 1003 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.823 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 7 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.13 ns | 23.132 ns | 0.000 ns | 43.23 MHz | 43.23 MHz | 1.820 ns | 0 / 1 ( 0 % ) | 00:00:18 | 00:00:02 | 00:00:06 | 00:00:55 | 00:00:02 | 00:01:23 | 2 / 8 ( 25 % ) | 2 | 341 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 466 | 873 | 1021 | 751 | 0 | 2118 | 280 | 0 | 1042 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 27% / 26% / 28% | 1 / 2 ( 50 % ) | 0.472 | unknown | 12427 | 348 / 1,206 ( 29 % ) | 2869 | 1289 | 1238 | 342 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 1.820 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 8 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:20 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:03 | 00:01:28 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 9 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 23.12 ns | 23.116 ns | 0.000 ns | 43.26 MHz | 43.26 MHz | 1.836 ns | 0 / 1 ( 0 % ) | 00:00:17 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:02 | 00:01:22 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 439 | 797 | 898 | 751 | 0 | 1900 | 277 | 0 | 1029 | 793 | 24 / 52 ( 46 % ) | 1822 | 200 | 27% / 26% / 29% | 1 / 2 ( 50 % ) | 0.473 | unknown | 11717 | 317 / 1,206 ( 26 % ) | 2651 | 1292 | 1011 | 348 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,840 / 12,795 ( 14 % ) | unknown | 0 | 1.836 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 10 | 0 | 0 / 1 ( 0 % ) | 4.04 | 10% / 10% / 10% | 0.000 ns | 0.727 ns | 22.81 ns | 22.805 ns | 0.000 ns | 43.85 MHz | 43.85 MHz | 2.143 ns | 0 / 1 ( 0 % ) | 00:00:19 | 00:00:02 | 00:00:06 | 00:00:57 | 00:00:02 | 00:01:26 | 2 / 8 ( 25 % ) | 2 | 331 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 165 | 468 | 875 | 995 | 751 | 0 | 2093 | 307 | 0 | 1056 | 793 | 24 / 52 ( 46 % ) | 1813 | 200 | 28% / 27% / 28% | 1 / 2 ( 50 % ) | 0.484 | unknown | 12301 | 335 / 1,206 ( 28 % ) | 2844 | 1292 | 1213 | 339 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,831 / 12,795 ( 14 % ) | unknown | 0 | 2.143 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 11 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 22.76 ns | 22.758 ns | 0.000 ns | 43.94 MHz | 43.94 MHz | 2.194 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:03 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1021 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 309 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.194 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 12 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 10% / 9% | 0.000 ns | 0.727 ns | 23.16 ns | 23.159 ns | 0.000 ns | 43.18 MHz | 43.18 MHz | 1.791 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:54 | 00:00:02 | 00:02:30 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1026 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 24% / 26% | 1 / 2 ( 50 % ) | 0.470 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.791 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 13 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 23.14 ns | 23.137 ns | 0.000 ns | 43.22 MHz | 43.22 MHz | 1.815 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1027 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 22% / 21% / 23% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 316 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.815 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 14 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 9% | 0.000 ns | 0.727 ns | 23.25 ns | 23.250 ns | 0.000 ns | 43.01 MHz | 43.01 MHz | 1.699 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:55 | 00:00:03 | 00:02:31 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1024 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 25% / 23% / 27% | 1 / 2 ( 50 % ) | 0.464 | unknown | 11628 | 317 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.699 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 15 | 0 | 0 / 1 ( 0 % ) | 4.10 | 9% / 9% / 10% | 0.000 ns | 0.727 ns | 23.14 ns | 23.143 ns | 0.000 ns | 43.21 MHz | 43.21 MHz | 1.807 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:05 | 00:00:56 | 00:00:03 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 23% / 21% / 26% | 1 / 2 ( 50 % ) | 0.471 | unknown | 11628 | 321 / 1,206 ( 27 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 1.807 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | | 16 | 0 | 0 / 1 ( 0 % ) | 4.10 | 10% / 10% / 9% | 0.000 ns | 0.727 ns | 22.74 ns | 22.743 ns | 0.000 ns | 43.97 MHz | 43.97 MHz | 2.205 ns | 0 / 1 ( 0 % ) | 00:00:23 | 00:00:02 | 00:00:06 | 00:00:56 | 00:00:02 | 00:02:32 | 2 / 8 ( 25 % ) | 2 | 256 | 177 / 249 ( 71 % ) | 1 / 2 ( 50 % ) | 0 / 1 ( 0 % ) | 2 | 167 | 430 | 799 | 880 | 751 | 0 | 1878 | 273 | 0 | 1019 | 793 | 24 / 52 ( 46 % ) | 1816 | 200 | 24% / 23% / 25% | 1 / 2 ( 50 % ) | 0.484 | unknown | 11628 | 313 / 1,206 ( 26 % ) | 2629 | 1283 | 995 | 351 | 97,280 / 239,616 ( 41 % ) | 110,592 / 239,616 ( 46 % ) | 1,834 / 12,795 ( 14 % ) | unknown | 0 | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +----------+-------------------+---------------+-----------------+----------------------------------------+--------------------------------------------------------------+------------------------------------------------------+------------------------------+-------------------------------------------------------------+---------------------------------------------------------------+------------------------------------------------------+-----------------------------------------------------------------+-------------------------------------------------------+---------------+------------------------------------+-------------------------+----------------------------------+----------------------+-----------------------------------------+---------------------+----------------+----------------+----------------------------+--------------------+----------------------+---------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+----------------------------------------------------------------+-----------------------------------------+------------------------------------------------------+-------------------------------------+-----------------------------------+-----------------------------------------------+-----------------------------------------------------+--------------------------------+------------------+-----------------+-------------------------+-------------------------------------+----------------+----------------+-------------------------+---------------+----------------------+----------------------+-----------------------------------------------------+------------------------------------------------------+-------------------------------------+---------------------------+----------------------------+-------------------------+---------------------------------+--------------+-----------------------------------------------------------+ +-----------------------------------------------------------------------------+ | Results for Base | +-----------------------------------------------------------------------------+ +-----------------------------------------------------------------+-----------------------------------------------------------+ | All Failing Paths | 0 | | ASMI Blocks | 0 / 1 ( 0 % ) | | Average fan-out | 4.10 | | Average interconnect usage (total/H/V) | 9% / 10% / 9% | | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | 0.000 ns | | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | 0.727 ns | | Clock Period: Geometric Mean | 22.76 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | 22.763 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | 0.000 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | 43.93 MHz | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | 43.93 MHz | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | 2.189 ns | | CRC blocks | 0 / 1 ( 0 % ) | | Elapsed Time: Analysis & Synthesis | 00:00:23 | | Elapsed Time: Assembler | 00:00:02 | | Elapsed Time: EDA Netlist Writer | 00:00:05 | | Elapsed Time: Fitter | 00:00:54 | | Elapsed Time: TimeQuest Timing Analyzer | 00:00:02 | | Elapsed Time: Total | 00:01:26 | | Global clocks | 2 / 8 ( 25 % ) | | Global signals | 2 | | Highest non-global fan-out | 256 | | I/O pins | 177 / 249 ( 71 % ) | | I/O pins: Clock pins | 1 / 2 ( 50 % ) | | JTAGs | 0 / 1 ( 0 % ) | | Logic element usage by number of LUT inputs: 0 input functions | 2 | | Logic element usage by number of LUT inputs: 1 input functions | 167 | | Logic element usage by number of LUT inputs: 2 input functions | 430 | | Logic element usage by number of LUT inputs: 3 input functions | 799 | | Logic element usage by number of LUT inputs: 4 input functions | 880 | | Logic elements by mode: arithmetic mode | 751 | | Logic elements by mode: asynchronous clear/load mode | 0 | | Logic elements by mode: normal mode | 1878 | | Logic elements by mode: qfbk mode | 273 | | Logic elements by mode: register cascade mode | 0 | | Logic elements by mode: synchronous clear/load mode | 1023 | | Logic elements in carry chains | 793 | | M4Ks | 24 / 52 ( 46 % ) | | Maximum fan-out | 1816 | | Number of I/O registers | 200 | | Peak interconnect usage (total/H/V) | 24% / 24% / 25% | | PLLs | 1 / 2 ( 50 % ) | | Quality of Fit | 0.484 | | Total block memory bits | unknown | | Total fan-out | 11628 | | Total LABs | 305 / 1,206 ( 25 % ) | | Total logic elements | 2629 | | Total logic elements: Combinational with a register | 1283 | | Total logic elements: Combinational with no register | 995 | | Total logic elements: Register only | 351 | | Total memory bits | 97,280 / 239,616 ( 41 % ) | | Total RAM block bits | 110,592 / 239,616 ( 46 % ) | | Total registers | 1,834 / 12,795 ( 14 % ) | | Total Thermal Power Dissipation | unknown | | Virtual pins | 0 | | Worst-case Slack | 2.189 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-----------------------------------------------------------------+-----------------------------------------------------------+ Info: Best results were found at point 4 +-----------------------------------------------------------------------------+ | Settings for Point 4 (Best) | +-----------------------------------------------------------------------------+ +----------------------------------------------+--------------+--------------+ | Setting | New Value | Base Value | +----------------------------------------------+--------------+--------------+ | CYCLONE_OPTIMIZATION_TECHNIQUE | AREA | AREA | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING | ON | ON | | SEED | 6 | 6 | | STATE_MACHINE_PROCESSING | AUTO | AUTO | | MUX_RESTRUCTURE | AUTO | AUTO | | PHYSICAL_SYNTHESIS_COMBO_LOGIC | ON | ON | | FITTER_EFFORT | STANDARD FIT | STANDARD FIT | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION | ON | ON | | ROUTER_TIMING_OPTIMIZATION_LEVEL | MAXIMUM | MAXIMUM | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION | AUTO | AUTO | | PRE_MAPPING_RESYNTHESIS | OFF | OFF | | PHYSICAL_SYNTHESIS_EFFORT | NORMAL | NORMAL | | PLACEMENT_EFFORT_MULTIPLIER | 1.5 | 1 | | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION | ON | ON | +----------------------------------------------+--------------+--------------+ +------------------------------------------------------------------------+ | QSF Setting | +------------------------------------------------------------------------+ | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON | | set_global_assignment -name PLACEMENT_EFFORT_MULTIPLIER 1.5 | | set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON | | set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM | | set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON | | set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT NORMAL | | set_global assignment -name FITTER_EFFORT "STANDARD FIT" | +------------------------------------------------------------------------+ +-----------------------------------------------------------------------------+ | Results for Point 4 (Best) | +-----------------------------------------------------------------------------+ +-----------------------------------------------------------------+-----------------------------------------------------------+ | All Failing Paths | 0 | | ASMI Blocks | 0 / 1 ( 0 % ) | | Average fan-out | 4.10 | | Average interconnect usage (total/H/V) | 10% / 10% / 9% | | Clock Hold: 'pll|altpll_component|pll|clk[0]': End Point TNS | 0.000 ns | | Clock Hold: 'pll|altpll_component|pll|clk[0]': Slack | 0.727 ns | | Clock Period: Geometric Mean | 22.74 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Actual Time | 22.743 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': End Point TNS | 0.000 ns | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Fmax | 43.97 MHz | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Restricted Fmax | 43.97 MHz | | Clock Setup: 'pll|altpll_component|pll|clk[0]': Slack | 2.205 ns | | CRC blocks | 0 / 1 ( 0 % ) | | Elapsed Time: Analysis & Synthesis | 00:00:23 | | Elapsed Time: Assembler | 00:00:02 | | Elapsed Time: EDA Netlist Writer | 00:00:05 | | Elapsed Time: Fitter | 00:00:55 | | Elapsed Time: TimeQuest Timing Analyzer | 00:00:03 | | Elapsed Time: Total | 00:02:31 | | Global clocks | 2 / 8 ( 25 % ) | | Global signals | 2 | | Highest non-global fan-out | 256 | | I/O pins | 177 / 249 ( 71 % ) | | I/O pins: Clock pins | 1 / 2 ( 50 % ) | | JTAGs | 0 / 1 ( 0 % ) | | Logic element usage by number of LUT inputs: 0 input functions | 2 | | Logic element usage by number of LUT inputs: 1 input functions | 167 | | Logic element usage by number of LUT inputs: 2 input functions | 430 | | Logic element usage by number of LUT inputs: 3 input functions | 799 | | Logic element usage by number of LUT inputs: 4 input functions | 880 | | Logic elements by mode: arithmetic mode | 751 | | Logic elements by mode: asynchronous clear/load mode | 0 | | Logic elements by mode: normal mode | 1878 | | Logic elements by mode: qfbk mode | 273 | | Logic elements by mode: register cascade mode | 0 | | Logic elements by mode: synchronous clear/load mode | 1019 | | Logic elements in carry chains | 793 | | M4Ks | 24 / 52 ( 46 % ) | | Maximum fan-out | 1816 | | Number of I/O registers | 200 | | Peak interconnect usage (total/H/V) | 24% / 23% / 25% | | PLLs | 1 / 2 ( 50 % ) | | Quality of Fit | 0.484 | | Total block memory bits | unknown | | Total fan-out | 11628 | | Total LABs | 313 / 1,206 ( 26 % ) | | Total logic elements | 2629 | | Total logic elements: Combinational with a register | 1283 | | Total logic elements: Combinational with no register | 995 | | Total logic elements: Register only | 351 | | Total memory bits | 97,280 / 239,616 ( 41 % ) | | Total RAM block bits | 110,592 / 239,616 ( 46 % ) | | Total registers | 1,834 / 12,795 ( 14 % ) | | Total Thermal Power Dissipation | unknown | | Virtual pins | 0 | | Worst-case Slack | 2.205 ns (Clock Setup: 'pll|altpll_component|pll|clk[0]') | +-----------------------------------------------------------------+-----------------------------------------------------------+ +-----------------------------------------------------------------------------+ | Circuit Signature Report | +-----------------------------------------------------------------------------+ +----------------------------+----------------------+---------------------+---------------------+ | | Average Slack Gain | Average Period Gain | Average Logic Count | +----------------------------+----------------------+---------------------+---------------------+ | Compile Group 1 (1 seeds) | 0.000 ns | 0.000% | 0.000% | | Compile Group 10 (1 seeds) | -0.046 ns | 0.220% | 8.000% | | Compile Group 2 (1 seeds) | 0.000 ns | 0.000% | 0.000% | | Compile Group 3 (1 seeds) | 0.001 ns | 0.000% | 0.000% | | Compile Group 4 (7 seeds) | -0.230 ns +/- 0.2 ns | 1.011% +/- 1.0% | 0.000% +/- 0.0% | | Compile Group 5 (1 seeds) | -0.369 ns | 1.626% | 9.000% | | Compile Group 6 (1 seeds) | -0.366 ns | 1.626% | 0.000% | | Compile Group 7 (1 seeds) | -0.369 ns | 1.626% | 9.000% | | Compile Group 8 (1 seeds) | -0.046 ns | 0.220% | 8.000% | | Compile Group 9 (1 seeds) | -0.353 ns | 1.582% | 0.000% | +----------------------------+----------------------+---------------------+---------------------+ +-----------------------------------------------------------------------------+ | Circuit Signature Compile Groups | +-----------------------------------------------------------------------------+ +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Group Name | Group Members | Group Settings | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 1 | 1 | -setup-script = quartus_cdb:/home/trd/altera/13.0sp1/quartus/common/tcl/packages/dse/llr_softener.tcl | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 2 | 2 | -setup-script = quartus_cdb:/home/trd/altera/13.0sp1/quartus/common/tcl/packages/dse/llr_remover.tcl | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 3 | 3 | ENABLE_BENEFICIAL_SKEW_OPTIMIZATION = ON | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION = ON | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 4 | 11 12 13 14 15 16 4 | FITTER_EFFORT = STANDARD FIT | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 5 | 5 | CYCLONE_OPTIMIZATION_TECHNIQUE = SPEED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = OFF | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = OFF | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 6 | 6 | CYCLONE_OPTIMIZATION_TECHNIQUE = BALANCED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = AUTO | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = OFF | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | STATE_MACHINE_PROCESSING = AUTO | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 7 | 7 | CYCLONE_OPTIMIZATION_TECHNIQUE = SPEED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = AUTO | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = OFF | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | STATE_MACHINE_PROCESSING = AUTO | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 8 | 8 | CYCLONE_OPTIMIZATION_TECHNIQUE = SPEED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = OFF | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = ON | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 9 | 9 | CYCLONE_OPTIMIZATION_TECHNIQUE = BALANCED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = AUTO | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = ON | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | STATE_MACHINE_PROCESSING = AUTO | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ | Compile Group 10 | 10 | CYCLONE_OPTIMIZATION_TECHNIQUE = SPEED | | | | FITTER_EFFORT = STANDARD FIT | | | | MUX_RESTRUCTURE = AUTO | | | | PHYSICAL_SYNTHESIS_COMBO_LOGIC = ON | | | | PHYSICAL_SYNTHESIS_EFFORT = NORMAL | | | | PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION = ON | | | | PHYSICAL_SYNTHESIS_REGISTER_RETIMING = ON | | | | PLACEMENT_EFFORT_MULTIPLIER = 1.5 | | | | PRE_MAPPING_RESYNTHESIS = ON | | | | ROUTER_TIMING_OPTIMIZATION_LEVEL = MAXIMUM | | | | STATE_MACHINE_PROCESSING = AUTO | | | | | +------------------+---------------------+-------------------------------------------------------------------------------------------------------+ Info: Exploration has finished. 0 errors, 0 warnings Info: Exploration ended: Fri Apr 17 12:00:25 CEST 2015 Info: Elapsed time: 00:13:58