# $Id$:

# all sources for synthesis

include ../sources.mk

sources=$(subst ./,../,$(src_top_spi))
#packages=$(subst ./,../,$(src_pack))

source_tb=$(subst ./,../,$(src_top_sim))

# only for post PAR simulation!
# device is either AGLN060V5Z or AGLN125V2
#device=AGLN125V2
device=AGLN060V5Z

# possible: windows, linux
#OS=windows
OS=linux

src_par=../NETLIST/top_$(device)_ba.vhd
sdf_par=../NETLIST/top_$(device)_ba.sdf

# directory with the Actel Software
ifeq ($(OS),windows)

# Windows
actel_dir=c:\Actel\Libero_v9.1\Designer
# subdirectory with the simulation models
actel_models=$(actel_dir)\lib\vtl\95

else
# Linux
actel_dir=/usr/local/actel/Libero_v9.1/Libero

# subdirectory with the simulation models
actel_models=$(actel_dir)/lib/vtl/95

endif

# compile for functional simulation
fcomp: functional work #$(sources)
	@echo "================================================================="
	@echo "|  Compiling the synthesis source files to library functional..."
	@echo "================================================================="
	@echo $(sources)
	@echo "================================================================="
	@vcom -quiet -work functional -93 -explicit -novopt $(sources)
	@echo "================================================================="
	@echo "|  Mapping the library fpga on functional..."
	@echo "================================================================="
	@vmap fpga functional
#	vcom -quiet -work work -93 -explicit $(packages)
	@echo "================================================================="
	@echo "|  Compiling the testbench source files..."
	@echo "================================================================="
	@echo $(source_tb)
	@echo "================================================================="
	@vcom -quiet -work work -93 -explicit -novopt $(source_tb)

# start functional simulation
fsim: fcomp
	vmap fpga functional
	vsim -quiet -t 1ns 'work.top_tb' -do wave_fsim.do -debugDB

# create empty libraries
functional par work:
	if [ ! -d $@ ]; then vlib $@; fi

# compile the Actel libraries
proasic3 proasic3e iglooe igloo iglooplus:
	@vlib $@
	@echo "================================================================="
	@echo "|  Compiling the Actel Simulation Models for Family $@ ..."
	@echo "================================================================="
	@vcom -quiet -work $@ -explicit "$(actel_models)/$@.vhd"

# compile the place & route netlist
pcomp: work par igloo $(src_par)
	@echo "================================================================="
	@echo "|  Compiling the PAR netlist $(src_par) to library par..."
	@echo "================================================================="
	@vcom -quiet -work par -93 -explicit -novopt $(src_par)
#	vcom -quiet -work work -93 -explicit $(packages)
	@echo "================================================================="
	@echo "|  Mapping the library fpga on par."
	@echo "================================================================="
	@vmap fpga par
	@echo "================================================================="
	@echo "|  Compiling the testbench source files..."
	@echo "================================================================="
	@echo $(source_tb)
	@echo "================================================================="
	@vcom -quiet -work work -93 -explicit -novopt $(source_tb)

psim: pcomp
	vmap fpga par
	vsim -quiet -t 1ps 'work.top_tb' -sdftyp /dut=$(sdf_par) +no_glitch_msg -noglitch -do wave_psim.do

# clean up
clean:
	rm -rf work functional par

clean_all: clean
	rm -rf igloo transcript vsim.wlf

.PHONY: clean clean_all fsim fcomp psim pcomp