include src/ori/chip_def.tcs
include src/ori/eeprom_params.tcs

include src/ori/cpu1_labels.tcs

write chip_mode, SEBDOU, mode_i2c;
write chip_mode, SEBDEN, 11b;

write chip_jtag,      IA1+irq_tst, lbl_TST_cpu1;   // set int_clr start addr for cpu0

// This part is for I2C2scsn

// at IO address srv_command is : device_address(7:0),
//                                start address (15:8),
//                                number_of_bytes(17:16),
//                                read/write (24-bit 1/0)

// ************ INIT I2C
write chip_jtag, srv_command, 0; // init
write chip_jtag, SMCMD, CMD_CHK_TST
expect chip_jtag, SMCMD, lp_state
// ***************************************************

// ************ to suppress stand alone operation of LTC5100 while programming the EEPROM
device_address = i2c_addr_ltc;
number_of_bytes = 2;
start_address  = 0x10;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0;
write chip_jtag, srv_indata+0, 0x11;
write chip_jtag, srv_indata+1, 0xFF;
// start
write chip_jtag, SMCMD, CMD_CHK_TST
wait -100000, 0, chip_jtag;
expect chip_jtag, SMCMD, lp_state
expect chip_jtag, srv_command, 0;     // the number of timeouts

write chip_jtag,      IA1+irq_tst, lbl_LPW_cpu1;   // set int_clr start addr for cpu0