include src/ori/chip_def.tcs include src/ori/cpu1_labels.tcs write chip_mode, SEBDOU, mode_i2c; write chip_mode, SEBDEN, 11b; write chip_jtag, IA1+irq_tst, lbl_TST_cpu1; // set int_tst start addr for cpu1 write chip_jtag, SMCMD, CMD_LP; // low power expect chip_jtag, SMCMD, lp_state write chip_jtag,srv_outdata+0, 0xDEAD0000 write chip_jtag,srv_outdata+1, 0xDEAD0001 write chip_jtag,srv_outdata+2, 0xDEAD0002 write chip_jtag,srv_outdata+3, 0xDEAD0003 write chip_jtag,srv_outdata+4, 0xDEAD0004 write chip_jtag,srv_outdata+5, 0xDEAD0005 write chip_jtag,srv_outdata+6, 0xDEAD0006 write chip_jtag,srv_outdata+7, 0xDEAD0007 device_address = i2c_addr_ltc; number_of_bytes = 2; // ************ INIT I2C write chip_jtag, srv_command, 0; // init write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state // ************ READ SYS_CONFIG start_address = 0x10; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IB_LIMIT start_address = 0x11; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ FLT_STATUS start_address = 0x12; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ FAULT_CONFIG start_address = 0x13; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IMD start_address = 0x15; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IMD_TC1 start_address = 0x16; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IMD_TC2 start_address = 0x17; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ USER_ADC start_address = 0x18; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IM start_address = 0x19; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IM_TC1 start_address = 0x1A; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IM_TC2 start_address = 0x1B; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ T_NOM start_address = 0x1D; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ LOOP_GAIN start_address = 0x1E; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ PEAKING start_address = 0x1F; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ T_INT_ADC start_address = 0x05; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IM_ADC start_address = 0x06; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts // ************ READ IMD_ADC start_address = 0x07; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read // start write chip_jtag, SMCMD, CMD_CHK_TST; // start wait -100000, 0, chip_jtag expect chip_jtag, SMCMD, lp_state readseq chip_jtag, srv_outdata, number_of_bytes expect chip_jtag, srv_command, 0; // the number of timeouts write chip_jtag, IA1+irq_tst, lbl_LPW_cpu1; // restore int_tst