include src/ori/chip_def.tcs

write      NED,(root_flag << 14) | (oase_mode << 15) | (t_parit_bit2 << 10) | (t_false_bit2 << 6) | (t_ctrl_delay << 3) | t_strb_delay;

write SMCMD, CMD_LP;     // low power
expect 127, SMCMD, lp_state

write chip_mode, SEBDOU, mode_jtag;
write chip_mode, SEBDEN, 11b;

// set the IRQ tst to J2C routine
write chip_jtag,  IA0+irq_tst, lbl_TST_cpu0;   // set int_clr start addr for cpu0

cmd = 1000b;            // write at address 0
data = reg4;            // sel_p/s
write chip_jtag,      srv_command, cmd | (data << 4);
expect chip_jtag,      srv_command, cmd | (data << 4);
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
expect chip_jtag,      SMCMD, 0

// restore the IRQ tst address => switch CPU clock off
write chip_jtag, IA0+irq_tst, lbl_LPW_cpu0;   // set int_clr start addr for cpu0


restrict 1
wait 1000;