base_pattern = 0x0C18;
write base_pattern, 	tpattern0; // c8 of CPU3
write base_pattern+1, 	tpattern1; // c9 of CPU3
write base_pattern+2, 	tpattern2; // c10 of CPU3
write base_pattern+3, 	tpattern3; // c11 of CPU3
write base_pattern+4, 	tpattern4; // c12
write base_pattern+5, 	tpattern5; // c13
write base_pattern+6, 	tpattern6; // c14
write base_pattern+7, 	nloops;    // c15

wait 100; // only for simulation necessary

pretrigger 6; // test

expect 127, SMCMD, 0xA00; // check the state machine status in all TRAPs

restrict ROB_1A | ROB_1B | ROB_2B | ROB_3A | ROB_3B | ROB_4A | ROB_4B
// check the column mergers, ports 0,1,3 are used
check_chip = chip2;
include src/niscsn/check_cm.tcs

check_chip = chip6;
include src/niscsn/check_cm.tcs

check_chip = chip10;
include src/niscsn/check_cm.tcs

check_chip = chip14;
include src/niscsn/check_cm.tcs

// check the board merger, all ports are used
check_chip = chip_bm;
include src/niscsn/check_bm.tcs

restrict ROB_3A | ROB_3B
// check the board merger, all ports are used
check_chip = chip_hm;
include src/niscsn/check_hm.tcs

restrict ROB_1A | ROB_1B | ROB_2B | ROB_3A | ROB_3B | ROB_4A | ROB_4B
// check of the CTRL inputs
expect chip0, NCTRL, CTRLout
expect chip1, NCTRL, CTRLout
expect chip2, NCTRL, CTRLout
expect chip3, NCTRL, CTRLout
expect chip4, NCTRL, CTRLout
expect chip5, NCTRL, CTRLout
expect chip6, NCTRL, CTRLout
expect chip7, NCTRL, CTRLout
expect chip8, NCTRL, CTRLout
expect chip9, NCTRL, CTRLout
expect chip10, NCTRL, CTRLout
expect chip11, NCTRL, CTRLout
expect chip12, NCTRL, CTRLout
expect chip13, NCTRL, CTRLout
expect chip14, NCTRL, CTRLout
expect chip15, NCTRL, CTRLout

restrict ROB_3A | ROB_3B | (1-SINGLEROB)
expect chip_bm, NCTRL, CTRLout
// note: only the board merger can not be checked!


restrict MCM
// check the board merger, all ports are used
check_chip = dut;
include src/niscsn/check_bm.tcs
expect ni0, NCTRL, CTRLout
expect ni1, NCTRL, CTRLout
expect ni2, NCTRL, CTRLout
expect ni3, NCTRL, CTRLout
restrict 1