// test with one set of false and parity bit

write NIICE, 1
write NIOCE, 1
t_strb_delay = 2;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
write NDLY, (t_data_delay0) | (t_data_delay1 << 3) | (t_data_delay2 << 6) | (t_data_delay3 << 9) | (t_data_delay4 << 12) | (t_data_delay5 << 15) | (t_data_delay6 << 18) | (t_data_delay7 << 21) | (t_data_delay8 << 24) | (t_data_delay9 << 27);

NPw = (t_parit_bit << 7) | (t_false_bit << 3) | 4 | CTRLout;
write          NP0,    NPw;
write          NP1,    NPw;
write          NP2,    NPw;
write          NP3,    NPw;

restrict STATIC
// actually only one test is enough, as the pattern will be sent once direct and once inverted
// tpattern = 0xAAAAAAAA; // such pattern is not sensitive to the timing, at least in the middle the data should be OK
include src/niscsn/onetest.tcs

restrict DYNAMIC_ONCE
tpattern = 0x01FEAA55; // such pattern is very sensitive to the timing as the data at the falling and 
                       // the rising strobe edge are complemented
// NED has to be configured independently in MCMtester software
include src/niscsn/onetest.tcs

restrict DYNAMIC
tpattern = 0x01FEAA55; // such pattern is very sensitive to the timing as the data at the falling and 
                       // the rising strobe edge are complemented
t_strb_delay = 1;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

t_strb_delay = 2;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

t_strb_delay = 3;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

t_strb_delay = 4;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

t_strb_delay = 0;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

t_strb_delay = 5;
write NED , (0 << 14) | (0 << 15) | (t_parit_bit << 10) | (t_false_bit << 6) | (t_ctrl_delay << 3) | t_strb_delay;
include src/niscsn/onetest.tcs

restrict 1