; Full test of the DMEM locations via global bus and as RAM. ; The number of the errors, counted by cpu(n) is stored in 0xF00n location of the D-bank. ; DEFINITIONS, USED IN THE PROGRAM CODE: #def work=PRF[1] ; register for current operations (CO) #def rdata=PRF[2] ; data red by test_programs and CO #def tdata=PRF[3] ; test_vector to be writen #def errnum=PRF[4] ; contains the number of err_ors #def return1=PRF[5] ; return address (at first level) #def return2=PRF[6] ; return address (at second level) #def return3=PRF[7] ; return address (at third level) #def tdgen=PRF[8] ; test data generator code label #def itdgen=PRF[9] ; init tdgen code label #def psrmask=PRF[10] ; mask for test_vector #def bitnum=PRF[12] ; =32 minus the number of bits of the tested area ; prf11 and prf13 are used inside the testing routine #def ioaddr=PRF[14] ; contains the autoincrementing address of I/O operations through GIO #def errstore=PRF[15] ; autoincrement address for RAM-access #def firstaddress=grf[1] ; first address of the tested area #def lastaddress=grf[2] ; last address of the tested area #def MEMRW=0xD000 ; the address of the register, controling R/W operations of IMEM/DMEMs ;#def IAFIRST=0xE000 ; first address of IMEM ;#def IADEND =0xEFFF ; last address of IMEM #def DAFRSTG=0xC000 ; first address of DMEM via GIO #def DADENDG=0xC3FF ; last address of DMEM via GIO #def DAFIRST=0x0000 ; first address of DMEM as RAM #def DADEND =0x0FFC ; last address of DMEM as RAM ;#def DBFST=0xF000 ; first address of DBANK (trap3) ;#def DBEND=0xF0FF ; last address of DBANK (trap3) ; masks of certain length #def BITMASK24=0x0FFFFFF #def BITMASK32=0xFFFFFFFF #def BITMASK12=0x00000FFF #def BITMASK13=0x00001FFF start: nop #ifdef cpu0 ; in readout board, only some chips start test ... iext 0xF005 mov 0xF005 r0 iext 0xF000 mov 0xF000 r14 iext 0xEF01 mov 0xEF01 r1 jmpr cc_busy 0 sgio+ r1 cmp r14 r0 jmpr cc_ltu -3 iext 0x3055 mov 0x3055 r14 lgio 0 r14 jmpr cc_busy 0 lpio 0x300 r0 jmpr cc_busy 0 and r0 c1 r0 cmp r0 c1 cmp r0 c1 jmp cc_eq go mov c1 r1 jmpr cc_busy 0 sgio r1 r14 jmpr cc_busy 0 mov c0 r0 sgio r0 0xA21 mov 0x012 work sgio work 0xA04 jmpr cc_uncond 0 go: mov c0 r1 jmpr cc_busy 0 sgio r1 r14 #endif mov 0 errnum ; clear the err_or_counter #ifdef cpu0 ; mov b0001_00_0 work ; initiate for access to DMEM via GIO ... ; jmpr cc_busy 0 ; iext MEMRW ; sgio work MEMRW #def HCNTD0=0xD014 iext DAFRSTG mov DAFRSTG firstaddress iext DADENDG mov DADENDG lastaddress mov c0 bitnum iext BITMASK32 mov BITMASK32 psrmask mvpcr +2 return1 ; call testing routine - cltst DMEM via GIO jmp cc_uncond cltst mov c0 work iext HCNTD0 sgio work HCNTD0 iext 0xF000 mov 0xF000 work jmpr cc_busy 0 ; storage the number of err_ors of DMEM test sgio errnum work ; via GIO in 0xF000 mov c0 errnum #endif mvpcr +2 return1 ; call testing routine - sltst DMEM as RAM jmp cc_uncond sltst jmpr cc_busy 0 ; storage of the number of err_ors iext 0xF001 ; in 0xF001+c5 mov 0xF001 work add work c5 work sgio errnum work #ifdef cpu3 jmpr cc_busy 0 mov c0 work sgio work 0xA26 mov 0x012 work sgio work 0xA04 jmpr cc_uncond 0 #else ; turns on cpu N+1 ... mov 1 rdata ; jmpr cc_busy 0 mov 1 ioaddr add ioaddr c5 ioaddr shl 1 ioaddr ioaddr mov 0xA20 work add ioaddr work ioaddr sgio rdata ioaddr jmpr cc_busy 0 sub ioaddr c2 ioaddr mov c0 rdata #ifdef cpu0 add ioaddr c1 ioaddr #endif sgio rdata ioaddr jmpr cc_uncond 0 ; ... and stops itself #endif cpu3 ; BEGIN THE TESTING ROUTINE (uses testing subroutine) cltst: mov 1, prf[11] mov 1, prf[13] nt: mov wlk0, tdgen ; call walking 0 test_routine mov iwlk0, itdgen mvpcr +2, return2 jmp cc_uncond, tstgio mov wlk1, tdgen ; call walking 1 test_routine mov iwlk1, itdgen ; mvpcr +2, return2 jmp cc_uncond, tstgio mov psr, tdgen ; call pseudo random vector test_routine mov ipsr, itdgen mvpcr +2, return2 jmp cc_uncond, tstgio add prf[13], c3, prf[13] ; next initial vectors for all shl 1, prf[11], prf[11] ; testing routines jmp cc_carry, return1 mov bitnum work mov 15 rdata mov prf[11] prf[0] cmp rdata bitnum jmpr cc_ncarry 3 shl 15 prf[0] prf[0] sub work rdata work shlt work, prf[0] ; if MSB of the current register tested is set - stop! jmp cc_ncarry, nt jmp cc_uncond return1 ; END OF THE TESTING ROUTINE ; BEGIN OF THE SUBROUTINE (used by testing routine above) ; rolls all addresses and tests by w/r through GIO tstgio: mvpcr +2, return3 jmp cc_uncond, itdgen ; go to init the test data gen ; BEGIN WRITING THE TEST PATTERN mov firstaddress, ioaddr wd: jmpr cc_busy, 0 ; mov c0 tdata sgio+ tdata ; writing the test data in current address mvpcr +2, return3 ; runs the generator returning test vector jmp cc_uncond, tdgen cmp ioaddr, lastaddress ; ; is the last address reached? jmp cc_carry, wd ; if yes: ; BEGIN COMPARING PART OF CODE mov firstaddress, ioaddr mvpcr +2, return3 jmp cc_uncond, itdgen ; and go to init for testing wc: jmpr cc_busy, 0 ; here is the body of the cycle lgio+ 0; ; reading each address and jmpr cc_busy, 0 ; comparing the result with lpio 0x300, rdata ; data stored before cmp rdata, tdata ; jmp cc_zero, noerr ; if err_or detected add errnum, c1, errnum ; errnum is incremented noerr: mvpcr +2, return3 jmp cc_uncond, tdgen ; get next test_data to compare with cmp ioaddr, lastaddress ; is tne last address tested? jmp cc_carry, wc ; if not go to wc jmp cc_uncond, return2 ; prepares the next data - walking 1 wlk1: shl 1, tdata, tdata and tdata, psrmask, tdata jmp cc_nzero, return3 mov 1, tdata jmp cc_uncond, return3 ; end of walking 1 ; prepares the next data - walking 0 wlk0: com tdata, tdata shl 1, tdata, tdata and tdata, psrmask, tdata jmpr cc_nzero, +2 mov 1, tdata com tdata, tdata and tdata, psrmask, tdata jmp cc_uncond, return3 ; end of walking 0 ; prepares the next data by pseudo random generator psr: lpio 0x202, tdata and tdata, psrmask, tdata jmp cc_uncond, return3 ; end random generator ; init walking 1 iwlk1: mov prf[11], tdata jmp cc_uncond, return3 ; init walking 0 iwlk0: com prf[11], tdata and tdata, psrmask, tdata jmp cc_uncond, return3 ; init psr ;#ifdef trap3 ipsr: mov b1_0_0_00_01_11111, tdata ;#else ;ipsr: mov b1_0_0_00_01_1111, tdata ;#endif mov 31 prf[0] sub prf[0] bitnum prf[0] ;#ifdef trap3 ;#else ; cmp prf[0] 16 ; jmpr cc_carry 2 ; mov 15 prf[0] ;#endif or tdata prf[0] tdata spio tdata, 0x201 mov prf[13], tdata spio tdata, 0x200 nop nop lpio 0x202, tdata jmp cc_uncond, return3 ; BEGIN DIRECT DMEM TESTING dsra: mvpcr +2, return3 jmp cc_uncond, itdgen iext DAFIRST mov DAFIRST, errstore sd: ;mov c0 tdata sra+ tdata mvpcr +2, return3 jmp cc_uncond, tdgen iext DADEND cmp errstore, DADEND jmp cc_carry, sd mvpcr +2, return3 jmp cc_uncond, itdgen ; and go to init for testing iext DAFIRST mov DAFIRST, errstore nop ws: lra4 rdata ; this doubled reading is due to the known bug lra4+ rdata ; in the trap3 data memory cmp rdata, tdata jmp cc_zero, neerr add errnum, c1, errnum cmp errnum 0x3F ; first 63 errors detected by each cpu jmp cc_geu neerr ; lead to store the corresponding DMEM address in DBANK. mov 0x3E work ; F005-F042 - test of DMEM by cpu0 mul32 work c5 work ; F043-F080 - test of DMEM by cpu1 iext 0xF004 ; F081-F0BE - test of DMEM by cpu2 mov 0xF004 g4 ; F0BF-F0FC - test of DMEM by cpu3 add work g4 work add work errnum work sgio errstore work neerr: mvpcr +2, return3 jmp cc_uncond, tdgen ; get next test_data to compare with iext DADEND cmp errstore, DADEND jmp cc_carry, ws ; if not go to wc jmp cc_uncond, return2 ; END DIRECT DMEM TESTING ; BEGIN THE TESTING ROUTINE (uses testing subroutine) sltst: mov 1, prf[11] mov 1, prf[13] ;#ifdef dmem_as_ram st: mov wlk0, tdgen ; call walking 0 test_routine mov iwlk0, itdgen mvpcr +2, return2 jmp cc_uncond, dsra mov wlk1, tdgen ; call walking 1 test_routine mov iwlk1, itdgen mvpcr +2, return2 jmp cc_uncond, dsra mov psr, tdgen ; call pseudo random vector test_routine mov ipsr, itdgen mvpcr +2, return2 jmp cc_uncond, dsra add prf[13], c3, prf[13] ; next initial vectors for all shl 1, prf[11], prf[11] ; testing routines jmp cc_carry, return1 mov bitnum work mov 15 rdata mov prf[11] prf[0] cmp rdata bitnum jmpr cc_ncarry 3 shl 15 prf[0] prf[0] sub work rdata work shlt work, prf[0] ; if MSB of the current register tested is set - stop! jmp cc_ncarry, st ;#endif jmp cc_uncond return1 ; END OF THE TESTING ROUTINE