// Svn $Id$:
// Patch to be applied when using the standard configuration with a single ROB 3A only.

include src/common/scsn_ids.tcs

// Change the readout order of the HCM so that it expects only data from the local BM
// own -> 3, used only in single ROB configuration
const niro_hm    = 0x0001fffc; // for half-chamber merger chips sending header as own data
// write to bith HCM, as it is not clear which of them will be used
write chip_hm3,  NTRO,   niro_hm;
write chip_hm3,  NRRO,   niro_hm;
write chip_hm4,  NTRO,   niro_hm;
write chip_hm4,  NRRO,   niro_hm;

const NTRO_DB    = 0xF0F9;
const NRRO_DB    = 0xF0FA;

write chip_hm3,  NTRO_DB,   niro_hm;
write chip_hm3,  NRRO_DB,   niro_hm;
write chip_hm4,  NTRO_DB,   niro_hm;
write chip_hm4,  NRRO_DB,   niro_hm;

// PATCH!!!
// 1 0 4 without 3!
write chip14,   NTRO_DB, 0x0003fe21;
write chip14,   NRRO_DB, 0x0003fe21;
write chip14,   NTRO   , 0x0003fe21;
write chip14,   NRRO   , 0x0003fe21;
write chip15,   CPU0CLK, 0;
write chip15,   CPU1CLK, 0;
write chip15,   CPU2CLK, 0;
write chip15,   CPU3CLK, 0;

write chip15,   FILCLK,  0;
write chip15,   PRECLK,  0;

// // set the auto-accept-flag, so a single pretrigger will start the whole sequence
// const smmode_delta   = 6;      // 4 bit, window for L0A, L1A
// const LTIME0 = 48-(smmode_delta >> 1);     // 14-bit, used for L0A/R
// const LTIME1 = 0x0390+000;                     // 14-bit, used to start the raw data readout
// const LTIME2 = 0x03a8-(smmode_delta >> 1);     // 14-bit, used for L1A/R
//
// write           SML0,   LTIME0 | (1 << 14); // the time for L0 accept
// write           SML2,   LTIME2 | (1 << 14); // the actual L1 time
// write           SML1,   LTIME1 | (1 << 14); // the time to start the raw data readout, a little bit later