; compression table
; 0x82          0x0208          K0
; 0x83          0x020C          K1
; 0x84          0x0210          K2
; 0x85          0x0214          T0
; 0x86          0x0218          T1
; 0x87          0x021C          T2
; 0x88          0x0220          Y0
; 0x89          0x0224          Y1
; 0x8A          0x0228          Y2
; if Q>T2 return Y2
; if Q>T1 return Y1+(Q-T1)*K2
; if Q>T0 return Y0+(Q-T0)*K1
; else    return Q*K0


; compression for the charge Q as part of the tracklet word
; still a draft!
;
; move later to the proper location

; K0..2 are effectiv smaller than 1.0
; now is for output range 0..0x7F

; Adresses in QP-MEM (DMEM), compression parameters, all are 16-bit unsigned integers
; if Q<T0 return     Q    *K0/2**16
; if Q<T1 return Y0+(Q-T0)*K1/2**16
; if Q<T2 return Y1+(Q-T1)*K2/2**16
; else    return Y2
; compression coefficients, byte addresses. The coefficients are 16-bit
#def K0compr = 0x0208; \ slopes, must be on x4 boundary!!!
;#def K1compr = 0x020A; / on the same 32-bit word as K0compr
;#def K2compr = 0x020C; \
; thresholds             on the same 32-bit word
;#def T0compr = 0x020E; /
;#def T1compr = 0x0210; \
;#def T2compr = 0x0212; / on the same 32-bit word
; offsets
;#def Y0compr = 0x0214; \
;#def Y1compr = 0x0216; / on the same 32-bit word
#def Y2_COMPR = 0x7F; this constant will be directly loaded, when needed

; Note: only K0compr is used as start address here, the rest are defined just to be clear how to load them using SCSN


compr_exit:
    nop
    ; the compression routine
    ; here all registers will be changed!!!
acq_compr:
    mov K0compr, r15    ; ram pointer

    nop                 ; don't change the memory read pointer r15 just before reading!
    ; load from RAM, 16-bit
    lra  rr_word, r1    ; dummy read
    lra+ rr_word, r1    ; r1=K0         this is no change in the memory address to the QPMEM (A11..A2) !
    lra+ rr_word, r2    ; r2=K1         here the address will be really changed
    nop                 ; don't change the memory read pointer r15 just before reading!
    lra  rr_word, r3    ; dummy
    lra+ rr_word, r3    ; r3=K2
    lra+ rr_word, r4    ; r4=T0
    nop                 ; don't change the memory read pointer r15 just before reading!
    lra  rr_word, r5    ; dummy
    lra+ rr_word, r5    ; r5=T1
    lra+ rr_word, r6    ; r6=T2
;    nop                 ; don't change the memory read pointer r15 just before reading!
    ; loop over the data from CPU0..2, if any
    mov 3, r9          ; used as counter
    lra  rr_word, r7    ; dummy
    lra+ rr_word, r7    ; r7=Y0
    lra+ rr_word, r8    ; r8=Y1
    ;nop                 ; don't change the memory read pointer r15 just before reading!
    ; Y2 is just saturation

    ; 17 clocks up to now
    ; up to 3x39 clocks
compr_loop:
    sub r9, c1, r9
    jmp cc_carry, compr_exit

    lra  rr_word, r10
    lra+ rr_word, r10  ; r10=merged charge Q0 of CPU0
    lra+ rr_word, r11  ; r11=merged charge Q1 of CPU0
    or   r10, r11
    jmp cc_zero, compr_loop ; skip the calculation when both charges are 0? Or test only Q0 or only Q1?

; if Q<T0 return     Q    *K0
; if Q<T1 return Y0+(Q-T0)*K1
; if Q<T2 return Y1+(Q-T1)*K2
; else    return Y2

    mov compr1_beg, r14     ; use as return address

    sub r10, r4, r12    ; Q-T0
    jmp cc_ltu, compr_lt_t0
    sub r10, r5, r12    ; Q-T1
    jmp cc_ltu, compr_lt_t1
    sub r10, r6, r12    ; Q-T2
    jmp cc_ltu, compr_lt_t2
    mov Y2_COMPR, r12   ; result=Y2

    ; compress r11, result in r13
compr1_beg:
    mov compr_comb, r14     ; use as return address
    sub r11, r4, r13    ; Q-T0
    jmp cc_ltu, compr_lt_t0
    sub r11, r5, r13    ; Q-T1
    jmp cc_ltu, compr_lt_t1
    sub r11, r6, r13    ; Q-T2
    jmp cc_ltu, compr_lt_t2
    mov Y2_COMPR, r13   ; result=Y2

compr_comb:
    ; now pack in 22-bits? r12 (11 bits) and r13 (11 bits)

    sll 11, r13, r13
    or r13, r12, r10
    sra+ r10
    jmp cc_uncond, compr_loop

    ; 4 + N clocks per tracklet, max 3*(4+N)


compr_lt_t0:
    mul32 r10, r1, r0   ; now multiply unsigned by K0
    nop                 ; the result of the 16x16bit mult is available with 1 clock delay
    slr 16, r0, r12     ; we take the upper 16 bits
    jmp cc_uncond, r14

compr_lt_t1:
    mul32 r12, r2, r0   ; here we have (Q-T0), now multiply unsigned by K1
    nop                 ; the result of the 16x16bit mult is available with 1 clock delay
    slr 16, r0, r12     ; we take the upper 16 bits
    add r12, r7, r12    ; add Y0, so we have Y0+(Q-T0)*K1
    jmp cc_uncond, r14

compr_lt_t2:
    mul32 r12, r3, r0   ; here we have (Q-T1), now multiply unsigned by K2
    nop                 ; the result of the 16x16bit mult is available with 1 clock delay
    slr 16, r0, r12     ; we take the upper 16 bits
    add r12, r8, r12    ; add Y1, so we have Y1+(Q-T1)*K2
    jmp cc_uncond, r14