# $Id: lib_mimd.pas 5841 2020-08-19 16:32:14Z angelov # Remark: - very critical, can influence other MCMs C0 - critical, can stop own data C1 - uncritical but good to refresh UC - unused but want to refresh with the reset value UR - really don't care DC .asm direct: y - refresh, n - not, b - only in boot program (typical for clears) .tcs constant: y - defined in run_parameters.tcs, n - not default:n default:all default:n default:C1 # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark # load_patch_par SMMODE 0x0A03 n n y DB y C0 NTRO 0x0D43 y DB y NRRO 0x0D44 y DB y NED 0x0D42 y DB y NDLY 0x0D41 y DB y NP0 0x0D48 n y DB y false/parity positions only stored in DB NP1 0x0D49 y DB y NP2 0x0D4A y DB y NP3 0x0D4B y DB y # load_direct_all # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark IRQHW0 0x0B0E y y IRQHW1 0x0B2E y y IRQHW2 0x0B4E y y IRQHW3 0x0B6E y y IRQHL0 0x0B0F y y IRQHL1 0x0B2F y y IRQHL2 0x0B4F y y IRQHL3 0x0B6F y y CPU0CLK 0x0A20 y y CPU1CLK 0x0A22 y y CPU2CLK 0x0A24 y y CPU3CLK 0x0A26 y y NITM0 0x0A08 y y C0 NIP4D 0x0A0B y y C0 NICLK 0x0A28 y y FILCLK 0x0A2A y y PRECLK 0x0A2C y y NMOD 0x0D40 y y UR NCUT 0x0D4C y y provided identical in all 4 ports # load_direct_first_m DMDELA 0xD002 y DMDELS 0xD003 y # load_direct_first_hcm_bm ARBTIM 0x0A3F y y MEMCOR 0xD001 y SEBDEN 0x3178 y - set to "000" - tri-stated C0 SEBDOU 0x3179 y - set to "111" - if one bit in SEBDxx changes, nothing will go wrong! C0 SML0 0x0A00 y y SML1 0x0A01 y y SML2 0x0A02 y y # load_direct_bm_m NIODE 0x0A30 y y NM-CM-BM | HCM NIOCE 0x0A32 y y NM-CM-BM | HCM NIIDE 0x0A34 y y NM-CM-BM | HCM # load_direct_hcm NIODE 0x0A30 y y NM-CM-BM | HCM NIOCE 0x0A32 y y NM-CM-BM | HCM NIIDE 0x0A34 y y NM-CM-BM | HCM ADCEN 0x0A2E 0 ADCMSK 0x3050 0 # load_irq_vec0,1,2,3 - individual variants for each CPU # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark IA0_CLR 0x0B00 take the addresses directly as labels IA0_ACQ 0x0B02 IA0_RAW 0x0B04 IA1_CLR 0x0B20 IA1_ACQ 0x0B22 IA1_RAW 0x0B24 IA2_CLR 0x0B40 IA2_ACQ 0x0B42 IA2_RAW 0x0B44 IA3_CLR 0x0B60 IA3_ACQ 0x0B62 IA3_RAW 0x0B64 # load_irq_vec_hcm_bm0,1,2,3 - individual variants for each CPU in the HCM and BM chips only # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark IA0_CLR 0x0B00 take the addresses directly as labels IA0_ACQ 0x0B02 IA0_RAW 0x0B04 IA1_CLR 0x0B20 IA1_ACQ 0x0B22 IA1_RAW 0x0B24 IA2_CLR 0x0B40 IA2_ACQ 0x0B42 IA2_RAW 0x0B44 IA3_CLR 0x0B60 IA3_ACQ 0x0B62 IA3_RAW 0x0B64 # directly in the fit program TPFE 0x3002 y y ADCMSK 0x3050 needed in the tracklet program and refreshed there NIICE 0x0A36 n y =1 NES 0x0D45 y2 y # load_pre_par # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark TPPT0 0x3000 y y TPFS 0x3001 y y TPPGR 0x3003 y y TPPAE 0x3004 y y TPQS0 0x3005 y y TPQE0 0x3006 y y TPQS1 0x3007 y y TPQE1 0x3008 y y EBD 0x3009 y y EBAQA 0x300A y y EBSIA 0x300B y y EBSF 0x300C y y EBSIM 0x300D y y EBIS 0x3014 y y EBIT 0x3015 y y EBIL 0x3016 y y EBIN 0x3017 y y # load_pre_clust_par # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark TPFP 0x3040 y y TPHT 0x3041 y y TPVT 0x3042 y y only refreshed when TPVBY is 1 (not bypassed) TPVBY 0x3043 y y TPCT 0x3044 y y TPCL 0x3045 y y TPCBY 0x3046 Test Indices Flag, 0 for bypass the tracklet candidate selection, controlled by the assembler program TPD 0x3047 yr y # load_lptc_fil # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark FLBY 0x3018 y y FPBY 0x3019 y y FGBY 0x301A y y FTBY 0x301B y y FCBY 0x301C y y FCWn 0x3038 y x5=0 FTAL 0x3030 y y FTLL 0x3031 y y FTLS 0x3032 y y FPTC 0x3020 y y FPNP 0x3021 y y FPCL 0x3022 boot 0->1, then 1 # load_gain_filg FGTA 0x3028 y y FGTB 0x3029 y y FGCL 0x302A b FGFn 0x3080 refresh: read from DMEM (3 x 9-bit) x 7 dwords and stored to GIO # load_gain_filg FGAn 0x30A0 refresh: read from DMEM (5 x 6-bit) x 5 dwords and stored to GIO # load_tpl # load_tpl_sec_cpu # 2 CPUs used, called 3 times to refresh the complete TPL LUT TPL 0x3180 position LUT stored in DMEM, in 22 x 32-bit words: each word has 6 x 5 bit LUT data # load_direct_adc # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark ADCEN 0x0A2E y y NM-CM | BM-HCM UC ADCINB 0x3051 y y ADCDAC 0x3052 y y ? or individually set ADCPAR 0x3053 y y ADCTST 0x3054 y y # load_unused NITM1 0x0A09 y y UR NITM2 0x0A0A y y UR NBND 0x0D47 n n DC but can change # not refreshed now # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark IRQSW0 0x0B0D n n DC IRQSW1 0x0B2D n n DC IRQSW2 0x0B4D n n DC IRQSW3 0x0B6D n n DC CTGDINI 0x0B80 n y will be used to detect special trigger command, better to clear in IRQ clr and check for 1 CTGCTRL 0x0B81 y ... CPU0CONST 0x0C00 ? 4x4 privat and 4 global constants without hamming protection CPUGCONST 0x0C04 ? CPU1CONST 0x0C08 ? CPU2CONST 0x0C10 ? CPU3CONST 0x0C18 ? # Name Address .tcs const? .asm direct .asm DB/DM NM/CM/BM/HCM usage patchMaker? Remark NTP 0x0D46 n n DC TPCI0 0x3048 - controlled directly by the CPUs in the cosmic tracklet program DC TPCI1 0x3049 / DC TPCI2 0x304A / DC TPCI3 0x304B / DC SADCAZ 0x3055 FLL 0x3100 64 x 6-bit values of the non-linearity correction, probably not used? all PASAxx registers \ not refreshed all SADCxx registers / MEMRW 0xD000 DC