// --------------------------------
//  write 2**31/N LUT @ DMEM 0-31
// --------------------------------
// May be create in the TRAP???
write Base_LUT_1divN_DM_SCSN + 0x00, 0x00000000
write Base_LUT_1divN_DM_SCSN + 0x01, 0x80000000
write Base_LUT_1divN_DM_SCSN + 0x02, 0x40000000
write Base_LUT_1divN_DM_SCSN + 0x03, 0x2AAAAAA0
write Base_LUT_1divN_DM_SCSN + 0x04, 0x20000000
write Base_LUT_1divN_DM_SCSN + 0x05, 0x19999990
write Base_LUT_1divN_DM_SCSN + 0x06, 0x15555550
write Base_LUT_1divN_DM_SCSN + 0x07, 0x12492490
write Base_LUT_1divN_DM_SCSN + 0x08, 0x10000000
write Base_LUT_1divN_DM_SCSN + 0x09, 0x0E38E380
write Base_LUT_1divN_DM_SCSN + 0x0A, 0x0CCCCCC0
write Base_LUT_1divN_DM_SCSN + 0x0B, 0x0BA2E8B0
write Base_LUT_1divN_DM_SCSN + 0x0C, 0x0AAAAAA0
write Base_LUT_1divN_DM_SCSN + 0x0D, 0x09D89D80
write Base_LUT_1divN_DM_SCSN + 0x0E, 0x09249240
write Base_LUT_1divN_DM_SCSN + 0x0F, 0x08888880
write Base_LUT_1divN_DM_SCSN + 0x10, 0x08000000
write Base_LUT_1divN_DM_SCSN + 0x11, 0x07878780
write Base_LUT_1divN_DM_SCSN + 0x12, 0x071C71C0
write Base_LUT_1divN_DM_SCSN + 0x13, 0x06BCA1A0
write Base_LUT_1divN_DM_SCSN + 0x14, 0x06666660
write Base_LUT_1divN_DM_SCSN + 0x15, 0x06186180
write Base_LUT_1divN_DM_SCSN + 0x16, 0x05D17450
write Base_LUT_1divN_DM_SCSN + 0x17, 0x0590B210
write Base_LUT_1divN_DM_SCSN + 0x18, 0x05555550
write Base_LUT_1divN_DM_SCSN + 0x19, 0x051EB850
write Base_LUT_1divN_DM_SCSN + 0x1A, 0x04EC4EC0
write Base_LUT_1divN_DM_SCSN + 0x1B, 0x04BDA120
write Base_LUT_1divN_DM_SCSN + 0x1C, 0x04924920
write Base_LUT_1divN_DM_SCSN + 0x1D, 0x0469EE50
write Base_LUT_1divN_DM_SCSN + 0x1E, 0x04444440
write Base_LUT_1divN_DM_SCSN + 0x1F, 0x04210840