include src/scsn_ids.tcs include src/defines.tcs include src/parameters.tcs include src/eeprom_params.tcs include wrk/cpu1_labels.tcs write chip_mode, SEBDOU, mode_i2c; write chip_mode, SEBDEN, 11b; write chip_jtag, FILCLK, 1; // enable filter clock cont. write chip_jtag, SMCMD, CMD_LP; // stop write chip_jtag, IA1+IRQ_TST, lbl_TST_cpu1; // ************ INIT I2C write chip_jtag, srv_command, 0; // init write chip_jtag, SMCMD, CMD_CHK_TST expect chip_jtag, SMCMD, lp_state device_address = i2c_addr_eep; number_of_bytes = 1; // ************ WRITE 1 start_address = 0x0; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_0; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 2 start_address = 0x1; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_1; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 3 start_address = 0x2; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_2; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 4 start_address = 0x3; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_3; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 5 start_address = 0x4; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_4; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 6 start_address = 0x5; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_5; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 7 start_address = 0x6; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_6; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 8 start_address = 0x7; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_7; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 9 start_address = 0x8; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_8; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 10 start_address = 0x9; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_9; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 11 start_address = 0xA; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_A; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 12 start_address = 0xB; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_B; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 13 start_address = 0xC; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_C; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 14 start_address = 0xD; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_D; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 15 start_address = 0xE; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_E; // start write chip_jtag, SMCMD, CMD_CHK_TST //wait 1000 ; // for simulation only wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; // ************ WRITE 16 start_address = 0xF; write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0; write chip_jtag, srv_indata, BYTE_F; // start write chip_jtag, SMCMD, CMD_CHK_TST wait -100000, 0, chip_jtag; expect chip_jtag, SMCMD, lp_state expect chip_jtag, srv_command, 0; // the number of timeouts wait eep_write_time; write chip_jtag, IA1+IRQ_TST, lbl_LPW_cpu1; write chip_jtag, SMCMD, CMD_ACQ; // start again