// TRAP definitions, should be moved later to a separate file or to config.inc

// Interrupt numbers
const IRQ_NI  = 8;
const IRQ_TM  = 6;
const IRQ_CLR = 0;
const IRQ_ACQ = 2;
const IRQ_RAW = 4;
const IRQ_TST = 1;

// Base addresses of the programmable constants
const CPU0CONST=0x0C00; // cpu0
const CPU1CONST=0x0C08; // cpu1
const CPU2CONST=0x0C10; // cpu2
const CPU3CONST=0x0C18; // cpu3
const CPUGCONST=0x0C04; // all cpus

// Addresses of all programmable constants in the GIO space
const C08CPU0=CPU0CONST+0; // c8  of cpu0
const C09CPU0=CPU0CONST+1; // c9  of cpu0
const C10CPU0=CPU0CONST+2; // c10 of cpu0
const C11CPU0=CPU0CONST+3; // c11 of cpu0

const C08CPU1=CPU1CONST+0; // c8  of cpu1
const C09CPU1=CPU1CONST+1; // c9  of cpu1
const C10CPU1=CPU1CONST+2; // c10 of cpu1
const C11CPU1=CPU1CONST+3; // c11 of cpu1

const C08CPU2=CPU2CONST+0; // c8  of cpu2
const C09CPU2=CPU2CONST+1; // c9  of cpu2
const C10CPU2=CPU2CONST+2; // c10 of cpu2
const C11CPU2=CPU2CONST+3; // c11 of cpu2

const C08CPU3=CPU3CONST+0; // c8  of cpu3
const C09CPU3=CPU3CONST+1; // c9  of cpu3
const C10CPU3=CPU3CONST+2; // c10 of cpu3
const C11CPU3=CPU3CONST+3; // c11 of cpu3

const C12CPUA=CPUGCONST+0; // c12
const C13CPUA=CPUGCONST+1; // c13
const C14CPUA=CPUGCONST+2; // c14
const C15CPUA=CPUGCONST+3; // c15

// LUT for 1/N division base address in DMEM (mapped in GIO)
const Base_LUT_1divN = 0xC000;
// END of TRAP definitions //