// scsn_ids_alice.tcs
//
// Jan.03,2006 KO added setup for 3B
// Jan.13,2006 KO from now, it is ALICE numbering for ROB

// Select one of types below, only one of them 1, the rest 0!
//
ROB   =1; // 0 or 1
MCM   =0; // 0 or 1
WAFER =0; // 0 or 1

// select the hamming correction off/on = 0/1
//
HAMMIM=1;
HAMMDM=1;
HAMMDB=1;

// Dummy setup for TB2004 merger tree setup here
//
const chip_bm0 = 99;
const chip_bm1 = 99;
const chip_rm  = 99;

restrict ROB

// Setup for normal ROBs
//
// It is Alice numbering definition
//
const chip0  =    0;
const chip1  =    1;
const chip2  =    2; // merger
const chip3  =    3;
const chip4  =    4;
const chip5  =    5;
const chip6  =    6; // merger
const chip7  =    7;
const chip8  =    8;
const chip9  =    9;
const chip10 =   10; // merger
const chip11 =   11;
const chip12 =   12;
const chip13 =   13;
const chip14 =   14; // merger
const chip15 =   15;
const chip_bm =  16; // board merger
const chip_hm =  17; // half chamber merger

// Here is special chip group expanded by control engine on DCS.

const chip_hcm3a  = 0100000100000000b; // Half chamber merger in A side on C0 chamber
const chip_hcm3b  = 0100000010000000b; // Half chamber merger in B side on C0 chamber
const chip_hcm4a  = 0100000001000000b; // Half chamber merger in A side on C1 chamber
const chip_hcm4b  = 0100000000100000b; // Half chamber merger in B side on C1 chamber
const chip_bmrg   = 0100000000010000b; // All board merger chips (ALICE#16)
const chip_am01   = 0100000000001000b; // All ADC MCM's ADC ch. 0 & 1 must be masked
const chip_am20   = 0100000000000100b; // All ADC MCM's ADC ch. 20       must be masked
const chip_colmrg = 0100000000000010b; // All Column Merger chips (ALICE#2,6,10,14)
const chip_normal = 0100000000000001b; // All ADC chips except for am01,am20,colmrg

const chip_pos0   = 0110000000000000b; // All chips in position 0
const chip_pos1   = 0110010000000000b; // All chips in position 1
const chip_pos2   = 0110100000000000b; // All chips in position 2
const chip_pos3   = 0110110000000000b; // All chips in position 3
const chip_pos4   = 0111000000000000b; // All chips in position 4
const chip_pos5   = 0111010000000000b; // All chips in position 5
const chip_pos6   = 0111100000000000b; // All chips in position 6
const chip_pos7   = 0111110000000000b; // All chips in position 7

//

const type   = 1;      // if 0 - for single chip
const dut    = 127;    // 1 for single chip, 2 for the new MCM tester, 127 for the ROB
const scheck = 2;

restrict MCM

const type = 0;     // 1 for ROB, 0 for single chip of GIOtst
const fpga2 = 1;    // 1 for single chip, 2 for the new MCM tester, 3 for the wafer tester, 127 for the ROB
const fpga1 = 2;
const dut = 2;
const ni0 = 3;
const ni1 = 4;
const ni2 = 5;
const ni3 = 6;
const scheck =2;

restrict WAFER

const type = 0;     // 1 for ROB, 0 for single chip of GIOtst
const fpga2 = 1;    // 1 for single chip, 2 for the new MCM tester, 3 for the wafer tester, 127 for the ROB
const fpga1 = 2;
const dut = 3;
const scheck = 3;

restrict 1