; Conditional jump masks

#def cc_signed  = 0x14; S flag is set
#def cc_nsigned = 0x04; S flag is not set
#def cc_zero    = 0x11; Z flag is set
#def cc_nzero   = 0x01; Z flag is not set
#def cc_overfl  = 0x13; V flag is set
#def cc_noverfl = 0x03; V flag is not set
#def cc_neg     = 0x12; N flag is set
#def cc_nneg    = 0x02; N flag is not set
#def cc_carry   = 0x10; C flag is set
#def cc_ncarry  = 0x00; C flag is not set
#def cc_busy    = 0x17; B flag is set
#def cc_nbusy   = 0x07; B flag is not set
#def cc_divb    = 0x15; D flag is set
#def cc_ndivb   = 0x05; D flag is not set
#def cc_errdiv  = 0x16; E flag is set
#def cc_nerrdiv = 0x06; E flag is not set
#def cc_uncond  = 0x0F; unconditional

; The predefined constants for the conditional jumps suitable for use after CMP a, b or
; SUB a, b, r

#def cc_eq  =0x11; a =  b
#def cc_neq =0x01; a != b
;#def cc_neg =0x12; r <  0
#def cc_pos0=0x02; r >= 0
#def cc_lts =0x14; a <  b signed
#def cc_ges =0x04; a >= b signed
#def cc_ltu =0x10; a <  b unsigned
#def cc_geu =0x00; a >= b unsigned

#ifdef trap2
#else
#def cc_les = 0x19; a <= b signed   (trap3 only)
#def cc_gts = 0x09; a >  b signed   (trap3 only)
#def cc_leu = 0x18; a <= b unsigned (trap3 only)
#def cc_gtu = 0x08; a >  b unsigned (trap3 only)
#endif

; read mode for LRA, LRA+
#def rr_byte=3;
#def rr_word=1;
#def rr_dword=0;

; alternative way for memory read
#def lra1=lra 3,; -- Load RAM  8 bit
#def lra2=lra 1,; -- Load RAM 16 bit
#def lra4=lra 0,; -- Load RAM 32 bit
#def lra4+=lra+ 0,; -- Load RAM 32 bit autoincrement

#def xor=eor;
#def not=com;
#def SHLT=SHL;
#def ANDT=AND;

#def r0=PRF[0];
#def r1=PRF[1];
#def r2=PRF[2];
#def r3=PRF[3];
#def r4=PRF[4];
#def r5=PRF[5];
#def r6=PRF[6];
#def r7=PRF[7];
#def r8=PRF[8];
#def r9=PRF[9];
#def r10=PRF[10];
#def r11=PRF[11];
#def r12=PRF[12];
#def r13=PRF[13];
#def r14=PRF[14];
#def r15=PRF[15];

#def g0=GRF[0];
#def g1=GRF[1];
#def g2=GRF[2];
#def g3=GRF[3];
#def g4=GRF[4];
#def g5=GRF[5];
#def g6=GRF[6];
#def g7=GRF[7];
#def g8=GRF[8];
#def g9=GRF[9];
#def g10=GRF[10];
#def g11=GRF[11];
#def g12=GRF[12];
#def g13=GRF[13];
#def g14=GRF[14];
#def g15=GRF[15];

#def f0=FIT[0];
#def f1=FIT[1];
#def f2=FIT[2];
#def f3=FIT[3];
#def f4=FIT[4];
#def f5=FIT[5];
#def f6=FIT[6];
#def f7=FIT[7];
#def f8=FIT[8];
#def f9=FIT[9];
#def f10=FIT[10];
#def f11=FIT[11];
#def f12=FIT[12];
#def f13=FIT[13];
#def f14=FIT[14];
#def f15=FIT[15];

#def c0=CON[0];
#def c1=CON[1];
#def c2=CON[2];
#def c3=CON[3];
#def c4=CON[4];
#def c5=CON[5];
#def CPU_ID=CON[5];
#def c6=CON[6];
#def Cm2=CON[6];
#def c7=CON[7];
#def Cm1=CON[7];
#def c8=CON[8];
#def c9=CON[9];
#def c10=CON[10];
#def c11=CON[11];
#def c12=CON[12];
#def c13=CON[13];
#def c14=CON[14];
#def c15=CON[15];