Mon Sep 4 18:11:19 CEST 2006 Serials written and checked. Testing scsn ring 1... Access to PCI device: /dev/psi/vendor/0x1172/device/0x0005/0/base0 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 18 slave(s) found at ring 1, cmd=0x7 Number of pings, reads, writes : 11, 1, 0 Reading the Board Nr... Access to PCI device: /dev/psi/vendor/0x1172/device/0x0005/0/base0 i2c access, device=0xaf, addr=0x0, data_in=0x0, data_out=0x49 Number of pings, reads, writes : 0, 12, 126 Access to PCI device: /dev/psi/vendor/0x1172/device/0x0005/0/base0 i2c access, device=0xaf, addr=0x1, data_in=0x0, data_out=0x0 Number of pings, reads, writes : 0, 12, 126 Access to PCI device: /dev/psi/vendor/0x1172/device/0x0005/0/base0 i2c access, device=0xaf, addr=0x10, data_in=0x0, data_out=0x49 Number of pings, reads, writes : 0, 12, 126 Access to PCI device: /dev/psi/vendor/0x1172/device/0x0005/0/base0 i2c access, device=0xaf, addr=0x11, data_in=0x0, data_out=0x1 Number of pings, reads, writes : 0, 12, 126 Init... CPLD test generator Number of words 0xf4c5, dv0er1=0x0, dv1er1=0x7b17ee1 (Bit errors: MSB 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 LSB) done. 0xf4c5 32 bit words read. Number of words stored in the board 0xf4c5 0x6896 0x7787 0x8678 0x9569 0xa45a 0xb34b 0xc23c 0xd12d 0xe01e 0xff0f 0x0ef0 0x1de1 0x2cd2 0x3bc3 0x4ab4 0x59a5 0x6896 0x7787 0x8678 0x9569 EEPROM read... 0x9 0xf0f0 0x49 14 0 -- wrong data, expected 0x0 0x9 0xf0f0 0x49 14 0 -- wrong data, expected 0x0 One event with the first set of par/spare bits, the word/parity counters... One event with the second set of par/spare bits, the word/parity counters... TRAP initialised (make init) ACEX design resetted (nioase -r). Run 0: No bit errors in 1 runs of 119808 bytes each. Run 1: No bit errors in 2 runs of 119808 bytes each. Run 2: No bit errors in 3 runs of 119808 bytes each. Run 3: No bit errors in 4 runs of 119808 bytes each. Run 4: No bit errors in 5 runs of 119808 bytes each. Run 5: No bit errors in 6 runs of 119808 bytes each. Run 6: No bit errors in 7 runs of 119808 bytes each. Run 7: No bit errors in 8 runs of 119808 bytes each. Run 8: No bit errors in 9 runs of 119808 bytes each. Run 9: No bit errors in 10 runs of 119808 bytes each. ======================= 9 runs done. 0 bit errors in 10 runs of 119808 bytes each bit error rate = 0/(119808*8*10) 0 missing data bytes, 0 excessive data bytes TRAP initialised (make init) ACEX design resetted (nioase -r). Run 0: No bit errors in 1 runs of 119808 bytes each. Run 1: No bit errors in 2 runs of 119808 bytes each. Run 2: No bit errors in 3 runs of 119808 bytes each. Run 3: No bit errors in 4 runs of 119808 bytes each. Run 4: No bit errors in 5 runs of 119808 bytes each. Run 5: No bit errors in 6 runs of 119808 bytes each. Run 6: No bit errors in 7 runs of 119808 bytes each. Run 7: No bit errors in 8 runs of 119808 bytes each. Run 8: No bit errors in 9 runs of 119808 bytes each. Run 9: No bit errors in 10 runs of 119808 bytes each. ======================= 9 runs done. 0 bit errors in 10 runs of 119808 bytes each bit error rate = 0/(119808*8*10) 0 missing data bytes, 0 excessive data bytes