include src/chip_def.tcs

include src/cpu0_labels.tcs
include src/cpu1_labels.tcs
simdelay = 15;

write SMCMD, CMD_LP;     // low power
expect 127, SMCMD, lp_state


// GO TO J2C MODE and enable writing to the EEPROM

write chip_mode, SEBDOU, mode_jtag;
write chip_mode, SEBDEN, 11b;

// set the IRQ tst to J2C routine
write chip_jtag,  IA0+irq_tst, lbl_TST_cpu0;   // set int_clr start addr for cpu0

cmd = 1000b;            // write at address 0
data = 11 << 4;         // enable writing to EERPOM
write chip_jtag,       srv_command, cmd | (data << 4);
expect chip_jtag,      srv_command, cmd | (data << 4);
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
expect chip_jtag,      SMCMD, lp_state

cmd = 0110b;            // read at address 6
write chip_jtag,      srv_command, cmd;      // read 1
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
wait -100, 0, chip_jtag
expect chip_jtag,      SMCMD, lp_state
expect chip_jtag,      srv_outdata, ver_cpld

cmd = 0100b;            // read at address 4
write chip_jtag,      srv_command, cmd;      // read 1
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
wait -100, 0, chip_jtag
expect chip_jtag,      SMCMD, lp_state
expect chip_jtag,      srv_outdata, 11 << 4



// restore the IRQ tst address => switch CPU clock off
write chip_jtag, IA0+irq_tst, lbl_LPW_cpu0;   // set int_clr start addr for cpu0

// END

write chip_mode, SEBDOU, mode_i2c;
write chip_mode, SEBDEN, 11b;
write chip_jtag,      IA1+irq_tst, lbl_TST_cpu1;

// ************ INIT I2C
write chip_jtag, srv_command, 0; // init
write chip_jtag, SMCMD, CMD_CHK_TST
expect chip_jtag, SMCMD, lp_state

device_address = i2c_addr_eep;
number_of_bytes = 1;


// ************ WRITE 2 PI
start_address  = 0x2+eeprom_offs_addr_PI;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0;
write chip_jtag, srv_indata, 0x99;
// start
write chip_jtag, SMCMD, CMD_CHK_TST
wait -100000, 0, chip_jtag;
expect chip_jtag, SMCMD, lp_state
expect chip_jtag, srv_command, 0;     // the number of timeouts
wait eep_write_time;


// ************ READ ser nr PI 2
start_address  = 0x2+eeprom_offs_addr_PI;
number_of_bytes = 1;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read
// start
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state
//
expect chip_jtag,srv_outdata+0, 0x99

expect chip_jtag, srv_command, 0;     // the number of timeouts

write                 IA1+irq_tst, lbl_LPW_cpu1;   // restore int_tst



write chip_mode, SEBDOU, mode_jtag;
write chip_mode, SEBDEN, 11b;

// set the IRQ tst to J2C routine
write chip_jtag,  IA0+irq_tst, lbl_TST_cpu0;   // set int_clr start addr for cpu0

cmd = 1000b;            // write at address 0
data = reg_j2c;         // disable writing to EERPOM
write chip_jtag,       srv_command, cmd | (data << 4);
expect chip_jtag,      srv_command, cmd | (data << 4);
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
expect chip_jtag,      SMCMD, lp_state

// restore the IRQ tst address => switch CPU clock off
write chip_jtag, IA0+irq_tst, lbl_LPW_cpu0;   // set int_clr start addr for cpu0



write chip_mode, SEBDOU, mode_i2c;
write chip_mode, SEBDEN, 11b;
write chip_jtag,      IA1+irq_tst, lbl_TST_cpu1;

// ************ INIT I2C
write chip_jtag, srv_command, 0; // init
write chip_jtag, SMCMD, CMD_CHK_TST
expect chip_jtag, SMCMD, lp_state

device_address = i2c_addr_eep;
number_of_bytes = 1;

// ************ WRITE 2 PI
start_address  = 0x2+eeprom_offs_addr_PI;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 0;
write chip_jtag, srv_indata, 0x00;
// start
write chip_jtag, SMCMD, CMD_CHK_TST
wait -100000, 0, chip_jtag;
expect chip_jtag, SMCMD, lp_state
expect chip_jtag, srv_command, 0;     // the number of timeouts
wait eep_write_time;


// ************ READ ser nr PI 2
start_address  = 0x2+eeprom_offs_addr_PI;
number_of_bytes = 1;
write chip_jtag, srv_command, device_address | (start_address << 8) | (number_of_bytes << 16) | 1; // read
// start
write chip_jtag, SMCMD, CMD_CHK_TST;          // start
wait -100000, 0, chip_jtag
expect chip_jtag, SMCMD, lp_state
//
expect chip_jtag,srv_outdata+0, 0x99

expect chip_jtag, srv_command, 0;     // the number of timeouts

write                 IA1+irq_tst, lbl_LPW_cpu1;   // restore int_tst

wait 1000;