include src/chip_def.tcs

include src/cpu0_labels.tcs
simdelay = 15;

write SMCMD, CMD_LP;     // low power
expect 127, SMCMD, lp_state


// GO TO J2C MODE

write chip_mode, SEBDOU, mode_jtag;
write chip_mode, SEBDEN, 11b;

// set the IRQ tst to J2C routine
write chip_jtag,  IA0+irq_tst, lbl_TST_cpu0;   // set int_clr start addr for cpu0

cmd = 1111b;            // write at address 0
data = 11 << 4;         // enable writing to EERPOM
write chip_jtag,       srv_command, cmd | (data << 4);
expect chip_jtag,      srv_command, cmd | (data << 4);
write chip_jtag,      SMCMD, CMD_CHK_TST;     // start
wait simdelay
expect chip_jtag,      SMCMD, lp_state

// restore the IRQ tst address => switch CPU clock off
write chip_jtag, IA0+irq_tst, lbl_LPW_cpu0;   // set int_clr start addr for cpu0

// END