#$ TOOL ispLEVER 5.0.01.73.31.05_Starter
#$ DATE Wed Sep 27 18:33:05 2006
#$ MODULE oase
#$ PINS 31 reset_n start clk TESTEN TXD_14_ PRBSEN TXD_13_ LCKREFN TXD_12_ ENABLE \
#  TXD_11_ LOOPEN TXD_10_ TX_ER TXD_9_ TX_EN TXD_8_ TXD_7_ TXD_15_ TXD_6_ EN TXD_5_ SD2ANL \
#  TXD_4_ SCL TXD_3_ SDA TXD_2_ jTDO TXD_1_ TXD_0_
#$ NODES 58 reg_TX_ENreg reg_p_data_1_reg reg_p_data_0_reg reg_s_data_11_reg \
#  reg_s_data_10_reg reg_s_data_9_reg reg_s_data_8_reg reg_s_data_7_reg \
#  reg_s_data_6_reg reg_s_data_5_reg reg_s_data_4_reg reg_s_data_3_reg \
#  reg_s_data_2_reg reg_s_data_1_reg reg_s_data_0_reg reg_sm_1_ reg_cdata_14_ \
#  reg_sm_2_ reg_start_s reg_sm_0_ reg_cdata_13_ reg_cdata_12_ reg_cdata_11_ \
#  reg_cdata_10_ reg_cdata_9_ reg_cdata_8_ reg_cdata_7_ reg_cdata_6_ reg_cdata_5_ \
#  reg_cdata_4_ reg_cdata_3_ reg_cdata_2_ reg_cdata_1_ reg_cdata_0_ reg_dis_next \
#  reg_i_data_4_ reg_i_data_3_ reg_i_data_2_ reg_i_data_1_ reg_i_data_0_ timer_14_ \
#  timer_13_ timer_12_ timer_11_ timer_10_ timer_9_ timer_8_ timer_7_ timer_6_ timer_5_ \
#  timer_4_ timer_3_ timer_2_ timer_1_ timer_0_ nx1854 nx1934 nx1988
.model top_ni
.inputs reset_n.BLIF start.BLIF clk.BLIF reg_TX_ENreg.BLIF \
reg_p_data_1_reg.BLIF reg_p_data_0_reg.BLIF reg_s_data_11_reg.BLIF \
reg_s_data_10_reg.BLIF reg_s_data_9_reg.BLIF reg_s_data_8_reg.BLIF \
reg_s_data_7_reg.BLIF reg_s_data_6_reg.BLIF reg_s_data_5_reg.BLIF \
reg_s_data_4_reg.BLIF reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF \
reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_cdata_14_.BLIF \
reg_sm_2_.BLIF reg_start_s.BLIF reg_sm_0_.BLIF reg_cdata_13_.BLIF \
reg_cdata_12_.BLIF reg_cdata_11_.BLIF reg_cdata_10_.BLIF reg_cdata_9_.BLIF \
reg_cdata_8_.BLIF reg_cdata_7_.BLIF reg_cdata_6_.BLIF reg_cdata_5_.BLIF \
reg_cdata_4_.BLIF reg_cdata_3_.BLIF reg_cdata_2_.BLIF reg_cdata_1_.BLIF \
reg_cdata_0_.BLIF reg_dis_next.BLIF reg_i_data_4_.BLIF reg_i_data_3_.BLIF \
reg_i_data_2_.BLIF reg_i_data_1_.BLIF reg_i_data_0_.BLIF timer_14_.BLIF \
timer_13_.BLIF timer_12_.BLIF timer_11_.BLIF timer_10_.BLIF timer_9_.BLIF \
timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF \
timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF nx1854.BLIF \
nx1934.BLIF nx1988.BLIF
.outputs TESTEN PRBSEN LCKREFN ENABLE LOOPEN TX_ER TX_EN TXD_15_ EN SD2ANL SCL \
jTDO TXD_14_ TXD_13_ TXD_12_ TXD_11_ TXD_10_ TXD_9_ TXD_8_ TXD_7_ TXD_6_ \
TXD_5_ TXD_4_ TXD_3_ TXD_2_ TXD_1_ TXD_0_ reg_s_data_4_reg.CE \
reg_s_data_4_reg.C reg_s_data_4_reg.AR reg_s_data_5_reg.CE reg_s_data_5_reg.C \
reg_s_data_5_reg.AR reg_s_data_6_reg.CE reg_s_data_6_reg.C reg_s_data_6_reg.AR \
reg_s_data_7_reg.CE reg_s_data_7_reg.C reg_s_data_7_reg.AR reg_s_data_8_reg.CE \
reg_s_data_8_reg.C reg_s_data_8_reg.AR reg_s_data_9_reg.CE reg_s_data_9_reg.C \
reg_s_data_9_reg.AR reg_s_data_10_reg.CE reg_s_data_10_reg.C \
reg_s_data_10_reg.AR reg_s_data_11_reg.CE reg_s_data_11_reg.C \
reg_s_data_11_reg.AR reg_p_data_0_reg.D reg_p_data_0_reg.C reg_p_data_0_reg.AR \
reg_p_data_1_reg.D reg_p_data_1_reg.C reg_p_data_1_reg.AR reg_TX_ENreg.D \
reg_TX_ENreg.C reg_TX_ENreg.AR reg_s_data_0_reg.D reg_s_data_0_reg.CE \
reg_s_data_0_reg.C reg_s_data_0_reg.AR reg_sm_0_.C reg_sm_0_.AR reg_sm_1_.D \
reg_sm_1_.C reg_sm_1_.AR timer_1_.D timer_1_.C timer_1_.AR reg_sm_2_.C \
reg_sm_2_.AR reg_cdata_9_.CE reg_cdata_9_.C reg_cdata_9_.AR reg_cdata_8_.CE \
reg_cdata_8_.C reg_cdata_8_.AR reg_cdata_7_.CE reg_cdata_7_.C reg_cdata_7_.AR \
reg_cdata_6_.CE reg_cdata_6_.C reg_cdata_6_.AR reg_cdata_5_.CE reg_cdata_5_.C \
reg_cdata_5_.AR reg_cdata_4_.D reg_cdata_4_.CE reg_cdata_4_.C reg_cdata_4_.AR \
reg_cdata_3_.D reg_cdata_3_.CE reg_cdata_3_.C reg_cdata_3_.AR reg_cdata_2_.D \
reg_cdata_2_.CE reg_cdata_2_.C reg_cdata_2_.AR reg_cdata_1_.D reg_cdata_1_.CE \
reg_cdata_1_.C reg_cdata_1_.AR reg_cdata_0_.D reg_cdata_0_.CE reg_cdata_0_.C \
reg_cdata_0_.AR reg_cdata_12_.CE reg_cdata_12_.C reg_cdata_12_.AR \
reg_cdata_11_.CE reg_cdata_11_.C reg_cdata_11_.AR reg_cdata_10_.CE \
reg_cdata_10_.C reg_cdata_10_.AR reg_cdata_13_.CE reg_cdata_13_.C \
reg_cdata_13_.AR reg_cdata_14_.CE reg_cdata_14_.C reg_cdata_14_.AR \
reg_start_s.D reg_start_s.C reg_start_s.AR timer_0_.D timer_0_.C timer_0_.AR \
timer_2_.D timer_2_.C timer_2_.AR timer_3_.D timer_3_.C timer_3_.AR timer_4_.D \
timer_4_.C timer_4_.AR timer_5_.C timer_5_.AR timer_6_.C timer_6_.AR \
timer_7_.C timer_7_.AR timer_8_.C timer_8_.AR timer_9_.C timer_9_.AR \
timer_10_.C timer_10_.AR timer_11_.C timer_11_.AR timer_12_.C timer_12_.AR \
timer_13_.C timer_13_.AR timer_14_.C timer_14_.AR reg_dis_next.D \
reg_dis_next.C reg_dis_next.AR reg_i_data_4_.D reg_i_data_4_.C \
reg_i_data_4_.AR reg_i_data_0_.D reg_i_data_0_.C reg_i_data_0_.AR \
reg_i_data_1_.D reg_i_data_1_.C reg_i_data_1_.AR reg_i_data_2_.D \
reg_i_data_2_.C reg_i_data_2_.AR reg_i_data_3_.D reg_i_data_3_.C \
reg_i_data_3_.AR reg_s_data_1_reg.D reg_s_data_1_reg.CE reg_s_data_1_reg.C \
reg_s_data_1_reg.AR reg_s_data_2_reg.CE reg_s_data_2_reg.C reg_s_data_2_reg.AR \
reg_s_data_3_reg.D reg_s_data_3_reg.CE reg_s_data_3_reg.C reg_s_data_3_reg.AR \
SDA nx1854 nx1934 nx1988 SCL.OE SDA.OE jTDO.OE reg_s_data_11_reg.D.X1 \
reg_s_data_11_reg.D.X2 reg_s_data_10_reg.D.X1 reg_s_data_10_reg.D.X2 \
reg_s_data_9_reg.D.X1 reg_s_data_9_reg.D.X2 reg_s_data_8_reg.D.X1 \
reg_s_data_8_reg.D.X2 reg_s_data_7_reg.D.X1 reg_s_data_7_reg.D.X2 \
reg_s_data_6_reg.D.X1 reg_s_data_6_reg.D.X2 reg_s_data_5_reg.D.X1 \
reg_s_data_5_reg.D.X2 reg_s_data_4_reg.D.X1 reg_s_data_4_reg.D.X2 \
reg_s_data_2_reg.D.X1 reg_s_data_2_reg.D.X2 reg_cdata_14_.D.X1 \
reg_cdata_14_.D.X2 reg_sm_2_.D.X1 reg_sm_2_.D.X2 reg_sm_0_.D.X1 reg_sm_0_.D.X2 \
reg_cdata_13_.D.X1 reg_cdata_13_.D.X2 reg_cdata_12_.D.X1 reg_cdata_12_.D.X2 \
reg_cdata_11_.D.X1 reg_cdata_11_.D.X2 reg_cdata_10_.D.X1 reg_cdata_10_.D.X2 \
reg_cdata_9_.D.X1 reg_cdata_9_.D.X2 reg_cdata_8_.D.X1 reg_cdata_8_.D.X2 \
reg_cdata_7_.D.X1 reg_cdata_7_.D.X2 reg_cdata_6_.D.X1 reg_cdata_6_.D.X2 \
reg_cdata_5_.D.X1 reg_cdata_5_.D.X2 timer_14_.D.X1 timer_14_.D.X2 \
timer_13_.D.X1 timer_13_.D.X2 timer_12_.D.X1 timer_12_.D.X2 timer_11_.D.X1 \
timer_11_.D.X2 timer_10_.D.X1 timer_10_.D.X2 timer_9_.D.X1 timer_9_.D.X2 \
timer_8_.D.X1 timer_8_.D.X2 timer_7_.D.X1 timer_7_.D.X2 timer_6_.D.X1 \
timer_6_.D.X2 timer_5_.D.X1 timer_5_.D.X2
.names reset_n.BLIF reg_s_data_4_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_5_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_6_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_7_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_8_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_9_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_10_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_11_reg.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_p_data_0_reg.D
-01 1
0-0 1
1-1 1
011 0
1-0 0
.names reset_n.BLIF reg_p_data_0_reg.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_0_.BLIF reg_p_data_1_reg.D
10 1
0- 0
-1 0
.names reset_n.BLIF reg_p_data_1_reg.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_cdata_14_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_cdata_13_.BLIF reg_cdata_12_.BLIF reg_cdata_11_.BLIF reg_cdata_10_.BLIF \
reg_cdata_9_.BLIF reg_cdata_8_.BLIF reg_cdata_7_.BLIF reg_cdata_6_.BLIF \
reg_cdata_5_.BLIF reg_cdata_4_.BLIF reg_cdata_3_.BLIF reg_cdata_2_.BLIF \
reg_cdata_1_.BLIF reg_cdata_0_.BLIF reg_dis_next.BLIF reg_TX_ENreg.D
-010--------------0 1
--100-------------0 1
--10-1------------0 1
--10--0-----------0 1
--10---0----------0 1
--10----1---------0 1
--10-----0--------0 1
--10------1-------0 1
--10-------0------0 1
--10--------0-----0 1
--10---------1----0 1
--10----------1---0 1
--10-----------1--0 1
--10------------1-0 1
--10-------------10 1
0--1----------0---- 1
0--1--------1------ 1
0--1-------1------- 1
0--1-----1--------- 1
0--1---1----------- 1
0--1--1------------ 1
0--11-------------- 1
01-1--------------- 1
0--1-------------1- 1
0--1------------1-- 1
0--1-----------1--- 1
0--1---------1----- 1
0--1------1-------- 1
0--1----1---------- 1
0--1-1------------- 1
1--0--------------- 1
0-11--------------- 1
-00100000000001000- 0
01-010110101100000- 0
0-00--------------- 0
0--0--------------1 0
1--1--------------- 0
.names reset_n.BLIF reg_TX_ENreg.AR
0 1
1 0
.names reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_s_data_0_reg.D
0010 1
0001 1
--00 0
--11 0
-1-- 0
1--- 0
.names reset_n.BLIF reg_s_data_0_reg.AR
0 1
1 0
.names reset_n.BLIF reg_sm_0_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_14_.BLIF \
timer_13_.BLIF timer_12_.BLIF timer_11_.BLIF timer_10_.BLIF timer_9_.BLIF \
timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF \
timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF nx1988.BLIF \
reg_sm_1_.D
001---------------1 1
1----------------1- 1
1---------------0-- 1
1--------------1--- 1
1-------------1---- 1
1------------1----- 1
1-----------1------ 1
1----------1------- 1
1---------1-------- 1
1--------0--------- 1
1-------1---------- 1
1------1----------- 1
1-----1------------ 1
1----1------------- 1
1---1-------------- 1
1--1--------------- 1
1-0---------------- 1
1-1000000100000010- 0
0-0---------------- 0
01----------------- 0
0-----------------0 0
.names reset_n.BLIF reg_sm_1_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_1_.BLIF \
timer_0_.BLIF timer_1_.D
--110 1
-1-10 1
1--10 1
--101 1
-1-01 1
1--01 1
000-- 0
---00 0
---11 0
.names reset_n.BLIF timer_1_.AR
0 1
1 0
.names reset_n.BLIF reg_sm_2_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_9_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_8_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_7_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_6_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_5_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_cdata_4_.BLIF \
reg_cdata_3_.BLIF reg_cdata_2_.BLIF reg_cdata_1_.BLIF reg_cdata_0_.BLIF \
reg_cdata_4_.D
01-01111 1
01-10--- 1
01-1-0-- 1
01-1--0- 1
01-1---0 1
0-101111 1
1-001111 1
0-11--0- 1
0-11-0-- 1
0-110--- 1
0-11---0 1
1-01--0- 1
1-01-0-- 1
1-010--- 1
1-01---0 1
---11111 0
000----- 0
1-1----- 0
---0--0- 0
---0-0-- 0
---00--- 0
---0---0 0
.names reset_n.BLIF reg_cdata_4_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_cdata_14_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_cdata_13_.BLIF reg_cdata_12_.BLIF reg_cdata_11_.BLIF reg_cdata_10_.BLIF \
reg_cdata_9_.BLIF reg_cdata_8_.BLIF reg_cdata_7_.BLIF reg_cdata_6_.BLIF \
reg_cdata_5_.BLIF reg_cdata_4_.BLIF reg_cdata_3_.BLIF reg_cdata_2_.BLIF \
reg_cdata_1_.BLIF reg_cdata_0_.BLIF reg_cdata_3_.D
01-1----------1-0- 1
0--11---------1-0- 1
0--1-1--------1-0- 1
0--1--1-------1-0- 1
0--1---1------1-0- 1
0--1----1-----1-0- 1
--10----------0111 1
0--1-----1----1-0- 1
0--1------1---1-0- 1
--10----------10-- 1
0--1-------1--1-0- 1
0--1--------1-1-0- 1
--10----------1-0- 1
0--1---------11-0- 1
0--1----------1-10 1
0--1----------110- 1
0--1----------10-1 1
0-1-----------1--0 1
1--0----------0111 1
0--1----------0111 1
1--0----------1-0- 1
1--0----------10-- 1
1--0----------1--0 1
-0010000000000-000 0
--------------1111 0
0-00-------------- 0
1--1-------------- 0
--------------0-0- 0
--------------00-- 0
--------------0--0 0
.names reset_n.BLIF reg_cdata_3_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_cdata_2_.BLIF \
reg_cdata_1_.BLIF reg_cdata_0_.BLIF reg_cdata_2_.D
-10011 1
-1010- 1
-101-0 1
0-1011 1
0-110- 1
1-0011 1
0-11-0 1
1-010- 1
1-01-0 1
000--- 0
---111 0
1-1--- 0
---00- 0
---0-0 0
.names reset_n.BLIF reg_cdata_2_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_cdata_1_.BLIF \
reg_cdata_0_.BLIF reg_cdata_1_.D
01-10 1
01-01 1
0-110 1
0-101 1
1-010 1
1-001 1
000-- 0
1-1-- 0
---00 0
---11 0
.names reset_n.BLIF reg_cdata_1_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_cdata_14_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_cdata_13_.BLIF reg_cdata_12_.BLIF reg_cdata_11_.BLIF reg_cdata_10_.BLIF \
reg_cdata_9_.BLIF reg_cdata_8_.BLIF reg_cdata_7_.BLIF reg_cdata_6_.BLIF \
reg_cdata_5_.BLIF reg_cdata_4_.BLIF reg_cdata_3_.BLIF reg_cdata_2_.BLIF \
reg_cdata_1_.BLIF reg_cdata_0_.BLIF reg_cdata_0_.D
--100------------0 1
--10-1-----------0 1
--10--0----------0 1
--10---0---------0 1
--10----1--------0 1
--10-----0-------0 1
--10------1------0 1
--10-------0-----0 1
--10--------0----0 1
--10---------1---0 1
--10----------1--0 1
--10-----------1-0 1
--10------------10 1
001--------------0 1
0--1----------0--0 1
0--1--------1----0 1
0--1-------1-----0 1
0--1-----1-------0 1
0--1---1---------0 1
0--1--1----------0 1
0--11------------0 1
01-1-------------0 1
0--1------------10 1
0--1-----------1-0 1
0--1---------1---0 1
0--1------1------0 1
0--1----1--------0 1
0--1-1-----------0 1
1--0-------------0 1
-0010000000000100- 0
01-01011010110000- 0
0-00-------------- 0
1--1-------------- 0
-----------------1 0
.names reset_n.BLIF reg_cdata_0_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_12_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_11_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_10_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_13_.AR
0 1
1 0
.names reset_n.BLIF reg_cdata_14_.AR
0 1
1 0
.names reset_n.BLIF reg_start_s.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_0_.BLIF timer_0_.D
--10 1
-1-0 1
1--0 1
000- 0
---1 0
.names reset_n.BLIF timer_0_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_2_.BLIF \
timer_1_.BLIF timer_0_.BLIF timer_2_.D
--1011 1
-1-011 1
1--011 1
--110- 1
-1-10- 1
1--10- 1
--11-0 1
-1-1-0 1
1--1-0 1
000--- 0
---111 0
---00- 0
---0-0 0
.names reset_n.BLIF timer_2_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_3_.BLIF \
timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_3_.D
--10111 1
-1-0111 1
1--0111 1
--11-0- 1
-1-1-0- 1
1--1-0- 1
--110-- 1
-1-10-- 1
1--10-- 1
--11--0 1
-1-1--0 1
1--1--0 1
---1111 0
000---- 0
---0-0- 0
---00-- 0
---0--0 0
.names reset_n.BLIF timer_3_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_4_.BLIF \
timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_4_.D
--101111 1
-1-01111 1
1--01111 1
--11--0- 1
-1-1--0- 1
1--1--0- 1
--11-0-- 1
-1-1-0-- 1
1--1-0-- 1
--110--- 1
-1-10--- 1
1--10--- 1
--11---0 1
-1-1---0 1
1--1---0 1
---11111 0
000----- 0
---0--0- 0
---0-0-- 0
---00--- 0
---0---0 0
.names reset_n.BLIF timer_4_.AR
0 1
1 0
.names reset_n.BLIF timer_5_.AR
0 1
1 0
.names reset_n.BLIF timer_6_.AR
0 1
1 0
.names reset_n.BLIF timer_7_.AR
0 1
1 0
.names reset_n.BLIF timer_8_.AR
0 1
1 0
.names reset_n.BLIF timer_9_.AR
0 1
1 0
.names reset_n.BLIF timer_10_.AR
0 1
1 0
.names reset_n.BLIF timer_11_.AR
0 1
1 0
.names reset_n.BLIF timer_12_.AR
0 1
1 0
.names reset_n.BLIF timer_13_.AR
0 1
1 0
.names reset_n.BLIF timer_14_.AR
0 1
1 0
.names reg_i_data_4_.BLIF reg_i_data_0_.BLIF reg_i_data_1_.BLIF \
reg_i_data_2_.BLIF reg_i_data_3_.BLIF reg_dis_next.D
00000 1
---1- 0
--1-- 0
-1--- 0
1---- 0
----1 0
.names reset_n.BLIF reg_dis_next.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_i_data_4_.BLIF reg_i_data_3_.BLIF reg_i_data_2_.BLIF reg_i_data_1_.BLIF \
reg_i_data_0_.BLIF reg_i_data_4_.D
----00000 1
----1--1- 1
----1-1-- 1
----11--- 1
---1----- 1
--1------ 1
-0------- 1
1-------- 1
----1---1 1
010010000 0
01000--1- 0
01000-1-- 0
010001--- 0
01000---1 0
.names reset_n.BLIF reg_i_data_4_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_i_data_0_.BLIF reg_i_data_0_.D
01000 1
---1- 0
--1-- 0
-0--- 0
1---- 0
----1 0
.names reset_n.BLIF reg_i_data_0_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_i_data_1_.BLIF reg_i_data_0_.BLIF reg_i_data_1_.D
010000 1
010011 1
----10 0
----01 0
---1-- 0
--1--- 0
-0---- 0
1----- 0
.names reset_n.BLIF reg_i_data_1_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_i_data_2_.BLIF reg_i_data_1_.BLIF reg_i_data_0_.BLIF reg_i_data_2_.D
0100000 1
010011- 1
01001-1 1
----100 0
----01- 0
----0-1 0
---1--- 0
--1---- 0
-0----- 0
1------ 0
.names reset_n.BLIF reg_i_data_2_.AR
0 1
1 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_i_data_3_.BLIF reg_i_data_2_.BLIF reg_i_data_1_.BLIF reg_i_data_0_.BLIF \
reg_i_data_3_.D
----0000 1
----1-1- 1
----11-- 1
---1---- 1
--1----- 1
-0------ 1
1------- 1
----1--1 1
01001000 0
01000-1- 0
010001-- 0
01000--1 0
.names reset_n.BLIF reg_i_data_3_.AR
0 1
1 0
.names reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF reg_sm_1_.BLIF \
reg_sm_2_.BLIF reg_sm_0_.BLIF reg_s_data_1_reg.D
10001 1
01001 1
10-10 1
01-10 1
--1-0 1
000-- 0
110-- 0
--000 0
---11 0
--1-1 0
.names reset_n.BLIF reg_s_data_1_reg.AR
0 1
1 0
.names reset_n.BLIF reg_s_data_2_reg.AR
0 1
1 0
.names reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF reg_s_data_1_reg.BLIF \
reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_s_data_3_reg.D
0111001 1
0111-10 1
1--0001 1
1-0-001 1
10--001 1
1--0-10 1
1-0--10 1
10---10 1
----1-0 1
11110-- 0
0--00-- 0
0-0-0-- 0
00--0-- 0
----000 0
-----11 0
----1-1 0
.names reset_n.BLIF reg_s_data_3_reg.AR
0 1
1 0
.names timer_14_.BLIF timer_13_.BLIF timer_12_.BLIF timer_11_.BLIF \
timer_10_.BLIF timer_9_.BLIF timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF \
timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF \
timer_0_.BLIF nx1854
000000100000010 1
-------------0- 0
------------1-- 0
-----------1--- 0
----------1---- 0
---------1----- 0
--------1------ 0
-------1------- 0
------0-------- 0
-----1--------- 0
----1---------- 0
---1----------- 0
--1------------ 0
-1------------- 0
1-------------- 0
--------------1 0
.names reg_cdata_14_.BLIF reg_cdata_13_.BLIF reg_cdata_12_.BLIF \
reg_cdata_11_.BLIF reg_cdata_10_.BLIF reg_cdata_9_.BLIF reg_cdata_8_.BLIF \
reg_cdata_7_.BLIF reg_cdata_6_.BLIF reg_cdata_5_.BLIF reg_cdata_4_.BLIF \
reg_cdata_3_.BLIF reg_cdata_2_.BLIF reg_cdata_1_.BLIF reg_cdata_0_.BLIF nx1934
110110101100000 1
-------------1- 0
------------1-- 0
-----------1--- 0
----------1---- 0
---------0----- 0
--------0------ 0
-------1------- 0
------0-------- 0
-----1--------- 0
----0---------- 0
---0----------- 0
--1------------ 0
-0------------- 0
0-------------- 0
--------------1 0
.names reg_cdata_14_.BLIF reg_cdata_13_.BLIF reg_cdata_12_.BLIF \
reg_cdata_11_.BLIF reg_cdata_10_.BLIF reg_cdata_9_.BLIF reg_cdata_8_.BLIF \
reg_cdata_7_.BLIF reg_cdata_6_.BLIF reg_cdata_5_.BLIF reg_cdata_4_.BLIF \
reg_cdata_3_.BLIF reg_cdata_2_.BLIF reg_cdata_1_.BLIF reg_cdata_0_.BLIF nx1988
000000000001000 1
-------------1- 0
------------1-- 0
-----------0--- 0
----------1---- 0
---------1----- 0
--------1------ 0
-------1------- 0
------1-------- 0
-----1--------- 0
----1---------- 0
---1----------- 0
--1------------ 0
-1------------- 0
1-------------- 0
--------------1 0
.names TESTEN
 0
.names PRBSEN
 0
.names LCKREFN
 0
.names ENABLE
 1
.names LOOPEN
 0
.names TX_ER
 0
.names reg_TX_ENreg.BLIF TX_EN
1 1
0 0
.names reg_p_data_1_reg.BLIF TXD_15_
1 1
0 0
.names EN
 1
.names SD2ANL
 1
.names SCL
 0
.names jTDO
 0
.names TXD_14_
 0
.names reg_p_data_1_reg.BLIF TXD_13_
1 1
0 0
.names reg_p_data_0_reg.BLIF TXD_12_
1 1
0 0
.names reg_s_data_11_reg.BLIF TXD_11_
1 1
0 0
.names reg_s_data_10_reg.BLIF TXD_10_
1 1
0 0
.names reg_s_data_9_reg.BLIF TXD_9_
1 1
0 0
.names reg_s_data_8_reg.BLIF TXD_8_
1 1
0 0
.names reg_s_data_7_reg.BLIF TXD_7_
1 1
0 0
.names reg_s_data_6_reg.BLIF TXD_6_
1 1
0 0
.names reg_s_data_5_reg.BLIF TXD_5_
1 1
0 0
.names reg_s_data_4_reg.BLIF TXD_4_
1 1
0 0
.names reg_s_data_3_reg.BLIF TXD_3_
1 1
0 0
.names reg_s_data_2_reg.BLIF TXD_2_
1 1
0 0
.names reg_s_data_1_reg.BLIF TXD_1_
1 1
0 0
.names reg_s_data_0_reg.BLIF TXD_0_
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_4_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_4_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_5_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_5_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_6_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_6_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_7_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_7_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_8_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_8_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_9_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_9_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_10_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_10_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_11_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_11_reg.C
1 1
0 0
.names clk.BLIF reg_p_data_0_reg.C
1 1
0 0
.names clk.BLIF reg_p_data_1_reg.C
1 1
0 0
.names clk.BLIF reg_TX_ENreg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_0_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_0_reg.C
1 1
0 0
.names clk.BLIF reg_sm_0_.C
1 1
0 0
.names clk.BLIF reg_sm_1_.C
1 1
0 0
.names clk.BLIF timer_1_.C
1 1
0 0
.names clk.BLIF reg_sm_2_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_9_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_9_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_8_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_8_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_7_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_7_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_6_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_6_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_5_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_5_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_4_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_4_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_3_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_3_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_2_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_2_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_1_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_1_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_0_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_0_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_12_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_12_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_11_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_11_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_10_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_10_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_13_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_13_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_cdata_14_.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_cdata_14_.C
1 1
0 0
.names start.BLIF reg_start_s.D
1 1
0 0
.names clk.BLIF reg_start_s.C
1 1
0 0
.names clk.BLIF timer_0_.C
1 1
0 0
.names clk.BLIF timer_2_.C
1 1
0 0
.names clk.BLIF timer_3_.C
1 1
0 0
.names clk.BLIF timer_4_.C
1 1
0 0
.names clk.BLIF timer_5_.C
1 1
0 0
.names clk.BLIF timer_6_.C
1 1
0 0
.names clk.BLIF timer_7_.C
1 1
0 0
.names clk.BLIF timer_8_.C
1 1
0 0
.names clk.BLIF timer_9_.C
1 1
0 0
.names clk.BLIF timer_10_.C
1 1
0 0
.names clk.BLIF timer_11_.C
1 1
0 0
.names clk.BLIF timer_12_.C
1 1
0 0
.names clk.BLIF timer_13_.C
1 1
0 0
.names clk.BLIF timer_14_.C
1 1
0 0
.names clk.BLIF reg_dis_next.C
1 1
0 0
.names clk.BLIF reg_i_data_4_.C
1 1
0 0
.names clk.BLIF reg_i_data_0_.C
1 1
0 0
.names clk.BLIF reg_i_data_1_.C
1 1
0 0
.names clk.BLIF reg_i_data_2_.C
1 1
0 0
.names clk.BLIF reg_i_data_3_.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_1_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_1_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_2_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_2_reg.C
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_dis_next.BLIF \
reg_s_data_3_reg.CE
--1- 1
-0-- 1
1--- 1
---0 1
0101 0
.names clk.BLIF reg_s_data_3_reg.C
1 1
0 0
.names SDA
 0
.names SCL.OE
 0
.names SDA.OE
 0
.names jTDO.OE
 0
.names reg_s_data_11_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_s_data_11_reg.D.X1
1010 1
0--- 0
-1-- 0
--0- 0
---1 0
.names reg_s_data_11_reg.BLIF reg_s_data_10_reg.BLIF reg_s_data_9_reg.BLIF \
reg_s_data_8_reg.BLIF reg_s_data_7_reg.BLIF reg_s_data_6_reg.BLIF \
reg_s_data_5_reg.BLIF reg_s_data_4_reg.BLIF reg_s_data_3_reg.BLIF \
reg_s_data_2_reg.BLIF reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF \
reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_s_data_11_reg.D.X2
-------------00 1
01111111111100- 1
-11111111111--0 1
------------1-0 1
10----------00- 1
1-0---------00- 1
1--0--------00- 1
1---0-------00- 1
1----0------00- 1
1-----0-----00- 1
1------0----00- 1
1-------0---00- 1
1--------0--00- 1
1---------0-00- 1
1----------000- 1
------------1-1 0
-0----------01- 0
--0---------01- 0
---0--------01- 0
----0-------01- 0
-----0------01- 0
------0-----01- 0
-------0----01- 0
--------0---01- 0
---------0--01- 0
----------0-01- 0
-----------001- 0
00------------1 0
0-0-----------1 0
0--0----------1 0
0---0---------1 0
0----0--------1 0
0-----0-------1 0
0------0------1 0
0-------0-----1 0
0--------0----1 0
0---------0---1 0
0----------0--1 0
0------------11 0
111111111111--1 0
.names reg_s_data_10_reg.BLIF reg_sm_1_.BLIF reg_s_data_10_reg.D.X1
10 1
0- 0
-1 0
.names reg_s_data_10_reg.BLIF reg_s_data_9_reg.BLIF reg_s_data_8_reg.BLIF \
reg_s_data_7_reg.BLIF reg_s_data_6_reg.BLIF reg_s_data_5_reg.BLIF \
reg_s_data_4_reg.BLIF reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF \
reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF \
reg_sm_0_.BLIF reg_s_data_10_reg.D.X2
-1111111111001 1
-1111111111010 1
1----------000 1
111111111110-- 1
1----------011 1
-----------1-- 0
0-----------11 0
-0----------01 0
--0---------01 0
---0--------01 0
----0-------01 0
-----0------01 0
------0-----01 0
-------0----01 0
--------0---01 0
---------0--01 0
----------0-01 0
-0----------10 0
--0---------10 0
---0--------10 0
----0-------10 0
-----0------10 0
------0-----10 0
-------0----10 0
--------0---10 0
---------0--10 0
----------0-10 0
0-----------00 0
.names reg_s_data_9_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_s_data_9_reg.D.X1
1010 1
0--- 0
-1-- 0
--0- 0
---1 0
.names reg_s_data_9_reg.BLIF reg_s_data_8_reg.BLIF reg_s_data_7_reg.BLIF \
reg_s_data_6_reg.BLIF reg_s_data_5_reg.BLIF reg_s_data_4_reg.BLIF \
reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF reg_s_data_1_reg.BLIF \
reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF \
reg_s_data_9_reg.D.X2
-----------00 1
011111111100- 1
-111111111--0 1
----------1-0 1
10--------00- 1
1-0-------00- 1
1--0------00- 1
1---0-----00- 1
1----0----00- 1
1-----0---00- 1
1------0--00- 1
1-------0-00- 1
1--------000- 1
----------1-1 0
-0--------01- 0
--0-------01- 0
---0------01- 0
----0-----01- 0
-----0----01- 0
------0---01- 0
-------0--01- 0
--------0-01- 0
---------001- 0
00----------1 0
0-0---------1 0
0--0--------1 0
0---0-------1 0
0----0------1 0
0-----0-----1 0
0------0----1 0
0-------0---1 0
0--------0--1 0
0----------11 0
1111111111--1 0
.names reg_s_data_8_reg.BLIF reg_sm_1_.BLIF reg_s_data_8_reg.D.X1
10 1
0- 0
-1 0
.names reg_s_data_8_reg.BLIF reg_s_data_7_reg.BLIF reg_s_data_6_reg.BLIF \
reg_s_data_5_reg.BLIF reg_s_data_4_reg.BLIF reg_s_data_3_reg.BLIF \
reg_s_data_2_reg.BLIF reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF \
reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF reg_s_data_8_reg.D.X2
-11111111001 1
-11111111010 1
1--------000 1
1111111110-- 1
1--------011 1
---------1-- 0
0---------11 0
-0--------01 0
--0-------01 0
---0------01 0
----0-----01 0
-----0----01 0
------0---01 0
-------0--01 0
--------0-01 0
-0--------10 0
--0-------10 0
---0------10 0
----0-----10 0
-----0----10 0
------0---10 0
-------0--10 0
--------0-10 0
0---------00 0
.names reg_s_data_7_reg.BLIF reg_sm_1_.BLIF reg_s_data_7_reg.D.X1
10 1
0- 0
-1 0
.names reg_s_data_7_reg.BLIF reg_s_data_6_reg.BLIF reg_s_data_5_reg.BLIF \
reg_s_data_4_reg.BLIF reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF \
reg_s_data_1_reg.BLIF reg_s_data_0_reg.BLIF reg_sm_1_.BLIF reg_sm_2_.BLIF \
reg_sm_0_.BLIF reg_s_data_7_reg.D.X2
--------1-0 1
01111111-10 1
-1111111001 1
1--------00 1
111111110-- 1
1-------011 1
--------1-1 0
0--------11 0
-0-------01 0
--0------01 0
---0-----01 0
----0----01 0
-----0---01 0
------0--01 0
-------0-01 0
00------0-0 0
0-0-----0-0 0
0--0----0-0 0
0---0---0-0 0
0----0--0-0 0
0-----0-0-0 0
0------00-0 0
-0------010 0
--0-----010 0
---0----010 0
----0---010 0
-----0--010 0
------0-010 0
-------0010 0
0-------000 0
.names reg_s_data_6_reg.BLIF reg_sm_1_.BLIF reg_s_data_6_reg.D.X1
10 1
0- 0
-1 0
.names reg_s_data_6_reg.BLIF reg_s_data_5_reg.BLIF reg_s_data_4_reg.BLIF \
reg_s_data_3_reg.BLIF reg_s_data_2_reg.BLIF reg_s_data_1_reg.BLIF \
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.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_14_.BLIF \
timer_13_.BLIF timer_12_.BLIF timer_11_.BLIF timer_10_.BLIF timer_9_.BLIF \
timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF \
timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_14_.D.X2
1---11111111111111 1
-1--11111111111111 1
--1-11111111111111 1
0001-------------- 1
---111111111111111 1
1---0------------- 0
-1--0------------- 0
--1-0------------- 0
1----0------------ 0
-1---0------------ 0
--1--0------------ 0
1-----0----------- 0
-1----0----------- 0
--1---0----------- 0
1------0---------- 0
-1-----0---------- 0
--1----0---------- 0
1-------0--------- 0
-1------0--------- 0
--1-----0--------- 0
1--------0-------- 0
-1-------0-------- 0
--1------0-------- 0
1---------0------- 0
-1--------0------- 0
--1-------0------- 0
1----------0------ 0
-1---------0------ 0
--1--------0------ 0
1-----------0----- 0
-1----------0----- 0
--1---------0----- 0
1------------0---- 0
-1-----------0---- 0
--1----------0---- 0
1-------------0--- 0
-1------------0--- 0
--1-----------0--- 0
1--------------0-- 0
-1-------------0-- 0
--1------------0-- 0
1---------------0- 0
-1--------------0- 0
--1-------------0- 0
1----------------0 0
-1---------------0 0
--1--------------0 0
0000-------------- 0
.names timer_13_.BLIF timer_13_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_13_.BLIF \
timer_12_.BLIF timer_11_.BLIF timer_10_.BLIF timer_9_.BLIF timer_8_.BLIF \
timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF \
timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_13_.D.X2
1---1111111111111 1
-1--1111111111111 1
--1-1111111111111 1
0001------------- 1
---11111111111111 1
1---0------------ 0
-1--0------------ 0
--1-0------------ 0
1----0----------- 0
-1---0----------- 0
--1--0----------- 0
1-----0---------- 0
-1----0---------- 0
--1---0---------- 0
1------0--------- 0
-1-----0--------- 0
--1----0--------- 0
1-------0-------- 0
-1------0-------- 0
--1-----0-------- 0
1--------0------- 0
-1-------0------- 0
--1------0------- 0
1---------0------ 0
-1--------0------ 0
--1-------0------ 0
1----------0----- 0
-1---------0----- 0
--1--------0----- 0
1-----------0---- 0
-1----------0---- 0
--1---------0---- 0
1------------0--- 0
-1-----------0--- 0
--1----------0--- 0
1-------------0-- 0
-1------------0-- 0
--1-----------0-- 0
1--------------0- 0
-1-------------0- 0
--1------------0- 0
1---------------0 0
-1--------------0 0
--1-------------0 0
0000------------- 0
.names timer_12_.BLIF timer_12_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_12_.BLIF \
timer_11_.BLIF timer_10_.BLIF timer_9_.BLIF timer_8_.BLIF timer_7_.BLIF \
timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF \
timer_1_.BLIF timer_0_.BLIF timer_12_.D.X2
1---111111111111 1
-1--111111111111 1
--1-111111111111 1
0001------------ 1
---1111111111111 1
1---0----------- 0
-1--0----------- 0
--1-0----------- 0
1----0---------- 0
-1---0---------- 0
--1--0---------- 0
1-----0--------- 0
-1----0--------- 0
--1---0--------- 0
1------0-------- 0
-1-----0-------- 0
--1----0-------- 0
1-------0------- 0
-1------0------- 0
--1-----0------- 0
1--------0------ 0
-1-------0------ 0
--1------0------ 0
1---------0----- 0
-1--------0----- 0
--1-------0----- 0
1----------0---- 0
-1---------0---- 0
--1--------0---- 0
1-----------0--- 0
-1----------0--- 0
--1---------0--- 0
1------------0-- 0
-1-----------0-- 0
--1----------0-- 0
1-------------0- 0
-1------------0- 0
--1-----------0- 0
1--------------0 0
-1-------------0 0
--1------------0 0
0000------------ 0
.names timer_11_.BLIF timer_11_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_11_.BLIF \
timer_10_.BLIF timer_9_.BLIF timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF \
timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF \
timer_0_.BLIF timer_11_.D.X2
1---11111111111 1
-1--11111111111 1
--1-11111111111 1
0001----------- 1
---111111111111 1
1---0---------- 0
-1--0---------- 0
--1-0---------- 0
1----0--------- 0
-1---0--------- 0
--1--0--------- 0
1-----0-------- 0
-1----0-------- 0
--1---0-------- 0
1------0------- 0
-1-----0------- 0
--1----0------- 0
1-------0------ 0
-1------0------ 0
--1-----0------ 0
1--------0----- 0
-1-------0----- 0
--1------0----- 0
1---------0---- 0
-1--------0---- 0
--1-------0---- 0
1----------0--- 0
-1---------0--- 0
--1--------0--- 0
1-----------0-- 0
-1----------0-- 0
--1---------0-- 0
1------------0- 0
-1-----------0- 0
--1----------0- 0
1-------------0 0
-1------------0 0
--1-----------0 0
0000----------- 0
.names timer_10_.BLIF timer_10_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_10_.BLIF \
timer_9_.BLIF timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF \
timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF \
timer_10_.D.X2
1---1111111111 1
-1--1111111111 1
--1-1111111111 1
0001---------- 1
---11111111111 1
1---0--------- 0
-1--0--------- 0
--1-0--------- 0
1----0-------- 0
-1---0-------- 0
--1--0-------- 0
1-----0------- 0
-1----0------- 0
--1---0------- 0
1------0------ 0
-1-----0------ 0
--1----0------ 0
1-------0----- 0
-1------0----- 0
--1-----0----- 0
1--------0---- 0
-1-------0---- 0
--1------0---- 0
1---------0--- 0
-1--------0--- 0
--1-------0--- 0
1----------0-- 0
-1---------0-- 0
--1--------0-- 0
1-----------0- 0
-1----------0- 0
--1---------0- 0
1------------0 0
-1-----------0 0
--1----------0 0
0000---------- 0
.names timer_9_.BLIF timer_9_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_9_.BLIF \
timer_8_.BLIF timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF \
timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_9_.D.X2
1---111111111 1
-1--111111111 1
--1-111111111 1
0001--------- 1
---1111111111 1
1---0-------- 0
-1--0-------- 0
--1-0-------- 0
1----0------- 0
-1---0------- 0
--1--0------- 0
1-----0------ 0
-1----0------ 0
--1---0------ 0
1------0----- 0
-1-----0----- 0
--1----0----- 0
1-------0---- 0
-1------0---- 0
--1-----0---- 0
1--------0--- 0
-1-------0--- 0
--1------0--- 0
1---------0-- 0
-1--------0-- 0
--1-------0-- 0
1----------0- 0
-1---------0- 0
--1--------0- 0
1-----------0 0
-1----------0 0
--1---------0 0
0000--------- 0
.names timer_8_.BLIF timer_8_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_8_.BLIF \
timer_7_.BLIF timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF \
timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF timer_8_.D.X2
1---11111111 1
-1--11111111 1
--1-11111111 1
0001-------- 1
---111111111 1
1---0------- 0
-1--0------- 0
--1-0------- 0
1----0------ 0
-1---0------ 0
--1--0------ 0
1-----0----- 0
-1----0----- 0
--1---0----- 0
1------0---- 0
-1-----0---- 0
--1----0---- 0
1-------0--- 0
-1------0--- 0
--1-----0--- 0
1--------0-- 0
-1-------0-- 0
--1------0-- 0
1---------0- 0
-1--------0- 0
--1-------0- 0
1----------0 0
-1---------0 0
--1--------0 0
0000-------- 0
.names timer_7_.BLIF timer_7_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_7_.BLIF \
timer_6_.BLIF timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF \
timer_1_.BLIF timer_0_.BLIF timer_7_.D.X2
1---1111111 1
-1--1111111 1
--1-1111111 1
0001------- 1
---11111111 1
1---0------ 0
-1--0------ 0
--1-0------ 0
1----0----- 0
-1---0----- 0
--1--0----- 0
1-----0---- 0
-1----0---- 0
--1---0---- 0
1------0--- 0
-1-----0--- 0
--1----0--- 0
1-------0-- 0
-1------0-- 0
--1-----0-- 0
1--------0- 0
-1-------0- 0
--1------0- 0
1---------0 0
-1--------0 0
--1-------0 0
0000------- 0
.names timer_6_.BLIF timer_6_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_6_.BLIF \
timer_5_.BLIF timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF \
timer_0_.BLIF timer_6_.D.X2
1---111111 1
-1--111111 1
--1-111111 1
0001------ 1
---1111111 1
1---0----- 0
-1--0----- 0
--1-0----- 0
1----0---- 0
-1---0---- 0
--1--0---- 0
1-----0--- 0
-1----0--- 0
--1---0--- 0
1------0-- 0
-1-----0-- 0
--1----0-- 0
1-------0- 0
-1------0- 0
--1-----0- 0
1--------0 0
-1-------0 0
--1------0 0
0000------ 0
.names timer_5_.BLIF timer_5_.D.X1
1 1
0 0
.names reg_sm_1_.BLIF reg_sm_2_.BLIF reg_sm_0_.BLIF timer_5_.BLIF \
timer_4_.BLIF timer_3_.BLIF timer_2_.BLIF timer_1_.BLIF timer_0_.BLIF \
timer_5_.D.X2
1---11111 1
-1--11111 1
--1-11111 1
0001----- 1
---111111 1
1---0---- 0
-1--0---- 0
--1-0---- 0
1----0--- 0
-1---0--- 0
--1--0--- 0
1-----0-- 0
-1----0-- 0
--1---0-- 0
1------0- 0
-1-----0- 0
--1----0- 0
1-------0 0
-1------0 0
--1-----0 0
0000----- 0
.end