|--------------------------------------------------- ----------| |- ispLEVER 5.0.01.73.31.05_Starter Equations File -| |- Copyright(C), 1992-2001, Lattice Semiconductor Corporation -| |- All Rights Reserved. -| |--------------------------------------------------------------| Equations: EN = 1 ; (1 pterm, 0 signal) ENABLE = 1 ; (1 pterm, 0 signal) ID_0_0_.D = !ID_0_0_.Q ; (1 pterm, 1 signal) ID_0_0_.C = clk ; (1 pterm, 1 signal) ID_0_0_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_0_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_1_.D = ID_0_1_.Q & !ID_0_0_.Q # !ID_0_1_.Q & ID_0_0_.Q ; (2 pterms, 2 signals) ID_0_1_.C = clk ; (1 pterm, 1 signal) ID_0_1_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_1_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_2_.D = !ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q # ID_0_2_.Q & !ID_0_1_.Q # ID_0_2_.Q & !ID_0_0_.Q ; (3 pterms, 3 signals) ID_0_2_.C = clk ; (1 pterm, 1 signal) ID_0_2_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_2_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_3_.D = !ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q # ID_0_3_.Q & !ID_0_1_.Q # ID_0_3_.Q & !ID_0_2_.Q # ID_0_3_.Q & !ID_0_0_.Q ; (4 pterms, 4 signals) ID_0_3_.C = clk ; (1 pterm, 1 signal) ID_0_3_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_3_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_3__0 = !( reset_n & j2c_reg_rstout_n_i.Q ) ; (1 pterm, 2 signals) ID_0_4_.D.X1 = ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q ; (1 pterm, 4 signals) ID_0_4_.D.X2 = ID_0_4_.Q ; (1 pterm, 1 signal) ID_0_4_.C = clk ; (1 pterm, 1 signal) ID_0_4_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_4_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_5_.T = ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q & ID_0_4_.Q ; (1 pterm, 5 signals) ID_0_5_.C = clk ; (1 pterm, 1 signal) ID_0_5_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_5_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_6_.T = ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q & ID_0_5_.Q & ID_0_4_.Q ; (1 pterm, 6 signals) ID_0_6_.C = clk ; (1 pterm, 1 signal) ID_0_6_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_6_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_0_7_.T = ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q & ID_0_6_.Q & ID_0_5_.Q & ID_0_4_.Q ; (1 pterm, 7 signals) ID_0_7_.C = clk ; (1 pterm, 1 signal) ID_0_7_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_0_7_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_0_.D = ID_1_0_.Q & !nx1610 # !ID_1_0_.Q & nx1610 ; (2 pterms, 2 signals) ID_1_0_.C = clk ; (1 pterm, 1 signal) ID_1_0_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_0_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_1_.D = !ID_1_1_.Q & ID_1_0_.Q & !nx1461 # ID_1_1_.Q & !ID_1_0_.Q # ID_1_1_.Q & nx1461 ; (3 pterms, 3 signals) ID_1_1_.C = clk ; (1 pterm, 1 signal) ID_1_1_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_1_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_2_.D = !ID_1_2_.Q & ID_1_1_.Q & ID_1_0_.Q & !nx1461 # ID_1_2_.Q & !ID_1_0_.Q # ID_1_2_.Q & !ID_1_1_.Q # ID_1_2_.Q & nx1461 ; (4 pterms, 4 signals) ID_1_2_.C = clk ; (1 pterm, 1 signal) ID_1_2_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_2_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_3_.D.X1 = ID_1_3_.Q ; (1 pterm, 1 signal) ID_1_3_.D.X2 = ID_1_2_.Q & ID_1_1_.Q & ID_1_0_.Q & nx1610 ; (1 pterm, 4 signals) ID_1_3_.C = clk ; (1 pterm, 1 signal) ID_1_3_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_3_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_4_.T = ID_1_3_.Q & ID_1_2_.Q & ID_1_1_.Q & ID_1_0_.Q & nx1610 ; (1 pterm, 5 signals) ID_1_4_.C = clk ; (1 pterm, 1 signal) ID_1_4_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_4_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_5_.T = ID_1_3_.Q & ID_1_2_.Q & ID_1_1_.Q & ID_1_0_.Q & nx1610 & ID_1_4_.Q ; (1 pterm, 6 signals) ID_1_5_.C = clk ; (1 pterm, 1 signal) ID_1_5_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_5_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_1_6_.T = ID_1_3_.Q & ID_1_2_.Q & ID_1_1_.Q & ID_1_0_.Q & nx1610 & ID_1_5_.Q & ID_1_4_.Q ; (1 pterm, 7 signals) ID_1_6_.C = clk ; (1 pterm, 1 signal) ID_1_6_.CE = TX_EN.Q ; (1 pterm, 1 signal) ID_1_6_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_0_.D = !ID_2_0_.Q ; (1 pterm, 1 signal) ID_2_0_.C = clk ; (1 pterm, 1 signal) ID_2_0_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_0_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_1_.D = ID_2_1_.Q & !ID_2_0_.Q # !ID_2_1_.Q & ID_2_0_.Q ; (2 pterms, 2 signals) ID_2_1_.C = clk ; (1 pterm, 1 signal) ID_2_1_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_1_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_2_.D = !ID_2_2_.Q & ID_2_1_.Q & ID_2_0_.Q # ID_2_2_.Q & !ID_2_1_.Q # ID_2_2_.Q & !ID_2_0_.Q ; (3 pterms, 3 signals) ID_2_2_.C = clk ; (1 pterm, 1 signal) ID_2_2_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_2_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_3_.D = !ID_2_3_.Q & ID_2_2_.Q & ID_2_1_.Q & ID_2_0_.Q # ID_2_3_.Q & !ID_2_1_.Q # ID_2_3_.Q & !ID_2_2_.Q # ID_2_3_.Q & !ID_2_0_.Q ; (4 pterms, 4 signals) ID_2_3_.C = clk ; (1 pterm, 1 signal) ID_2_3_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_3_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_4_.D.X1 = ID_2_3_.Q & ID_2_2_.Q & ID_2_1_.Q & ID_2_0_.Q ; (1 pterm, 4 signals) ID_2_4_.D.X2 = ID_2_4_.Q ; (1 pterm, 1 signal) ID_2_4_.C = clk ; (1 pterm, 1 signal) ID_2_4_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_4_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_5_.T = ID_2_3_.Q & ID_2_2_.Q & ID_2_1_.Q & ID_2_0_.Q & ID_2_4_.Q ; (1 pterm, 5 signals) ID_2_5_.C = clk ; (1 pterm, 1 signal) ID_2_5_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_5_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_2_6_.T = ID_2_3_.Q & ID_2_2_.Q & ID_2_1_.Q & ID_2_0_.Q & ID_2_5_.Q & ID_2_4_.Q ; (1 pterm, 6 signals) ID_2_6_.C = clk ; (1 pterm, 1 signal) ID_2_6_.CE = ni_reg_ce_prty_bit_neg.Q ; (1 pterm, 1 signal) ID_2_6_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_0_.D = !ID_3_0_.Q ; (1 pterm, 1 signal) ID_3_0_.C = clk ; (1 pterm, 1 signal) ID_3_0_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_0_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_1_.D = ID_3_1_.Q & !ID_3_0_.Q # !ID_3_1_.Q & ID_3_0_.Q ; (2 pterms, 2 signals) ID_3_1_.C = clk ; (1 pterm, 1 signal) ID_3_1_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_1_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_2_.D = !ID_3_2_.Q & ID_3_1_.Q & ID_3_0_.Q # ID_3_2_.Q & !ID_3_1_.Q # ID_3_2_.Q & !ID_3_0_.Q ; (3 pterms, 3 signals) ID_3_2_.C = clk ; (1 pterm, 1 signal) ID_3_2_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_2_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_3_.D = !ID_3_3_.Q & ID_3_2_.Q & ID_3_1_.Q & ID_3_0_.Q # ID_3_3_.Q & !ID_3_1_.Q # ID_3_3_.Q & !ID_3_2_.Q # ID_3_3_.Q & !ID_3_0_.Q ; (4 pterms, 4 signals) ID_3_3_.C = clk ; (1 pterm, 1 signal) ID_3_3_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_3_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_4_.D.X1 = ID_3_3_.Q & ID_3_2_.Q & ID_3_1_.Q & ID_3_0_.Q ; (1 pterm, 4 signals) ID_3_4_.D.X2 = ID_3_4_.Q ; (1 pterm, 1 signal) ID_3_4_.C = clk ; (1 pterm, 1 signal) ID_3_4_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_4_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_5_.T = ID_3_3_.Q & ID_3_2_.Q & ID_3_1_.Q & ID_3_0_.Q & ID_3_4_.Q ; (1 pterm, 5 signals) ID_3_5_.C = clk ; (1 pterm, 1 signal) ID_3_5_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_5_.AR = ID_0_3__0 ; (1 pterm, 1 signal) ID_3_6_.T = ID_3_3_.Q & ID_3_2_.Q & ID_3_1_.Q & ID_3_0_.Q & ID_3_5_.Q & ID_3_4_.Q ; (1 pterm, 6 signals) ID_3_6_.C = clk ; (1 pterm, 1 signal) ID_3_6_.CE = ni_reg_ce_prty_bit_pos.Q ; (1 pterm, 1 signal) ID_3_6_.AR = ID_0_3__0 ; (1 pterm, 1 signal) LCKREFN = 0 ; (0 pterm, 0 signal) LED_10_ = 1 ; (1 pterm, 0 signal) LED_5_ = 0 ; (0 pterm, 0 signal) LED_6_ = PRBSEN.PIN ; (1 pterm, 1 signal) LED_7_ = FAULT ; (1 pterm, 1 signal) LED_8_ = 1 ; (1 pterm, 0 signal) LED_9_ = 0 ; (0 pterm, 0 signal) LOOPEN = 0 ; (0 pterm, 0 signal) PRBSEN.D = j2c_reg_shreg_2_.Q ; (1 pterm, 1 signal) PRBSEN.OE = j2c_reg_creg1hm_7_reg.Q ; (1 pterm, 1 signal) PRBSEN.C = nx0 ; (1 pterm, 1 signal) PRBSEN.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) PRBSEN.AR = !reset_n ; (1 pterm, 1 signal) SCL = 0 ; (0 pterm, 0 signal) SCL.OE = DIS_JTG & !jTCK ; (1 pterm, 2 signals) SD2ANL.D = j2c_reg_shreg_1_.Q ; (1 pterm, 1 signal) SD2ANL.OE = j2c_reg_creg1hm_7_reg.Q ; (1 pterm, 1 signal) SD2ANL.C = nx0 ; (1 pterm, 1 signal) SD2ANL.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) SD2ANL.AR = !reset_n ; (1 pterm, 1 signal) SDA = 0 ; (0 pterm, 0 signal) SDA.OE = DIS_JTG & !jTMS ; (1 pterm, 2 signals) TESTEN = 0 ; (0 pterm, 0 signal) TXD_0_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_1_.Q & !j2c_reg_creg0hm_4_.Q & nx939 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx939 # TXD_0_.Q & j2c_reg_creg1hm_3_.Q & nx939 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_0_.Q & nx939 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_0_.Q & nx939 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_0_.Q & nx939 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_5_.Q & !ni_nires_reg_data_out_0_.Q & nx939 ) ; (7 pterms, 13 signals) TXD_0_.C = clk ; (1 pterm, 1 signal) TXD_0_.CE = nx158 ; (1 pterm, 1 signal) TXD_0_.AR = 0 ; (0 pterm, 0 signal) TXD_10_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_4_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1715 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1715 # TXD_10_.Q & !TXD_9_.Q & !TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_4_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_2_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_3_.Q & nx1769 # !TXD_10_.Q & TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !TXD_10_.Q & TXD_9_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !ni_nires_reg_data_out_12_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_12_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & !ni_nires_reg_data_out_12_.Q & nx1769 ) ; (14 pterms, 15 signals) TXD_10_.C = clk ; (1 pterm, 1 signal) TXD_10_.CE = nx158 ; (1 pterm, 1 signal) TXD_10_.AR = 0 ; (0 pterm, 0 signal) TXD_11_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1831 # TXD_11_.Q & !TXD_10_.Q & !TXD_9_.Q & !TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1831 & !ni_nires_reg_data_out_14_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_2_.Q & nx1715 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & nx1715 # !TXD_11_.Q & TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !TXD_11_.Q & TXD_9_.Q & j2c_reg_creg1hm_3_.Q # !TXD_11_.Q & TXD_10_.Q & j2c_reg_creg1hm_3_.Q ) ; (9 pterms, 14 signals) TXD_11_.C = clk ; (1 pterm, 1 signal) TXD_11_.CE = nx158 ; (1 pterm, 1 signal) TXD_11_.AR = 0 ; (0 pterm, 0 signal) TXD_12_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_4_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & nx1881 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_2_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q & nx1831 & !ni_nires_reg_data_out_14_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_2_.Q & nx1831 & !ni_nires_reg_data_out_14_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_3_.Q & nx1831 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1881 # TXD_12_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & nx1831 & !ni_nires_reg_data_out_14_.Q ) ; (12 pterms, 13 signals) TXD_12_.C = clk ; (1 pterm, 1 signal) TXD_12_.CE = nx158 ; (1 pterm, 1 signal) TXD_12_.AR = 0 ; (0 pterm, 0 signal) TXD_13_.D = !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !nx1855 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !nx1855 # TXD_13_.Q & !TXD_12_.Q & j2c_reg_creg1hm_3_.Q # !TXD_13_.Q & TXD_12_.Q & j2c_reg_creg1hm_3_.Q # !nx1291 & !nx1881 ; (5 pterms, 9 signals) TXD_13_.C = clk ; (1 pterm, 1 signal) TXD_13_.CE = nx158 ; (1 pterm, 1 signal) TXD_13_.AR = 0 ; (0 pterm, 0 signal) TXD_14_.D = ni_nires_reg_data_out_18_.Q & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # ni_nires_reg_data_out_17_.Q & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q & !nx1855 # !TXD_14_.Q & TXD_13_.Q & TXD_12_.Q & j2c_reg_creg1hm_3_.Q # ni_nires_reg_data_out_18_.Q & !nx1241 & !j2c_reg_creg0hm_7_.Q # ni_nires_reg_data_out_17_.Q & !nx1241 & j2c_reg_creg0hm_7_.Q # TXD_14_.Q & !TXD_12_.Q & j2c_reg_creg1hm_3_.Q # TXD_14_.Q & !TXD_13_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & !nx1855 ; (9 pterms, 13 signals) TXD_14_.C = clk ; (1 pterm, 1 signal) TXD_14_.CE = nx158 ; (1 pterm, 1 signal) TXD_14_.AR = 0 ; (0 pterm, 0 signal) TXD_15_.D.X1 = !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !nx1889 # ni_nires_reg_data_out_18_.Q & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_3_.Q # ni_nires_reg_data_out_17_.Q & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_3_.Q # TXD_14_.Q & TXD_13_.Q & TXD_12_.Q & j2c_reg_creg1hm_3_.Q ; (4 pterms, 9 signals) TXD_15_.D.X2 = TXD_15_.Q & j2c_reg_creg1hm_3_.Q ; (1 pterm, 2 signals) TXD_15_.C = clk ; (1 pterm, 1 signal) TXD_15_.CE = nx158 ; (1 pterm, 1 signal) TXD_15_.AR = 0 ; (0 pterm, 0 signal) TXD_1_.D = !( nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !ni_nires_reg_data_out_2_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !TXD_1_.Q & !TXD_0_.Q & j2c_reg_creg1hm_3_.Q # TXD_1_.Q & TXD_0_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_2_.Q & nx941 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & nx941 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & nx941 ) ; (8 pterms, 13 signals) TXD_1_.C = clk ; (1 pterm, 1 signal) TXD_1_.CE = nx158 ; (1 pterm, 1 signal) TXD_1_.AR = 0 ; (0 pterm, 0 signal) TXD_2_.D = !( nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_2_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_3_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_4_.Q # nx993 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # nx993 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # TXD_2_.Q & TXD_1_.Q & TXD_0_.Q & j2c_reg_creg1hm_3_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !ni_nires_reg_data_out_2_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_4_.Q # !TXD_2_.Q & !TXD_0_.Q & j2c_reg_creg1hm_3_.Q # !TXD_2_.Q & !TXD_1_.Q & j2c_reg_creg1hm_3_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !ni_nires_reg_data_out_2_.Q & j2c_reg_creg0hm_2_.Q # nx1051 & !j2c_reg_creg1hm_3_.Q & !ni_nires_reg_data_out_2_.Q & j2c_reg_creg0hm_3_.Q ) ; (14 pterms, 15 signals) TXD_2_.C = clk ; (1 pterm, 1 signal) TXD_2_.CE = nx158 ; (1 pterm, 1 signal) TXD_2_.AR = 0 ; (0 pterm, 0 signal) TXD_3_.D.X1 = !nx1107 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !nx993 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_2_.Q # !nx993 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q # TXD_2_.Q & TXD_1_.Q & TXD_0_.Q & j2c_reg_creg1hm_3_.Q ; (4 pterms, 8 signals) TXD_3_.D.X2 = TXD_3_.Q & j2c_reg_creg1hm_3_.Q ; (1 pterm, 2 signals) TXD_3_.C = clk ; (1 pterm, 1 signal) TXD_3_.CE = nx158 ; (1 pterm, 1 signal) TXD_3_.AR = 0 ; (0 pterm, 0 signal) TXD_4_.D = !nx1179 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q # !nx1179 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !nx1107 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q # !TXD_4_.Q & j2c_reg_creg1hm_3_.Q # !nx1107 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q # !nx1107 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_2_.Q ; (6 pterms, 8 signals) TXD_4_.C = clk ; (1 pterm, 1 signal) TXD_4_.CE = nx158 ; (1 pterm, 1 signal) TXD_4_.AR = 0 ; (0 pterm, 0 signal) TXD_5_.D = !nx1145 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q # !nx1145 & !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !TXD_5_.Q & !TXD_4_.Q & j2c_reg_creg1hm_3_.Q # TXD_5_.Q & TXD_4_.Q & j2c_reg_creg1hm_3_.Q # !nx1179 & !nx1291 ; (5 pterms, 9 signals) TXD_5_.C = clk ; (1 pterm, 1 signal) TXD_5_.CE = nx158 ; (1 pterm, 1 signal) TXD_5_.AR = 0 ; (0 pterm, 0 signal) TXD_6_.D = !nx1145 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & j2c_reg_creg0hm_2_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & ni_nires_reg_data_out_7_.Q # !TXD_6_.Q & !TXD_5_.Q & !TXD_4_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & ni_nires_reg_data_out_8_.Q # !nx1241 & j2c_reg_creg0hm_7_.Q & ni_nires_reg_data_out_7_.Q # TXD_6_.Q & TXD_4_.Q & j2c_reg_creg1hm_3_.Q # TXD_6_.Q & TXD_5_.Q & j2c_reg_creg1hm_3_.Q # !nx1145 & !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q # !nx1241 & !j2c_reg_creg0hm_7_.Q & ni_nires_reg_data_out_8_.Q ; (9 pterms, 13 signals) TXD_6_.C = clk ; (1 pterm, 1 signal) TXD_6_.CE = nx158 ; (1 pterm, 1 signal) TXD_6_.AR = 0 ; (0 pterm, 0 signal) TXD_7_.D.X1 = !j2c_reg_creg1hm_3_.Q & !nx1191 & !j2c_reg_creg0hm_3_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_3_.Q & ni_nires_reg_data_out_8_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_3_.Q & ni_nires_reg_data_out_7_.Q # !TXD_6_.Q & !TXD_5_.Q & !TXD_4_.Q & j2c_reg_creg1hm_3_.Q ; (4 pterms, 9 signals) TXD_7_.D.X2 = TXD_7_.Q & j2c_reg_creg1hm_3_.Q ; (1 pterm, 2 signals) TXD_7_.C = clk ; (1 pterm, 1 signal) TXD_7_.CE = nx158 ; (1 pterm, 1 signal) TXD_7_.AR = 0 ; (0 pterm, 0 signal) TXD_8_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q & nx1671 & !ni_nires_reg_data_out_11_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1671 # TXD_8_.Q & j2c_reg_creg1hm_3_.Q & nx1671 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_4_.Q & nx1671 & !ni_nires_reg_data_out_10_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_6_.Q & nx1671 & !ni_nires_reg_data_out_10_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_7_.Q & nx1671 & !ni_nires_reg_data_out_10_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_5_.Q & nx1671 & !ni_nires_reg_data_out_10_.Q ) ; (7 pterms, 13 signals) TXD_8_.C = clk ; (1 pterm, 1 signal) TXD_8_.CE = nx158 ; (1 pterm, 1 signal) TXD_8_.AR = 0 ; (0 pterm, 0 signal) TXD_9_.D = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1769 # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_12_.Q & nx1769 # TXD_9_.Q & !TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !TXD_9_.Q & TXD_8_.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_2_.Q & nx1673 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q & nx1673 # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & nx1673 ) ; (8 pterms, 13 signals) TXD_9_.C = clk ; (1 pterm, 1 signal) TXD_9_.CE = nx158 ; (1 pterm, 1 signal) TXD_9_.AR = 0 ; (0 pterm, 0 signal) TX_EN.D = !( j2c_reg_creg1hm_3_.Q & !ni_pattcount_2_.Q & !ni_pattcount_1_.Q & !ni_pattcount_0_.Q & !ni_pattcount_4_.Q & !ni_pattcount_3_.Q # !j2c_reg_creg1hm_3_.Q & !ni_nires_reg_valid.Q ) ; (2 pterms, 7 signals) TX_EN.C = clk ; (1 pterm, 1 signal) TX_EN.AR = 0 ; (0 pterm, 0 signal) TX_ER = 0 ; (0 pterm, 0 signal) ix1373.X1 = !TXD_14_.Q & !TXD_13_.Q & !ni_reg_prty_bit_neg_r.Q # !TXD_14_.Q & TXD_13_.Q & ni_reg_prty_bit_neg_r.Q # TXD_14_.Q & !TXD_13_.Q & ni_reg_prty_bit_neg_r.Q # TXD_14_.Q & TXD_13_.Q & !ni_reg_prty_bit_neg_r.Q ; (4 pterms, 3 signals) ix1373.X2 = !TXD_15_.Q ; (1 pterm, 1 signal) ix1379.X1 = !TXD_11_.Q & !TXD_10_.Q & !TXD_9_.Q # !TXD_11_.Q & TXD_10_.Q & TXD_9_.Q # TXD_11_.Q & !TXD_10_.Q & TXD_9_.Q # TXD_11_.Q & TXD_10_.Q & !TXD_9_.Q ; (4 pterms, 3 signals) ix1379.X2 = !TXD_12_.Q ; (1 pterm, 1 signal) ix1693.X1 = !TXD_6_.Q & !TXD_5_.Q & !ni_reg_prty_bit_pos_r.Q # !TXD_6_.Q & TXD_5_.Q & ni_reg_prty_bit_pos_r.Q # TXD_6_.Q & !TXD_5_.Q & ni_reg_prty_bit_pos_r.Q # TXD_6_.Q & TXD_5_.Q & !ni_reg_prty_bit_pos_r.Q ; (4 pterms, 3 signals) ix1693.X2 = !TXD_7_.Q ; (1 pterm, 1 signal) ix1699.X1 = !TXD_3_.Q & !TXD_2_.Q & !TXD_1_.Q # !TXD_3_.Q & TXD_2_.Q & TXD_1_.Q # TXD_3_.Q & !TXD_2_.Q & TXD_1_.Q # TXD_3_.Q & TXD_2_.Q & !TXD_1_.Q ; (4 pterms, 3 signals) ix1699.X2 = !TXD_4_.Q ; (1 pterm, 1 signal) j2c_bitcnt_0_.D = !j2c_bitcnt_0_.Q ; (1 pterm, 1 signal) j2c_bitcnt_0_.C = !jTCK ; (1 pterm, 1 signal) j2c_bitcnt_0_.AR = !nx0 ; (1 pterm, 1 signal) j2c_bitcnt_1_.D = j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q ; (2 pterms, 2 signals) j2c_bitcnt_1_.C = !jTCK ; (1 pterm, 1 signal) j2c_bitcnt_1_.AR = !nx0 ; (1 pterm, 1 signal) j2c_bitcnt_2_.D = !j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # j2c_bitcnt_2_.Q & !j2c_bitcnt_1_.Q # j2c_bitcnt_2_.Q & !j2c_bitcnt_0_.Q ; (3 pterms, 3 signals) j2c_bitcnt_2_.C = !jTCK ; (1 pterm, 1 signal) j2c_bitcnt_2_.AR = !nx0 ; (1 pterm, 1 signal) j2c_reg_cmdreg_0_.D = j2c_reg_shreg_4_.Q ; (1 pterm, 1 signal) j2c_reg_cmdreg_0_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_cmdreg_0_.CE = jTDI ; (1 pterm, 1 signal) j2c_reg_cmdreg_0_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_cmdreg_0_.AP = !reset_n ; (1 pterm, 1 signal) j2c_reg_cmdreg_1_.D = j2c_reg_shreg_5_.Q ; (1 pterm, 1 signal) j2c_reg_cmdreg_1_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_cmdreg_1_.CE = jTDI ; (1 pterm, 1 signal) j2c_reg_cmdreg_1_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_cmdreg_1_.AP = !reset_n ; (1 pterm, 1 signal) j2c_reg_cmdreg_2_.D = j2c_reg_shreg_6_.Q ; (1 pterm, 1 signal) j2c_reg_cmdreg_2_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_cmdreg_2_.CE = jTDI ; (1 pterm, 1 signal) j2c_reg_cmdreg_2_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_cmdreg_2_.AP = !reset_n ; (1 pterm, 1 signal) j2c_reg_cmdreg_3_.D = jTDI & j2c_reg_shreg_7_.Q ; (1 pterm, 2 signals) j2c_reg_cmdreg_3_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_cmdreg_3_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_0_.D = j2c_reg_shreg_0_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_0_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_0_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_0_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_1_.D = j2c_reg_shreg_1_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_1_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_1_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_1_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_2_.D = j2c_reg_shreg_2_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_2_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_2_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_2_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_3_.D = j2c_reg_shreg_3_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_3_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_3_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_3_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_4_.D = j2c_reg_shreg_4_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_4_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_4_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_4_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_5_.D = j2c_reg_shreg_5_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_5_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_5_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_5_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_6_.D = j2c_reg_shreg_6_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_6_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_6_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_6_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg0hm_7_.D = j2c_reg_shreg_7_.Q ; (1 pterm, 1 signal) j2c_reg_creg0hm_7_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg0hm_7_.CE = !jTDI & !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg0hm_7_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_0_.D = j2c_reg_shreg_0_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_0_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_0_.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_0_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_3_.D = j2c_reg_shreg_3_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_3_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_3_.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_3_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_4_.D = j2c_reg_shreg_4_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_4_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_4_.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_4_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_5_.D = j2c_reg_shreg_5_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_5_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_5_.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_5_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_6_.D = j2c_reg_shreg_6_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_6_.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_6_.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_6_.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_creg1hm_7_reg.D = j2c_reg_shreg_7_.Q ; (1 pterm, 1 signal) j2c_reg_creg1hm_7_reg.C = nx0 ; (1 pterm, 1 signal) j2c_reg_creg1hm_7_reg.CE = !jTDI & j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q ; (1 pterm, 3 signals) j2c_reg_creg1hm_7_reg.AR = !reset_n ; (1 pterm, 1 signal) j2c_reg_rstout_n_i.D = j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q ; (1 pterm, 3 signals) j2c_reg_rstout_n_i.C = !jTCK ; (1 pterm, 1 signal) j2c_reg_rstout_n_i.CE = j2c_reg_rstout_n_i_0 ; (1 pterm, 1 signal) j2c_reg_rstout_n_i.AR = 0 ; (0 pterm, 0 signal) j2c_reg_rstout_n_i.AP = !nx0 ; (1 pterm, 1 signal) j2c_reg_rstout_n_i_0 = j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !j2c_reg_cmdreg_0_.Q & j2c_reg_cmdreg_3_.Q & !j2c_bitcnt_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q ; (2 pterms, 5 signals) j2c_reg_shreg_0_.D = j2c_reg_shreg_1_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_0_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_0_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_1_.D = j2c_reg_shreg_2_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_1_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_1_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_2_.D = j2c_reg_shreg_3_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_2_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_2_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_3_.D = j2c_reg_shreg_4_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_3_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_3_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_4_.D = j2c_reg_shreg_5_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_4_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_4_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_5_.D = j2c_reg_shreg_6_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_5_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_5_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_6_.D = j2c_reg_shreg_7_.Q ; (1 pterm, 1 signal) j2c_reg_shreg_6_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_6_.AR = 0 ; (0 pterm, 0 signal) j2c_reg_shreg_7_.D = jTDI ; (1 pterm, 1 signal) j2c_reg_shreg_7_.C = jTCK ; (1 pterm, 1 signal) j2c_reg_shreg_7_.AR = 0 ; (0 pterm, 0 signal) jTDO = !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_reg_cmdreg_0_.Q & ID_0_7_.Q & j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & FAULT & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_reg_cmdreg_0_.Q & j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & j2c_reg_creg0hm_7_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_reg_creg1hm_7_reg.Q & j2c_reg_cmdreg_0_.Q & j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & FAULT & !j2c_reg_cmdreg_2_.Q & j2c_reg_cmdreg_0_.Q & j2c_bitcnt_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # j2c_reg_cmdreg_0_.Q & !j2c_bitcnt_2_.Q & !nx1531 # !nx2049 & !j2c_reg_cmdreg_0_.Q & !j2c_bitcnt_2_.Q # j2c_reg_cmdreg_0_.Q & j2c_bitcnt_2_.Q & nx1868 # !j2c_reg_cmdreg_0_.Q & j2c_bitcnt_2_.Q & nx1596 # DIS_JTG & SDA.PIN ; (10 pterms, 16 signals) jTDO.OE = nx216 ; (1 pterm, 1 signal) ni_nires_reg_clear_n_i.D = reset_n & j2c_reg_rstout_n_i.Q ; (1 pterm, 2 signals) ni_nires_reg_clear_n_i.C = clk ; (1 pterm, 1 signal) ni_nires_reg_clear_n_i.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_0_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_0_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_1_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_1_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_2_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_2_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_3_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_3_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_4_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_4_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_5_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_5_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_6_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_6_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_7_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_7_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_8_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_8_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0neg_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data0neg_9_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0neg_9_.CE = !ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0neg_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_0_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_0_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_1_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_1_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_2_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_2_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_3_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_3_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_4_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_4_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_5_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_5_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_6_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_6_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_7_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_7_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_8_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_8_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data0pos_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data0pos_9_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data0pos_9_.CE = !ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data0pos_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_0_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_0_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_1_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_1_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_2_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_2_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_3_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_3_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_4_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_4_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_5_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_5_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_6_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_6_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_7_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_7_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_8_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_8_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1neg_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data1neg_9_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1neg_9_.CE = ni_nires_reg_gray_cntf_0_.Q & !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1neg_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_0_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_0_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_1_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_1_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_2_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_2_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_3_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_3_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_4_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_4_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_5_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_5_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_6_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_6_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_7_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_7_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_8_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_8_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data1pos_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data1pos_9_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data1pos_9_.CE = !ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data1pos_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_0_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_0_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_1_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_1_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_2_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_2_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_3_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_3_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_4_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_4_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_5_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_5_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_6_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_6_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_7_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_7_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_8_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_8_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2neg_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data2neg_9_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2neg_9_.CE = ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2neg_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_0_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_0_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_1_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_1_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_2_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_2_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_3_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_3_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_4_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_4_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_5_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_5_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_6_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_6_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_7_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_7_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_8_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_8_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data2pos_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data2pos_9_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data2pos_9_.CE = ni_nires_reg_gray_cnt_1_.Q & ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data2pos_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_0_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_0_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_1_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_1_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_2_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_2_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_3_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_3_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_4_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_4_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_5_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_5_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_6_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_6_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_7_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_7_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_8_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_8_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3neg_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data3neg_9_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3neg_9_.CE = !ni_nires_reg_gray_cntf_0_.Q & ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3neg_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_0_.D = NI_D_0_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_0_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_0_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_1_.D = NI_D_1_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_1_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_1_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_2_.D = NI_D_2_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_2_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_2_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_3_.D = NI_D_3_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_3_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_3_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_4_.D = NI_D_4_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_4_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_4_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_5_.D = NI_D_5_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_5_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_5_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_6_.D = NI_D_6_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_6_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_6_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_7_.D = NI_D_7_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_7_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_7_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_8_.D = NI_D_8_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_8_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_8_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data3pos_9_.D = NI_D_9_ ; (1 pterm, 1 signal) ni_nires_reg_data3pos_9_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_data3pos_9_.CE = ni_nires_reg_gray_cnt_1_.Q & !ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 2 signals) ni_nires_reg_data3pos_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_0_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_0_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_0_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_0_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_0_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_0_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_0_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_10_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_0_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_0_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_0_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_0_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_10_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_10_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_11_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_1_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_1_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_1_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_11_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_11_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_12_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_2_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_2_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_2_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_2_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_12_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_12_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_13_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_3_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_3_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_3_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_3_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_13_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_13_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_14_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_4_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_4_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_4_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_4_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_14_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_14_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_15_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2pos_5_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0pos_5_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1pos_5_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3pos_5_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_15_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_15_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_16_.D = ni_nires_reg_data0pos_6_.Q & !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data1pos_6_.Q & ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data3pos_6_.Q & !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data2pos_6_.Q & ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_16_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_16_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_17_.D = ni_nires_reg_data0pos_7_.Q & !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data1pos_7_.Q & ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data3pos_7_.Q & !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data2pos_7_.Q & ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_17_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_17_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_18_.D = ni_nires_reg_data0pos_8_.Q & !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data1pos_8_.Q & ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data3pos_8_.Q & !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data2pos_8_.Q & ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_18_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_18_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_19_.D = ni_nires_reg_data0pos_9_.Q & !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data1pos_9_.Q & ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data3pos_9_.Q & !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q # ni_nires_reg_data2pos_9_.Q & ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_19_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_19_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_1_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_1_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_1_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_1_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_1_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_1_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_1_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_2_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_2_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_2_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_2_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_2_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_2_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_2_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_3_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_3_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_3_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_3_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_3_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_3_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_3_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_4_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_4_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_4_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_4_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_4_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_4_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_4_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_5_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_5_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_5_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_5_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_5_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_5_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_5_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_6_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_6_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_6_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_6_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_6_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_6_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_6_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_7_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_7_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_7_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_7_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_7_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_7_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_7_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_8_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_8_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_8_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_8_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_8_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_8_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_8_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_data_out_9_.D = ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data2neg_9_.Q # !ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data0neg_9_.Q # ni_nires_reg_old_cnt_0_.Q & !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data1neg_9_.Q # !ni_nires_reg_old_cnt_0_.Q & ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_data3neg_9_.Q ; (4 pterms, 6 signals) ni_nires_reg_data_out_9_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_data_out_9_.AR = 0 ; (0 pterm, 0 signal) ni_nires_reg_gray_cnt_0_.D = !ni_nires_reg_gray_cnt_1_.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cnt_0_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_gray_cnt_0_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cnt_1_.D = ni_nires_reg_gray_cnt_0_.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cnt_1_.C = NI_STR ; (1 pterm, 1 signal) ni_nires_reg_gray_cnt_1_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_0_.D = !ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_0_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_0_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_1_.D = ni_nires_reg_gray_cntf_0_.Q ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_1_.C = !NI_STR ; (1 pterm, 1 signal) ni_nires_reg_gray_cntf_1_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_0_.D = ni_nires_reg_gray_cntf_0_.Q ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_0_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_0_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_1_.D = ni_nires_reg_gray_cntf_1_.Q ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_1_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_new_cnt_1_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_0_.D = !ni_nires_reg_old_cnt_1_.Q ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_0_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_0_.CE = nx595 ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_0_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_1_.D = ni_nires_reg_old_cnt_0_.Q ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_1_.C = clk ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_1_.CE = nx595 ; (1 pterm, 1 signal) ni_nires_reg_old_cnt_1_.AR = !ni_nires_reg_clear_n_i.Q ; (1 pterm, 1 signal) ni_nires_reg_valid.D = ni_nires_reg_new_cnt_0_.Q & !ni_nires_reg_old_cnt_0_.Q # !ni_nires_reg_new_cnt_0_.Q & ni_nires_reg_old_cnt_0_.Q # ni_nires_reg_old_cnt_1_.Q & !ni_nires_reg_new_cnt_1_.Q # !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_new_cnt_1_.Q ; (4 pterms, 4 signals) ni_nires_reg_valid.C = clk ; (1 pterm, 1 signal) ni_nires_reg_valid.AR = 0 ; (0 pterm, 0 signal) ni_pattcount_0_.D = !ni_pattcount_0_.Q ; (1 pterm, 1 signal) ni_pattcount_0_.C = clk ; (1 pterm, 1 signal) ni_pattcount_0_.AR = 0 ; (0 pterm, 0 signal) ni_pattcount_1_.D = ni_pattcount_1_.Q & !ni_pattcount_0_.Q # !ni_pattcount_1_.Q & ni_pattcount_0_.Q ; (2 pterms, 2 signals) ni_pattcount_1_.C = clk ; (1 pterm, 1 signal) ni_pattcount_1_.AR = 0 ; (0 pterm, 0 signal) ni_pattcount_2_.D = !ni_pattcount_2_.Q & ni_pattcount_1_.Q & ni_pattcount_0_.Q # ni_pattcount_2_.Q & !ni_pattcount_1_.Q # ni_pattcount_2_.Q & !ni_pattcount_0_.Q ; (3 pterms, 3 signals) ni_pattcount_2_.C = clk ; (1 pterm, 1 signal) ni_pattcount_2_.AR = 0 ; (0 pterm, 0 signal) ni_pattcount_3_.D = ni_pattcount_2_.Q & ni_pattcount_1_.Q & ni_pattcount_0_.Q & !ni_pattcount_3_.Q # !ni_pattcount_0_.Q & ni_pattcount_3_.Q # !ni_pattcount_1_.Q & ni_pattcount_3_.Q # !ni_pattcount_2_.Q & ni_pattcount_3_.Q ; (4 pterms, 4 signals) ni_pattcount_3_.C = clk ; (1 pterm, 1 signal) ni_pattcount_3_.AR = 0 ; (0 pterm, 0 signal) ni_pattcount_4_.D.X1 = ni_pattcount_2_.Q & ni_pattcount_1_.Q & ni_pattcount_0_.Q & ni_pattcount_3_.Q ; (1 pterm, 4 signals) ni_pattcount_4_.D.X2 = ni_pattcount_4_.Q ; (1 pterm, 1 signal) ni_pattcount_4_.C = clk ; (1 pterm, 1 signal) ni_pattcount_4_.AR = 0 ; (0 pterm, 0 signal) ni_reg_ce_prty_bit_neg.D = TX_EN.Q & TXD_8_.Q & !ix1373 & !ix1379 # TX_EN.Q & !TXD_8_.Q & ix1373 & !ix1379 # TX_EN.Q & !TXD_8_.Q & !ix1373 & ix1379 # TX_EN.Q & TXD_8_.Q & ix1373 & ix1379 ; (4 pterms, 4 signals) ni_reg_ce_prty_bit_neg.C = clk ; (1 pterm, 1 signal) ni_reg_ce_prty_bit_neg.AR = 0 ; (0 pterm, 0 signal) ni_reg_ce_prty_bit_pos.D = TX_EN.Q & TXD_0_.Q & !ix1693 & !ix1699 # TX_EN.Q & !TXD_0_.Q & ix1693 & !ix1699 # TX_EN.Q & !TXD_0_.Q & !ix1693 & ix1699 # TX_EN.Q & TXD_0_.Q & ix1693 & ix1699 ; (4 pterms, 4 signals) ni_reg_ce_prty_bit_pos.C = clk ; (1 pterm, 1 signal) ni_reg_ce_prty_bit_pos.AR = 0 ; (0 pterm, 0 signal) ni_reg_prty_bit_neg_r.D = !( !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_11_.Q # !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q & nx1769 # !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1769 # j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_12_.Q & nx1769 # j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1715 # !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_10_.Q # j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_10_.Q # j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_10_.Q # j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_10_.Q # !j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx1673 # !nx1334 & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q # j2c_reg_creg0hm_3_.Q & nx1889 ) ; (12 pterms, 16 signals) ni_reg_prty_bit_neg_r.C = clk ; (1 pterm, 1 signal) ni_reg_prty_bit_neg_r.AR = 0 ; (0 pterm, 0 signal) ni_reg_prty_bit_pos_r.D = !( !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_1_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q # nx1051 & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !j2c_reg_creg0hm_4_.Q # nx1051 & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_7_.Q # !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_8_.Q # nx1051 & !ni_nires_reg_data_out_2_.Q & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_0_.Q # j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_0_.Q # j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_0_.Q # j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !ni_nires_reg_data_out_0_.Q # nx1179 & !j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q # nx993 & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q # nx1145 & j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q # nx1107 & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & j2c_reg_creg0hm_2_.Q # nx1191 & j2c_reg_creg0hm_3_.Q # !j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & nx941 ) ; (16 pterms, 20 signals) ni_reg_prty_bit_pos_r.C = clk ; (1 pterm, 1 signal) ni_reg_prty_bit_pos_r.AR = 0 ; (0 pterm, 0 signal) nx0 = !( !DIS_JTG & !jTMS ) ; (1 pterm, 2 signals) nx1051 = !( !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q & ni_nires_reg_data_out_3_.Q # !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & ni_nires_reg_data_out_3_.Q ) ; (2 pterms, 5 signals) nx1107 = !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_5_.Q # j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_4_.Q # j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_4_.Q # !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_5_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_4_.Q ; (5 pterms, 6 signals) nx1145.X1 = j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_6_.Q # j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_4_.Q & ni_nires_reg_data_out_6_.Q & !ni_nires_reg_data_out_7_.Q # j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_6_.Q & ni_nires_reg_data_out_7_.Q ; (3 pterms, 6 signals) nx1145.X2 = !j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_7_.Q ; (1 pterm, 2 signals) nx1179 = j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_5_.Q # !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_6_.Q # !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_6_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_5_.Q ; (4 pterms, 5 signals) nx1191.X1 = !j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_9_.Q # !j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q & !ni_nires_reg_data_out_8_.Q & ni_nires_reg_data_out_9_.Q # !j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q & ni_nires_reg_data_out_8_.Q & !ni_nires_reg_data_out_9_.Q ; (3 pterms, 6 signals) nx1191.X2 = j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_8_.Q ; (1 pterm, 2 signals) nx1241 = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q # !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_3_.Q ) ; (2 pterms, 4 signals) nx1291 = !( !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_3_.Q # !j2c_reg_creg1hm_3_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_2_.Q ) ; (2 pterms, 4 signals) nx1334 = !( !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_4_.Q & nx1831 # !ni_nires_reg_data_out_17_.Q & j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q # !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & nx1831 # !ni_nires_reg_data_out_18_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q # !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & nx1831 & !ni_nires_reg_data_out_14_.Q # j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & nx1855 # !j2c_reg_creg0hm_1_.Q & j2c_reg_creg0hm_0_.Q & nx1881 ) ; (7 pterms, 12 signals) nx1461 = !( ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q & ID_0_7_.Q & ID_0_6_.Q & ID_0_5_.Q & ID_0_4_.Q ) ; (1 pterm, 8 signals) nx1531 = !( !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_3_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_1_0_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_3_1_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_3_2_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_1_1_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_1_2_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_3_3_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_1_3_.Q # !DIS_JTG & PRBSEN.Q & j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & SD2ANL.Q & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_reg_creg1hm_3_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg1hm_0_.Q ) ; (12 pterms, 17 signals) nx158 = TX_EN.Q & j2c_reg_creg1hm_3_.Q # !j2c_reg_creg1hm_3_.Q & ni_nires_reg_valid.Q ; (2 pterms, 3 signals) nx1596 = !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_2_6_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_2_5_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_6_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_5_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg0hm_6_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & j2c_reg_creg0hm_5_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_2_4_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & ID_0_4_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg0hm_4_.Q ; (9 pterms, 14 signals) nx1610 = ID_0_3_.Q & ID_0_2_.Q & ID_0_1_.Q & ID_0_0_.Q & ID_0_7_.Q & ID_0_6_.Q & ID_0_5_.Q & ID_0_4_.Q ; (1 pterm, 8 signals) nx1671 = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !nx1673 ) ; (1 pterm, 6 signals) nx1673 = !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_12_.Q # j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_11_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_11_.Q # j2c_reg_creg0hm_5_.Q & !ni_nires_reg_data_out_11_.Q ; (4 pterms, 5 signals) nx1715 = !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_14_.Q # j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_13_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_13_.Q ; (3 pterms, 4 signals) nx1769 = !( !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q & ni_nires_reg_data_out_13_.Q # !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & ni_nires_reg_data_out_13_.Q ) ; (2 pterms, 5 signals) nx1831 = !( !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_4_.Q & ni_nires_reg_data_out_15_.Q # !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & ni_nires_reg_data_out_15_.Q ) ; (2 pterms, 5 signals) nx1855.X1 = !ni_nires_reg_data_out_16_.Q & j2c_reg_creg0hm_7_.Q # ni_nires_reg_data_out_16_.Q & !ni_nires_reg_data_out_17_.Q & j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_4_.Q # !ni_nires_reg_data_out_16_.Q & ni_nires_reg_data_out_17_.Q & j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & j2c_reg_creg0hm_6_.Q & j2c_reg_creg0hm_4_.Q ; (3 pterms, 6 signals) nx1855.X2 = !ni_nires_reg_data_out_17_.Q & !j2c_reg_creg0hm_7_.Q ; (1 pterm, 2 signals) nx1868 = !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_1_6_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_3_6_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_1_5_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & ID_3_5_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg1hm_6_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & j2c_reg_creg1hm_5_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_1_4_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & ID_3_4_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg1hm_4_.Q ; (9 pterms, 14 signals) nx1881 = !ni_nires_reg_data_out_16_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q # !ni_nires_reg_data_out_16_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q # j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_15_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_15_.Q ; (4 pterms, 5 signals) nx1889.X1 = !ni_nires_reg_data_out_19_.Q & !j2c_reg_creg0hm_7_.Q # !ni_nires_reg_data_out_18_.Q & ni_nires_reg_data_out_19_.Q & !j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q # ni_nires_reg_data_out_18_.Q & !ni_nires_reg_data_out_19_.Q & !j2c_reg_creg0hm_5_.Q & j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !j2c_reg_creg0hm_4_.Q ; (3 pterms, 6 signals) nx1889.X2 = !ni_nires_reg_data_out_18_.Q & j2c_reg_creg0hm_7_.Q ; (1 pterm, 2 signals) nx2049 = !( !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_2_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_2_0_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_0_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_2_3_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_3_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_2_1_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & !j2c_reg_cmdreg_1_.Q & !j2c_reg_cmdreg_2_.Q & ID_0_1_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & j2c_reg_creg0hm_3_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg0hm_0_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & !j2c_bitcnt_1_.Q & j2c_bitcnt_0_.Q & j2c_reg_creg0hm_1_.Q # !DIS_JTG & j2c_reg_cmdreg_2_.Q & j2c_bitcnt_1_.Q & !j2c_bitcnt_0_.Q & j2c_reg_creg0hm_2_.Q ) ; (12 pterms, 17 signals) nx216 = DIS_JTG # jTCK & nx0 ; (2 pterms, 3 signals) nx595 = ni_nires_reg_new_cnt_0_.Q & !ni_nires_reg_old_cnt_0_.Q # !ni_nires_reg_new_cnt_0_.Q & ni_nires_reg_old_cnt_0_.Q # ni_nires_reg_old_cnt_1_.Q & !ni_nires_reg_new_cnt_1_.Q # !ni_nires_reg_old_cnt_1_.Q & ni_nires_reg_new_cnt_1_.Q ; (4 pterms, 4 signals) nx939 = !( !j2c_reg_creg1hm_3_.Q & !j2c_reg_creg0hm_1_.Q & !j2c_reg_creg0hm_0_.Q & !j2c_reg_creg0hm_3_.Q & !j2c_reg_creg0hm_2_.Q & !nx941 ) ; (1 pterm, 6 signals) nx941 = !ni_nires_reg_data_out_2_.Q & !j2c_reg_creg0hm_5_.Q & !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q # j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_1_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_1_.Q # j2c_reg_creg0hm_5_.Q & !ni_nires_reg_data_out_1_.Q ; (4 pterms, 5 signals) nx993 = !j2c_reg_creg0hm_7_.Q & !j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_4_.Q # j2c_reg_creg0hm_6_.Q & !ni_nires_reg_data_out_3_.Q # j2c_reg_creg0hm_7_.Q & !ni_nires_reg_data_out_3_.Q ; (3 pterms, 4 signals)