onerror {resume}
quietly WaveActivateNextPane {} 0
quietly virtual signal -install /top_testbench/top_pad_inst { /top_testbench/top_pad_inst/ni_p4_d_a(7 downto 0)} NI_P4_D
add wave -noupdate -divider PADS
add wave -noupdate -format Logic /top_testbench/top_pad_inst/rst_n
add wave -noupdate -format Logic /top_testbench/top_pad_inst/clk_dig_in_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/pretrigin_a
add wave -noupdate -format Literal /top_testbench/top_pad_inst/seb_oe
add wave -noupdate -format Literal /top_testbench/top_pad_inst/seb_do
add wave -noupdate -format Literal /top_testbench/top_pad_inst/seb_di
add wave -noupdate -divider J2C
add wave -noupdate -format Logic -height 16 -label TCK /top_testbench/top_pad_inst/seb_do(0)
add wave -noupdate -format Logic -height 16 -label TDI_TDO_OE /top_testbench/top_pad_inst/seb_oe(2)
add wave -noupdate -format Logic -height 16 -label TMS /top_testbench/top_pad_inst/seb_do(1)
add wave -noupdate -format Logic -height 16 -label TDO /top_testbench/top_pad_inst/seb_do(2)
add wave -noupdate -format Logic -height 16 -label TDI /top_testbench/top_pad_inst/seb_di(2)
add wave -noupdate -divider I2C
add wave -noupdate -format Logic -label SDA_o /top_testbench/top_pad_inst/sebd1
add wave -noupdate -format Logic -height 16 -label SDA_i /top_testbench/top_pad_inst/seb_di(2)
add wave -noupdate -format Logic /top_testbench/cpld/sda
add wave -noupdate -format Logic -label SCL_o /top_testbench/top_pad_inst/sebd0
add wave -noupdate -format Logic /top_testbench/cpld/scl
add wave -noupdate -divider TRAP
add wave -noupdate -format Logic /top_testbench/top_pad_inst/sebd2
add wave -noupdate -format Logic /top_testbench/top_pad_inst/out_rng
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ser0_din_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ser0_dout_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ser1_din_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ser1_dout_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/id_pad/chip_id_sdo
add wave -noupdate -format Logic /top_testbench/top_pad_inst/id_pad/chip_id_clk
add wave -noupdate -format Logic /top_testbench/top_pad_inst/id_pad/chip_id_sld
add wave -noupdate -format Literal /top_testbench/top_pad_inst/id_pad/par_in
add wave -noupdate -format Literal /top_testbench/top_pad_inst/id_pad/par_data
add wave -noupdate -divider CPLD
add wave -noupdate -format Logic -label CLK_TRAP(120MHz) /top_testbench/top_pad_inst/clk_adc_in_a
add wave -noupdate -format Literal -label NI_P4_D -radix hexadecimal /top_testbench/top_pad_inst/NI_P4_D
add wave -noupdate -format Logic -label NI_P4_STRB /top_testbench/top_pad_inst/ni_p4_strb_a
add wave -noupdate -format Logic -label CLK_CPLD(125MHz) /top_testbench/clk_cpld
add wave -noupdate -format Logic -label TX_EN /top_testbench/tx_en
add wave -noupdate -format Literal -label TX_DATA -radix hexadecimal /top_testbench/tx_data
add wave -noupdate -format Logic /top_testbench/ni_p4_strb_a_i
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/ni_p4_d_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ni_p4_ctrl_a
add wave -noupdate -format Logic /top_testbench/top_pad_inst/ni_p_ctrl_a
add wave -noupdate -divider I2C
add wave -noupdate -format Logic /top_testbench/dis_jtg
add wave -noupdate -format Logic /top_testbench/scl
add wave -noupdate -format Logic /top_testbench/sda
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/i2ct/reg_1
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/i2ct/reg_2
add wave -noupdate -divider {Global SM}
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_low_powr
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_test_chk
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_wait_pre
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_preproc
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_tr_proc
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_tr_send
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_wait_l1
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_zero_sp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_full_rd
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/st_clear_st
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/irq_acq
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/irq_tst
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/irq_raw
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/irq_clr
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/rst_n
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/start
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/clk
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/q
add wave -noupdate -format Literal /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/cnt
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/q_i
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/i2/old_start
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/en_clk_mimd
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/counter
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/slow_clk
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/cpu_done
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/slow_clk1
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/slow_clk2
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/slow_clk_pos
add wave -noupdate -format Literal /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/cntdrift
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/eodriftt
add wave -noupdate -divider GBUS
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_gbusw_tp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/ck/clk_gbusr_tp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/gbus_wr_e
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/gbus_addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/gbus_dout
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/gbus_d_in
add wave -noupdate -divider IMEM
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd0_tp
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem0addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem0dout
add wave -noupdate -format Literal -label {PRF of CPU0} -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/cpu0_inst/pipe2_inst/prf_inst1/prf_out
add wave -noupdate -format Literal -radix hexadecimal -expand /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/const_inst/cpu0constants
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/const_inst/common_consts
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd1_tp
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem1addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem1dout
add wave -noupdate -format Literal -label {PRF of CPU0} -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/cpu1_inst/pipe2_inst/prf_inst1/prf_out
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd2_tp
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem2addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem2dout
add wave -noupdate -format Literal -label {PRF of CPU0} -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/cpu2_inst/pipe2_inst/prf_inst1/prf_out
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd3_tp
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem3addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/imem3dout
add wave -noupdate -format Literal -label {PRF of CPU0} -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/mimd/cpu3_inst/pipe2_inst/prf_inst1/prf_out
add wave -noupdate -divider SCSN
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_addr
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_dout
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_din
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_ack
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_req
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/bus_we
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/chiprst_n
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/reset_n
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/clk
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/ser0_din
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/ser1_din
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/ser0_dout
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/net_int/ser1_dout
add wave -noupdate -divider GSM
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/start_sim
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/pretr_dec
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/pretrigg1
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/cmd_pretrig
add wave -noupdate -format Literal -radix unsigned /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/cpu_delay
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/cpu_en
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/prep_rdy
add wave -noupdate -format Literal -radix unsigned /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/cntdrift
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/slow_clk_pos
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd0_tp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd1_tp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd2_tp
add wave -noupdate -format Logic /top_testbench/top_pad_inst/itrap2top/clk_mimd3_tp
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/a_state
add wave -noupdate -format Literal -radix hexadecimal /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/s2/counter
add wave -noupdate -format Literal -expand /top_testbench/top_pad_inst/itrap2top/fl/cc/top_sm_inst/rej_state
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {0 ps} 0} {{Cursor 2} {51000 ps} 0} {{Cursor 3} {406120000 ps} 0} {{Cursor 4} {453115120 ps} 0}
WaveRestoreZoom {212572440 ps} {632433560 ps}
configure wave -namecolwidth 233
configure wave -valuecolwidth 40
configure wave -justifyvalue right
configure wave -signalnamewidth 2
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0