-------------------------------------------------------------------------------------- Timing Analyzer Summary -------------------------------------------------------------------------------------- Type : Worst-case tsu Slack : N/A Required Time : None Actual Time : 10.846 ns From : DUT_P4_D[3] To : gio_devices:gio|bus_dout_3 From Clock : -- To Clock : CLK_gen Failed Paths : 0 Type : Worst-case tco Slack : N/A Required Time : None Actual Time : 11.843 ns From : mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|data_out_to_pl To : WT_SER0_OUT From Clock : CLK_gen To Clock : -- Failed Paths : 0 Type : Worst-case tpd Slack : N/A Required Time : None Actual Time : 15.396 ns From : PC_SER1_IN To : WT_SER0_OUT From Clock : -- To Clock : -- Failed Paths : 0 Type : Worst-case th Slack : N/A Required Time : None Actual Time : 0.905 ns From : NI_TDO_dn To : jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|seribf_i_0 From Clock : -- To Clock : CLK_gen Failed Paths : 0 Type : Clock Setup: 'pll120:PLL|altpll:altpll_component|_clk0' Slack : 1.163 ns Required Time : 125.02 MHz ( period = 7.999 ns ) Actual Time : 146.28 MHz ( period = 6.836 ns ) From : mcm_nw_nwl:scsn_slave_nw_nwl|select_rq To : gio_devices:gio|bus_dout_10 From Clock : pll120:PLL|altpll:altpll_component|_clk0 To Clock : pll120:PLL|altpll:altpll_component|_clk0 Failed Paths : 0 Type : Clock Setup: 'DUT_P4_STR' Slack : 1.412 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : 151.79 MHz ( period = 6.588 ns ) From : ni2dpm_12:ni_ni_neg|data_1p_4 To : ni2dpm_12:ni_ni_neg|par_cnt_11 From Clock : DUT_P4_STR To Clock : DUT_P4_STR Failed Paths : 0 Type : Clock Setup: 'DUT_CLK[3]' Slack : 5.094 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : 344.12 MHz ( period = 2.906 ns ) From : clkpre_counter:cp|ccnt_count_en_3 To : clkpre_counter:cp|dout_ccnt_31 From Clock : DUT_CLK[3] To Clock : DUT_CLK[3] Failed Paths : 0 Type : Clock Setup: 'DUT_CLK[0]' Slack : 5.431 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : 389.26 MHz ( period = 2.569 ns ) From : clkpre_counter:cp|ccnt_count_en_0 To : clkpre_counter:cp|dout_ccnt_7 From Clock : DUT_CLK[0] To Clock : DUT_CLK[0] Failed Paths : 0 Type : Clock Setup: 'DUT_CLK[1]' Slack : 5.988 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : Restricted to 405.19 MHz ( period = 2.468 ns ) From : clkpre_counter:cp|ccnt_count_en_1 To : clkpre_counter:cp|dout_ccnt_15 From Clock : DUT_CLK[1] To Clock : DUT_CLK[1] Failed Paths : 0 Type : Clock Setup: 'DUT_CLK[2]' Slack : 5.988 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : Restricted to 405.19 MHz ( period = 2.468 ns ) From : clkpre_counter:cp|ccnt_count_en_2 To : clkpre_counter:cp|dout_ccnt_23 From Clock : DUT_CLK[2] To Clock : DUT_CLK[2] Failed Paths : 0 Type : Clock Hold: 'pll120:PLL|altpll:altpll_component|_clk0' Slack : -1.471 ns Required Time : 125.02 MHz ( period = 7.999 ns ) Actual Time : N/A From : jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|TMS To : jtag_master_2_notri:jtag_ni_dn_notri|shift_trap From Clock : pll120:PLL|altpll:altpll_component|_clk0 To Clock : pll120:PLL|altpll:altpll_component|_clk0 Failed Paths : 15 Type : Clock Hold: 'DUT_P4_STR' Slack : 0.804 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : N/A From : ni2dpm_12:ni_ni_neg|par_cnt_11 To : ni2dpm_12:ni_ni_neg|par_cnt_11 From Clock : DUT_P4_STR To Clock : DUT_P4_STR Failed Paths : 0 Type : Clock Hold: 'DUT_CLK[1]' Slack : 1.011 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : N/A From : clkpre_counter:cp|dout_ccnt_12 To : clkpre_counter:cp|dout_ccnt_12 From Clock : DUT_CLK[1] To Clock : DUT_CLK[1] Failed Paths : 0 Type : Clock Hold: 'DUT_CLK[2]' Slack : 1.011 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : N/A From : clkpre_counter:cp|dout_ccnt_20 To : clkpre_counter:cp|dout_ccnt_20 From Clock : DUT_CLK[2] To Clock : DUT_CLK[2] Failed Paths : 0 Type : Clock Hold: 'DUT_CLK[3]' Slack : 1.011 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : N/A From : clkpre_counter:cp|dout_ccnt_28 To : clkpre_counter:cp|dout_ccnt_28 From Clock : DUT_CLK[3] To Clock : DUT_CLK[3] Failed Paths : 0 Type : Clock Hold: 'DUT_CLK[0]' Slack : 1.016 ns Required Time : 125.00 MHz ( period = 8.000 ns ) Actual Time : N/A From : clkpre_counter:cp|dout_ccnt_4 To : clkpre_counter:cp|dout_ccnt_4 From Clock : DUT_CLK[0] To Clock : DUT_CLK[0] Failed Paths : 0 Type : Total number of failed paths Slack : Required Time : Actual Time : From : To : From Clock : To Clock : Failed Paths : 15 --------------------------------------------------------------------------------------