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Please refer to the -- applicable agreement for further details. --ix1486 is ix1486 --operation mode is normal ix1486 = ser0_out & (G1_sw_sel_2 & G1_sw_sel_1 & G1_sw_sel_0 # !G1_sw_sel_2 & (G1_sw_sel_1 $ G1_sw_sel_0)); --ix1487 is ix1487 --operation mode is normal ix1487 = nx1588 # nx1589 # b_3 & !scsn_sw_ix89_ix7_nx8; --B1_NOT_modgen_eq_720_nx52 is clkpre_counter:cp|NOT_modgen_eq_720_nx52 --operation mode is normal B1_NOT_modgen_eq_720_nx52 = B1_nx873 & B1_nx874 & (B1_c_time_12 $ !B1_ptimer_12); --B1_NOT_ctrl_ni is clkpre_counter:cp|NOT_ctrl_ni --operation mode is normal B1_NOT_ctrl_ni = DFFEAS(B1_NOT_modgen_eq_720_nx52, X1__clk0, J1_chipRST_n, , B1_NOT_nx1443, , , , ); --B1_AD_SYNC_OUT is clkpre_counter:cp|AD_SYNC_OUT --operation mode is normal B1_AD_SYNC_OUT = PC_1_IN # R1_PRE; --D1_EN1 is jtag_master_1_notri:jtag_dut_notri|EN1 --operation mode is normal D1_EN1_lut_out = N1_request_29; D1_EN1 = DFFEAS(D1_EN1_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --ix1477 is ix1477 --operation mode is normal ix1477 = G1_ni_jtag_mode & G1_ni_ctrl_jtag # !G1_ni_jtag_mode & (!B1_NOT_ctrl_ni); --ix1478 is ix1478 --operation mode is normal ix1478 = nx1586 & ser0_out # !nx1586 & (G1_sw_sel_3); --ix1479 is ix1479 --operation mode is normal ix1479 = NI_SER1_IN & (NOT_scsn_sw_ix89_ix13_nx8 # PC_SER1_IN & NOT_scsn_sw_ix89_ix15_nx8) # !NI_SER1_IN & PC_SER1_IN & (NOT_scsn_sw_ix89_ix15_nx8); --X1__clk0 is pll120:PLL|altpll:altpll_component|_clk0 X1__clk0 = PLL.CLK0(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(GND), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(CLK_gen), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA()); --X1__extclk0 is pll120:PLL|altpll:altpll_component|_extclk0 X1__extclk0 = PLL.EXTCLK0(.FBIN(), .ENA(), .CLKSWITCH(), .ARESET(GND), .PFDENA(), .SCANCLK(), .SCANACLR(), .SCANDATA(), .COMPARATOR(), .INCLK(CLK_gen), .INCLK(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .CLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA(), .EXTCLKENA()); --E2_EN1 is jtag_master_2_notri:jtag_ni_up_notri|EN1 --operation mode is normal E2_EN1_lut_out = N1_request_29; E2_EN1 = DFFEAS(E2_EN1_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --E2_EN2 is jtag_master_2_notri:jtag_ni_up_notri|EN2 --operation mode is normal E2_EN2_lut_out = N1_request_28; E2_EN2 = DFFEAS(E2_EN2_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --E1_EN1 is jtag_master_2_notri:jtag_ni_dn_notri|EN1 --operation mode is normal E1_EN1_lut_out = N1_request_29; E1_EN1 = DFFEAS(E1_EN1_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --E1_EN2 is jtag_master_2_notri:jtag_ni_dn_notri|EN2 --operation mode is normal E1_EN2_lut_out = N1_request_28; E1_EN2 = DFFEAS(E1_EN2_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --G1_NOT_ni_irq_n is general_config_notri:nic_notri|NOT_ni_irq_n --operation mode is normal G1_NOT_ni_irq_n_lut_out = G1_ni_ir_irq_sm_0; G1_NOT_ni_irq_n = DFFEAS(G1_NOT_ni_irq_n_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_NI_PRE is clkpre_counter:cp|NI_PRE --operation mode is normal B1_NI_PRE = PC_1_IN # R1_PRE # B1_p_sm; --G1_ni_rst_n is general_config_notri:nic_notri|ni_rst_n --operation mode is arithmetic G1_ni_rst_n_carry_eqn = G1_ni_ir_cnt_rst_nx46; G1_ni_rst_n_lut_out = G1_ni_rst_n $ (G1_ni_rst_n_carry_eqn); G1_ni_rst_n = DFFEAS(G1_ni_rst_n_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx50 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx50 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx50 = CARRY(!G1_ni_ir_cnt_rst_nx46 # !G1_ni_rst_n); --ix1484 is ix1484 --operation mode is normal ix1484 = nx1590 # nx1591 # ser0_out & !scsn_sw_ix89_ix9_nx8; --ix1485 is ix1485 --operation mode is normal ix1485 = PC_SER1_IN & !G1_sw_sel_0 & (G1_sw_sel_2 # G1_sw_sel_1); --ix1488 is ix1488 --operation mode is normal ix1488 = nx1595 & (G1_sw_sel_0 # nx1581); --ix1489 is ix1489 --operation mode is normal ix1489 = N1_bridge & M1_data_out_to_pl # !N1_bridge & (M2_data_out_to_pl); --ix1482 is ix1482 --operation mode is normal ix1482 = G1_ni_oase_mode & !G1_NOT_ni_sel_p_0 # !G1_ni_oase_mode & (X1__clk0); --ix1483 is ix1483 --operation mode is normal ix1483 = G1_ni_oase_mode & G1_ni_sel_p_1 # !G1_ni_oase_mode & (B1_NI_PRE); --ix1480 is ix1480 --operation mode is normal ix1480 = nx1579 # nx1580 # !scsn_sw_nx84 & nx1592; --ix1481 is ix1481 --operation mode is normal ix1481 = G1_ni_oase_mode & !G1_NOT_ni_sel_p_3 # !G1_ni_oase_mode & (b_2 # !scsn_sw_nx84); --ser0_out is ser0_out --operation mode is normal ser0_out = N1_bridge & (M2_data_out_to_pl) # !N1_bridge & M1_data_out_to_pl; --G1_sw_sel_2 is general_config_notri:nic_notri|sw_sel_2 --operation mode is normal G1_sw_sel_2_lut_out = N1_request_29; G1_sw_sel_2 = DFFEAS(G1_sw_sel_2_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --G1_sw_sel_1 is general_config_notri:nic_notri|sw_sel_1 --operation mode is normal G1_sw_sel_1_lut_out = N1_request_30; G1_sw_sel_1 = DFFEAS(G1_sw_sel_1_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --G1_sw_sel_0 is general_config_notri:nic_notri|sw_sel_0 --operation mode is normal G1_sw_sel_0_lut_out = N1_request_31; G1_sw_sel_0 = DFFEAS(G1_sw_sel_0_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --b_3 is b_3 --operation mode is normal b_3 = WT_SER1_IN $ G1_sw_sel_5; --scsn_sw_ix89_ix7_nx8 is scsn_sw_ix89_ix7_nx8 --operation mode is normal scsn_sw_ix89_ix7_nx8 = !G1_sw_sel_0 # !G1_sw_sel_1 # !G1_sw_sel_2; --nx1588 is nx1588 --operation mode is normal nx1588 = PC_SER1_IN & !G1_sw_sel_2 & !G1_sw_sel_1 & G1_sw_sel_0; --nx1589 is nx1589 --operation mode is normal nx1589 = NI_SER1_IN & !G1_sw_sel_2 & G1_sw_sel_1 & !G1_sw_sel_0; --B1_c_time_12 is clkpre_counter:cp|c_time_12 --operation mode is normal B1_c_time_12_lut_out = N1_request_19; B1_c_time_12 = DFFEAS(B1_c_time_12_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_12 is clkpre_counter:cp|ptimer_12 --operation mode is normal B1_ptimer_12_lut_out = B1_nx1323; B1_ptimer_12 = DFFEAS(B1_ptimer_12_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_nx873 is clkpre_counter:cp|nx873 --operation mode is normal B1_nx873 = B1_nx877 & B1_nx878 & B1_nx879 & B1_nx880; --B1_nx874 is clkpre_counter:cp|nx874 --operation mode is normal B1_nx874 = B1_nx875 & B1_nx876 & (B1_c_time_13 $ !B1_ptimer_13); --J1_chipRST_n is mcm_nw_apl:scsn_slave_nw_apl|chipRST_n --operation mode is normal J1_chipRST_n_lut_out = J1_current_state_2 # !J1_current_state_0 # !J1_current_state_1 # !J1_current_state_3; J1_chipRST_n = DFFEAS(J1_chipRST_n_lut_out, X1__clk0, VCC, , , , , , ); --B1_NOT_nx1443 is clkpre_counter:cp|NOT_nx1443 --operation mode is normal B1_NOT_nx1443 = B1_nx1314 # B1_NOT_modgen_eq_720_nx52 # B1_nx845 & B1_nx846; --R1_PRE is clkpre_counter:cp|pre_enc:pend|PRE --operation mode is normal R1_PRE_lut_out = R1_FUNC_s_2 # R1_FUNC_s_1 # R1_FUNC_s_0; R1_PRE = DFFEAS(R1_PRE_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, R1_shiftd_5, , , R1_send_sm); --N1_request_29 is mcm_nw_nwl:scsn_slave_nw_nwl|request_29 --operation mode is normal N1_request_29 = N1_select_rq & (L2_data_out_29) # !N1_select_rq & L1_data_out_29; --D1_we_cfr is jtag_master_1_notri:jtag_dut_notri|we_cfr --operation mode is normal D1_we_cfr = !N1_request_43 & C1_ce_dut_jtg & !J1_rd_wr_oase & D1_nx222; --G1_ni_jtag_mode is general_config_notri:nic_notri|ni_jtag_mode --operation mode is normal G1_ni_jtag_mode_lut_out = G1_ni_jtag_mode; G1_ni_jtag_mode = DFFEAS(G1_ni_jtag_mode_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_21, , , G1_nx10); --G1_ni_ctrl_jtag is general_config_notri:nic_notri|ni_ctrl_jtag --operation mode is normal G1_ni_ctrl_jtag_lut_out = G1_ni_ctrl_jtag; G1_ni_ctrl_jtag = DFFEAS(G1_ni_ctrl_jtag_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_22, , , G1_nx10); --G1_sw_sel_3 is general_config_notri:nic_notri|sw_sel_3 --operation mode is normal G1_sw_sel_3_lut_out = N1_request_28; G1_sw_sel_3 = DFFEAS(G1_sw_sel_3_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --nx1586 is nx1586 --operation mode is normal nx1586 = G1_sw_sel_2 & !G1_sw_sel_1 & !G1_sw_sel_0 # !G1_sw_sel_2 & G1_sw_sel_1 & G1_sw_sel_0; --NOT_scsn_sw_ix89_ix13_nx8 is NOT_scsn_sw_ix89_ix13_nx8 --operation mode is normal NOT_scsn_sw_ix89_ix13_nx8 = G1_sw_sel_2 & !G1_sw_sel_1 & !G1_sw_sel_0; --NOT_scsn_sw_ix89_ix15_nx8 is NOT_scsn_sw_ix89_ix15_nx8 --operation mode is normal NOT_scsn_sw_ix89_ix15_nx8 = !G1_sw_sel_2 & G1_sw_sel_1 & G1_sw_sel_0; --E2_we_cfr is jtag_master_2_notri:jtag_ni_up_notri|we_cfr --operation mode is normal E2_we_cfr = !N1_request_43 & C1_ce_ni_jtg_up & !J1_rd_wr_oase & E2_nx219; --N1_request_28 is mcm_nw_nwl:scsn_slave_nw_nwl|request_28 --operation mode is normal N1_request_28 = N1_select_rq & (L2_data_out_28) # !N1_select_rq & L1_data_out_28; --E1_we_cfr is jtag_master_2_notri:jtag_ni_dn_notri|we_cfr --operation mode is normal E1_we_cfr = !N1_request_43 & C1_ce_ni_jtg_dn & !J1_rd_wr_oase & E1_nx219; --G1_ni_ir_irq_sm_0 is general_config_notri:nic_notri|ni_ir_irq_sm_0 --operation mode is normal G1_ni_ir_irq_sm_0_lut_out = G1_ni_ir_irq_sm_0 & (G1_ni_ir_modgen_eq_830_nx4) # !G1_ni_ir_irq_sm_0 & !G1_nx623 & !G1_ni_ir_irq_sm_1; G1_ni_ir_irq_sm_0 = DFFEAS(G1_ni_ir_irq_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_p_sm is clkpre_counter:cp|p_sm --operation mode is normal B1_p_sm_lut_out = !B1_p_sm2; B1_p_sm = DFFEAS(B1_p_sm_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1980, , , , ); --G1_nx618 is general_config_notri:nic_notri|nx618 --operation mode is normal G1_nx618_lut_out = !G1_nx108; G1_nx618 = DFFEAS(G1_nx618_lut_out, X1__clk0, J1_chipRST_n, , , G1L043, , , !G1_nx428); --G1_ni_ir_cnt_rst_6 is general_config_notri:nic_notri|ni_ir_cnt_rst_6 --operation mode is arithmetic G1_ni_ir_cnt_rst_6_carry_eqn = G1_ni_ir_cnt_rst_nx41; G1_ni_ir_cnt_rst_6_lut_out = G1_ni_ir_cnt_rst_6 $ (!G1_ni_ir_cnt_rst_6_carry_eqn); G1_ni_ir_cnt_rst_6 = DFFEAS(G1_ni_ir_cnt_rst_6_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx46 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx46 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx46 = CARRY(G1_ni_ir_cnt_rst_6 & (!G1_ni_ir_cnt_rst_nx41)); --scsn_sw_ix89_ix9_nx8 is scsn_sw_ix89_ix9_nx8 --operation mode is normal scsn_sw_ix89_ix9_nx8 = G1_sw_sel_0 # !G1_sw_sel_1 # !G1_sw_sel_2; --nx1590 is nx1590 --operation mode is normal nx1590 = AD_SER0_IN & !G1_sw_sel_2 & G1_sw_sel_1 & !G1_sw_sel_0; --nx1591 is nx1591 --operation mode is normal nx1591 = DUT_SER0_IN & G1_sw_sel_2 & !G1_sw_sel_1 & !G1_sw_sel_0; --nx1581 is nx1581 --operation mode is normal nx1581 = G1_sw_sel_2 & !NI_SER0_IN # !G1_sw_sel_2 & (G1_sw_sel_1 & !NI_SER0_IN # !G1_sw_sel_1 & (ser0_out)); --nx1595 is nx1595 --operation mode is normal nx1595 = nx1594 & (WT_SER0_IN # !G1_sw_sel_2) # !G1_sw_sel_0; --N1_bridge is mcm_nw_nwl:scsn_slave_nw_nwl|bridge --operation mode is normal N1_bridge_lut_out = N1_bridge_buffered; N1_bridge = DFFEAS(N1_bridge_lut_out, X1__clk0, VCC, , N1_nx777, , , , ); --M1_data_out_to_pl is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|data_out_to_pl --operation mode is normal M1_data_out_to_pl_lut_out = M1_d_2pl_buf & (M1_current_state_1 # !M1_current_state_2 & M1_current_state_0); M1_data_out_to_pl = DFFEAS(M1_data_out_to_pl_lut_out, X1__clk0, VCC, , , , , , ); --M2_data_out_to_pl is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|data_out_to_pl --operation mode is normal M2_data_out_to_pl_lut_out = M2_d_2pl_buf & (M2_current_state_1 # !M2_current_state_2 & M2_current_state_0); M2_data_out_to_pl = DFFEAS(M2_data_out_to_pl_lut_out, X1__clk0, VCC, , , , , , ); --G1_ni_oase_mode is general_config_notri:nic_notri|ni_oase_mode --operation mode is normal G1_ni_oase_mode_lut_out = G1_ni_oase_mode; G1_ni_oase_mode = DFFEAS(G1_ni_oase_mode_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_23, , , G1_nx10); --G1_NOT_ni_sel_p_0 is general_config_notri:nic_notri|NOT_ni_sel_p_0 --operation mode is normal G1_NOT_ni_sel_p_0_lut_out = !N1_request_27; G1_NOT_ni_sel_p_0 = DFFEAS(G1_NOT_ni_sel_p_0_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --G1_ni_sel_p_1 is general_config_notri:nic_notri|ni_sel_p_1 --operation mode is normal G1_ni_sel_p_1_lut_out = N1_request_26; G1_ni_sel_p_1 = DFFEAS(G1_ni_sel_p_1_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --nx1579 is nx1579 --operation mode is normal nx1579 = AD_SER0_IN & !G1_ni_oase_mode & !scsn_sw_ix89_ix7_nx8; --nx1580 is nx1580 --operation mode is normal nx1580 = G1_ni_oase_mode & (G1_ni_sel_p_2) # !G1_ni_oase_mode & ser0_out & (!scsn_sw_ix89_ix11_nx8); --scsn_sw_nx84 is scsn_sw_nx84 --operation mode is normal scsn_sw_nx84 = G1_sw_sel_2 & G1_sw_sel_0; --nx1592 is nx1592 --operation mode is normal nx1592 = !G1_ni_oase_mode & G1_sw_sel_3; --G1_NOT_ni_sel_p_3 is general_config_notri:nic_notri|NOT_ni_sel_p_3 --operation mode is normal G1_NOT_ni_sel_p_3_lut_out = !N1_request_24; G1_NOT_ni_sel_p_3 = DFFEAS(G1_NOT_ni_sel_p_3_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --b_2 is b_2 --operation mode is normal b_2 = PC_SER1_IN $ G1_sw_sel_4; --G1_NOT_nx915 is general_config_notri:nic_notri|NOT_nx915 --operation mode is normal G1_NOT_nx915 = C1_ce_gen & !J1_rd_wr_oase & !G1_ix69_ix38_nx8 & !G1_ix69_ix38_nx10; --N1_request_30 is mcm_nw_nwl:scsn_slave_nw_nwl|request_30 --operation mode is normal N1_request_30 = N1_select_rq & (L2_data_out_30) # !N1_select_rq & L1_data_out_30; --N1_request_31 is mcm_nw_nwl:scsn_slave_nw_nwl|request_31 --operation mode is normal N1_request_31 = N1_select_rq & (L2_data_out_31) # !N1_select_rq & L1_data_out_31; --N1_bridge_buffered is mcm_nw_nwl:scsn_slave_nw_nwl|bridge_buffered --operation mode is normal N1_bridge_buffered = DFFEAS(N1_request_31, X1__clk0, VCC, , N1_nx771, , , , ); --G1_sw_sel_5 is general_config_notri:nic_notri|sw_sel_5 --operation mode is normal G1_sw_sel_5_lut_out = N1_request_26; G1_sw_sel_5 = DFFEAS(G1_sw_sel_5_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --N1_request_19 is mcm_nw_nwl:scsn_slave_nw_nwl|request_19 --operation mode is normal N1_request_19 = N1_select_rq & (L2_data_out_19) # !N1_select_rq & L1_data_out_19; --B1_NOT_nx780 is clkpre_counter:cp|NOT_nx780 --operation mode is normal B1_NOT_nx780 = C1_ce_cp & !J1_rd_wr_oase & B1_nx800; --B1_nx1323 is clkpre_counter:cp|nx1323 --operation mode is arithmetic B1_nx1323_carry_eqn = B1_result_inc_716_nx80; B1_nx1323 = B1_ptimer_12 $ (!B1_nx1323_carry_eqn); --B1_result_inc_716_nx84 is clkpre_counter:cp|result_inc_716_nx84 --operation mode is arithmetic B1_result_inc_716_nx84 = CARRY(B1_ptimer_12 & (!B1_result_inc_716_nx80)); --B1_nx1314 is clkpre_counter:cp|nx1314 --operation mode is normal B1_nx1314 = Q1_PTRGG # Q1_FUNC_3; --B1_nx1958 is clkpre_counter:cp|nx1958 --operation mode is normal B1_nx1958 = B1_nx719 # B1_nx889 # B1_nx890 # !B1_ptimer_11; --B1_nx877 is clkpre_counter:cp|nx877 --operation mode is normal B1_nx877 = B1_c_time_7 & B1_ptimer_7 & (B1_c_time_6 $ !B1_ptimer_6) # !B1_c_time_7 & !B1_ptimer_7 & (B1_c_time_6 $ !B1_ptimer_6); --B1_nx878 is clkpre_counter:cp|nx878 --operation mode is normal B1_nx878 = B1_c_time_5 & B1_ptimer_5 & (B1_c_time_4 $ !B1_ptimer_4) # !B1_c_time_5 & !B1_ptimer_5 & (B1_c_time_4 $ !B1_ptimer_4); --B1_nx879 is clkpre_counter:cp|nx879 --operation mode is normal B1_nx879 = B1_c_time_3 & B1_ptimer_3 & (B1_c_time_1 $ !B1_ptimer_1) # !B1_c_time_3 & !B1_ptimer_3 & (B1_c_time_1 $ !B1_ptimer_1); --B1_nx880 is clkpre_counter:cp|nx880 --operation mode is normal B1_nx880 = B1_c_time_2 & !B1_nx437 & (B1_c_time_0 $ !B1_ptimer_0) # !B1_c_time_2 & B1_nx437 & (B1_c_time_0 $ !B1_ptimer_0); --B1_c_time_13 is clkpre_counter:cp|c_time_13 --operation mode is normal B1_c_time_13_lut_out = N1_request_18; B1_c_time_13 = DFFEAS(B1_c_time_13_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_13 is clkpre_counter:cp|ptimer_13 --operation mode is normal B1_ptimer_13_lut_out = B1_nx1322; B1_ptimer_13 = DFFEAS(B1_ptimer_13_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_nx875 is clkpre_counter:cp|nx875 --operation mode is normal B1_nx875 = B1_c_time_11 & B1_ptimer_11 & (B1_c_time_10 $ !B1_ptimer_10) # !B1_c_time_11 & !B1_ptimer_11 & (B1_c_time_10 $ !B1_ptimer_10); --B1_nx876 is clkpre_counter:cp|nx876 --operation mode is normal B1_nx876 = B1_c_time_9 & B1_ptimer_9 & (B1_c_time_8 $ !B1_ptimer_8) # !B1_c_time_9 & !B1_ptimer_9 & (B1_c_time_8 $ !B1_ptimer_8); --J1_current_state_3 is mcm_nw_apl:scsn_slave_nw_apl|current_state_3 --operation mode is normal J1_current_state_3_lut_out = N1_request_valid & (J1_nx406) # !N1_request_valid & J1_current_state_0 & (J1_nx408); J1_current_state_3 = DFFEAS(J1_current_state_3_lut_out, X1__clk0, VCC, , , , , , ); --J1_current_state_2 is mcm_nw_apl:scsn_slave_nw_apl|current_state_2 --operation mode is normal J1_current_state_2_lut_out = J1_nx416 # J1_nx427 # J1_nx420 & J1_nx428; J1_current_state_2 = DFFEAS(J1_current_state_2_lut_out, X1__clk0, VCC, , J1_nx400, , , , ); --J1_current_state_1 is mcm_nw_apl:scsn_slave_nw_apl|current_state_1 --operation mode is normal J1_current_state_1_lut_out = J1_current_state_0 & (J1_nx423) # !J1_current_state_0 & N1_request_valid & J1_nx421; J1_current_state_1 = DFFEAS(J1_current_state_1_lut_out, X1__clk0, VCC, , J1_nx404, , , , ); --J1_current_state_0 is mcm_nw_apl:scsn_slave_nw_apl|current_state_0 --operation mode is normal J1_current_state_0_lut_out = J1_nx409 # J1_nx414 & (J1_current_state_2 # J1_current_state_1); J1_current_state_0 = DFFEAS(J1_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --B1_nx845 is clkpre_counter:cp|nx845 --operation mode is normal B1_nx845 = B1_ptimer_9 & B1_ptimer_8 & B1_ptimer_7 & B1_ptimer_6; --B1_nx846 is clkpre_counter:cp|nx846 --operation mode is normal B1_nx846 = B1_ptimer_0 & !B1_nx437 & B1_nx789 & B1_nx790; --R1_FUNC_s_2 is clkpre_counter:cp|pre_enc:pend|FUNC_s_2 --operation mode is normal R1_FUNC_s_2_lut_out = N1_request_29; R1_FUNC_s_2 = DFFEAS(R1_FUNC_s_2_lut_out, X1__clk0, R1_done_n, , B1_WE_pre, R1_FUNC_s_2, , , R1_WE_s); --R1_FUNC_s_1 is clkpre_counter:cp|pre_enc:pend|FUNC_s_1 --operation mode is normal R1_FUNC_s_1_lut_out = N1_request_30; R1_FUNC_s_1 = DFFEAS(R1_FUNC_s_1_lut_out, X1__clk0, R1_done_n, , B1_WE_pre, R1_FUNC_s_1, , , R1_WE_s); --R1_shiftd_5 is clkpre_counter:cp|pre_enc:pend|shiftd_5 --operation mode is normal R1_shiftd_5_lut_out = R1_FUNC_s_2 # R1_FUNC_s_1; R1_shiftd_5 = DFFEAS(R1_shiftd_5_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, R1_shiftd_4, , , R1_send_sm); --R1_FUNC_s_0 is clkpre_counter:cp|pre_enc:pend|FUNC_s_0 --operation mode is normal R1_FUNC_s_0_lut_out = N1_request_31; R1_FUNC_s_0 = DFFEAS(R1_FUNC_s_0_lut_out, X1__clk0, R1_done_n, , B1_WE_pre, R1_FUNC_s_0, , , R1_WE_s); --R1_send_sm is clkpre_counter:cp|pre_enc:pend|send_sm --operation mode is normal R1_send_sm_lut_out = R1_send_sm & (R1_nx88 # !R1_NOT_bitcnt_1) # !R1_send_sm & R1_WE_c; R1_send_sm = DFFEAS(R1_send_sm_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --R1_NOT_nx184 is clkpre_counter:cp|pre_enc:pend|NOT_nx184 --operation mode is normal R1_NOT_nx184 = R1_send_sm & (R1_counter_nx12 & R1_counter_nx20) # !R1_send_sm & R1_WE_c; --L1_data_out_29 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_29 --operation mode is normal L1_data_out_29_lut_out = L1_data_out_28; L1_data_out_29 = DFFEAS(L1_data_out_29_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_29 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_29 --operation mode is normal L2_data_out_29_lut_out = L2_data_out_28; L2_data_out_29 = DFFEAS(L2_data_out_29_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_select_rq is mcm_nw_nwl:scsn_slave_nw_nwl|select_rq --operation mode is normal N1_select_rq_lut_out = N1_nx223 # !N1_current_state_0 & Y2_request_valid & !N1_nx232; N1_select_rq = DFFEAS(N1_select_rq_lut_out, X1__clk0, VCC, , , , , , ); --N1_request_43 is mcm_nw_nwl:scsn_slave_nw_nwl|request_43 --operation mode is normal N1_request_43 = N1_select_rq & (L2_data_out_43) # !N1_select_rq & L1_data_out_43; --C1_ce_dut_jtg is gio_devices:gio|ce_dut_jtg --operation mode is normal C1_ce_dut_jtg_lut_out = !N1_request_37 & !N1_request_38 & !C1_modgen_eq_861_nx26 & C1_nx303; C1_ce_dut_jtg = DFFEAS(C1_ce_dut_jtg_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --J1_rd_wr_oase is mcm_nw_apl:scsn_slave_nw_apl|rd_wr_oase --operation mode is normal J1_rd_wr_oase_lut_out = N1_request_52 # N1_request_50 # !N1_request_49 # !N1_request_51; J1_rd_wr_oase = DFFEAS(J1_rd_wr_oase_lut_out, X1__clk0, VCC, , , , , , ); --D1_nx222 is jtag_master_1_notri:jtag_dut_notri|nx222 --operation mode is normal D1_nx222 = N1_request_42 & N1_request_41; --N1_request_21 is mcm_nw_nwl:scsn_slave_nw_nwl|request_21 --operation mode is normal N1_request_21 = N1_select_rq & (L2_data_out_21) # !N1_select_rq & L1_data_out_21; --G1_nx10 is general_config_notri:nic_notri|nx10 --operation mode is normal G1_nx10 = N1_request_44 & !N1_request_43 & !N1_request_42 & !N1_request_41; --G1_nx428 is general_config_notri:nic_notri|nx428 --operation mode is normal G1_nx428 = C1_ce_gen & !J1_rd_wr_oase; --N1_request_22 is mcm_nw_nwl:scsn_slave_nw_nwl|request_22 --operation mode is normal N1_request_22 = N1_select_rq & (L2_data_out_22) # !N1_select_rq & L1_data_out_22; --C1_ce_ni_jtg_up is gio_devices:gio|ce_ni_jtg_up --operation mode is normal C1_ce_ni_jtg_up_lut_out = !N1_request_37 & !N1_request_38 & !C1_modgen_eq_861_nx26 & C1_nx301; C1_ce_ni_jtg_up = DFFEAS(C1_ce_ni_jtg_up_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --E2_nx219 is jtag_master_2_notri:jtag_ni_up_notri|nx219 --operation mode is normal E2_nx219 = N1_request_42 & N1_request_41; --L1_data_out_28 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_28 --operation mode is normal L1_data_out_28_lut_out = L1_data_out_27; L1_data_out_28 = DFFEAS(L1_data_out_28_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_28 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_28 --operation mode is normal L2_data_out_28_lut_out = L2_data_out_27; L2_data_out_28 = DFFEAS(L2_data_out_28_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_ce_ni_jtg_dn is gio_devices:gio|ce_ni_jtg_dn --operation mode is normal C1_ce_ni_jtg_dn_lut_out = !N1_request_37 & !N1_request_38 & !C1_modgen_eq_861_nx26 & C1_nx302; C1_ce_ni_jtg_dn = DFFEAS(C1_ce_ni_jtg_dn_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --E1_nx219 is jtag_master_2_notri:jtag_ni_dn_notri|nx219 --operation mode is normal E1_nx219 = N1_request_42 & N1_request_41; --G1_nx623 is general_config_notri:nic_notri|nx623 --operation mode is normal G1_nx623_lut_out = !G1_nx114; G1_nx623 = DFFEAS(G1_nx623_lut_out, X1__clk0, J1_chipRST_n, , , G1L043, , , !G1_nx428); --G1_ni_ir_irq_sm_1 is general_config_notri:nic_notri|ni_ir_irq_sm_1 --operation mode is normal G1_ni_ir_irq_sm_1_lut_out = G1_ni_ir_cnt_irq_1 & G1_ni_ir_cnt_irq_0 & G1_ni_ir_irq_sm_0; G1_ni_ir_irq_sm_1 = DFFEAS(G1_ni_ir_irq_sm_1_lut_out, X1__clk0, J1_chipRST_n, , G1_nx432, , , , ); --G1_ni_ir_modgen_eq_830_nx4 is general_config_notri:nic_notri|ni_ir_modgen_eq_830_nx4 --operation mode is normal G1_ni_ir_modgen_eq_830_nx4 = !G1_ni_ir_cnt_irq_0 # !G1_ni_ir_cnt_irq_1; --B1_p_sm2 is clkpre_counter:cp|p_sm2 --operation mode is normal B1_p_sm2_lut_out = B1_p_sm1; B1_p_sm2 = DFFEAS(B1_p_sm2_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_nx1980 is clkpre_counter:cp|nx1980 --operation mode is normal B1_nx1980 = B1_p_sm2 # B1_nx791 # B1_nx792 # B1_nx793; --G1_nx108 is general_config_notri:nic_notri|nx108 --operation mode is normal G1_nx108 = !N1_request_44 & N1_request_43 & !N1_request_48 & !G1_ix69_ix38_nx10; --G1_ni_ir_cnt_rst_5 is general_config_notri:nic_notri|ni_ir_cnt_rst_5 --operation mode is arithmetic G1_ni_ir_cnt_rst_5_carry_eqn = G1_ni_ir_cnt_rst_nx34; G1_ni_ir_cnt_rst_5_lut_out = G1_ni_ir_cnt_rst_5 $ (G1_ni_ir_cnt_rst_5_carry_eqn); G1_ni_ir_cnt_rst_5 = DFFEAS(G1_ni_ir_cnt_rst_5_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx41 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx41 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx41 = CARRY(!G1_ni_ir_cnt_rst_nx34 # !G1_ni_ir_cnt_rst_5); --nx1594 is nx1594 --operation mode is normal nx1594 = G1_sw_sel_2 # G1_sw_sel_1 & DUT_SER0_IN # !G1_sw_sel_1 & (AD_SER0_IN); --N1_nx777 is mcm_nw_nwl:scsn_slave_nw_nwl|nx777 --operation mode is normal N1_nx777 = N1_current_state_2 & (N1_current_state_1 $ N1_current_state_0); --M1_current_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|current_state_2 --operation mode is normal M1_current_state_2_lut_out = NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty & !M1_current_state_0 & M1_nx218 & M1_nx219; M1_current_state_2 = DFFEAS(M1_current_state_2_lut_out, X1__clk0, VCC, , M1_nx217, , , , ); --M1_current_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|current_state_1 --operation mode is normal M1_current_state_1_lut_out = !M1_current_state_2 & (M1_current_state_0 # M1_current_state_1 & M1_nx227); M1_current_state_1 = DFFEAS(M1_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --M1_current_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|current_state_0 --operation mode is normal M1_current_state_0_lut_out = M1_nx228 # M1_current_state_0 & (!M1_nx229) # !M1_current_state_0 & M1_nx220; M1_current_state_0 = DFFEAS(M1_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --M1_d_2pl_buf is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|d_2pl_buf --operation mode is normal M1_d_2pl_buf_lut_out = M1_nx225 # scsn_slave_nw_dll_ob0_data & M1_nx220 & M1_nx226; M1_d_2pl_buf = DFFEAS(M1_d_2pl_buf_lut_out, X1__clk0, VCC, , M1_stuff_in_nx120, , , , ); --M2_current_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|current_state_2 --operation mode is normal M2_current_state_2_lut_out = NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty & !M2_current_state_0 & M2_nx218 & M2_nx219; M2_current_state_2 = DFFEAS(M2_current_state_2_lut_out, X1__clk0, VCC, , M2_nx217, , , , ); --M2_current_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|current_state_1 --operation mode is normal M2_current_state_1_lut_out = !M2_current_state_2 & (M2_current_state_0 # M2_current_state_1 & M2_nx227); M2_current_state_1 = DFFEAS(M2_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --M2_current_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|current_state_0 --operation mode is normal M2_current_state_0_lut_out = M2_nx228 # M2_current_state_0 & (!M2_nx229) # !M2_current_state_0 & M2_nx220; M2_current_state_0 = DFFEAS(M2_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --M2_d_2pl_buf is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|d_2pl_buf --operation mode is normal M2_d_2pl_buf_lut_out = M2_nx225 # scsn_slave_nw_dll_ob1_data & M2_nx220 & M2_nx226; M2_d_2pl_buf = DFFEAS(M2_d_2pl_buf_lut_out, X1__clk0, VCC, , M2_stuff_in_nx120, , , , ); --N1_request_23 is mcm_nw_nwl:scsn_slave_nw_nwl|request_23 --operation mode is normal N1_request_23 = N1_select_rq & (L2_data_out_23) # !N1_select_rq & L1_data_out_23; --N1_request_27 is mcm_nw_nwl:scsn_slave_nw_nwl|request_27 --operation mode is normal N1_request_27 = N1_select_rq & (L2_data_out_27) # !N1_select_rq & L1_data_out_27; --G1_NOT_nx466 is general_config_notri:nic_notri|NOT_nx466 --operation mode is normal G1_NOT_nx466 = C1_ce_gen & !J1_rd_wr_oase & !G1_ix69_ix38_nx10 & G1_nx510; --N1_request_26 is mcm_nw_nwl:scsn_slave_nw_nwl|request_26 --operation mode is normal N1_request_26 = N1_select_rq & (L2_data_out_26) # !N1_select_rq & L1_data_out_26; --G1_ni_sel_p_2 is general_config_notri:nic_notri|ni_sel_p_2 --operation mode is normal G1_ni_sel_p_2_lut_out = N1_request_25; G1_ni_sel_p_2 = DFFEAS(G1_ni_sel_p_2_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --scsn_sw_ix89_ix11_nx8 is scsn_sw_ix89_ix11_nx8 --operation mode is normal scsn_sw_ix89_ix11_nx8 = G1_sw_sel_1 # !G1_sw_sel_0 # !G1_sw_sel_2; --N1_request_24 is mcm_nw_nwl:scsn_slave_nw_nwl|request_24 --operation mode is normal N1_request_24 = N1_select_rq & (L2_data_out_24) # !N1_select_rq & L1_data_out_24; --G1_sw_sel_4 is general_config_notri:nic_notri|sw_sel_4 --operation mode is normal G1_sw_sel_4_lut_out = N1_request_27; G1_sw_sel_4 = DFFEAS(G1_sw_sel_4_lut_out, X1__clk0, VCC, , G1_NOT_nx915, , , , ); --G1_nx229 is general_config_notri:nic_notri|nx229 --operation mode is normal G1_nx229_lut_out = G1_dut_ir_irq_sm_0; G1_nx229 = DFFEAS(G1_nx229_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --G1_nx1566 is general_config_notri:nic_notri|nx1566 --operation mode is normal G1_nx1566 = G1_sebd_oe_i_3 # G1_nx229; --G1_dut_rst_n_i is general_config_notri:nic_notri|dut_rst_n_i --operation mode is arithmetic G1_dut_rst_n_i_carry_eqn = G1_dut_ir_cnt_rst_nx46; G1_dut_rst_n_i_lut_out = G1_dut_rst_n_i $ (G1_dut_rst_n_i_carry_eqn); G1_dut_rst_n_i = DFFEAS(G1_dut_rst_n_i_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx50 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx50 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx50 = CARRY(!G1_dut_ir_cnt_rst_nx46 # !G1_dut_rst_n_i); --G1_nx1572 is general_config_notri:nic_notri|nx1572 --operation mode is normal G1_nx1572 = G1_sebd_oe_i_3 # !G1_dut_rst_n_i; --G1_sebd_out_0 is general_config_notri:nic_notri|sebd_out_0 --operation mode is normal G1_sebd_out_0_lut_out = N1_request_31; G1_sebd_out_0 = DFFEAS(G1_sebd_out_0_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_sebd_oe_0 is general_config_notri:nic_notri|sebd_oe_0 --operation mode is normal G1_sebd_oe_0_lut_out = N1_request_27; G1_sebd_oe_0 = DFFEAS(G1_sebd_oe_0_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_sebd_out_1 is general_config_notri:nic_notri|sebd_out_1 --operation mode is normal G1_sebd_out_1_lut_out = N1_request_30; G1_sebd_out_1 = DFFEAS(G1_sebd_out_1_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_sebd_oe_1 is general_config_notri:nic_notri|sebd_oe_1 --operation mode is normal G1_sebd_oe_1_lut_out = N1_request_26; G1_sebd_oe_1 = DFFEAS(G1_sebd_oe_1_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_sebd_out_2 is general_config_notri:nic_notri|sebd_out_2 --operation mode is normal G1_sebd_out_2_lut_out = N1_request_29; G1_sebd_out_2 = DFFEAS(G1_sebd_out_2_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_sebd_oe_2 is general_config_notri:nic_notri|sebd_oe_2 --operation mode is normal G1_sebd_oe_2_lut_out = N1_request_25; G1_sebd_oe_2 = DFFEAS(G1_sebd_oe_2_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --D1_nx179 is jtag_master_1_notri:jtag_dut_notri|nx179 --operation mode is normal D1_nx179 = D1_EN5 # T1_TCK; --D1_nx189 is jtag_master_1_notri:jtag_dut_notri|nx189 --operation mode is normal D1_nx189 = !D1_EN5 & D1_TDI_i; --D1_nx185 is jtag_master_1_notri:jtag_dut_notri|nx185 --operation mode is normal D1_nx185 = !D1_EN5 & T1_TMS; --E1_nx179 is jtag_master_2_notri:jtag_ni_dn_notri|nx179 --operation mode is normal E1_nx179 = E1_EN5 # T2_TCK; --E2_nx179 is jtag_master_2_notri:jtag_ni_up_notri|nx179 --operation mode is normal E2_nx179 = E2_EN5 # T3_TCK; --E1_nx189 is jtag_master_2_notri:jtag_ni_dn_notri|nx189 --operation mode is normal E1_nx189 = !E1_EN5 & E1_TDI_i; --E2_nx189 is jtag_master_2_notri:jtag_ni_up_notri|nx189 --operation mode is normal E2_nx189 = !E2_EN5 & E2_TDI_i; --E1_nx185 is jtag_master_2_notri:jtag_ni_dn_notri|nx185 --operation mode is normal E1_nx185 = !E1_EN5 & T2_TMS; --E2_nx185 is jtag_master_2_notri:jtag_ni_up_notri|nx185 --operation mode is normal E2_nx185 = !E2_EN5 & T3_TMS; --C1_ce_gen is gio_devices:gio|ce_gen --operation mode is normal C1_ce_gen_lut_out = !N1_request_37 & N1_request_38 & !C1_modgen_eq_861_nx26 & !C1_modgen_eq_864_nx16; C1_ce_gen = DFFEAS(C1_ce_gen_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --G1_ix69_ix38_nx8 is general_config_notri:nic_notri|ix69_ix38_nx8 --operation mode is normal G1_ix69_ix38_nx8 = N1_request_44 # N1_request_43; --G1_ix69_ix38_nx10 is general_config_notri:nic_notri|ix69_ix38_nx10 --operation mode is normal G1_ix69_ix38_nx10 = N1_request_42 # N1_request_41; --L1_data_out_30 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_30 --operation mode is normal L1_data_out_30_lut_out = L1_data_out_29; L1_data_out_30 = DFFEAS(L1_data_out_30_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_30 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_30 --operation mode is normal L2_data_out_30_lut_out = L2_data_out_29; L2_data_out_30 = DFFEAS(L2_data_out_30_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_31 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_31 --operation mode is normal L1_data_out_31_lut_out = L1_data_out_30; L1_data_out_31 = DFFEAS(L1_data_out_31_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_31 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_31 --operation mode is normal L2_data_out_31_lut_out = L2_data_out_30; L2_data_out_31 = DFFEAS(L2_data_out_31_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_nx771 is mcm_nw_nwl:scsn_slave_nw_nwl|nx771 --operation mode is normal N1_nx771 = J1_bridge_alter & (N1_current_state_1 $ !N1_current_state_0 # !N1_current_state_2); --L1_data_out_19 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_19 --operation mode is normal L1_data_out_19_lut_out = L1_data_out_18; L1_data_out_19 = DFFEAS(L1_data_out_19_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_19 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_19 --operation mode is normal L2_data_out_19_lut_out = L2_data_out_18; L2_data_out_19 = DFFEAS(L2_data_out_19_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_ce_cp is gio_devices:gio|ce_cp --operation mode is normal C1_ce_cp_lut_out = !N1_request_37 & !N1_request_38 & !C1_modgen_eq_861_nx26 & !C1_modgen_eq_864_nx16; C1_ce_cp = DFFEAS(C1_ce_cp_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --B1_nx800 is clkpre_counter:cp|nx800 --operation mode is normal B1_nx800 = N1_request_45 & N1_request_46 & N1_request_47 & N1_request_48; --B1_nx1324 is clkpre_counter:cp|nx1324 --operation mode is arithmetic B1_nx1324_carry_eqn = B1_result_inc_716_nx76; B1_nx1324 = B1_ptimer_11 $ (B1_nx1324_carry_eqn); --B1_result_inc_716_nx80 is clkpre_counter:cp|result_inc_716_nx80 --operation mode is arithmetic B1_result_inc_716_nx80 = CARRY(!B1_result_inc_716_nx76 # !B1_ptimer_11); --Q1_PTRGG is clkpre_counter:cp|pre_dec:pdec|PTRGG --operation mode is normal Q1_PTRGG_lut_out = !Q1_ptrf_1 & !Q1_ptrf_0 & Q1_nx40 & Q1_nx93; Q1_PTRGG = DFFEAS(Q1_PTRGG_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_FUNC_3 is clkpre_counter:cp|pre_dec:pdec|FUNC_3 --operation mode is normal Q1_FUNC_3_lut_out = Q1_rec_sm_0 & Q1_fc_1 & Q1_fc_0 & Q1_nx120; Q1_FUNC_3 = DFFEAS(Q1_FUNC_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_ptimer_11 is clkpre_counter:cp|ptimer_11 --operation mode is normal B1_ptimer_11_lut_out = B1_nx1324; B1_ptimer_11 = DFFEAS(B1_ptimer_11_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_nx719 is clkpre_counter:cp|nx719 --operation mode is normal B1_nx719 = !B1_ptimer_7 # !B1_ptimer_8 # !B1_ptimer_9 # !B1_ptimer_10; --B1_nx889 is clkpre_counter:cp|nx889 --operation mode is normal B1_nx889 = !B1_ptimer_12 # !B1_ptimer_13; --B1_nx890 is clkpre_counter:cp|nx890 --operation mode is normal B1_nx890 = B1_nx720 # B1_nx891 # !B1_ptimer_0 # !B1_ptimer_1; --B1_c_time_7 is clkpre_counter:cp|c_time_7 --operation mode is normal B1_c_time_7_lut_out = N1_request_24; B1_c_time_7 = DFFEAS(B1_c_time_7_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_6 is clkpre_counter:cp|c_time_6 --operation mode is normal B1_c_time_6_lut_out = N1_request_25; B1_c_time_6 = DFFEAS(B1_c_time_6_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_7 is clkpre_counter:cp|ptimer_7 --operation mode is normal B1_ptimer_7_lut_out = B1_nx1328; B1_ptimer_7 = DFFEAS(B1_ptimer_7_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_ptimer_6 is clkpre_counter:cp|ptimer_6 --operation mode is normal B1_ptimer_6_lut_out = B1_nx1329; B1_ptimer_6 = DFFEAS(B1_ptimer_6_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_c_time_5 is clkpre_counter:cp|c_time_5 --operation mode is normal B1_c_time_5_lut_out = N1_request_26; B1_c_time_5 = DFFEAS(B1_c_time_5_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_4 is clkpre_counter:cp|c_time_4 --operation mode is normal B1_c_time_4_lut_out = N1_request_27; B1_c_time_4 = DFFEAS(B1_c_time_4_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_5 is clkpre_counter:cp|ptimer_5 --operation mode is normal B1_ptimer_5_lut_out = B1_nx1330; B1_ptimer_5 = DFFEAS(B1_ptimer_5_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_ptimer_4 is clkpre_counter:cp|ptimer_4 --operation mode is normal B1_ptimer_4_lut_out = B1_nx1331; B1_ptimer_4 = DFFEAS(B1_ptimer_4_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_c_time_3 is clkpre_counter:cp|c_time_3 --operation mode is normal B1_c_time_3_lut_out = N1_request_28; B1_c_time_3 = DFFEAS(B1_c_time_3_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_1 is clkpre_counter:cp|c_time_1 --operation mode is normal B1_c_time_1_lut_out = N1_request_30; B1_c_time_1 = DFFEAS(B1_c_time_1_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_3 is clkpre_counter:cp|ptimer_3 --operation mode is normal B1_ptimer_3_lut_out = B1_nx1332; B1_ptimer_3 = DFFEAS(B1_ptimer_3_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_ptimer_1 is clkpre_counter:cp|ptimer_1 --operation mode is arithmetic B1_ptimer_1_carry_eqn = B1_result_inc_716_nx36; B1_ptimer_1_lut_out = B1_nx1314 # B1_ptimer_1 $ B1_ptimer_1_carry_eqn; B1_ptimer_1 = DFFEAS(B1_ptimer_1_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , , ); --B1_result_inc_716_nx40 is clkpre_counter:cp|result_inc_716_nx40 --operation mode is arithmetic B1_result_inc_716_nx40 = CARRY(!B1_result_inc_716_nx36 # !B1_ptimer_1); --B1_c_time_2 is clkpre_counter:cp|c_time_2 --operation mode is normal B1_c_time_2_lut_out = N1_request_29; B1_c_time_2 = DFFEAS(B1_c_time_2_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_0 is clkpre_counter:cp|c_time_0 --operation mode is normal B1_c_time_0_lut_out = N1_request_31; B1_c_time_0 = DFFEAS(B1_c_time_0_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_0 is clkpre_counter:cp|ptimer_0 --operation mode is normal B1_ptimer_0_lut_out = Q1_PTRGG # Q1_FUNC_3 # !B1_ptimer_0; B1_ptimer_0 = DFFEAS(B1_ptimer_0_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , , ); --B1_nx437 is clkpre_counter:cp|nx437 --operation mode is normal B1_nx437_lut_out = !B1_nx1415; B1_nx437 = DFFEAS(B1_nx437_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , , ); --N1_request_18 is mcm_nw_nwl:scsn_slave_nw_nwl|request_18 --operation mode is normal N1_request_18 = N1_select_rq & (L2_data_out_18) # !N1_select_rq & L1_data_out_18; --B1_nx1322 is clkpre_counter:cp|nx1322 --operation mode is normal B1_nx1322_carry_eqn = B1_result_inc_716_nx84; B1_nx1322 = B1_ptimer_13 $ (B1_nx1322_carry_eqn); --B1_c_time_11 is clkpre_counter:cp|c_time_11 --operation mode is normal B1_c_time_11_lut_out = N1_request_20; B1_c_time_11 = DFFEAS(B1_c_time_11_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_10 is clkpre_counter:cp|c_time_10 --operation mode is normal B1_c_time_10_lut_out = N1_request_21; B1_c_time_10 = DFFEAS(B1_c_time_10_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_10 is clkpre_counter:cp|ptimer_10 --operation mode is normal B1_ptimer_10_lut_out = B1_nx1325; B1_ptimer_10 = DFFEAS(B1_ptimer_10_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_c_time_9 is clkpre_counter:cp|c_time_9 --operation mode is normal B1_c_time_9_lut_out = N1_request_22; B1_c_time_9 = DFFEAS(B1_c_time_9_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_c_time_8 is clkpre_counter:cp|c_time_8 --operation mode is normal B1_c_time_8_lut_out = N1_request_23; B1_c_time_8 = DFFEAS(B1_c_time_8_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx780, , , , ); --B1_ptimer_9 is clkpre_counter:cp|ptimer_9 --operation mode is normal B1_ptimer_9_lut_out = B1_nx1326; B1_ptimer_9 = DFFEAS(B1_ptimer_9_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --B1_ptimer_8 is clkpre_counter:cp|ptimer_8 --operation mode is normal B1_ptimer_8_lut_out = B1_nx1327; B1_ptimer_8 = DFFEAS(B1_ptimer_8_lut_out, X1__clk0, J1_chipRST_n, , B1_nx1958, , , B1_nx1314, ); --N1_request_valid is mcm_nw_nwl:scsn_slave_nw_nwl|request_valid --operation mode is normal N1_request_valid = N1_nx222 # N1_current_state_0 & Y1_request_valid & N1_nx230; --J1_nx406 is mcm_nw_apl:scsn_slave_nw_apl|nx406 --operation mode is normal J1_nx406 = J1_nx431 # !J1_current_state_2 & !J1_current_state_1 & J1_nx425; --J1_nx408 is mcm_nw_apl:scsn_slave_nw_apl|nx408 --operation mode is normal J1_nx408 = J1_current_state_2 & (J1_nx432 # J1_current_state_3 & J1_current_state_1) # !J1_current_state_2 & !J1_current_state_3 & !J1_current_state_1; --J1_nx416 is mcm_nw_apl:scsn_slave_nw_apl|nx416 --operation mode is normal J1_nx416 = J1_current_state_1 & (J1_nx418 # J1_nx417 & J1_nx419) # !J1_current_state_1 & J1_nx417 & (J1_nx419); --J1_nx420 is mcm_nw_apl:scsn_slave_nw_apl|nx420 --operation mode is normal J1_nx420 = J1_current_state_3 # J1_current_state_1 & (!J1_a_2_dup_232) # !J1_current_state_1 & J1_nx107; --J1_nx427 is mcm_nw_apl:scsn_slave_nw_apl|nx427 --operation mode is normal J1_nx427 = !J1_current_state_3 & J1_current_state_2 & (N1_request_valid # J1_current_state_0); --J1_nx428 is mcm_nw_apl:scsn_slave_nw_apl|nx428 --operation mode is normal J1_nx428 = !J1_current_state_2 & J1_current_state_0; --J1_nx400 is mcm_nw_apl:scsn_slave_nw_apl|nx400 --operation mode is normal J1_nx400 = J1_current_state_0 # !J1_current_state_1 # !J1_current_state_3; --J1_nx421 is mcm_nw_apl:scsn_slave_nw_apl|nx421 --operation mode is normal J1_nx421 = !J1_current_state_3 & (J1_current_state_1 # !N1_request_49 & J1_nx422); --J1_nx423 is mcm_nw_apl:scsn_slave_nw_apl|nx423 --operation mode is normal J1_nx423 = J1_current_state_3 & J1_nx426 # !J1_current_state_3 & (J1_nx435 & J1_nx436); --J1_nx404 is mcm_nw_apl:scsn_slave_nw_apl|nx404 --operation mode is normal J1_nx404 = J1_current_state_0 # !J1_current_state_2 # !J1_current_state_3; --J1_nx409 is mcm_nw_apl:scsn_slave_nw_apl|nx409 --operation mode is normal J1_nx409 = J1_nx410 # J1_nx412 & (N1_request_52 $ N1_request_51); --J1_nx414 is mcm_nw_apl:scsn_slave_nw_apl|nx414 --operation mode is normal J1_nx414 = !J1_current_state_3 & J1_current_state_0 & J1_a_2_dup_232; --B1_nx789 is clkpre_counter:cp|nx789 --operation mode is normal B1_nx789 = B1_ptimer_13 & B1_ptimer_12 & B1_ptimer_11 & B1_ptimer_10; --B1_nx790 is clkpre_counter:cp|nx790 --operation mode is normal B1_nx790 = B1_ptimer_5 & B1_ptimer_4 & B1_ptimer_3 & B1_ptimer_1; --R1_done_n is clkpre_counter:cp|pre_enc:pend|done_n --operation mode is normal R1_done_n_lut_out = !R1_send_sm; R1_done_n = DFFEAS(R1_done_n_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --R1_WE_s is clkpre_counter:cp|pre_enc:pend|WE_s --operation mode is normal R1_WE_s_lut_out = VCC; R1_WE_s = DFFEAS(R1_WE_s_lut_out, X1__clk0, R1_done_n, , B1_WE_pre, , , , ); --B1_WE_pre is clkpre_counter:cp|WE_pre --operation mode is normal B1_WE_pre = C1_ce_cp & N1_request_45 & !N1_request_46 & !J1_rd_wr_oase; --R1_shiftd_4 is clkpre_counter:cp|pre_enc:pend|shiftd_4 --operation mode is normal R1_shiftd_4_lut_out = R1_FUNC_s_2 # R1_FUNC_s_1 & (R1_FUNC_s_0); R1_shiftd_4 = DFFEAS(R1_shiftd_4_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, R1_shiftd_3, , , R1_send_sm); --R1_WE_c is clkpre_counter:cp|pre_enc:pend|WE_c --operation mode is normal R1_WE_c_lut_out = R1_WE_s; R1_WE_c = DFFEAS(R1_WE_c_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --R1_NOT_bitcnt_1 is clkpre_counter:cp|pre_enc:pend|NOT_bitcnt_1 --operation mode is normal R1_NOT_bitcnt_1_lut_out = !R1_nx192; R1_NOT_bitcnt_1 = DFFEAS(R1_NOT_bitcnt_1_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx196, , , , ); --R1_nx88 is clkpre_counter:cp|pre_enc:pend|nx88 --operation mode is normal R1_nx88 = R1_bitcnt_0 # !R1_NOT_bitcnt_2 # !R1_counter_nx20 # !R1_counter_nx12; --R1_counter_nx12 is clkpre_counter:cp|pre_enc:pend|counter_nx12 --operation mode is normal R1_counter_nx12_carry_eqn = R1_counter_nx9; R1_counter_nx12_lut_out = R1_counter_nx12 $ (!R1_counter_nx12_carry_eqn); R1_counter_nx12 = DFFEAS(R1_counter_nx12_lut_out, X1__clk0, J1_chipRST_n, , , ~GND, , , R1_LOAD); --R1_counter_nx20 is clkpre_counter:cp|pre_enc:pend|counter_nx20 --operation mode is arithmetic R1_counter_nx20_lut_out = !R1_counter_nx20; R1_counter_nx20 = DFFEAS(R1_counter_nx20_lut_out, X1__clk0, J1_chipRST_n, , , VCC, , , R1_LOAD); --R1_counter_nx9 is clkpre_counter:cp|pre_enc:pend|counter_nx9 --operation mode is arithmetic R1_counter_nx9 = CARRY(!R1_counter_nx20); --K1_buffer_flush_n is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|buffer_flush_n --operation mode is normal K1_buffer_flush_n = K1_current_state_3 # K1_current_state_2 # K1_current_state_0; --L1_NOT_nx676 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|NOT_nx676 --operation mode is normal L1_NOT_nx676 = L1_nx285 # L1_nx277 & !L1_nx286 # !K1_buffer_flush_n; --K2_buffer_flush_n is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|buffer_flush_n --operation mode is normal K2_buffer_flush_n = K2_current_state_3 # K2_current_state_2 # K2_current_state_0; --L2_NOT_nx676 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|NOT_nx676 --operation mode is normal L2_NOT_nx676 = L2_nx285 # L2_nx277 & !L2_nx286 # !K2_buffer_flush_n; --N1_current_state_0 is mcm_nw_nwl:scsn_slave_nw_nwl|current_state_0 --operation mode is normal N1_current_state_0_lut_out = N1_nx229 # J1_bridge_alter & !N1_current_state_2 & N1_current_state_0; N1_current_state_0 = DFFEAS(N1_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --Y2_request_valid is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|request_valid --operation mode is normal Y2_request_valid = !Y2_current_state_3 & !Y2_current_state_2 & Y2_current_state_1 & !Y2_current_state_0; --N1_nx223 is mcm_nw_nwl:scsn_slave_nw_nwl|nx223 --operation mode is normal N1_nx223 = !N1_current_state_0 & (N1_current_state_2 & (!N1_current_state_1) # !N1_current_state_2 & J1_bridge_alter & N1_current_state_1); --N1_nx232 is mcm_nw_nwl:scsn_slave_nw_nwl|nx232 --operation mode is normal N1_nx232 = !N1_current_state_1 & Y1_request_valid; --L1_data_out_43 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_43 --operation mode is normal L1_data_out_43_lut_out = L1_data_out_42; L1_data_out_43 = DFFEAS(L1_data_out_43_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_43 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_43 --operation mode is normal L2_data_out_43_lut_out = L2_data_out_42; L2_data_out_43 = DFFEAS(L2_data_out_43_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_request_37 is mcm_nw_nwl:scsn_slave_nw_nwl|request_37 --operation mode is normal N1_request_37 = N1_select_rq & (L2_data_out_37) # !N1_select_rq & L1_data_out_37; --N1_request_38 is mcm_nw_nwl:scsn_slave_nw_nwl|request_38 --operation mode is normal N1_request_38 = N1_select_rq & (L2_data_out_38) # !N1_select_rq & L1_data_out_38; --C1_modgen_eq_861_nx26 is gio_devices:gio|modgen_eq_861_nx26 --operation mode is normal C1_modgen_eq_861_nx26 = N1_request_33 # N1_request_35 # N1_request_36 # !N1_request_34; --C1_nx303 is gio_devices:gio|nx303 --operation mode is normal C1_nx303 = N1_request_39 & N1_request_40; --J1_bus_req is mcm_nw_apl:scsn_slave_nw_apl|bus_req --operation mode is normal J1_bus_req_lut_out = C1_bus_ack & J1_req_rise & !J1_modgen_eq_573_nx8 # !C1_bus_ack & (J1_req_rise & !J1_modgen_eq_573_nx8 # !J1_modgen_eq_574_nx8); J1_bus_req = DFFEAS(J1_bus_req_lut_out, X1__clk0, VCC, , , , , , ); --N1_request_52 is mcm_nw_nwl:scsn_slave_nw_nwl|request_52 --operation mode is normal N1_request_52 = N1_select_rq & (L2_data_out_52) # !N1_select_rq & L1_data_out_52; --N1_request_51 is mcm_nw_nwl:scsn_slave_nw_nwl|request_51 --operation mode is normal N1_request_51 = N1_select_rq & (L2_data_out_51) # !N1_select_rq & L1_data_out_51; --N1_request_50 is mcm_nw_nwl:scsn_slave_nw_nwl|request_50 --operation mode is normal N1_request_50 = N1_select_rq & (L2_data_out_50) # !N1_select_rq & L1_data_out_50; --N1_request_49 is mcm_nw_nwl:scsn_slave_nw_nwl|request_49 --operation mode is normal N1_request_49 = N1_select_rq & (L2_data_out_49) # !N1_select_rq & L1_data_out_49; --N1_request_42 is mcm_nw_nwl:scsn_slave_nw_nwl|request_42 --operation mode is normal N1_request_42 = N1_select_rq & (L2_data_out_42) # !N1_select_rq & L1_data_out_42; --N1_request_41 is mcm_nw_nwl:scsn_slave_nw_nwl|request_41 --operation mode is normal N1_request_41 = N1_select_rq & (L2_data_out_41) # !N1_select_rq & L1_data_out_41; --L1_data_out_21 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_21 --operation mode is normal L1_data_out_21_lut_out = L1_data_out_20; L1_data_out_21 = DFFEAS(L1_data_out_21_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_21 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_21 --operation mode is normal L2_data_out_21_lut_out = L2_data_out_20; L2_data_out_21 = DFFEAS(L2_data_out_21_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_request_44 is mcm_nw_nwl:scsn_slave_nw_nwl|request_44 --operation mode is normal N1_request_44 = N1_select_rq & (L2_data_out_44) # !N1_select_rq & L1_data_out_44; --L1_data_out_22 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_22 --operation mode is normal L1_data_out_22_lut_out = L1_data_out_21; L1_data_out_22 = DFFEAS(L1_data_out_22_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_22 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_22 --operation mode is normal L2_data_out_22_lut_out = L2_data_out_21; L2_data_out_22 = DFFEAS(L2_data_out_22_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_nx301 is gio_devices:gio|nx301 --operation mode is normal C1_nx301 = !N1_request_39 & N1_request_40; --L1_data_out_27 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_27 --operation mode is normal L1_data_out_27_lut_out = L1_data_out_26; L1_data_out_27 = DFFEAS(L1_data_out_27_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_27 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_27 --operation mode is normal L2_data_out_27_lut_out = L2_data_out_26; L2_data_out_27 = DFFEAS(L2_data_out_27_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_nx302 is gio_devices:gio|nx302 --operation mode is normal C1_nx302 = N1_request_39 & !N1_request_40; --G1_nx114 is general_config_notri:nic_notri|nx114 --operation mode is normal G1_nx114 = !N1_request_44 & N1_request_43 & N1_request_48 & !G1_ix69_ix38_nx10; --G1_ni_ir_cnt_irq_1 is general_config_notri:nic_notri|ni_ir_cnt_irq_1 --operation mode is normal G1_ni_ir_cnt_irq_1_carry_eqn = G1_ni_ir_cnt_irq_nx6; G1_ni_ir_cnt_irq_1_lut_out = G1_ni_ir_cnt_irq_1 $ (G1_ni_ir_cnt_irq_1_carry_eqn); G1_ni_ir_cnt_irq_1 = DFFEAS(G1_ni_ir_cnt_irq_1_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_ni_ir_irq_sm_0, ); --G1_ni_ir_cnt_irq_0 is general_config_notri:nic_notri|ni_ir_cnt_irq_0 --operation mode is arithmetic G1_ni_ir_cnt_irq_0_lut_out = !G1_ni_ir_cnt_irq_0; G1_ni_ir_cnt_irq_0 = DFFEAS(G1_ni_ir_cnt_irq_0_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_ni_ir_irq_sm_0, ); --G1_ni_ir_cnt_irq_nx6 is general_config_notri:nic_notri|ni_ir_cnt_irq_nx6 --operation mode is arithmetic G1_ni_ir_cnt_irq_nx6 = CARRY(G1_ni_ir_cnt_irq_0); --G1_nx432 is general_config_notri:nic_notri|nx432 --operation mode is normal G1_nx432 = G1_nx623 # G1_ni_ir_irq_sm_0; --B1_p_sm1 is clkpre_counter:cp|p_sm1 --operation mode is normal B1_p_sm1_lut_out = B1_p_sm; B1_p_sm1 = DFFEAS(B1_p_sm1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_nx791 is clkpre_counter:cp|nx791 --operation mode is normal B1_nx791 = B1_nx865 & B1_nx866 & (B1_L0time_12 $ !B1_ptimer_12); --B1_nx792 is clkpre_counter:cp|nx792 --operation mode is normal B1_nx792 = B1_nx857 & B1_nx858 & (B1_L1time_12 $ !B1_ptimer_12); --B1_nx793 is clkpre_counter:cp|nx793 --operation mode is normal B1_nx793 = B1_nx849 & B1_nx850 & (B1_L2time_12 $ !B1_ptimer_12); --N1_request_48 is mcm_nw_nwl:scsn_slave_nw_nwl|request_48 --operation mode is normal N1_request_48 = N1_select_rq & (L2_data_out_48) # !N1_select_rq & L1_data_out_48; --G1_ni_ir_cnt_rst_4 is general_config_notri:nic_notri|ni_ir_cnt_rst_4 --operation mode is arithmetic G1_ni_ir_cnt_rst_4_carry_eqn = G1_ni_ir_cnt_rst_nx28; G1_ni_ir_cnt_rst_4_lut_out = G1_ni_ir_cnt_rst_4 $ (!G1_ni_ir_cnt_rst_4_carry_eqn); G1_ni_ir_cnt_rst_4 = DFFEAS(G1_ni_ir_cnt_rst_4_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx34 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx34 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx34 = CARRY(G1_ni_ir_cnt_rst_4 & (!G1_ni_ir_cnt_rst_nx28)); --N1_current_state_2 is mcm_nw_nwl:scsn_slave_nw_nwl|current_state_2 --operation mode is normal N1_current_state_2_lut_out = N1_current_state_2 & (N1_nx225) # !N1_current_state_2 & N1_current_state_1 & N1_nx224; N1_current_state_2 = DFFEAS(N1_current_state_2_lut_out, X1__clk0, VCC, , , , , , ); --N1_current_state_1 is mcm_nw_nwl:scsn_slave_nw_nwl|current_state_1 --operation mode is normal N1_current_state_1_lut_out = N1_current_state_0 & !N1_current_state_2 & (N1_nx228) # !N1_current_state_0 & (N1_nx226); N1_current_state_1 = DFFEAS(N1_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty is NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty --operation mode is normal NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty = scsn_slave_nw_dll_ob0_bitcounter_6 & (scsn_slave_nw_dll_ob0_bitcounter_5 # !scsn_slave_nw_dll_ob0_modgen_gt_108_nx60 & scsn_slave_nw_dll_ob0_bitcounter_4); --M1_nx218 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx218 --operation mode is normal M1_nx218 = !M1_current_state_2 & M1_current_state_1; --M1_nx219 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx219 --operation mode is normal M1_nx219 = !M1_timer_in_state_2 & !M1_timer_in_state_0 & !M1_timer_in_state_1; --M1_nx217 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx217 --operation mode is normal M1_nx217 = M1_current_state_1 # M1_sleep_event; --M1_nx227 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx227 --operation mode is normal M1_nx227 = M1_timer_in_state_2 # M1_timer_in_state_0 # M1_timer_in_state_1 # !NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty; --M1_nx220 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx220 --operation mode is normal M1_nx220 = !NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty & !M1_current_state_2 & M1_current_state_1 & M1_nx219; --M1_nx228 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx228 --operation mode is normal M1_nx228 = Y1_d_initiate_send & !M1_current_state_1 & !M1_current_state_0; --M1_nx229 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx229 --operation mode is normal M1_nx229 = M1_current_state_1 # !M1_current_state_2; --scsn_slave_nw_dll_ob0_data is scsn_slave_nw_dll_ob0_data --operation mode is normal scsn_slave_nw_dll_ob0_data = scsn_slave_nw_dll_ob0_NOT_ob_empty & scsn_slave_nw_dll_ob0_ob_data_68 # !scsn_slave_nw_dll_ob0_NOT_ob_empty & (scsn_slave_nw_dll_ob0_ob_crc_15); --M1_nx225 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx225 --operation mode is normal M1_nx225 = M1_nx222 # !M1_stuff_in_data & M1_nx220 & !M1_nx226; --M1_nx226 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx226 --operation mode is normal M1_nx226 = !M1_stuff_in_state_0 # !M1_stuff_in_state_1 # !M1_stuff_in_state_2; --M1_stuff_in_nx120 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_nx120 --operation mode is normal M1_stuff_in_nx120 = M1_nx221 # !NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty & !M1_current_state_2 & M1_nx219; --NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty is NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty --operation mode is normal NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty = scsn_slave_nw_dll_ob1_bitcounter_6 & (scsn_slave_nw_dll_ob1_bitcounter_5 # !scsn_slave_nw_dll_ob1_modgen_gt_108_nx60 & scsn_slave_nw_dll_ob1_bitcounter_4); --M2_nx218 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx218 --operation mode is normal M2_nx218 = !M2_current_state_2 & M2_current_state_1; --M2_nx219 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx219 --operation mode is normal M2_nx219 = !M2_timer_in_state_2 & !M2_timer_in_state_0 & !M2_timer_in_state_1; --M2_nx217 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx217 --operation mode is normal M2_nx217 = M2_current_state_1 # M2_sleep_event; --M2_nx227 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx227 --operation mode is normal M2_nx227 = M2_timer_in_state_2 # M2_timer_in_state_0 # M2_timer_in_state_1 # !NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty; --M2_nx220 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx220 --operation mode is normal M2_nx220 = !NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty & !M2_current_state_2 & M2_current_state_1 & M2_nx219; --M2_nx228 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx228 --operation mode is normal M2_nx228 = Y2_d_initiate_send & !M2_current_state_1 & !M2_current_state_0; --M2_nx229 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx229 --operation mode is normal M2_nx229 = M2_current_state_1 # !M2_current_state_2; --scsn_slave_nw_dll_ob1_data is scsn_slave_nw_dll_ob1_data --operation mode is normal scsn_slave_nw_dll_ob1_data = scsn_slave_nw_dll_ob1_NOT_ob_empty & scsn_slave_nw_dll_ob1_ob_data_68 # !scsn_slave_nw_dll_ob1_NOT_ob_empty & (scsn_slave_nw_dll_ob1_ob_crc_15); --M2_nx225 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx225 --operation mode is normal M2_nx225 = M2_nx222 # !M2_stuff_in_data & M2_nx220 & !M2_nx226; --M2_nx226 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx226 --operation mode is normal M2_nx226 = !M2_stuff_in_state_0 # !M2_stuff_in_state_1 # !M2_stuff_in_state_2; --M2_stuff_in_nx120 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_nx120 --operation mode is normal M2_stuff_in_nx120 = M2_nx221 # !NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty & !M2_current_state_2 & M2_nx219; --L1_data_out_23 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_23 --operation mode is normal L1_data_out_23_lut_out = L1_data_out_22; L1_data_out_23 = DFFEAS(L1_data_out_23_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_23 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_23 --operation mode is normal L2_data_out_23_lut_out = L2_data_out_22; L2_data_out_23 = DFFEAS(L2_data_out_23_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_nx510 is general_config_notri:nic_notri|nx510 --operation mode is normal G1_nx510 = N1_request_44 & !N1_request_43; --L1_data_out_26 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_26 --operation mode is normal L1_data_out_26_lut_out = L1_data_out_25; L1_data_out_26 = DFFEAS(L1_data_out_26_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_26 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_26 --operation mode is normal L2_data_out_26_lut_out = L2_data_out_25; L2_data_out_26 = DFFEAS(L2_data_out_26_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_request_25 is mcm_nw_nwl:scsn_slave_nw_nwl|request_25 --operation mode is normal N1_request_25 = N1_select_rq & (L2_data_out_25) # !N1_select_rq & L1_data_out_25; --L1_data_out_24 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_24 --operation mode is normal L1_data_out_24_lut_out = L1_data_out_23; L1_data_out_24 = DFFEAS(L1_data_out_24_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_24 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_24 --operation mode is normal L2_data_out_24_lut_out = L2_data_out_23; L2_data_out_24 = DFFEAS(L2_data_out_24_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_dut_ir_irq_sm_0 is general_config_notri:nic_notri|dut_ir_irq_sm_0 --operation mode is normal G1_dut_ir_irq_sm_0_lut_out = G1_dut_ir_irq_sm_0 & (G1_dut_ir_modgen_eq_830_nx4) # !G1_dut_ir_irq_sm_0 & !G1_nx613 & !G1_dut_ir_irq_sm_1; G1_dut_ir_irq_sm_0 = DFFEAS(G1_dut_ir_irq_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --G1_sebd_oe_i_3 is general_config_notri:nic_notri|sebd_oe_i_3 --operation mode is normal G1_sebd_oe_i_3_lut_out = N1_request_24; G1_sebd_oe_i_3 = DFFEAS(G1_sebd_oe_i_3_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx436, , , , ); --G1_nx608 is general_config_notri:nic_notri|nx608 --operation mode is normal G1_nx608_lut_out = !G1_nx122; G1_nx608 = DFFEAS(G1_nx608_lut_out, X1__clk0, J1_chipRST_n, , , G1L043, , , !G1_nx428); --G1_dut_ir_cnt_rst_6 is general_config_notri:nic_notri|dut_ir_cnt_rst_6 --operation mode is arithmetic G1_dut_ir_cnt_rst_6_carry_eqn = G1_dut_ir_cnt_rst_nx41; G1_dut_ir_cnt_rst_6_lut_out = G1_dut_ir_cnt_rst_6 $ (!G1_dut_ir_cnt_rst_6_carry_eqn); G1_dut_ir_cnt_rst_6 = DFFEAS(G1_dut_ir_cnt_rst_6_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx46 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx46 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx46 = CARRY(G1_dut_ir_cnt_rst_6 & (!G1_dut_ir_cnt_rst_nx41)); --G1_NOT_nx436 is general_config_notri:nic_notri|NOT_nx436 --operation mode is normal G1_NOT_nx436 = C1_ce_gen & !J1_rd_wr_oase & !G1_ix69_ix38_nx8 & G1_NOT_ix69_ix30_nx10; --D1_EN5 is jtag_master_1_notri:jtag_dut_notri|EN5 --operation mode is normal D1_EN5_lut_out = N1_request_25; D1_EN5 = DFFEAS(D1_EN5_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --T1_TCK is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|TCK --operation mode is normal T1_TCK_lut_out = T1_tms_sm_0; T1_TCK = DFFEAS(T1_TCK_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx516, , , , ); --D1_TDI_i is jtag_master_1_notri:jtag_dut_notri|TDI_i --operation mode is normal D1_TDI_i_lut_out = D1_nx223 # D1_ser_snd_i & (D1_load_inst # D1_shift_inst); D1_TDI_i = DFFEAS(D1_TDI_i_lut_out, !T1_TCK, VCC, , , , , , ); --T1_TMS is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|TMS --operation mode is normal T1_TMS_lut_out = T1_s_reg_1; T1_TMS = DFFEAS(T1_TMS_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_31, , , D1_we_tms); --E1_EN5 is jtag_master_2_notri:jtag_ni_dn_notri|EN5 --operation mode is normal E1_EN5_lut_out = N1_request_25; E1_EN5 = DFFEAS(E1_EN5_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --T2_TCK is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|TCK --operation mode is normal T2_TCK_lut_out = T2_tms_sm_0; T2_TCK = DFFEAS(T2_TCK_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx516, , , , ); --E2_EN5 is jtag_master_2_notri:jtag_ni_up_notri|EN5 --operation mode is normal E2_EN5_lut_out = N1_request_25; E2_EN5 = DFFEAS(E2_EN5_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --T3_TCK is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|TCK --operation mode is normal T3_TCK_lut_out = T3_tms_sm_0; T3_TCK = DFFEAS(T3_TCK_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx516, , , , ); --E1_TDI_i is jtag_master_2_notri:jtag_ni_dn_notri|TDI_i --operation mode is normal E1_TDI_i_lut_out = E1_nx221 # E1_ser_snd_i & (E1_load_inst # E1_shift_inst); E1_TDI_i = DFFEAS(E1_TDI_i_lut_out, !T2_TCK, VCC, , , , , , ); --E2_TDI_i is jtag_master_2_notri:jtag_ni_up_notri|TDI_i --operation mode is normal E2_TDI_i_lut_out = E2_nx221 # E2_ser_snd_i & (E2_load_inst # E2_shift_inst); E2_TDI_i = DFFEAS(E2_TDI_i_lut_out, !T3_TCK, VCC, , , , , , ); --T2_TMS is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|TMS --operation mode is normal T2_TMS_lut_out = T2_s_reg_1; T2_TMS = DFFEAS(T2_TMS_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_31, , , E1_we_tms); --T3_TMS is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|TMS --operation mode is normal T3_TMS_lut_out = T3_s_reg_1; T3_TMS = DFFEAS(T3_TMS_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_31, , , E2_we_tms); --C1_modgen_eq_864_nx16 is gio_devices:gio|modgen_eq_864_nx16 --operation mode is normal C1_modgen_eq_864_nx16 = N1_request_39 # N1_request_40; --J1_bridge_alter is mcm_nw_apl:scsn_slave_nw_apl|bridge_alter --operation mode is normal J1_bridge_alter = N1_request_valid & J1_current_state_1 & !J1_current_state_0 & J1_NOT_ix34_ix38_nx10; --L1_data_out_18 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_18 --operation mode is normal L1_data_out_18_lut_out = L1_data_out_17; L1_data_out_18 = DFFEAS(L1_data_out_18_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_18 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_18 --operation mode is normal L2_data_out_18_lut_out = L2_data_out_17; L2_data_out_18 = DFFEAS(L2_data_out_18_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_request_45 is mcm_nw_nwl:scsn_slave_nw_nwl|request_45 --operation mode is normal N1_request_45 = N1_select_rq & (L2_data_out_45) # !N1_select_rq & L1_data_out_45; --N1_request_46 is mcm_nw_nwl:scsn_slave_nw_nwl|request_46 --operation mode is normal N1_request_46 = N1_select_rq & (L2_data_out_46) # !N1_select_rq & L1_data_out_46; --N1_request_47 is mcm_nw_nwl:scsn_slave_nw_nwl|request_47 --operation mode is normal N1_request_47 = N1_select_rq & (L2_data_out_47) # !N1_select_rq & L1_data_out_47; --B1_nx1325 is clkpre_counter:cp|nx1325 --operation mode is arithmetic B1_nx1325_carry_eqn = B1_result_inc_716_nx72; B1_nx1325 = B1_ptimer_10 $ (!B1_nx1325_carry_eqn); --B1_result_inc_716_nx76 is clkpre_counter:cp|result_inc_716_nx76 --operation mode is arithmetic B1_result_inc_716_nx76 = CARRY(B1_ptimer_10 & (!B1_result_inc_716_nx72)); --Q1_ptrf_1 is clkpre_counter:cp|pre_dec:pdec|ptrf_1 --operation mode is normal Q1_ptrf_1_lut_out = Q1_ptrf_0; Q1_ptrf_1 = DFFEAS(Q1_ptrf_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_ptrf_0 is clkpre_counter:cp|pre_dec:pdec|ptrf_0 --operation mode is normal Q1_ptrf_0_lut_out = B1_AD_SYNC_OUT; Q1_ptrf_0 = DFFEAS(Q1_ptrf_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_nx40 is clkpre_counter:cp|pre_dec:pdec|nx40 --operation mode is normal Q1_nx40 = !Q1_counter_3 & !Q1_counter_2 & (Q1_counter_0 # Q1_counter_1); --Q1_nx93 is clkpre_counter:cp|pre_dec:pdec|nx93 --operation mode is normal Q1_nx93 = !Q1_rec_sm_3 & !Q1_rec_sm_2 & !Q1_rec_sm_1 & Q1_rec_sm_0; --Q1_rec_sm_0 is clkpre_counter:cp|pre_dec:pdec|rec_sm_0 --operation mode is normal Q1_rec_sm_0_lut_out = Q1_nx121 & (Q1_rec_sm_2 # Q1_rec_sm_1 # Q1_nx103); Q1_rec_sm_0 = DFFEAS(Q1_rec_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_fc_1 is clkpre_counter:cp|pre_dec:pdec|fc_1 --operation mode is normal Q1_fc_1_lut_out = Q1_ptrf_0; Q1_fc_1 = DFFEAS(Q1_fc_1_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx285, , , , ); --Q1_fc_0 is clkpre_counter:cp|pre_dec:pdec|fc_0 --operation mode is normal Q1_fc_0_lut_out = Q1_ptrf_0; Q1_fc_0 = DFFEAS(Q1_fc_0_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx295, , , , ); --Q1_nx120 is clkpre_counter:cp|pre_dec:pdec|nx120 --operation mode is normal Q1_nx120 = Q1_rec_sm_2 & Q1_rec_sm_1; --B1_nx720 is clkpre_counter:cp|nx720 --operation mode is normal B1_nx720 = !B1_ptimer_3 # !B1_ptimer_4 # !B1_ptimer_5 # !B1_ptimer_6; --B1_nx891 is clkpre_counter:cp|nx891 --operation mode is normal B1_nx891 = Q1_PTRGG # Q1_FUNC_3 # B1_nx437; --B1_nx1328 is clkpre_counter:cp|nx1328 --operation mode is arithmetic B1_nx1328_carry_eqn = B1_result_inc_716_nx60; B1_nx1328 = B1_ptimer_7 $ (B1_nx1328_carry_eqn); --B1_result_inc_716_nx64 is clkpre_counter:cp|result_inc_716_nx64 --operation mode is arithmetic B1_result_inc_716_nx64 = CARRY(!B1_result_inc_716_nx60 # !B1_ptimer_7); --B1_nx1329 is clkpre_counter:cp|nx1329 --operation mode is arithmetic B1_nx1329_carry_eqn = B1_result_inc_716_nx56; B1_nx1329 = B1_ptimer_6 $ (!B1_nx1329_carry_eqn); --B1_result_inc_716_nx60 is clkpre_counter:cp|result_inc_716_nx60 --operation mode is arithmetic B1_result_inc_716_nx60 = CARRY(B1_ptimer_6 & (!B1_result_inc_716_nx56)); --B1_nx1330 is clkpre_counter:cp|nx1330 --operation mode is arithmetic B1_nx1330_carry_eqn = B1_result_inc_716_nx52; B1_nx1330 = B1_ptimer_5 $ (B1_nx1330_carry_eqn); --B1_result_inc_716_nx56 is clkpre_counter:cp|result_inc_716_nx56 --operation mode is arithmetic B1_result_inc_716_nx56 = CARRY(!B1_result_inc_716_nx52 # !B1_ptimer_5); --B1_nx1331 is clkpre_counter:cp|nx1331 --operation mode is arithmetic B1_nx1331_carry_eqn = B1_result_inc_716_nx48; B1_nx1331 = B1_ptimer_4 $ (!B1_nx1331_carry_eqn); --B1_result_inc_716_nx52 is clkpre_counter:cp|result_inc_716_nx52 --operation mode is arithmetic B1_result_inc_716_nx52 = CARRY(B1_ptimer_4 & (!B1_result_inc_716_nx48)); --B1_nx1332 is clkpre_counter:cp|nx1332 --operation mode is arithmetic B1_nx1332_carry_eqn = B1_result_inc_716_nx44; B1_nx1332 = B1_ptimer_3 $ (B1_nx1332_carry_eqn); --B1_result_inc_716_nx48 is clkpre_counter:cp|result_inc_716_nx48 --operation mode is arithmetic B1_result_inc_716_nx48 = CARRY(!B1_result_inc_716_nx44 # !B1_ptimer_3); --B1_result_inc_716_nx36 is clkpre_counter:cp|result_inc_716_nx36 --operation mode is arithmetic B1_result_inc_716_nx36 = CARRY(B1_ptimer_0); --B1_nx1415 is clkpre_counter:cp|nx1415 --operation mode is arithmetic B1_nx1415_carry_eqn = B1_result_inc_716_nx40; B1_nx1415 = B1_nx1314 # B1_nx437 $ B1_nx1415_carry_eqn; --B1_result_inc_716_nx44 is clkpre_counter:cp|result_inc_716_nx44 --operation mode is arithmetic B1_result_inc_716_nx44 = CARRY(!B1_nx437 & (!B1_result_inc_716_nx40)); --N1_request_20 is mcm_nw_nwl:scsn_slave_nw_nwl|request_20 --operation mode is normal N1_request_20 = N1_select_rq & (L2_data_out_20) # !N1_select_rq & L1_data_out_20; --B1_nx1326 is clkpre_counter:cp|nx1326 --operation mode is arithmetic B1_nx1326_carry_eqn = B1_result_inc_716_nx68; B1_nx1326 = B1_ptimer_9 $ (B1_nx1326_carry_eqn); --B1_result_inc_716_nx72 is clkpre_counter:cp|result_inc_716_nx72 --operation mode is arithmetic B1_result_inc_716_nx72 = CARRY(!B1_result_inc_716_nx68 # !B1_ptimer_9); --B1_nx1327 is clkpre_counter:cp|nx1327 --operation mode is arithmetic B1_nx1327_carry_eqn = B1_result_inc_716_nx64; B1_nx1327 = B1_ptimer_8 $ (!B1_nx1327_carry_eqn); --B1_result_inc_716_nx68 is clkpre_counter:cp|result_inc_716_nx68 --operation mode is arithmetic B1_result_inc_716_nx68 = CARRY(B1_ptimer_8 & (!B1_result_inc_716_nx64)); --Y1_request_valid is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|request_valid --operation mode is normal Y1_request_valid = !Y1_current_state_3 & !Y1_current_state_2 & Y1_current_state_1 & !Y1_current_state_0; --N1_nx222 is mcm_nw_nwl:scsn_slave_nw_nwl|nx222 --operation mode is normal N1_nx222 = !N1_current_state_0 & Y2_request_valid & (N1_current_state_2 # N1_current_state_1); --N1_nx230 is mcm_nw_nwl:scsn_slave_nw_nwl|nx230 --operation mode is normal N1_nx230 = !N1_current_state_1 # !N1_current_state_2; --J1_nx425 is mcm_nw_apl:scsn_slave_nw_apl|nx425 --operation mode is normal J1_nx425 = J1_current_state_3 & (!J1_current_state_0) # !J1_current_state_3 & (J1_current_state_0 & C1_bus_ack # !J1_current_state_0 & (J1_nx407)); --J1_nx431 is mcm_nw_apl:scsn_slave_nw_apl|nx431 --operation mode is normal J1_nx431 = J1_current_state_2 & J1_current_state_0 & (J1_nx432 # J1_nx433); --J1_nx432 is mcm_nw_apl:scsn_slave_nw_apl|nx432 --operation mode is normal J1_nx432 = !J1_current_state_3 & !J1_current_state_1 & J1_long_transaction & !J1_nx402; --J1_nx417 is mcm_nw_apl:scsn_slave_nw_apl|nx417 --operation mode is normal J1_nx417 = N1_request_52 & (N1_request_51 # !N1_request_50) # !N1_request_52 & N1_request_51 & !N1_request_50; --J1_nx418 is mcm_nw_apl:scsn_slave_nw_apl|nx418 --operation mode is normal J1_nx418 = N1_request_51 & !N1_request_50 & N1_request_valid & J1_current_state_2; --J1_nx419 is mcm_nw_apl:scsn_slave_nw_apl|nx419 --operation mode is normal J1_nx419 = !J1_current_state_3 & !J1_current_state_1 & !J1_current_state_0 & J1_nx429; --J1_nx107 is mcm_nw_apl:scsn_slave_nw_apl|nx107 --operation mode is normal J1_nx107 = N1_request_valid & C1_bus_ack; --J1_a_2_dup_232 is mcm_nw_apl:scsn_slave_nw_apl|a_2_dup_232 --operation mode is normal J1_a_2_dup_232 = J1_long_transaction & (J1_waitcount_5 # J1_waitcount_4 # J1_nx405); --J1_nx422 is mcm_nw_apl:scsn_slave_nw_apl|nx422 --operation mode is normal J1_nx422 = !J1_current_state_2 & (N1_request_51 # N1_request_52 $ N1_request_50); --J1_nx426 is mcm_nw_apl:scsn_slave_nw_apl|nx426 --operation mode is normal J1_nx426 = N1_request_52 & !N1_request_50 & J1_nx434 # !J1_current_state_2; --J1_nx435 is mcm_nw_apl:scsn_slave_nw_apl|nx435 --operation mode is normal J1_nx435 = J1_current_state_1 # J1_current_state_2 & (!J1_a_2_dup_232) # !J1_current_state_2 & J1_nx107; --J1_nx436 is mcm_nw_apl:scsn_slave_nw_apl|nx436 --operation mode is normal J1_nx436 = J1_a_2_dup_232 # !C1_bus_dout_0 & J1_current_state_2 # !J1_current_state_1; --J1_nx410 is mcm_nw_apl:scsn_slave_nw_apl|nx410 --operation mode is normal J1_nx410 = J1_current_state_0 & (J1_nx413 # J1_nx411 & J1_nx415) # !J1_current_state_0 & J1_nx411 & (J1_nx415); --J1_nx412 is mcm_nw_apl:scsn_slave_nw_apl|nx412 --operation mode is normal J1_nx412 = !J1_current_state_3 & !J1_current_state_2 & !J1_current_state_1 & J1_nx429; --R1_shiftd_3 is clkpre_counter:cp|pre_enc:pend|shiftd_3 --operation mode is normal R1_shiftd_3_lut_out = R1_FUNC_s_2; R1_shiftd_3 = DFFEAS(R1_shiftd_3_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, R1_shiftd_2, , , R1_send_sm); --R1_nx192 is clkpre_counter:cp|pre_enc:pend|nx192 --operation mode is arithmetic R1_nx192_carry_eqn = R1_bitcnt_dec_642_nx14; R1_nx192 = R1_NOT_bitcnt_1 $ R1_nx192_carry_eqn # !R1_send_sm; --R1_bitcnt_dec_642_nx18 is clkpre_counter:cp|pre_enc:pend|bitcnt_dec_642_nx18 --operation mode is arithmetic R1_bitcnt_dec_642_nx18 = CARRY(R1_NOT_bitcnt_1 & (!R1_bitcnt_dec_642_nx14)); --R1_NOT_nx196 is clkpre_counter:cp|pre_enc:pend|NOT_nx196 --operation mode is normal R1_NOT_nx196 = R1_counter_nx12 & R1_counter_nx20 & R1_nx86 # !R1_send_sm; --R1_bitcnt_0 is clkpre_counter:cp|pre_enc:pend|bitcnt_0 --operation mode is normal R1_bitcnt_0_lut_out = !R1_bitcnt_0 & R1_send_sm; R1_bitcnt_0 = DFFEAS(R1_bitcnt_0_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx196, , , , ); --R1_NOT_bitcnt_2 is clkpre_counter:cp|pre_enc:pend|NOT_bitcnt_2 --operation mode is normal R1_NOT_bitcnt_2_lut_out = !R1_nx190; R1_NOT_bitcnt_2 = DFFEAS(R1_NOT_bitcnt_2_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx196, , , , ); --R1_LOAD is clkpre_counter:cp|pre_enc:pend|LOAD --operation mode is normal R1_LOAD = R1_counter_nx12 & R1_counter_nx20 # !R1_send_sm; --K1_current_state_3 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|current_state_3 --operation mode is normal K1_current_state_3_lut_out = !K1_nx156 & !K1_nx158 & K1_nx196 & K1_nx197; K1_current_state_3 = DFFEAS(K1_current_state_3_lut_out, X1__clk0, VCC, , , , , , ); --K1_current_state_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|current_state_2 --operation mode is normal K1_current_state_2_lut_out = K1_nx160 # K1_nx161 # K1_nx163 # K1_nx195; K1_current_state_2 = DFFEAS(K1_current_state_2_lut_out, X1__clk0, VCC, , , , , , ); --K1_current_state_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|current_state_0 --operation mode is normal K1_current_state_0_lut_out = K1_nx166 # K1_nx188 # K1_nx190 # K1_nx191; K1_current_state_0 = DFFEAS(K1_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --L1_nx277 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx277 --operation mode is normal L1_nx277 = K1_strobe_out & !L1_bitcounter_5 & !L1_bitcounter_3 & !L1_bitcounter_4; --L1_nx285 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx285 --operation mode is normal L1_nx285 = K1_strobe_out & !L1_bitcounter_6; --L1_nx286 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx286 --operation mode is normal L1_nx286 = L1_bitcounter_2 & (L1_bitcounter_1 # L1_bitcounter_0); --K2_current_state_3 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|current_state_3 --operation mode is normal K2_current_state_3_lut_out = !K2_nx156 & !K2_nx158 & K2_nx196 & K2_nx197; K2_current_state_3 = DFFEAS(K2_current_state_3_lut_out, X1__clk0, VCC, , , , , , ); --K2_current_state_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|current_state_2 --operation mode is normal K2_current_state_2_lut_out = K2_nx160 # K2_nx161 # K2_nx163 # K2_nx195; K2_current_state_2 = DFFEAS(K2_current_state_2_lut_out, X1__clk0, VCC, , , , , , ); --K2_current_state_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|current_state_0 --operation mode is normal K2_current_state_0_lut_out = K2_nx166 # K2_nx188 # K2_nx190 # K2_nx191; K2_current_state_0 = DFFEAS(K2_current_state_0_lut_out, X1__clk0, VCC, , , , , , ); --L2_nx277 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx277 --operation mode is normal L2_nx277 = K2_strobe_out & !L2_bitcounter_5 & !L2_bitcounter_3 & !L2_bitcounter_4; --L2_nx285 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx285 --operation mode is normal L2_nx285 = K2_strobe_out & !L2_bitcounter_6; --L2_nx286 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx286 --operation mode is normal L2_nx286 = L2_bitcounter_2 & (L2_bitcounter_1 # L2_bitcounter_0); --N1_nx229 is mcm_nw_nwl:scsn_slave_nw_nwl|nx229 --operation mode is normal N1_nx229 = N1_current_state_1 & !N1_current_state_2 & N1_current_state_0 # !N1_current_state_1 & Y1_request_valid & (N1_current_state_0 # !N1_current_state_2); --Y2_current_state_3 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|current_state_3 --operation mode is normal Y2_current_state_3_lut_out = !M2_freeze_buffer & Y2_current_state_2 & Y2_current_state_0 & !Y2_nx152; Y2_current_state_3 = DFFEAS(Y2_current_state_3_lut_out, X1__clk0, VCC, , Y2_nx143, , , , ); --Y2_current_state_2 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|current_state_2 --operation mode is normal Y2_current_state_2_lut_out = Y2_nx155 # Y2_nx160 # Y2_nx161 # Y2_nx179; Y2_current_state_2 = DFFEAS(Y2_current_state_2_lut_out, X1__clk0, VCC, , , , , , ); --Y2_current_state_1 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|current_state_1 --operation mode is normal Y2_current_state_1_lut_out = Y2_nx162 # Y2_nx163 # Y2_nx164 # Y2_nx165; Y2_current_state_1 = DFFEAS(Y2_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --Y2_current_state_0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|current_state_0 --operation mode is normal Y2_current_state_0_lut_out = Y2_nx166 # Y2_nx173 # M2_freeze_buffer & Y2_nx168; Y2_current_state_0 = DFFEAS(Y2_current_state_0_lut_out, X1__clk0, VCC, , Y2_nx145, , , , ); --L1_data_out_42 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_42 --operation mode is normal L1_data_out_42_lut_out = L1_data_out_41; L1_data_out_42 = DFFEAS(L1_data_out_42_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_42 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_42 --operation mode is normal L2_data_out_42_lut_out = L2_data_out_41; L2_data_out_42 = DFFEAS(L2_data_out_42_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_37 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_37 --operation mode is normal L1_data_out_37_lut_out = L1_data_out_36; L1_data_out_37 = DFFEAS(L1_data_out_37_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_37 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_37 --operation mode is normal L2_data_out_37_lut_out = L2_data_out_36; L2_data_out_37 = DFFEAS(L2_data_out_37_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_38 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_38 --operation mode is normal L1_data_out_38_lut_out = L1_data_out_37; L1_data_out_38 = DFFEAS(L1_data_out_38_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_38 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_38 --operation mode is normal L2_data_out_38_lut_out = L2_data_out_37; L2_data_out_38 = DFFEAS(L2_data_out_38_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_request_33 is mcm_nw_nwl:scsn_slave_nw_nwl|request_33 --operation mode is normal N1_request_33 = N1_select_rq & (L2_data_out_33) # !N1_select_rq & L1_data_out_33; --N1_request_34 is mcm_nw_nwl:scsn_slave_nw_nwl|request_34 --operation mode is normal N1_request_34 = N1_select_rq & (L2_data_out_34) # !N1_select_rq & L1_data_out_34; --N1_request_35 is mcm_nw_nwl:scsn_slave_nw_nwl|request_35 --operation mode is normal N1_request_35 = N1_select_rq & (L2_data_out_35) # !N1_select_rq & L1_data_out_35; --N1_request_36 is mcm_nw_nwl:scsn_slave_nw_nwl|request_36 --operation mode is normal N1_request_36 = N1_select_rq & (L2_data_out_36) # !N1_select_rq & L1_data_out_36; --N1_request_39 is mcm_nw_nwl:scsn_slave_nw_nwl|request_39 --operation mode is normal N1_request_39 = N1_select_rq & (L2_data_out_39) # !N1_select_rq & L1_data_out_39; --N1_request_40 is mcm_nw_nwl:scsn_slave_nw_nwl|request_40 --operation mode is normal N1_request_40 = N1_select_rq & (L2_data_out_40) # !N1_select_rq & L1_data_out_40; --C1_bus_ack is gio_devices:gio|bus_ack --operation mode is normal C1_bus_ack_regcasc_in = C1_ix0_nx24; C1_bus_ack = DFFEAS(C1_bus_ack_regcasc_in, X1__clk0, VCC, , , , , , ); --J1_req_rise is mcm_nw_apl:scsn_slave_nw_apl|req_rise --operation mode is normal J1_req_rise = !J1_req_reg & J1_cfg_req; --J1_modgen_eq_573_nx8 is mcm_nw_apl:scsn_slave_nw_apl|modgen_eq_573_nx8 --operation mode is normal J1_modgen_eq_573_nx8 = J1_current_state_dp_2 # J1_bus_req # !J1_current_state_dp_0; --J1_modgen_eq_574_nx8 is mcm_nw_apl:scsn_slave_nw_apl|modgen_eq_574_nx8 --operation mode is normal J1_modgen_eq_574_nx8 = J1_current_state_dp_2 # J1_current_state_dp_0 # !J1_bus_req; --L1_data_out_52 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_52 --operation mode is normal L1_data_out_52_lut_out = L1_data_out_51; L1_data_out_52 = DFFEAS(L1_data_out_52_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_52 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_52 --operation mode is normal L2_data_out_52_lut_out = L2_data_out_51; L2_data_out_52 = DFFEAS(L2_data_out_52_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_51 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_51 --operation mode is normal L1_data_out_51_lut_out = L1_data_out_50; L1_data_out_51 = DFFEAS(L1_data_out_51_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_51 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_51 --operation mode is normal L2_data_out_51_lut_out = L2_data_out_50; L2_data_out_51 = DFFEAS(L2_data_out_51_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_50 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_50 --operation mode is normal L1_data_out_50_lut_out = L1_data_out_49; L1_data_out_50 = DFFEAS(L1_data_out_50_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_50 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_50 --operation mode is normal L2_data_out_50_lut_out = L2_data_out_49; L2_data_out_50 = DFFEAS(L2_data_out_50_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_49 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_49 --operation mode is normal L1_data_out_49_lut_out = L1_data_out_48; L1_data_out_49 = DFFEAS(L1_data_out_49_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_49 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_49 --operation mode is normal L2_data_out_49_lut_out = L2_data_out_48; L2_data_out_49 = DFFEAS(L2_data_out_49_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_41 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_41 --operation mode is normal L1_data_out_41_lut_out = L1_data_out_40; L1_data_out_41 = DFFEAS(L1_data_out_41_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_41 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_41 --operation mode is normal L2_data_out_41_lut_out = L2_data_out_40; L2_data_out_41 = DFFEAS(L2_data_out_41_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_20 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_20 --operation mode is normal L1_data_out_20_lut_out = L1_data_out_19; L1_data_out_20 = DFFEAS(L1_data_out_20_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_20 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_20 --operation mode is normal L2_data_out_20_lut_out = L2_data_out_19; L2_data_out_20 = DFFEAS(L2_data_out_20_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_44 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_44 --operation mode is normal L1_data_out_44_lut_out = L1_data_out_43; L1_data_out_44 = DFFEAS(L1_data_out_44_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_44 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_44 --operation mode is normal L2_data_out_44_lut_out = L2_data_out_43; L2_data_out_44 = DFFEAS(L2_data_out_44_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --B1_L0time_12 is clkpre_counter:cp|L0time_12 --operation mode is normal B1_L0time_12_lut_out = N1_request_19; B1_L0time_12 = DFFEAS(B1_L0time_12_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_nx865 is clkpre_counter:cp|nx865 --operation mode is normal B1_nx865 = B1_nx869 & B1_nx870 & B1_nx871 & B1_nx872; --B1_nx866 is clkpre_counter:cp|nx866 --operation mode is normal B1_nx866 = B1_nx867 & B1_nx868 & (B1_L0time_13 $ !B1_ptimer_13); --B1_L1time_12 is clkpre_counter:cp|L1time_12 --operation mode is normal B1_L1time_12_lut_out = N1_request_19; B1_L1time_12 = DFFEAS(B1_L1time_12_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_nx857 is clkpre_counter:cp|nx857 --operation mode is normal B1_nx857 = B1_nx861 & B1_nx862 & B1_nx863 & B1_nx864; --B1_nx858 is clkpre_counter:cp|nx858 --operation mode is normal B1_nx858 = B1_nx859 & B1_nx860 & (B1_L1time_13 $ !B1_ptimer_13); --B1_L2time_12 is clkpre_counter:cp|L2time_12 --operation mode is normal B1_L2time_12_lut_out = N1_request_19; B1_L2time_12 = DFFEAS(B1_L2time_12_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_nx849 is clkpre_counter:cp|nx849 --operation mode is normal B1_nx849 = B1_nx853 & B1_nx854 & B1_nx855 & B1_nx856; --B1_nx850 is clkpre_counter:cp|nx850 --operation mode is normal B1_nx850 = B1_nx851 & B1_nx852 & (B1_L2time_13 $ !B1_ptimer_13); --L1_data_out_48 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_48 --operation mode is normal L1_data_out_48_lut_out = L1_data_out_47; L1_data_out_48 = DFFEAS(L1_data_out_48_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_48 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_48 --operation mode is normal L2_data_out_48_lut_out = L2_data_out_47; L2_data_out_48 = DFFEAS(L2_data_out_48_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_ni_ir_cnt_rst_3 is general_config_notri:nic_notri|ni_ir_cnt_rst_3 --operation mode is arithmetic G1_ni_ir_cnt_rst_3_carry_eqn = G1_ni_ir_cnt_rst_nx22; G1_ni_ir_cnt_rst_3_lut_out = G1_ni_ir_cnt_rst_3 $ (G1_ni_ir_cnt_rst_3_carry_eqn); G1_ni_ir_cnt_rst_3 = DFFEAS(G1_ni_ir_cnt_rst_3_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx28 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx28 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx28 = CARRY(!G1_ni_ir_cnt_rst_nx22 # !G1_ni_ir_cnt_rst_3); --N1_nx224 is mcm_nw_nwl:scsn_slave_nw_nwl|nx224 --operation mode is normal N1_nx224 = N1_current_state_0 & !M1_freeze_buffer & !M2_freeze_buffer # !N1_current_state_0 & (J1_bridge_alter); --N1_nx225 is mcm_nw_nwl:scsn_slave_nw_nwl|nx225 --operation mode is normal N1_nx225 = N1_current_state_1 & !N1_current_state_0 & (Y2_request_valid) # !N1_current_state_1 & (Y1_request_valid # !N1_current_state_0); --N1_nx226 is mcm_nw_nwl:scsn_slave_nw_nwl|nx226 --operation mode is normal N1_nx226 = N1_current_state_1 & Y2_request_valid & (!N1_nx233) # !N1_current_state_1 & (N1_nx227); --N1_nx228 is mcm_nw_nwl:scsn_slave_nw_nwl|nx228 --operation mode is normal N1_nx228 = N1_current_state_1 & (M1_freeze_buffer # M2_freeze_buffer) # !N1_current_state_1 & (J1_bridge_alter); --scsn_slave_nw_dll_ob0_bitcounter_5 is scsn_slave_nw_dll_ob0_bitcounter_5 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_5_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx33; scsn_slave_nw_dll_ob0_bitcounter_5_lut_out = scsn_slave_nw_dll_ob0_bitcounter_5 $ (scsn_slave_nw_dll_ob0_bitcounter_5_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_5 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_5_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx37 is scsn_slave_nw_dll_ob0_bitcounter_nx37 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx37 = CARRY(!scsn_slave_nw_dll_ob0_bitcounter_nx33 # !scsn_slave_nw_dll_ob0_bitcounter_5); --scsn_slave_nw_dll_ob0_modgen_gt_108_nx60 is scsn_slave_nw_dll_ob0_modgen_gt_108_nx60 --operation mode is normal scsn_slave_nw_dll_ob0_modgen_gt_108_nx60 = !scsn_slave_nw_dll_ob0_bitcounter_3 & (!scsn_slave_nw_dll_ob0_bitcounter_1 & !scsn_slave_nw_dll_ob0_bitcounter_0 # !scsn_slave_nw_dll_ob0_bitcounter_2); --scsn_slave_nw_dll_ob0_bitcounter_4 is scsn_slave_nw_dll_ob0_bitcounter_4 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_4_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx27; scsn_slave_nw_dll_ob0_bitcounter_4_lut_out = scsn_slave_nw_dll_ob0_bitcounter_4 $ (!scsn_slave_nw_dll_ob0_bitcounter_4_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_4 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_4_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx33 is scsn_slave_nw_dll_ob0_bitcounter_nx33 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx33 = CARRY(scsn_slave_nw_dll_ob0_bitcounter_4 & (!scsn_slave_nw_dll_ob0_bitcounter_nx27)); --scsn_slave_nw_dll_ob0_bitcounter_6 is scsn_slave_nw_dll_ob0_bitcounter_6 --operation mode is normal scsn_slave_nw_dll_ob0_bitcounter_6_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx37; scsn_slave_nw_dll_ob0_bitcounter_6_lut_out = scsn_slave_nw_dll_ob0_bitcounter_6 $ (!scsn_slave_nw_dll_ob0_bitcounter_6_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_6 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_6_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --M1_timer_in_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_state_2 --operation mode is normal M1_timer_in_state_2_lut_out = !M1_current_state_2 & M1_b_1_dup_60 & (M1_current_state_1 # M1_current_state_0); M1_timer_in_state_2 = DFFEAS(M1_timer_in_state_2_lut_out, X1__clk0, VCC, , M1_timer_in_nx116, , , , ); --M1_timer_in_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_state_0 --operation mode is normal M1_timer_in_state_0_lut_out = !M1_current_state_2 & M1_b_0 & (M1_current_state_1 # M1_current_state_0); M1_timer_in_state_0 = DFFEAS(M1_timer_in_state_0_lut_out, X1__clk0, VCC, , M1_timer_in_nx116, , , , ); --M1_timer_in_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_state_1 --operation mode is normal M1_timer_in_state_1_lut_out = !M1_current_state_2 & M1_b_1_dup_66 & (M1_current_state_1 # M1_current_state_0); M1_timer_in_state_1 = DFFEAS(M1_timer_in_state_1_lut_out, X1__clk0, VCC, , M1_timer_in_nx116, , , , ); --M1_sleep_event is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleep_event --operation mode is normal M1_sleep_event_lut_out = M1_sleeptimer_state_0 & M1_sleeptimer_state_1 & !M1_nx223 & !M1_nx229; M1_sleep_event = DFFEAS(M1_sleep_event_lut_out, X1__clk0, VCC, , , , , , ); --Y1_d_initiate_send is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_initiate_send --operation mode is normal Y1_d_initiate_send = !Y1_current_state_1 & !Y1_current_state_0 & (Y1_current_state_3 $ Y1_current_state_2); --scsn_slave_nw_dll_ob0_ob_data_68 is scsn_slave_nw_dll_ob0_ob_data_68 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_68_lut_out = scsn_slave_nw_dll_ob0_ob_data_67; scsn_slave_nw_dll_ob0_ob_data_68 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_68_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_68, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob0_ob_crc_15 is scsn_slave_nw_dll_ob0_ob_crc_15 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_15_lut_out = scsn_slave_nw_dll_ob0_ob_crc_14 $ (scsn_slave_nw_dll_ob0_ob_crc_15 & (scsn_slave_nw_dll_ob0_NOT_ob_empty)); scsn_slave_nw_dll_ob0_ob_crc_15 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_15_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_68, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob0_NOT_ob_empty is scsn_slave_nw_dll_ob0_NOT_ob_empty --operation mode is normal scsn_slave_nw_dll_ob0_NOT_ob_empty = !scsn_slave_nw_dll_ob0_bitcounter_5 & scsn_slave_nw_dll_ob0_modgen_gt_108_nx60 & !scsn_slave_nw_dll_ob0_bitcounter_4 # !scsn_slave_nw_dll_ob0_bitcounter_6; --M1_stuff_in_data is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_data --operation mode is normal M1_stuff_in_data_lut_out = M1_nx222 # M1_nx224 # scsn_slave_nw_dll_ob0_data & M1_nx226; M1_stuff_in_data = DFFEAS(M1_stuff_in_data_lut_out, X1__clk0, VCC, , M1_stuffing_strobe_in, , , , ); --M1_nx222 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx222 --operation mode is normal M1_nx222 = !M1_current_state_2 & !M1_current_state_1 & M1_current_state_0; --M1_stuff_in_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_state_2 --operation mode is normal M1_stuff_in_state_2_carry_eqn = M1_stuff_in_state_nx12; M1_stuff_in_state_2_lut_out = M1_stuff_in_state_2 $ (!M1_stuff_in_state_2_carry_eqn); M1_stuff_in_state_2 = DFFEAS(M1_stuff_in_state_2_lut_out, X1__clk0, VCC, , M1_stuffing_strobe_in, , , M1_SCLEAR, ); --M1_stuff_in_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_state_1 --operation mode is arithmetic M1_stuff_in_state_1_carry_eqn = M1_stuff_in_state_nx6; M1_stuff_in_state_1_lut_out = M1_stuff_in_state_1 $ (M1_stuff_in_state_1_carry_eqn); M1_stuff_in_state_1 = DFFEAS(M1_stuff_in_state_1_lut_out, X1__clk0, VCC, , M1_stuffing_strobe_in, , , M1_SCLEAR, ); --M1_stuff_in_state_nx12 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_state_nx12 --operation mode is arithmetic M1_stuff_in_state_nx12 = CARRY(!M1_stuff_in_state_nx6 # !M1_stuff_in_state_1); --M1_stuff_in_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_state_0 --operation mode is arithmetic M1_stuff_in_state_0_lut_out = !M1_stuff_in_state_0; M1_stuff_in_state_0 = DFFEAS(M1_stuff_in_state_0_lut_out, X1__clk0, VCC, , M1_stuffing_strobe_in, , , M1_SCLEAR, ); --M1_stuff_in_state_nx6 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_in_state_nx6 --operation mode is arithmetic M1_stuff_in_state_nx6 = CARRY(M1_stuff_in_state_0); --M1_nx221 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx221 --operation mode is normal M1_nx221 = !M1_current_state_1 & (!M1_current_state_0 # !M1_current_state_2); --scsn_slave_nw_dll_ob1_bitcounter_5 is scsn_slave_nw_dll_ob1_bitcounter_5 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_5_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx33; scsn_slave_nw_dll_ob1_bitcounter_5_lut_out = scsn_slave_nw_dll_ob1_bitcounter_5 $ (scsn_slave_nw_dll_ob1_bitcounter_5_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_5 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_5_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx37 is scsn_slave_nw_dll_ob1_bitcounter_nx37 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx37 = CARRY(!scsn_slave_nw_dll_ob1_bitcounter_nx33 # !scsn_slave_nw_dll_ob1_bitcounter_5); --scsn_slave_nw_dll_ob1_modgen_gt_108_nx60 is scsn_slave_nw_dll_ob1_modgen_gt_108_nx60 --operation mode is normal scsn_slave_nw_dll_ob1_modgen_gt_108_nx60 = !scsn_slave_nw_dll_ob1_bitcounter_3 & (!scsn_slave_nw_dll_ob1_bitcounter_1 & !scsn_slave_nw_dll_ob1_bitcounter_0 # !scsn_slave_nw_dll_ob1_bitcounter_2); --scsn_slave_nw_dll_ob1_bitcounter_4 is scsn_slave_nw_dll_ob1_bitcounter_4 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_4_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx27; scsn_slave_nw_dll_ob1_bitcounter_4_lut_out = scsn_slave_nw_dll_ob1_bitcounter_4 $ (!scsn_slave_nw_dll_ob1_bitcounter_4_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_4 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_4_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx33 is scsn_slave_nw_dll_ob1_bitcounter_nx33 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx33 = CARRY(scsn_slave_nw_dll_ob1_bitcounter_4 & (!scsn_slave_nw_dll_ob1_bitcounter_nx27)); --scsn_slave_nw_dll_ob1_bitcounter_6 is scsn_slave_nw_dll_ob1_bitcounter_6 --operation mode is normal scsn_slave_nw_dll_ob1_bitcounter_6_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx37; scsn_slave_nw_dll_ob1_bitcounter_6_lut_out = scsn_slave_nw_dll_ob1_bitcounter_6 $ (!scsn_slave_nw_dll_ob1_bitcounter_6_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_6 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_6_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --M2_timer_in_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_state_2 --operation mode is normal M2_timer_in_state_2_lut_out = !M2_current_state_2 & M2_b_1_dup_60 & (M2_current_state_1 # M2_current_state_0); M2_timer_in_state_2 = DFFEAS(M2_timer_in_state_2_lut_out, X1__clk0, VCC, , M2_timer_in_nx116, , , , ); --M2_timer_in_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_state_0 --operation mode is normal M2_timer_in_state_0_lut_out = !M2_current_state_2 & M2_b_0 & (M2_current_state_1 # M2_current_state_0); M2_timer_in_state_0 = DFFEAS(M2_timer_in_state_0_lut_out, X1__clk0, VCC, , M2_timer_in_nx116, , , , ); --M2_timer_in_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_state_1 --operation mode is normal M2_timer_in_state_1_lut_out = !M2_current_state_2 & M2_b_1_dup_66 & (M2_current_state_1 # M2_current_state_0); M2_timer_in_state_1 = DFFEAS(M2_timer_in_state_1_lut_out, X1__clk0, VCC, , M2_timer_in_nx116, , , , ); --M2_sleep_event is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleep_event --operation mode is normal M2_sleep_event_lut_out = M2_sleeptimer_state_0 & M2_sleeptimer_state_1 & !M2_nx223 & !M2_nx229; M2_sleep_event = DFFEAS(M2_sleep_event_lut_out, X1__clk0, VCC, , , , , , ); --Y2_d_initiate_send is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_initiate_send --operation mode is normal Y2_d_initiate_send = !Y2_current_state_1 & !Y2_current_state_0 & (Y2_current_state_3 $ Y2_current_state_2); --scsn_slave_nw_dll_ob1_ob_data_68 is scsn_slave_nw_dll_ob1_ob_data_68 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_68_lut_out = scsn_slave_nw_dll_ob1_ob_data_67; scsn_slave_nw_dll_ob1_ob_data_68 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_68_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_68, , , scsn_slave_nw_dll_ob1_a_2); --scsn_slave_nw_dll_ob1_ob_crc_15 is scsn_slave_nw_dll_ob1_ob_crc_15 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_15_lut_out = scsn_slave_nw_dll_ob1_ob_crc_14 $ (scsn_slave_nw_dll_ob1_ob_crc_15 & (scsn_slave_nw_dll_ob1_NOT_ob_empty)); scsn_slave_nw_dll_ob1_ob_crc_15 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_15_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_68, , , scsn_slave_nw_dll_ob1_a_2); --scsn_slave_nw_dll_ob1_NOT_ob_empty is scsn_slave_nw_dll_ob1_NOT_ob_empty --operation mode is normal scsn_slave_nw_dll_ob1_NOT_ob_empty = !scsn_slave_nw_dll_ob1_bitcounter_5 & scsn_slave_nw_dll_ob1_modgen_gt_108_nx60 & !scsn_slave_nw_dll_ob1_bitcounter_4 # !scsn_slave_nw_dll_ob1_bitcounter_6; --M2_stuff_in_data is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_data --operation mode is normal M2_stuff_in_data_lut_out = M2_nx222 # M2_nx224 # scsn_slave_nw_dll_ob1_data & M2_nx226; M2_stuff_in_data = DFFEAS(M2_stuff_in_data_lut_out, X1__clk0, VCC, , M2_stuffing_strobe_in, , , , ); --M2_nx222 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx222 --operation mode is normal M2_nx222 = !M2_current_state_2 & !M2_current_state_1 & M2_current_state_0; --M2_stuff_in_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_state_2 --operation mode is normal M2_stuff_in_state_2_carry_eqn = M2_stuff_in_state_nx12; M2_stuff_in_state_2_lut_out = M2_stuff_in_state_2 $ (!M2_stuff_in_state_2_carry_eqn); M2_stuff_in_state_2 = DFFEAS(M2_stuff_in_state_2_lut_out, X1__clk0, VCC, , M2_stuffing_strobe_in, , , M2_SCLEAR, ); --M2_stuff_in_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_state_1 --operation mode is arithmetic M2_stuff_in_state_1_carry_eqn = M2_stuff_in_state_nx6; M2_stuff_in_state_1_lut_out = M2_stuff_in_state_1 $ (M2_stuff_in_state_1_carry_eqn); M2_stuff_in_state_1 = DFFEAS(M2_stuff_in_state_1_lut_out, X1__clk0, VCC, , M2_stuffing_strobe_in, , , M2_SCLEAR, ); --M2_stuff_in_state_nx12 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_state_nx12 --operation mode is arithmetic M2_stuff_in_state_nx12 = CARRY(!M2_stuff_in_state_nx6 # !M2_stuff_in_state_1); --M2_stuff_in_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_state_0 --operation mode is arithmetic M2_stuff_in_state_0_lut_out = !M2_stuff_in_state_0; M2_stuff_in_state_0 = DFFEAS(M2_stuff_in_state_0_lut_out, X1__clk0, VCC, , M2_stuffing_strobe_in, , , M2_SCLEAR, ); --M2_stuff_in_state_nx6 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_in_state_nx6 --operation mode is arithmetic M2_stuff_in_state_nx6 = CARRY(M2_stuff_in_state_0); --M2_nx221 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx221 --operation mode is normal M2_nx221 = !M2_current_state_1 & (!M2_current_state_0 # !M2_current_state_2); --L1_data_out_25 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_25 --operation mode is normal L1_data_out_25_lut_out = L1_data_out_24; L1_data_out_25 = DFFEAS(L1_data_out_25_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_25 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_25 --operation mode is normal L2_data_out_25_lut_out = L2_data_out_24; L2_data_out_25 = DFFEAS(L2_data_out_25_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_nx613 is general_config_notri:nic_notri|nx613 --operation mode is normal G1_nx613_lut_out = !G1_nx128; G1_nx613 = DFFEAS(G1_nx613_lut_out, X1__clk0, J1_chipRST_n, , , G1L043, , , !G1_nx428); --G1_dut_ir_irq_sm_1 is general_config_notri:nic_notri|dut_ir_irq_sm_1 --operation mode is normal G1_dut_ir_irq_sm_1_lut_out = G1_dut_ir_cnt_irq_1 & G1_dut_ir_cnt_irq_0 & G1_dut_ir_irq_sm_0; G1_dut_ir_irq_sm_1 = DFFEAS(G1_dut_ir_irq_sm_1_lut_out, X1__clk0, J1_chipRST_n, , G1_nx430, , , , ); --G1_dut_ir_modgen_eq_830_nx4 is general_config_notri:nic_notri|dut_ir_modgen_eq_830_nx4 --operation mode is normal G1_dut_ir_modgen_eq_830_nx4 = !G1_dut_ir_cnt_irq_0 # !G1_dut_ir_cnt_irq_1; --G1_nx122 is general_config_notri:nic_notri|nx122 --operation mode is normal G1_nx122 = N1_request_44 & N1_request_43 & !N1_request_48 & !G1_ix69_ix38_nx10; --G1_dut_ir_cnt_rst_5 is general_config_notri:nic_notri|dut_ir_cnt_rst_5 --operation mode is arithmetic G1_dut_ir_cnt_rst_5_carry_eqn = G1_dut_ir_cnt_rst_nx34; G1_dut_ir_cnt_rst_5_lut_out = G1_dut_ir_cnt_rst_5 $ (G1_dut_ir_cnt_rst_5_carry_eqn); G1_dut_ir_cnt_rst_5 = DFFEAS(G1_dut_ir_cnt_rst_5_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx41 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx41 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx41 = CARRY(!G1_dut_ir_cnt_rst_nx34 # !G1_dut_ir_cnt_rst_5); --G1_NOT_ix69_ix30_nx10 is general_config_notri:nic_notri|NOT_ix69_ix30_nx10 --operation mode is normal G1_NOT_ix69_ix30_nx10 = N1_request_42 & !N1_request_41; --T1_tms_sm_0 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|tms_sm_0 --operation mode is normal T1_tms_sm_0_lut_out = T1_nx1150 # T1_nx1154 # !T1_nx1135 & T1_nx1141; T1_tms_sm_0 = DFFEAS(T1_tms_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T1_NOT_nx516 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_nx516 --operation mode is normal T1_NOT_nx516 = T1_nx1157 # !T1_tms_sm_0 & (T1_nx1141 # !T1_tms_sm_1); --D1_load_inst is jtag_master_1_notri:jtag_dut_notri|load_inst --operation mode is normal D1_load_inst_lut_out = D1_state_jtag_0 & !D1_state_jtag_1 & !T1_TMS & D1_nx248; D1_load_inst = DFFEAS(D1_load_inst_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_ser_snd_i is jtag_master_1_notri:jtag_dut_notri|ser_snd_i --operation mode is normal D1_ser_snd_i_lut_out = N1_request_47 & (D1_nx235 & D1_jtgsnd_ser_i_0 # !D1_nx235 & (D1_nx234)) # !N1_request_47 & D1_jtgsnd_ser_i_0; D1_ser_snd_i = DFFEAS(D1_ser_snd_i_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx942, , , , ); --D1_shift_inst is jtag_master_1_notri:jtag_dut_notri|shift_inst --operation mode is normal D1_shift_inst_lut_out = D1_nx227 & (!D1_state_jtag_2 # !D1_state_jtag_0); D1_shift_inst = DFFEAS(D1_shift_inst_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_nx223 is jtag_master_1_notri:jtag_dut_notri|nx223 --operation mode is normal D1_nx223 = D1_ser_snd_t & (D1_load_trap # D1_shift_trap); --T1_s_reg_1 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_1 --operation mode is normal T1_s_reg_1_lut_out = T1_s_reg_2; T1_s_reg_1 = DFFEAS(T1_s_reg_1_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_30, , , D1_we_tms); --D1_we_tms is jtag_master_1_notri:jtag_dut_notri|we_tms --operation mode is normal D1_we_tms = N1_request_41 & C1_ce_dut_jtg & !J1_rd_wr_oase & D1_nx254; --T1_nx657 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx657 --operation mode is normal T1_nx657 = D1_we_tms # T1_cnt_e; --T2_tms_sm_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|tms_sm_0 --operation mode is normal T2_tms_sm_0_lut_out = T2_nx1150 # T2_nx1154 # !T2_nx1135 & T2_nx1141; T2_tms_sm_0 = DFFEAS(T2_tms_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T2_NOT_nx516 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_nx516 --operation mode is normal T2_NOT_nx516 = T2_nx1157 # !T2_tms_sm_0 & (T2_nx1141 # !T2_tms_sm_1); --T3_tms_sm_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|tms_sm_0 --operation mode is normal T3_tms_sm_0_lut_out = T3_nx1150 # T3_nx1154 # !T3_nx1135 & T3_nx1141; T3_tms_sm_0 = DFFEAS(T3_tms_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T3_NOT_nx516 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_nx516 --operation mode is normal T3_NOT_nx516 = T3_nx1157 # !T3_tms_sm_0 & (T3_nx1141 # !T3_tms_sm_1); --E1_load_inst is jtag_master_2_notri:jtag_ni_dn_notri|load_inst --operation mode is normal E1_load_inst_lut_out = E1_state_jtag_0 & !E1_state_jtag_1 & !T2_TMS & E1_nx243; E1_load_inst = DFFEAS(E1_load_inst_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_ser_snd_i is jtag_master_2_notri:jtag_ni_dn_notri|ser_snd_i --operation mode is normal E1_ser_snd_i_lut_out = E1_jtgsnd_ser_i_2; E1_ser_snd_i = DFFEAS(E1_ser_snd_i_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx966, N1_request_28, , , E1_jtgsnd_we_g_3); --E1_shift_inst is jtag_master_2_notri:jtag_ni_dn_notri|shift_inst --operation mode is normal E1_shift_inst_lut_out = E1_nx225 & (!E1_state_jtag_2 # !E1_state_jtag_0); E1_shift_inst = DFFEAS(E1_shift_inst_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_nx221 is jtag_master_2_notri:jtag_ni_dn_notri|nx221 --operation mode is normal E1_nx221 = E1_ser_snd_t & (E1_load_trap # E1_shift_trap); --E2_load_inst is jtag_master_2_notri:jtag_ni_up_notri|load_inst --operation mode is normal E2_load_inst_lut_out = E2_state_jtag_0 & !E2_state_jtag_1 & !T3_TMS & E2_nx243; E2_load_inst = DFFEAS(E2_load_inst_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_ser_snd_i is jtag_master_2_notri:jtag_ni_up_notri|ser_snd_i --operation mode is normal E2_ser_snd_i_lut_out = E2_jtgsnd_ser_i_2; E2_ser_snd_i = DFFEAS(E2_ser_snd_i_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx966, N1_request_28, , , E2_jtgsnd_we_g_3); --E2_shift_inst is jtag_master_2_notri:jtag_ni_up_notri|shift_inst --operation mode is normal E2_shift_inst_lut_out = E2_nx225 & (!E2_state_jtag_2 # !E2_state_jtag_0); E2_shift_inst = DFFEAS(E2_shift_inst_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_nx221 is jtag_master_2_notri:jtag_ni_up_notri|nx221 --operation mode is normal E2_nx221 = E2_ser_snd_t & (E2_load_trap # E2_shift_trap); --T2_s_reg_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_1 --operation mode is normal T2_s_reg_1_lut_out = T2_s_reg_2; T2_s_reg_1 = DFFEAS(T2_s_reg_1_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_30, , , E1_we_tms); --E1_we_tms is jtag_master_2_notri:jtag_ni_dn_notri|we_tms --operation mode is normal E1_we_tms = N1_request_41 & C1_ce_ni_jtg_dn & !J1_rd_wr_oase & E1_nx250; --T2_nx657 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx657 --operation mode is normal T2_nx657 = E1_we_tms # T2_cnt_e; --T3_s_reg_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_1 --operation mode is normal T3_s_reg_1_lut_out = T3_s_reg_2; T3_s_reg_1 = DFFEAS(T3_s_reg_1_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_30, , , E2_we_tms); --E2_we_tms is jtag_master_2_notri:jtag_ni_up_notri|we_tms --operation mode is normal E2_we_tms = N1_request_41 & C1_ce_ni_jtg_up & !J1_rd_wr_oase & E2_nx250; --T3_nx657 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx657 --operation mode is normal T3_nx657 = E2_we_tms # T3_cnt_e; --J1_NOT_ix34_ix38_nx10 is mcm_nw_apl:scsn_slave_nw_apl|NOT_ix34_ix38_nx10 --operation mode is normal J1_NOT_ix34_ix38_nx10 = !J1_current_state_3 & !J1_current_state_2; --L1_data_out_17 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_17 --operation mode is normal L1_data_out_17_lut_out = L1_data_out_16; L1_data_out_17 = DFFEAS(L1_data_out_17_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_17 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_17 --operation mode is normal L2_data_out_17_lut_out = L2_data_out_16; L2_data_out_17 = DFFEAS(L2_data_out_17_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_45 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_45 --operation mode is normal L1_data_out_45_lut_out = L1_data_out_44; L1_data_out_45 = DFFEAS(L1_data_out_45_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_45 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_45 --operation mode is normal L2_data_out_45_lut_out = L2_data_out_44; L2_data_out_45 = DFFEAS(L2_data_out_45_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_46 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_46 --operation mode is normal L1_data_out_46_lut_out = L1_data_out_45; L1_data_out_46 = DFFEAS(L1_data_out_46_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_46 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_46 --operation mode is normal L2_data_out_46_lut_out = L2_data_out_45; L2_data_out_46 = DFFEAS(L2_data_out_46_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_47 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_47 --operation mode is normal L1_data_out_47_lut_out = L1_data_out_46; L1_data_out_47 = DFFEAS(L1_data_out_47_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_47 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_47 --operation mode is normal L2_data_out_47_lut_out = L2_data_out_46; L2_data_out_47 = DFFEAS(L2_data_out_47_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Q1_counter_0 is clkpre_counter:cp|pre_dec:pdec|counter_0 --operation mode is normal Q1_counter_0_lut_out = Q1_nx117 & (Q1_rec_sm_2 # Q1_nx112 # Q1_nx119); Q1_counter_0 = DFFEAS(Q1_counter_0_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx249, , , , ); --Q1_counter_3 is clkpre_counter:cp|pre_dec:pdec|counter_3 --operation mode is normal Q1_counter_3_lut_out = Q1_nx114 & (Q1_rec_sm_2 # Q1_nx112 # Q1_nx119); Q1_counter_3 = DFFEAS(Q1_counter_3_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx249, , , , ); --Q1_counter_1 is clkpre_counter:cp|pre_dec:pdec|counter_1 --operation mode is normal Q1_counter_1_lut_out = Q1_nx116 & (Q1_rec_sm_2 # Q1_nx112 # Q1_nx119); Q1_counter_1 = DFFEAS(Q1_counter_1_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx249, , , , ); --Q1_counter_2 is clkpre_counter:cp|pre_dec:pdec|counter_2 --operation mode is normal Q1_counter_2_lut_out = Q1_nx115 & (Q1_rec_sm_2 # Q1_nx112 # Q1_nx119); Q1_counter_2 = DFFEAS(Q1_counter_2_lut_out, X1__clk0, J1_chipRST_n, , Q1_NOT_nx249, , , , ); --Q1_rec_sm_3 is clkpre_counter:cp|pre_dec:pdec|rec_sm_3 --operation mode is normal Q1_rec_sm_3_lut_out = Q1_nx96 # Q1_nx97 # Q1_nx98 # Q1_nx99; Q1_rec_sm_3 = DFFEAS(Q1_rec_sm_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_rec_sm_2 is clkpre_counter:cp|pre_dec:pdec|rec_sm_2 --operation mode is normal Q1_rec_sm_2_lut_out = !Q1_rec_sm_1 & (Q1_rec_sm_2 & Q1_rec_sm_0 # !Q1_rec_sm_2 & (Q1_nx105)); Q1_rec_sm_2 = DFFEAS(Q1_rec_sm_2_lut_out, X1__clk0, J1_chipRST_n, , Q1_nx110, , , , ); --Q1_rec_sm_1 is clkpre_counter:cp|pre_dec:pdec|rec_sm_1 --operation mode is normal Q1_rec_sm_1_lut_out = Q1_rec_sm_2 & (Q1_nx102) # !Q1_rec_sm_2 & !Q1_rec_sm_1 & Q1_nx100; Q1_rec_sm_1 = DFFEAS(Q1_rec_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --Q1_nx103 is clkpre_counter:cp|pre_dec:pdec|nx103 --operation mode is normal Q1_nx103 = Q1_rec_sm_0 & (Q1_nx109 # Q1_nx108) # !Q1_rec_sm_0 & Q1_nx104; --Q1_nx121 is clkpre_counter:cp|pre_dec:pdec|nx121 --operation mode is normal Q1_nx121 = Q1_rec_sm_1 & Q1_rec_sm_0 # !Q1_rec_sm_1 & (Q1_modgen_eq_674_nx12 # !Q1_rec_sm_0) # !Q1_rec_sm_2; --Q1_NOT_nx285 is clkpre_counter:cp|pre_dec:pdec|NOT_nx285 --operation mode is normal Q1_NOT_nx285 = Q1_rec_sm_2 & !Q1_rec_sm_1 & Q1_rec_sm_0 & !Q1_modgen_eq_674_nx12; --Q1_NOT_nx295 is clkpre_counter:cp|pre_dec:pdec|NOT_nx295 --operation mode is normal Q1_NOT_nx295 = Q1_rec_sm_2 & Q1_rec_sm_1 & !Q1_rec_sm_0 & !Q1_modgen_eq_677_nx12; --Y1_current_state_3 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|current_state_3 --operation mode is normal Y1_current_state_3_lut_out = !M1_freeze_buffer & Y1_current_state_2 & Y1_current_state_0 & !Y1_nx152; Y1_current_state_3 = DFFEAS(Y1_current_state_3_lut_out, X1__clk0, VCC, , Y1_nx143, , , , ); --Y1_current_state_2 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|current_state_2 --operation mode is normal Y1_current_state_2_lut_out = Y1_nx155 # Y1_nx160 # Y1_nx161 # Y1_nx179; Y1_current_state_2 = DFFEAS(Y1_current_state_2_lut_out, X1__clk0, VCC, , , , , , ); --Y1_current_state_1 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|current_state_1 --operation mode is normal Y1_current_state_1_lut_out = Y1_nx162 # Y1_nx163 # Y1_nx164 # Y1_nx165; Y1_current_state_1 = DFFEAS(Y1_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --Y1_current_state_0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|current_state_0 --operation mode is normal Y1_current_state_0_lut_out = Y1_nx166 # Y1_nx173 # M1_freeze_buffer & Y1_nx168; Y1_current_state_0 = DFFEAS(Y1_current_state_0_lut_out, X1__clk0, VCC, , Y1_nx145, , , , ); --J1_nx407 is mcm_nw_apl:scsn_slave_nw_apl|nx407 --operation mode is normal J1_nx407 = N1_request_50 & (N1_request_49 # N1_request_52 $ N1_request_51) # !N1_request_50 & (!N1_request_52 & !N1_request_51 # !N1_request_49); --J1_nx433 is mcm_nw_apl:scsn_slave_nw_apl|nx433 --operation mode is normal J1_nx433 = J1_current_state_3 & J1_current_state_1 & !J1_nx430; --J1_long_transaction is mcm_nw_apl:scsn_slave_nw_apl|long_transaction --operation mode is normal J1_long_transaction_lut_out = N1_request_31; J1_long_transaction = DFFEAS(J1_long_transaction_lut_out, X1__clk0, VCC, , J1_nx241, , , , ); --J1_nx402 is mcm_nw_apl:scsn_slave_nw_apl|nx402 --operation mode is normal J1_nx402 = J1_waitcount_5 # J1_waitcount_4 # J1_nx405; --J1_nx429 is mcm_nw_apl:scsn_slave_nw_apl|nx429 --operation mode is normal J1_nx429 = !N1_request_49 & N1_request_valid; --J1_waitcount_5 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_5 --operation mode is normal J1_waitcount_5_carry_eqn = J1_waitcount_nx37; J1_waitcount_5_lut_out = J1_waitcount_5 $ (!J1_waitcount_5_carry_eqn); J1_waitcount_5 = DFFEAS(J1_waitcount_5_lut_out, X1__clk0, VCC, , , ~GND, , , J1_nx383); --J1_waitcount_4 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_4 --operation mode is arithmetic J1_waitcount_4_carry_eqn = J1_waitcount_nx33; J1_waitcount_4_lut_out = J1_waitcount_4 $ (J1_waitcount_4_carry_eqn); J1_waitcount_4 = DFFEAS(J1_waitcount_4_lut_out, X1__clk0, VCC, , , ~GND, , , J1_nx383); --J1_waitcount_nx37 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_nx37 --operation mode is arithmetic J1_waitcount_nx37 = CARRY(J1_waitcount_4 # !J1_waitcount_nx33); --J1_nx405 is mcm_nw_apl:scsn_slave_nw_apl|nx405 --operation mode is normal J1_nx405 = J1_waitcount_3 # J1_waitcount_2 # J1_waitcount_1 # J1_waitcount_0; --J1_nx434 is mcm_nw_apl:scsn_slave_nw_apl|nx434 --operation mode is normal J1_nx434 = N1_request_valid & J1_current_state_1; --C1_bus_dout_0 is gio_devices:gio|bus_dout_0 --operation mode is normal C1_bus_dout_0_lut_out = C1_nx298 # C1_nx299 # C1_nx300; C1_bus_dout_0 = DFFEAS(C1_bus_dout_0_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --J1_nx411 is mcm_nw_apl:scsn_slave_nw_apl|nx411 --operation mode is normal J1_nx411 = !N1_request_50 & N1_request_valid & (N1_request_52 # N1_request_51); --J1_nx413 is mcm_nw_apl:scsn_slave_nw_apl|nx413 --operation mode is normal J1_nx413 = N1_request_valid & !J1_current_state_3 & !J1_current_state_2 & !J1_current_state_1; --J1_nx415 is mcm_nw_apl:scsn_slave_nw_apl|nx415 --operation mode is normal J1_nx415 = J1_current_state_3 & J1_current_state_2 & J1_current_state_1 & J1_current_state_0 # !J1_current_state_3 & !J1_current_state_2 & !J1_current_state_1; --R1_shiftd_2 is clkpre_counter:cp|pre_enc:pend|shiftd_2 --operation mode is normal R1_shiftd_2_lut_out = R1_send_sm & R1_shiftd_1; R1_shiftd_2 = DFFEAS(R1_shiftd_2_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, , , , ); --R1_bitcnt_dec_642_nx14 is clkpre_counter:cp|pre_enc:pend|bitcnt_dec_642_nx14 --operation mode is arithmetic R1_bitcnt_dec_642_nx14 = CARRY(R1_bitcnt_0); --R1_nx86 is clkpre_counter:cp|pre_enc:pend|nx86 --operation mode is normal R1_nx86 = R1_bitcnt_0 # !R1_NOT_bitcnt_1 # !R1_NOT_bitcnt_2; --R1_nx190 is clkpre_counter:cp|pre_enc:pend|nx190 --operation mode is normal R1_nx190_carry_eqn = R1_bitcnt_dec_642_nx18; R1_nx190 = R1_NOT_bitcnt_2 $ !R1_nx190_carry_eqn # !R1_send_sm; --K1_nx156 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx156 --operation mode is normal K1_nx156 = K1_sync_counter_0 # scsn_slave_data_in_0 $ !K1_d_buff; --K1_nx158 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx158 --operation mode is normal K1_nx158 = !K1_timer_in_state_2 & !K1_timer_in_state_0 & K1_timer_in_state_1; --K1_nx196 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx196 --operation mode is normal K1_nx196 = !K1_current_state_3 & !K1_current_state_2 & K1_current_state_1 & K1_current_state_0; --K1_nx197 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx197 --operation mode is normal K1_nx197 = !L1_buffer_full & !K1_ds_err & !K1_sync_counter_2 & !K1_sync_counter_1; --K1_nx160 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx160 --operation mode is normal K1_nx160 = K1_nx180 # !K1_current_state_2 & K1_nx158 & K1_nx170; --K1_nx161 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx161 --operation mode is normal K1_nx161 = K1_current_state_0 & !K1_nx156 & !K1_nx167 & K1_nx176; --K1_nx163 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx163 --operation mode is normal K1_nx163 = K1_nx169 & (K1_nx176 # K1_nx181 # K1_nx196); --K1_nx195 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx195 --operation mode is normal K1_nx195 = !K1_current_state_3 & K1_current_state_2 & K1_current_state_1 & !K1_nx158; --K1_nx166 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx166 --operation mode is normal K1_nx166 = !K1_nx169 & K1_nx173 & (K1_nx156 # K1_nx167); --K1_nx188 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx188 --operation mode is normal K1_nx188 = K1_current_state_1 & (K1_nx189) # !K1_current_state_1 & !K1_current_state_0 & !K1_nx169; --K1_nx190 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx190 --operation mode is normal K1_nx190 = K1_current_state_3 & (K1_current_state_2 # K1_current_state_0) # !K1_current_state_3 & !K1_current_state_2 & !K1_current_state_1 & !K1_current_state_0; --K1_nx191 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx191 --operation mode is normal K1_nx191 = !scsn_slave_data_in_0 & !K1_current_state_2 & !K1_current_state_1 & K1_current_state_0; --K1_strobe_out is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|strobe_out --operation mode is normal K1_strobe_out_lut_out = K1_nx179 & (!K1_destuff_in_counter_0 # !K1_destuff_in_counter_1 # !K1_destuff_in_counter_2); K1_strobe_out = DFFEAS(K1_strobe_out_lut_out, X1__clk0, VCC, , , , , , ); --L1_bitcounter_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_5 --operation mode is arithmetic L1_bitcounter_5_carry_eqn = L1_bitcounter_nx33; L1_bitcounter_5_lut_out = L1_bitcounter_5 $ (L1_bitcounter_5_carry_eqn); L1_bitcounter_5 = DFFEAS(L1_bitcounter_5_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx37 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx37 --operation mode is arithmetic L1_bitcounter_nx37 = CARRY(!L1_bitcounter_nx33 # !L1_bitcounter_5); --L1_bitcounter_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_3 --operation mode is arithmetic L1_bitcounter_3_carry_eqn = L1_bitcounter_nx21; L1_bitcounter_3_lut_out = L1_bitcounter_3 $ (L1_bitcounter_3_carry_eqn); L1_bitcounter_3 = DFFEAS(L1_bitcounter_3_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx27 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx27 --operation mode is arithmetic L1_bitcounter_nx27 = CARRY(!L1_bitcounter_nx21 # !L1_bitcounter_3); --L1_bitcounter_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_4 --operation mode is arithmetic L1_bitcounter_4_carry_eqn = L1_bitcounter_nx27; L1_bitcounter_4_lut_out = L1_bitcounter_4 $ (!L1_bitcounter_4_carry_eqn); L1_bitcounter_4 = DFFEAS(L1_bitcounter_4_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx33 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx33 --operation mode is arithmetic L1_bitcounter_nx33 = CARRY(L1_bitcounter_4 & (!L1_bitcounter_nx27)); --L1_bitcounter_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_6 --operation mode is normal L1_bitcounter_6_carry_eqn = L1_bitcounter_nx37; L1_bitcounter_6_lut_out = L1_bitcounter_6 $ (!L1_bitcounter_6_carry_eqn); L1_bitcounter_6 = DFFEAS(L1_bitcounter_6_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_1 --operation mode is arithmetic L1_bitcounter_1_carry_eqn = L1_bitcounter_nx9; L1_bitcounter_1_lut_out = L1_bitcounter_1 $ (L1_bitcounter_1_carry_eqn); L1_bitcounter_1 = DFFEAS(L1_bitcounter_1_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx15 --operation mode is arithmetic L1_bitcounter_nx15 = CARRY(!L1_bitcounter_nx9 # !L1_bitcounter_1); --L1_bitcounter_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_0 --operation mode is arithmetic L1_bitcounter_0_lut_out = L1_bitcounter_0 $ K1_strobe_out; L1_bitcounter_0 = DFFEAS(L1_bitcounter_0_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx9 --operation mode is arithmetic L1_bitcounter_nx9 = CARRY(L1_bitcounter_0 & K1_strobe_out); --L1_bitcounter_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_2 --operation mode is arithmetic L1_bitcounter_2_carry_eqn = L1_bitcounter_nx15; L1_bitcounter_2_lut_out = L1_bitcounter_2 $ (!L1_bitcounter_2_carry_eqn); L1_bitcounter_2 = DFFEAS(L1_bitcounter_2_lut_out, X1__clk0, VCC, , , , , !K1_buffer_flush_n, ); --L1_bitcounter_nx21 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|bitcounter_nx21 --operation mode is arithmetic L1_bitcounter_nx21 = CARRY(L1_bitcounter_2 & (!L1_bitcounter_nx15)); --K2_nx156 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx156 --operation mode is normal K2_nx156 = K2_sync_counter_0 # scsn_slave_data_in_1 $ !K2_d_buff; --K2_nx158 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx158 --operation mode is normal K2_nx158 = !K2_timer_in_state_2 & !K2_timer_in_state_0 & K2_timer_in_state_1; --K2_nx196 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx196 --operation mode is normal K2_nx196 = !K2_current_state_3 & !K2_current_state_2 & K2_current_state_1 & K2_current_state_0; --K2_nx197 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx197 --operation mode is normal K2_nx197 = !L2_buffer_full & !K2_ds_err & !K2_sync_counter_2 & !K2_sync_counter_1; --K2_nx160 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx160 --operation mode is normal K2_nx160 = K2_nx180 # !K2_current_state_2 & K2_nx158 & K2_nx170; --K2_nx161 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx161 --operation mode is normal K2_nx161 = K2_current_state_0 & !K2_nx156 & !K2_nx167 & K2_nx176; --K2_nx163 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx163 --operation mode is normal K2_nx163 = K2_nx169 & (K2_nx176 # K2_nx181 # K2_nx196); --K2_nx195 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx195 --operation mode is normal K2_nx195 = !K2_current_state_3 & K2_current_state_2 & K2_current_state_1 & !K2_nx158; --K2_nx166 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx166 --operation mode is normal K2_nx166 = !K2_nx169 & K2_nx173 & (K2_nx156 # K2_nx167); --K2_nx188 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx188 --operation mode is normal K2_nx188 = K2_current_state_1 & (K2_nx189) # !K2_current_state_1 & !K2_current_state_0 & !K2_nx169; --K2_nx190 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx190 --operation mode is normal K2_nx190 = K2_current_state_3 & (K2_current_state_2 # K2_current_state_0) # !K2_current_state_3 & !K2_current_state_2 & !K2_current_state_1 & !K2_current_state_0; --K2_nx191 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx191 --operation mode is normal K2_nx191 = !scsn_slave_data_in_1 & !K2_current_state_2 & !K2_current_state_1 & K2_current_state_0; --K2_strobe_out is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|strobe_out --operation mode is normal K2_strobe_out_lut_out = K2_nx179 & (!K2_destuff_in_counter_0 # !K2_destuff_in_counter_1 # !K2_destuff_in_counter_2); K2_strobe_out = DFFEAS(K2_strobe_out_lut_out, X1__clk0, VCC, , , , , , ); --L2_bitcounter_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_5 --operation mode is arithmetic L2_bitcounter_5_carry_eqn = L2_bitcounter_nx33; L2_bitcounter_5_lut_out = L2_bitcounter_5 $ (L2_bitcounter_5_carry_eqn); L2_bitcounter_5 = DFFEAS(L2_bitcounter_5_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx37 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx37 --operation mode is arithmetic L2_bitcounter_nx37 = CARRY(!L2_bitcounter_nx33 # !L2_bitcounter_5); --L2_bitcounter_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_3 --operation mode is arithmetic L2_bitcounter_3_carry_eqn = L2_bitcounter_nx21; L2_bitcounter_3_lut_out = L2_bitcounter_3 $ (L2_bitcounter_3_carry_eqn); L2_bitcounter_3 = DFFEAS(L2_bitcounter_3_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx27 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx27 --operation mode is arithmetic L2_bitcounter_nx27 = CARRY(!L2_bitcounter_nx21 # !L2_bitcounter_3); --L2_bitcounter_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_4 --operation mode is arithmetic L2_bitcounter_4_carry_eqn = L2_bitcounter_nx27; L2_bitcounter_4_lut_out = L2_bitcounter_4 $ (!L2_bitcounter_4_carry_eqn); L2_bitcounter_4 = DFFEAS(L2_bitcounter_4_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx33 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx33 --operation mode is arithmetic L2_bitcounter_nx33 = CARRY(L2_bitcounter_4 & (!L2_bitcounter_nx27)); --L2_bitcounter_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_6 --operation mode is normal L2_bitcounter_6_carry_eqn = L2_bitcounter_nx37; L2_bitcounter_6_lut_out = L2_bitcounter_6 $ (!L2_bitcounter_6_carry_eqn); L2_bitcounter_6 = DFFEAS(L2_bitcounter_6_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_1 --operation mode is arithmetic L2_bitcounter_1_carry_eqn = L2_bitcounter_nx9; L2_bitcounter_1_lut_out = L2_bitcounter_1 $ (L2_bitcounter_1_carry_eqn); L2_bitcounter_1 = DFFEAS(L2_bitcounter_1_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx15 --operation mode is arithmetic L2_bitcounter_nx15 = CARRY(!L2_bitcounter_nx9 # !L2_bitcounter_1); --L2_bitcounter_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_0 --operation mode is arithmetic L2_bitcounter_0_lut_out = L2_bitcounter_0 $ K2_strobe_out; L2_bitcounter_0 = DFFEAS(L2_bitcounter_0_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx9 --operation mode is arithmetic L2_bitcounter_nx9 = CARRY(L2_bitcounter_0 & K2_strobe_out); --L2_bitcounter_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_2 --operation mode is arithmetic L2_bitcounter_2_carry_eqn = L2_bitcounter_nx15; L2_bitcounter_2_lut_out = L2_bitcounter_2 $ (!L2_bitcounter_2_carry_eqn); L2_bitcounter_2 = DFFEAS(L2_bitcounter_2_lut_out, X1__clk0, VCC, , , , , !K2_buffer_flush_n, ); --L2_bitcounter_nx21 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|bitcounter_nx21 --operation mode is arithmetic L2_bitcounter_nx21 = CARRY(L2_bitcounter_2 & (!L2_bitcounter_nx15)); --M2_freeze_buffer is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|freeze_buffer --operation mode is normal M2_freeze_buffer = M2_current_state_1 # M2_current_state_0; --Y2_nx152 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx152 --operation mode is normal Y2_nx152 = Y2_current_state_3 # !Y2_current_state_1; --Y2_nx143 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx143 --operation mode is normal Y2_nx143 = Y2_current_state_2 # Y2_current_state_1 # !M2_freeze_buffer & Y2_current_state_0; --Y2_nx155 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx155 --operation mode is normal Y2_nx155 = Y2_nx180 # scsn_slave_d1_err & Y2_nx147; --Y2_nx160 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx160 --operation mode is normal Y2_nx160 = !L2_data_valid & L2_buffer_half & Y2_current_state_2 & Y2_nx146; --Y2_nx161 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx161 --operation mode is normal Y2_nx161 = !Y2_current_state_3 & Y2_current_state_2 & (M2_freeze_buffer # !Y2_current_state_0); --Y2_nx179 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx179 --operation mode is normal Y2_nx179 = !M2_freeze_buffer & !Y2_current_state_3 & Y2_current_state_1 & Y2_nx156; --Y2_nx162 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx162 --operation mode is normal Y2_nx162 = M2_freeze_buffer & (Y2_nx147 & Y2_nx153 # !Y2_nx152) # !M2_freeze_buffer & Y2_nx147 & (Y2_nx153); --Y2_nx163 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx163 --operation mode is normal Y2_nx163 = !Y2_current_state_0 & !Y2_nx152 & (Y2_current_state_2 # !N1_reply1_valid); --Y2_nx164 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx164 --operation mode is normal Y2_nx164 = Y2_nx155 # Y2_current_state_2 & Y2_nx146 & Y2_nx124; --Y2_nx165 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx165 --operation mode is normal Y2_nx165 = Y2_nx147 & (Y2_forward_buffer_54 # Y2_forward_buffer_53 # Y2_nx178); --Y2_nx166 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx166 --operation mode is normal Y2_nx166 = !N1_wait_for_bridge & Y2_current_state_2 & !Y2_current_state_0 & !Y2_nx152; --Y2_nx168 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx168 --operation mode is normal Y2_nx168 = Y2_current_state_2 & (Y2_nx157) # !Y2_current_state_2 & Y2_current_state_3 & !Y2_current_state_1; --Y2_nx173 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx173 --operation mode is normal Y2_nx173 = Y2_nx167 # Y2_nx169 & (Y2_nx176 # Y2_nx175); --Y2_nx145 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx145 --operation mode is normal Y2_nx145 = Y2_current_state_2 # Y2_nx152 # !M2_freeze_buffer # !L2_data_valid; --L1_data_out_36 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_36 --operation mode is normal L1_data_out_36_lut_out = L1_data_out_35; L1_data_out_36 = DFFEAS(L1_data_out_36_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_36 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_36 --operation mode is normal L2_data_out_36_lut_out = L2_data_out_35; L2_data_out_36 = DFFEAS(L2_data_out_36_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_33 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_33 --operation mode is normal L1_data_out_33_lut_out = L1_data_out_32; L1_data_out_33 = DFFEAS(L1_data_out_33_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_33 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_33 --operation mode is normal L2_data_out_33_lut_out = L2_data_out_32; L2_data_out_33 = DFFEAS(L2_data_out_33_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_34 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_34 --operation mode is normal L1_data_out_34_lut_out = L1_data_out_33; L1_data_out_34 = DFFEAS(L1_data_out_34_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_34 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_34 --operation mode is normal L2_data_out_34_lut_out = L2_data_out_33; L2_data_out_34 = DFFEAS(L2_data_out_34_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_35 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_35 --operation mode is normal L1_data_out_35_lut_out = L1_data_out_34; L1_data_out_35 = DFFEAS(L1_data_out_35_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_35 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_35 --operation mode is normal L2_data_out_35_lut_out = L2_data_out_34; L2_data_out_35 = DFFEAS(L2_data_out_35_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_39 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_39 --operation mode is normal L1_data_out_39_lut_out = L1_data_out_38; L1_data_out_39 = DFFEAS(L1_data_out_39_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_39 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_39 --operation mode is normal L2_data_out_39_lut_out = L2_data_out_38; L2_data_out_39 = DFFEAS(L2_data_out_39_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_40 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_40 --operation mode is normal L1_data_out_40_lut_out = L1_data_out_39; L1_data_out_40 = DFFEAS(L1_data_out_40_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_40 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_40 --operation mode is normal L2_data_out_40_lut_out = L2_data_out_39; L2_data_out_40 = DFFEAS(L2_data_out_40_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_ix0_nx24 is gio_devices:gio|ix0_nx24 --operation mode is normal C1_ix0_nx24_regcasc_in = C1_ix0_nx22; C1_ix0_nx24 = DFFEAS(C1_ix0_nx24_regcasc_in, X1__clk0, VCC, , , , , , ); --J1_req_reg is mcm_nw_apl:scsn_slave_nw_apl|req_reg --operation mode is normal J1_req_reg_lut_out = J1_cfg_req; J1_req_reg = DFFEAS(J1_req_reg_lut_out, X1__clk0, VCC, , , , , , ); --J1_cfg_req is mcm_nw_apl:scsn_slave_nw_apl|cfg_req --operation mode is normal J1_cfg_req_lut_out = J1_current_state_3 # J1_current_state_0 # !J1_current_state_2 & J1_current_state_1; J1_cfg_req = DFFEAS(J1_cfg_req_lut_out, X1__clk0, VCC, , J1_nx1105, , , , ); --J1_current_state_dp_2 is mcm_nw_apl:scsn_slave_nw_apl|current_state_dp_2 --operation mode is normal J1_current_state_dp_2_lut_out = C1_bus_ack & !J1_current_state_dp_2 & !J1_current_state_dp_0 & J1_bus_req; J1_current_state_dp_2 = DFFEAS(J1_current_state_dp_2_lut_out, X1__clk0, VCC, , , , , , ); --J1_current_state_dp_0 is mcm_nw_apl:scsn_slave_nw_apl|current_state_dp_0 --operation mode is normal J1_current_state_dp_0_lut_out = J1_current_state_dp_2 # J1_current_state_dp_0 & (J1_bus_req # !J1_req_rise) # !J1_current_state_dp_0 & (!J1_bus_req); J1_current_state_dp_0 = DFFEAS(J1_current_state_dp_0_lut_out, X1__clk0, VCC, , , , , , ); --B1_NOT_nx864 is clkpre_counter:cp|NOT_nx864 --operation mode is normal B1_NOT_nx864 = C1_ce_cp & !J1_rd_wr_oase & B1_nx801; --B1_nx869 is clkpre_counter:cp|nx869 --operation mode is normal B1_nx869 = B1_L0time_7 & B1_ptimer_7 & (B1_L0time_6 $ !B1_ptimer_6) # !B1_L0time_7 & !B1_ptimer_7 & (B1_L0time_6 $ !B1_ptimer_6); --B1_nx870 is clkpre_counter:cp|nx870 --operation mode is normal B1_nx870 = B1_L0time_5 & B1_ptimer_5 & (B1_L0time_4 $ !B1_ptimer_4) # !B1_L0time_5 & !B1_ptimer_5 & (B1_L0time_4 $ !B1_ptimer_4); --B1_nx871 is clkpre_counter:cp|nx871 --operation mode is normal B1_nx871 = B1_L0time_3 & B1_ptimer_3 & (B1_L0time_1 $ !B1_ptimer_1) # !B1_L0time_3 & !B1_ptimer_3 & (B1_L0time_1 $ !B1_ptimer_1); --B1_nx872 is clkpre_counter:cp|nx872 --operation mode is normal B1_nx872 = B1_L0time_2 & !B1_nx437 & (B1_L0time_0 $ !B1_ptimer_0) # !B1_L0time_2 & B1_nx437 & (B1_L0time_0 $ !B1_ptimer_0); --B1_L0time_13 is clkpre_counter:cp|L0time_13 --operation mode is normal B1_L0time_13_lut_out = N1_request_18; B1_L0time_13 = DFFEAS(B1_L0time_13_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_nx867 is clkpre_counter:cp|nx867 --operation mode is normal B1_nx867 = B1_L0time_11 & B1_ptimer_11 & (B1_L0time_10 $ !B1_ptimer_10) # !B1_L0time_11 & !B1_ptimer_11 & (B1_L0time_10 $ !B1_ptimer_10); --B1_nx868 is clkpre_counter:cp|nx868 --operation mode is normal B1_nx868 = B1_L0time_9 & B1_ptimer_9 & (B1_L0time_8 $ !B1_ptimer_8) # !B1_L0time_9 & !B1_ptimer_9 & (B1_L0time_8 $ !B1_ptimer_8); --B1_NOT_nx836 is clkpre_counter:cp|NOT_nx836 --operation mode is normal B1_NOT_nx836 = C1_ce_cp & !J1_rd_wr_oase & B1_nx799; --B1_nx861 is clkpre_counter:cp|nx861 --operation mode is normal B1_nx861 = B1_L1time_7 & B1_ptimer_7 & (B1_L1time_6 $ !B1_ptimer_6) # !B1_L1time_7 & !B1_ptimer_7 & (B1_L1time_6 $ !B1_ptimer_6); --B1_nx862 is clkpre_counter:cp|nx862 --operation mode is normal B1_nx862 = B1_L1time_5 & B1_ptimer_5 & (B1_L1time_4 $ !B1_ptimer_4) # !B1_L1time_5 & !B1_ptimer_5 & (B1_L1time_4 $ !B1_ptimer_4); --B1_nx863 is clkpre_counter:cp|nx863 --operation mode is normal B1_nx863 = B1_L1time_3 & B1_ptimer_3 & (B1_L1time_1 $ !B1_ptimer_1) # !B1_L1time_3 & !B1_ptimer_3 & (B1_L1time_1 $ !B1_ptimer_1); --B1_nx864 is clkpre_counter:cp|nx864 --operation mode is normal B1_nx864 = B1_L1time_2 & !B1_nx437 & (B1_L1time_0 $ !B1_ptimer_0) # !B1_L1time_2 & B1_nx437 & (B1_L1time_0 $ !B1_ptimer_0); --B1_L1time_13 is clkpre_counter:cp|L1time_13 --operation mode is normal B1_L1time_13_lut_out = N1_request_18; B1_L1time_13 = DFFEAS(B1_L1time_13_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_nx859 is clkpre_counter:cp|nx859 --operation mode is normal B1_nx859 = B1_L1time_11 & B1_ptimer_11 & (B1_L1time_10 $ !B1_ptimer_10) # !B1_L1time_11 & !B1_ptimer_11 & (B1_L1time_10 $ !B1_ptimer_10); --B1_nx860 is clkpre_counter:cp|nx860 --operation mode is normal B1_nx860 = B1_L1time_9 & B1_ptimer_9 & (B1_L1time_8 $ !B1_ptimer_8) # !B1_L1time_9 & !B1_ptimer_9 & (B1_L1time_8 $ !B1_ptimer_8); --B1_NOT_nx808 is clkpre_counter:cp|NOT_nx808 --operation mode is normal B1_NOT_nx808 = C1_ce_cp & !J1_rd_wr_oase & B1_nx802; --B1_nx853 is clkpre_counter:cp|nx853 --operation mode is normal B1_nx853 = B1_L2time_7 & B1_ptimer_7 & (B1_L2time_6 $ !B1_ptimer_6) # !B1_L2time_7 & !B1_ptimer_7 & (B1_L2time_6 $ !B1_ptimer_6); --B1_nx854 is clkpre_counter:cp|nx854 --operation mode is normal B1_nx854 = B1_L2time_5 & B1_ptimer_5 & (B1_L2time_4 $ !B1_ptimer_4) # !B1_L2time_5 & !B1_ptimer_5 & (B1_L2time_4 $ !B1_ptimer_4); --B1_nx855 is clkpre_counter:cp|nx855 --operation mode is normal B1_nx855 = B1_L2time_3 & B1_ptimer_3 & (B1_L2time_1 $ !B1_ptimer_1) # !B1_L2time_3 & !B1_ptimer_3 & (B1_L2time_1 $ !B1_ptimer_1); --B1_nx856 is clkpre_counter:cp|nx856 --operation mode is normal B1_nx856 = B1_L2time_2 & !B1_nx437 & (B1_L2time_0 $ !B1_ptimer_0) # !B1_L2time_2 & B1_nx437 & (B1_L2time_0 $ !B1_ptimer_0); --B1_L2time_13 is clkpre_counter:cp|L2time_13 --operation mode is normal B1_L2time_13_lut_out = N1_request_18; B1_L2time_13 = DFFEAS(B1_L2time_13_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_nx851 is clkpre_counter:cp|nx851 --operation mode is normal B1_nx851 = B1_L2time_11 & B1_ptimer_11 & (B1_L2time_10 $ !B1_ptimer_10) # !B1_L2time_11 & !B1_ptimer_11 & (B1_L2time_10 $ !B1_ptimer_10); --B1_nx852 is clkpre_counter:cp|nx852 --operation mode is normal B1_nx852 = B1_L2time_9 & B1_ptimer_9 & (B1_L2time_8 $ !B1_ptimer_8) # !B1_L2time_9 & !B1_ptimer_9 & (B1_L2time_8 $ !B1_ptimer_8); --G1_ni_ir_cnt_rst_2 is general_config_notri:nic_notri|ni_ir_cnt_rst_2 --operation mode is arithmetic G1_ni_ir_cnt_rst_2_carry_eqn = G1_ni_ir_cnt_rst_nx16; G1_ni_ir_cnt_rst_2_lut_out = G1_ni_ir_cnt_rst_2 $ (!G1_ni_ir_cnt_rst_2_carry_eqn); G1_ni_ir_cnt_rst_2 = DFFEAS(G1_ni_ir_cnt_rst_2_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx22 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx22 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx22 = CARRY(G1_ni_ir_cnt_rst_2 & (!G1_ni_ir_cnt_rst_nx16)); --M1_freeze_buffer is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|freeze_buffer --operation mode is normal M1_freeze_buffer = M1_current_state_1 # M1_current_state_0; --N1_nx227 is mcm_nw_nwl:scsn_slave_nw_nwl|nx227 --operation mode is normal N1_nx227 = N1_current_state_2 & (N1_nx231) # !N1_current_state_2 & !Y1_request_valid & Y2_request_valid; --N1_nx233 is mcm_nw_nwl:scsn_slave_nw_nwl|nx233 --operation mode is normal N1_nx233 = J1_bridge_alter & !N1_current_state_2; --scsn_slave_nw_dll_ob0_bitcounter_3 is scsn_slave_nw_dll_ob0_bitcounter_3 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_3_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx21; scsn_slave_nw_dll_ob0_bitcounter_3_lut_out = scsn_slave_nw_dll_ob0_bitcounter_3 $ (scsn_slave_nw_dll_ob0_bitcounter_3_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_3 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_3_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx27 is scsn_slave_nw_dll_ob0_bitcounter_nx27 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx27 = CARRY(!scsn_slave_nw_dll_ob0_bitcounter_nx21 # !scsn_slave_nw_dll_ob0_bitcounter_3); --scsn_slave_nw_dll_ob0_bitcounter_1 is scsn_slave_nw_dll_ob0_bitcounter_1 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_1_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx9; scsn_slave_nw_dll_ob0_bitcounter_1_lut_out = scsn_slave_nw_dll_ob0_bitcounter_1 $ (scsn_slave_nw_dll_ob0_bitcounter_1_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_1 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_1_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx15 is scsn_slave_nw_dll_ob0_bitcounter_nx15 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx15 = CARRY(!scsn_slave_nw_dll_ob0_bitcounter_nx9 # !scsn_slave_nw_dll_ob0_bitcounter_1); --scsn_slave_nw_dll_ob0_bitcounter_0 is scsn_slave_nw_dll_ob0_bitcounter_0 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_0_lut_out = scsn_slave_nw_dll_ob0_bitcounter_0 $ scsn_slave_nw_dll_ob0_nx1398; scsn_slave_nw_dll_ob0_bitcounter_0 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_0_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx9 is scsn_slave_nw_dll_ob0_bitcounter_nx9 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx9 = CARRY(scsn_slave_nw_dll_ob0_bitcounter_0 & scsn_slave_nw_dll_ob0_nx1398); --scsn_slave_nw_dll_ob0_bitcounter_2 is scsn_slave_nw_dll_ob0_bitcounter_2 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_2_carry_eqn = scsn_slave_nw_dll_ob0_bitcounter_nx15; scsn_slave_nw_dll_ob0_bitcounter_2_lut_out = scsn_slave_nw_dll_ob0_bitcounter_2 $ (!scsn_slave_nw_dll_ob0_bitcounter_2_carry_eqn); scsn_slave_nw_dll_ob0_bitcounter_2 = DFFEAS(scsn_slave_nw_dll_ob0_bitcounter_2_lut_out, X1__clk0, VCC, , , , , !M1_freeze_buffer, ); --scsn_slave_nw_dll_ob0_bitcounter_nx21 is scsn_slave_nw_dll_ob0_bitcounter_nx21 --operation mode is arithmetic scsn_slave_nw_dll_ob0_bitcounter_nx21 = CARRY(scsn_slave_nw_dll_ob0_bitcounter_2 & (!scsn_slave_nw_dll_ob0_bitcounter_nx15)); --M1_b_1_dup_60 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_1_dup_60 --operation mode is normal M1_b_1_dup_60_carry_eqn = M1_timer_in_state_inc_275_nx18; M1_b_1_dup_60 = M1_timer_in_nx18 & (M1_timer_in_state_2 $ !M1_b_1_dup_60_carry_eqn); --M1_timer_in_nx116 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_nx116 --operation mode is normal M1_timer_in_nx116 = !M1_current_state_1 & !M1_current_state_0 # !M1_current_state_2; --M1_b_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0 --operation mode is normal M1_b_0 = !M1_timer_in_state_0 & M1_timer_in_nx18; --M1_b_1_dup_66 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_1_dup_66 --operation mode is arithmetic M1_b_1_dup_66_carry_eqn = M1_timer_in_state_inc_275_nx14; M1_b_1_dup_66 = M1_timer_in_nx18 & (M1_timer_in_state_1 $ M1_b_1_dup_66_carry_eqn); --M1_timer_in_state_inc_275_nx18 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_state_inc_275_nx18 --operation mode is arithmetic M1_timer_in_state_inc_275_nx18 = CARRY(!M1_timer_in_state_inc_275_nx14 # !M1_timer_in_state_1); --M1_sleeptimer_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_0 --operation mode is normal M1_sleeptimer_state_0_lut_out = M1_current_state_1 # M1_b_0_dup_143 # !M1_current_state_2; M1_sleeptimer_state_0 = DFFEAS(M1_sleeptimer_state_0_lut_out, X1__clk0, VCC, , , , , , ); --M1_sleeptimer_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_1 --operation mode is normal M1_sleeptimer_state_1_lut_out = M1_current_state_1 # M1_b_0_dup_136 # !M1_current_state_2; M1_sleeptimer_state_1 = DFFEAS(M1_sleeptimer_state_1_lut_out, X1__clk0, VCC, , , , , , ); --M1_nx223 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx223 --operation mode is normal M1_nx223 = !M1_sleeptimer_state_5 # !M1_sleeptimer_state_4 # !M1_sleeptimer_state_3 # !M1_sleeptimer_state_2; --scsn_slave_nw_dll_ob0_ob_data_67 is scsn_slave_nw_dll_ob0_ob_data_67 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_67_lut_out = scsn_slave_nw_dll_ob0_ob_data_66; scsn_slave_nw_dll_ob0_ob_data_67 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_67_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_67, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_68 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_68 --operation mode is normal Y1_d_to_dll_68 = L1_data_out_68 & (Y1_nx151 # Y1_forward_buffer_60 & Y1_nx154) # !L1_data_out_68 & Y1_forward_buffer_60 & (Y1_nx154); --scsn_slave_nw_dll_ob0_a_2 is scsn_slave_nw_dll_ob0_a_2 --operation mode is normal scsn_slave_nw_dll_ob0_a_2 = Y1_d_we & !M1_freeze_buffer; --scsn_slave_nw_dll_ob0_NOT_nx714 is scsn_slave_nw_dll_ob0_NOT_nx714 --operation mode is normal scsn_slave_nw_dll_ob0_NOT_nx714 = M1_freeze_buffer & (M1_request_data & nx1573) # !M1_freeze_buffer & Y1_d_we; --scsn_slave_nw_dll_ob0_ob_crc_14 is scsn_slave_nw_dll_ob0_ob_crc_14 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_14_lut_out = scsn_slave_nw_dll_ob0_ob_crc_13; scsn_slave_nw_dll_ob0_ob_crc_14 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_14_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_67, , , scsn_slave_nw_dll_ob0_a_2); --M1_nx224 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|nx224 --operation mode is normal M1_nx224 = M1_freeze_buffer & (!M1_stuff_in_data & !M1_nx226) # !M1_freeze_buffer & scsn_slave_nw_dll_ob0_data; --M1_stuffing_strobe_in is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuffing_strobe_in --operation mode is normal M1_stuffing_strobe_in = M1_nx222 # !NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty & M1_nx218 & M1_nx219; --M1_SCLEAR is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|SCLEAR --operation mode is normal M1_SCLEAR = M1_nx221 # scsn_slave_nw_dll_ob0_data $ M1_stuff_in_data # !M1_nx226; --scsn_slave_nw_dll_ob1_bitcounter_3 is scsn_slave_nw_dll_ob1_bitcounter_3 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_3_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx21; scsn_slave_nw_dll_ob1_bitcounter_3_lut_out = scsn_slave_nw_dll_ob1_bitcounter_3 $ (scsn_slave_nw_dll_ob1_bitcounter_3_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_3 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_3_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx27 is scsn_slave_nw_dll_ob1_bitcounter_nx27 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx27 = CARRY(!scsn_slave_nw_dll_ob1_bitcounter_nx21 # !scsn_slave_nw_dll_ob1_bitcounter_3); --scsn_slave_nw_dll_ob1_bitcounter_1 is scsn_slave_nw_dll_ob1_bitcounter_1 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_1_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx9; scsn_slave_nw_dll_ob1_bitcounter_1_lut_out = scsn_slave_nw_dll_ob1_bitcounter_1 $ (scsn_slave_nw_dll_ob1_bitcounter_1_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_1 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_1_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx15 is scsn_slave_nw_dll_ob1_bitcounter_nx15 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx15 = CARRY(!scsn_slave_nw_dll_ob1_bitcounter_nx9 # !scsn_slave_nw_dll_ob1_bitcounter_1); --scsn_slave_nw_dll_ob1_bitcounter_0 is scsn_slave_nw_dll_ob1_bitcounter_0 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_0_lut_out = scsn_slave_nw_dll_ob1_bitcounter_0 $ scsn_slave_nw_dll_ob1_nx1398; scsn_slave_nw_dll_ob1_bitcounter_0 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_0_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx9 is scsn_slave_nw_dll_ob1_bitcounter_nx9 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx9 = CARRY(scsn_slave_nw_dll_ob1_bitcounter_0 & scsn_slave_nw_dll_ob1_nx1398); --scsn_slave_nw_dll_ob1_bitcounter_2 is scsn_slave_nw_dll_ob1_bitcounter_2 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_2_carry_eqn = scsn_slave_nw_dll_ob1_bitcounter_nx15; scsn_slave_nw_dll_ob1_bitcounter_2_lut_out = scsn_slave_nw_dll_ob1_bitcounter_2 $ (!scsn_slave_nw_dll_ob1_bitcounter_2_carry_eqn); scsn_slave_nw_dll_ob1_bitcounter_2 = DFFEAS(scsn_slave_nw_dll_ob1_bitcounter_2_lut_out, X1__clk0, VCC, , , , , !M2_freeze_buffer, ); --scsn_slave_nw_dll_ob1_bitcounter_nx21 is scsn_slave_nw_dll_ob1_bitcounter_nx21 --operation mode is arithmetic scsn_slave_nw_dll_ob1_bitcounter_nx21 = CARRY(scsn_slave_nw_dll_ob1_bitcounter_2 & (!scsn_slave_nw_dll_ob1_bitcounter_nx15)); --M2_b_1_dup_60 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_1_dup_60 --operation mode is normal M2_b_1_dup_60_carry_eqn = M2_timer_in_state_inc_275_nx18; M2_b_1_dup_60 = M2_timer_in_nx18 & (M2_timer_in_state_2 $ !M2_b_1_dup_60_carry_eqn); --M2_timer_in_nx116 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_nx116 --operation mode is normal M2_timer_in_nx116 = !M2_current_state_1 & !M2_current_state_0 # !M2_current_state_2; --M2_b_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0 --operation mode is normal M2_b_0 = !M2_timer_in_state_0 & M2_timer_in_nx18; --M2_b_1_dup_66 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_1_dup_66 --operation mode is arithmetic M2_b_1_dup_66_carry_eqn = M2_timer_in_state_inc_275_nx14; M2_b_1_dup_66 = M2_timer_in_nx18 & (M2_timer_in_state_1 $ M2_b_1_dup_66_carry_eqn); --M2_timer_in_state_inc_275_nx18 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_state_inc_275_nx18 --operation mode is arithmetic M2_timer_in_state_inc_275_nx18 = CARRY(!M2_timer_in_state_inc_275_nx14 # !M2_timer_in_state_1); --M2_sleeptimer_state_0 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_0 --operation mode is normal M2_sleeptimer_state_0_lut_out = M2_current_state_1 # M2_b_0_dup_143 # !M2_current_state_2; M2_sleeptimer_state_0 = DFFEAS(M2_sleeptimer_state_0_lut_out, X1__clk0, VCC, , , , , , ); --M2_sleeptimer_state_1 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_1 --operation mode is normal M2_sleeptimer_state_1_lut_out = M2_current_state_1 # M2_b_0_dup_136 # !M2_current_state_2; M2_sleeptimer_state_1 = DFFEAS(M2_sleeptimer_state_1_lut_out, X1__clk0, VCC, , , , , , ); --M2_nx223 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx223 --operation mode is normal M2_nx223 = !M2_sleeptimer_state_5 # !M2_sleeptimer_state_4 # !M2_sleeptimer_state_3 # !M2_sleeptimer_state_2; --scsn_slave_nw_dll_ob1_ob_data_67 is scsn_slave_nw_dll_ob1_ob_data_67 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_67_lut_out = scsn_slave_nw_dll_ob1_ob_data_66; scsn_slave_nw_dll_ob1_ob_data_67 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_67_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_67, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_68 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_68 --operation mode is normal Y2_d_to_dll_68 = L2_data_out_68 & (Y2_nx151 # Y2_forward_buffer_60 & Y2_nx154) # !L2_data_out_68 & Y2_forward_buffer_60 & (Y2_nx154); --scsn_slave_nw_dll_ob1_a_2 is scsn_slave_nw_dll_ob1_a_2 --operation mode is normal scsn_slave_nw_dll_ob1_a_2 = Y2_d_we & !M2_freeze_buffer; --scsn_slave_nw_dll_ob1_NOT_nx714 is scsn_slave_nw_dll_ob1_NOT_nx714 --operation mode is normal scsn_slave_nw_dll_ob1_NOT_nx714 = M2_freeze_buffer & (M2_request_data & nx1576) # !M2_freeze_buffer & Y2_d_we; --scsn_slave_nw_dll_ob1_ob_crc_14 is scsn_slave_nw_dll_ob1_ob_crc_14 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_14_lut_out = scsn_slave_nw_dll_ob1_ob_crc_13; scsn_slave_nw_dll_ob1_ob_crc_14 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_14_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_67, , , scsn_slave_nw_dll_ob1_a_2); --M2_nx224 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|nx224 --operation mode is normal M2_nx224 = M2_freeze_buffer & (!M2_stuff_in_data & !M2_nx226) # !M2_freeze_buffer & scsn_slave_nw_dll_ob1_data; --M2_stuffing_strobe_in is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuffing_strobe_in --operation mode is normal M2_stuffing_strobe_in = M2_nx222 # !NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty & M2_nx218 & M2_nx219; --M2_SCLEAR is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|SCLEAR --operation mode is normal M2_SCLEAR = M2_nx221 # scsn_slave_nw_dll_ob1_data $ M2_stuff_in_data # !M2_nx226; --G1_nx128 is general_config_notri:nic_notri|nx128 --operation mode is normal G1_nx128 = N1_request_44 & N1_request_43 & N1_request_48 & !G1_ix69_ix38_nx10; --G1_dut_ir_cnt_irq_1 is general_config_notri:nic_notri|dut_ir_cnt_irq_1 --operation mode is normal G1_dut_ir_cnt_irq_1_carry_eqn = G1_dut_ir_cnt_irq_nx6; G1_dut_ir_cnt_irq_1_lut_out = G1_dut_ir_cnt_irq_1 $ (G1_dut_ir_cnt_irq_1_carry_eqn); G1_dut_ir_cnt_irq_1 = DFFEAS(G1_dut_ir_cnt_irq_1_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_dut_ir_irq_sm_0, ); --G1_dut_ir_cnt_irq_0 is general_config_notri:nic_notri|dut_ir_cnt_irq_0 --operation mode is arithmetic G1_dut_ir_cnt_irq_0_lut_out = !G1_dut_ir_cnt_irq_0; G1_dut_ir_cnt_irq_0 = DFFEAS(G1_dut_ir_cnt_irq_0_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_dut_ir_irq_sm_0, ); --G1_dut_ir_cnt_irq_nx6 is general_config_notri:nic_notri|dut_ir_cnt_irq_nx6 --operation mode is arithmetic G1_dut_ir_cnt_irq_nx6 = CARRY(G1_dut_ir_cnt_irq_0); --G1_nx430 is general_config_notri:nic_notri|nx430 --operation mode is normal G1_nx430 = G1_nx613 # G1_dut_ir_irq_sm_0; --G1_dut_ir_cnt_rst_4 is general_config_notri:nic_notri|dut_ir_cnt_rst_4 --operation mode is arithmetic G1_dut_ir_cnt_rst_4_carry_eqn = G1_dut_ir_cnt_rst_nx28; G1_dut_ir_cnt_rst_4_lut_out = G1_dut_ir_cnt_rst_4 $ (!G1_dut_ir_cnt_rst_4_carry_eqn); G1_dut_ir_cnt_rst_4 = DFFEAS(G1_dut_ir_cnt_rst_4_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx34 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx34 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx34 = CARRY(G1_dut_ir_cnt_rst_4 & (!G1_dut_ir_cnt_rst_nx28)); --T1_nx1135 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1135 --operation mode is normal T1_nx1135 = T1_tms_sm_0 # !T1_tms_sm_1; --T1_nx1141 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1141 --operation mode is normal T1_nx1141 = T1_NOT_c_cnt_4 & T1_NOT_c_cnt_3 & T1_NOT_c_cnt_2 & !T1_nx1136; --T1_nx1150 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1150 --operation mode is normal T1_nx1150 = T1_nx1140 & (T1_nx1145 # T1_nx1146 # !T1_NOT_c_cnt_0); --T1_nx1154 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1154 --operation mode is normal T1_nx1154 = T1_flag_start & !T1_tms_sm_1 & !T1_tms_sm_0; --T1_tms_sm_1 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|tms_sm_1 --operation mode is normal T1_tms_sm_1_lut_out = T1_nx1148 # T1_nx1149 # T1_nx1155 & !T1_nx1156; T1_tms_sm_1 = DFFEAS(T1_tms_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T1_nx1157 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1157 --operation mode is normal T1_nx1157 = !T1_tms_sm_1 & T1_NOT_modgen_eq_998_nx4 & T1_nx1139 & !T1_nx1146; --D1_state_jtag_0 is jtag_master_1_notri:jtag_dut_notri|state_jtag_0 --operation mode is normal D1_state_jtag_0_lut_out = D1_nx233 # !D1_state_jtag_0 & (D1_state_jtag_2 $ !T1_TMS); D1_state_jtag_0 = DFFEAS(D1_state_jtag_0_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_state_jtag_1 is jtag_master_1_notri:jtag_dut_notri|state_jtag_1 --operation mode is normal D1_state_jtag_1_lut_out = D1_state_jtag_0 & D1_nx231 # !D1_state_jtag_0 & (D1_nx232); D1_state_jtag_1 = DFFEAS(D1_state_jtag_1_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_nx248 is jtag_master_1_notri:jtag_dut_notri|nx248 --operation mode is normal D1_nx248 = !D1_state_jtag_2 & D1_state_jtag_3; --D1_jtgsnd_ser_i_0 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_i_0 --operation mode is normal D1_jtgsnd_ser_i_0_lut_out = N1_request_31 & !J1_rd_wr_oase & D1_nx244 & D1_nx245; D1_jtgsnd_ser_i_0 = DFFEAS(D1_jtgsnd_ser_i_0_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx942, , , , ); --D1_nx234 is jtag_master_1_notri:jtag_dut_notri|nx234 --operation mode is normal D1_nx234 = C1_ce_dut_jtg & (J1_rd_wr_oase & (D1_jtgsnd_ser_i_0) # !J1_rd_wr_oase & N1_request_30) # !C1_ce_dut_jtg & (D1_jtgsnd_ser_i_0); --D1_nx235 is jtag_master_1_notri:jtag_dut_notri|nx235 --operation mode is normal D1_nx235 = N1_request_41 & (N1_request_43 # N1_request_42) # !N1_request_48; --D1_jtgsnd_nx942 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_nx942 --operation mode is normal D1_jtgsnd_nx942 = T1_tck_ena & (D1_shift_inst # !J1_rd_wr_oase & D1_nx221) # !T1_tck_ena & (!J1_rd_wr_oase & D1_nx221); --D1_state_jtag_2 is jtag_master_1_notri:jtag_dut_notri|state_jtag_2 --operation mode is normal D1_state_jtag_2_lut_out = D1_state_jtag_2 & (D1_nx230) # !D1_state_jtag_2 & D1_state_jtag_1 & (D1_nx243); D1_state_jtag_2 = DFFEAS(D1_state_jtag_2_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_nx227 is jtag_master_1_notri:jtag_dut_notri|nx227 --operation mode is normal D1_nx227 = D1_state_jtag_1 & D1_state_jtag_3 & !T1_TMS; --D1_load_trap is jtag_master_1_notri:jtag_dut_notri|load_trap --operation mode is normal D1_load_trap_lut_out = !D1_state_jtag_2 & !D1_state_jtag_3 & !T1_TMS & D1_nx247; D1_load_trap = DFFEAS(D1_load_trap_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_ser_snd_t is jtag_master_1_notri:jtag_dut_notri|ser_snd_t --operation mode is normal D1_ser_snd_t_lut_out = D1_jtgsnd_ser_t_72; D1_ser_snd_t = DFFEAS(D1_ser_snd_t_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_3, , , D1_jtgsnd_we_g_1); --D1_shift_trap is jtag_master_1_notri:jtag_dut_notri|shift_trap --operation mode is normal D1_shift_trap_lut_out = !D1_state_jtag_3 & !T1_TMS & D1_nx242; D1_shift_trap = DFFEAS(D1_shift_trap_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --T1_s_reg_2 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_2 --operation mode is normal T1_s_reg_2_lut_out = T1_s_reg_3; T1_s_reg_2 = DFFEAS(T1_s_reg_2_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_29, , , D1_we_tms); --D1_nx254 is jtag_master_1_notri:jtag_dut_notri|nx254 --operation mode is normal D1_nx254 = N1_request_43 & !N1_request_42; --T1_cnt_e is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|cnt_e --operation mode is normal T1_cnt_e_lut_out = T1_tms_sm_1 & !T1_tms_sm_0 & T1_nx1141 & T1_nx1151; T1_cnt_e = DFFEAS(T1_cnt_e_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T2_nx1135 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1135 --operation mode is normal T2_nx1135 = T2_tms_sm_0 # !T2_tms_sm_1; --T2_nx1141 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1141 --operation mode is normal T2_nx1141 = T2_NOT_c_cnt_4 & T2_NOT_c_cnt_3 & T2_NOT_c_cnt_2 & !T2_nx1136; --T2_nx1150 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1150 --operation mode is normal T2_nx1150 = T2_nx1140 & (T2_nx1145 # T2_nx1146 # !T2_NOT_c_cnt_0); --T2_nx1154 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1154 --operation mode is normal T2_nx1154 = T2_flag_start & !T2_tms_sm_1 & !T2_tms_sm_0; --T2_tms_sm_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|tms_sm_1 --operation mode is normal T2_tms_sm_1_lut_out = T2_nx1148 # T2_nx1149 # T2_nx1155 & !T2_nx1156; T2_tms_sm_1 = DFFEAS(T2_tms_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T2_nx1157 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1157 --operation mode is normal T2_nx1157 = !T2_tms_sm_1 & T2_NOT_modgen_eq_998_nx4 & T2_nx1139 & !T2_nx1146; --T3_nx1135 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1135 --operation mode is normal T3_nx1135 = T3_tms_sm_0 # !T3_tms_sm_1; --T3_nx1141 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1141 --operation mode is normal T3_nx1141 = T3_NOT_c_cnt_4 & T3_NOT_c_cnt_3 & T3_NOT_c_cnt_2 & !T3_nx1136; --T3_nx1150 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1150 --operation mode is normal T3_nx1150 = T3_nx1140 & (T3_nx1145 # T3_nx1146 # !T3_NOT_c_cnt_0); --T3_nx1154 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1154 --operation mode is normal T3_nx1154 = T3_flag_start & !T3_tms_sm_1 & !T3_tms_sm_0; --T3_tms_sm_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|tms_sm_1 --operation mode is normal T3_tms_sm_1_lut_out = T3_nx1148 # T3_nx1149 # T3_nx1155 & !T3_nx1156; T3_tms_sm_1 = DFFEAS(T3_tms_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T3_nx1157 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1157 --operation mode is normal T3_nx1157 = !T3_tms_sm_1 & T3_NOT_modgen_eq_998_nx4 & T3_nx1139 & !T3_nx1146; --E1_state_jtag_0 is jtag_master_2_notri:jtag_ni_dn_notri|state_jtag_0 --operation mode is normal E1_state_jtag_0_lut_out = E1_nx231 # !E1_state_jtag_0 & (E1_state_jtag_2 $ !T2_TMS); E1_state_jtag_0 = DFFEAS(E1_state_jtag_0_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_state_jtag_1 is jtag_master_2_notri:jtag_ni_dn_notri|state_jtag_1 --operation mode is normal E1_state_jtag_1_lut_out = E1_state_jtag_0 & E1_nx229 # !E1_state_jtag_0 & (E1_nx230); E1_state_jtag_1 = DFFEAS(E1_state_jtag_1_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_nx243 is jtag_master_2_notri:jtag_ni_dn_notri|nx243 --operation mode is normal E1_nx243 = !E1_state_jtag_2 & E1_state_jtag_3; --E1_jtgsnd_ser_i_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_i_2 --operation mode is normal E1_jtgsnd_ser_i_2_lut_out = E1_jtgsnd_ser_i_1; E1_jtgsnd_ser_i_2 = DFFEAS(E1_jtgsnd_ser_i_2_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx966, N1_request_29, , , E1_jtgsnd_we_g_3); --E1_jtgsnd_we_g_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_we_g_3 --operation mode is normal E1_jtgsnd_we_g_3 = N1_request_48 & N1_request_47 & !E1_nx540 & E1_nx249; --E1_jtgsnd_nx966 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_nx966 --operation mode is normal E1_jtgsnd_nx966 = T2_tck_ena & (E1_shift_inst # E1_nx220 & !E1_nx540) # !T2_tck_ena & (E1_nx220 & !E1_nx540); --E1_state_jtag_2 is jtag_master_2_notri:jtag_ni_dn_notri|state_jtag_2 --operation mode is normal E1_state_jtag_2_lut_out = E1_state_jtag_2 & (E1_nx228) # !E1_state_jtag_2 & E1_state_jtag_1 & (E1_nx239); E1_state_jtag_2 = DFFEAS(E1_state_jtag_2_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_nx225 is jtag_master_2_notri:jtag_ni_dn_notri|nx225 --operation mode is normal E1_nx225 = E1_state_jtag_1 & E1_state_jtag_3 & !T2_TMS; --E1_load_trap is jtag_master_2_notri:jtag_ni_dn_notri|load_trap --operation mode is normal E1_load_trap_lut_out = !E1_state_jtag_2 & !E1_state_jtag_3 & !T2_TMS & E1_nx242; E1_load_trap = DFFEAS(E1_load_trap_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_ser_snd_t is jtag_master_2_notri:jtag_ni_dn_notri|ser_snd_t --operation mode is normal E1_ser_snd_t_lut_out = E1_jtgsnd_ser_t_72; E1_ser_snd_t = DFFEAS(E1_ser_snd_t_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_3, , , E1_jtgsnd_we_g_1); --E1_shift_trap is jtag_master_2_notri:jtag_ni_dn_notri|shift_trap --operation mode is normal E1_shift_trap_lut_out = !E1_state_jtag_3 & !T2_TMS & E1_nx238; E1_shift_trap = DFFEAS(E1_shift_trap_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E2_state_jtag_0 is jtag_master_2_notri:jtag_ni_up_notri|state_jtag_0 --operation mode is normal E2_state_jtag_0_lut_out = E2_nx231 # !E2_state_jtag_0 & (E2_state_jtag_2 $ !T3_TMS); E2_state_jtag_0 = DFFEAS(E2_state_jtag_0_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_state_jtag_1 is jtag_master_2_notri:jtag_ni_up_notri|state_jtag_1 --operation mode is normal E2_state_jtag_1_lut_out = E2_state_jtag_0 & E2_nx229 # !E2_state_jtag_0 & (E2_nx230); E2_state_jtag_1 = DFFEAS(E2_state_jtag_1_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_nx243 is jtag_master_2_notri:jtag_ni_up_notri|nx243 --operation mode is normal E2_nx243 = !E2_state_jtag_2 & E2_state_jtag_3; --E2_jtgsnd_ser_i_2 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_i_2 --operation mode is normal E2_jtgsnd_ser_i_2_lut_out = E2_jtgsnd_ser_i_1; E2_jtgsnd_ser_i_2 = DFFEAS(E2_jtgsnd_ser_i_2_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx966, N1_request_29, , , E2_jtgsnd_we_g_3); --E2_jtgsnd_we_g_3 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_we_g_3 --operation mode is normal E2_jtgsnd_we_g_3 = N1_request_48 & N1_request_47 & !E2_nx540 & E2_nx249; --E2_jtgsnd_nx966 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_nx966 --operation mode is normal E2_jtgsnd_nx966 = T3_tck_ena & (E2_shift_inst # E2_nx220 & !E2_nx540) # !T3_tck_ena & (E2_nx220 & !E2_nx540); --E2_state_jtag_2 is jtag_master_2_notri:jtag_ni_up_notri|state_jtag_2 --operation mode is normal E2_state_jtag_2_lut_out = E2_state_jtag_2 & (E2_nx228) # !E2_state_jtag_2 & E2_state_jtag_1 & (E2_nx239); E2_state_jtag_2 = DFFEAS(E2_state_jtag_2_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_nx225 is jtag_master_2_notri:jtag_ni_up_notri|nx225 --operation mode is normal E2_nx225 = E2_state_jtag_1 & E2_state_jtag_3 & !T3_TMS; --E2_load_trap is jtag_master_2_notri:jtag_ni_up_notri|load_trap --operation mode is normal E2_load_trap_lut_out = !E2_state_jtag_2 & !E2_state_jtag_3 & !T3_TMS & E2_nx242; E2_load_trap = DFFEAS(E2_load_trap_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_ser_snd_t is jtag_master_2_notri:jtag_ni_up_notri|ser_snd_t --operation mode is normal E2_ser_snd_t_lut_out = E2_jtgsnd_ser_t_72; E2_ser_snd_t = DFFEAS(E2_ser_snd_t_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_3, , , E2_jtgsnd_we_g_1); --E2_shift_trap is jtag_master_2_notri:jtag_ni_up_notri|shift_trap --operation mode is normal E2_shift_trap_lut_out = !E2_state_jtag_3 & !T3_TMS & E2_nx238; E2_shift_trap = DFFEAS(E2_shift_trap_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --T2_s_reg_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_2 --operation mode is normal T2_s_reg_2_lut_out = T2_s_reg_3; T2_s_reg_2 = DFFEAS(T2_s_reg_2_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_29, , , E1_we_tms); --E1_nx250 is jtag_master_2_notri:jtag_ni_dn_notri|nx250 --operation mode is normal E1_nx250 = N1_request_43 & !N1_request_42; --T2_cnt_e is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|cnt_e --operation mode is normal T2_cnt_e_lut_out = T2_tms_sm_1 & !T2_tms_sm_0 & T2_nx1141 & T2_nx1151; T2_cnt_e = DFFEAS(T2_cnt_e_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T3_s_reg_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_2 --operation mode is normal T3_s_reg_2_lut_out = T3_s_reg_3; T3_s_reg_2 = DFFEAS(T3_s_reg_2_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_29, , , E2_we_tms); --E2_nx250 is jtag_master_2_notri:jtag_ni_up_notri|nx250 --operation mode is normal E2_nx250 = N1_request_43 & !N1_request_42; --T3_cnt_e is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|cnt_e --operation mode is normal T3_cnt_e_lut_out = T3_tms_sm_1 & !T3_tms_sm_0 & T3_nx1141 & T3_nx1151; T3_cnt_e = DFFEAS(T3_cnt_e_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --L1_data_out_16 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_16 --operation mode is normal L1_data_out_16_lut_out = L1_data_out_15; L1_data_out_16 = DFFEAS(L1_data_out_16_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_16 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_16 --operation mode is normal L2_data_out_16_lut_out = L2_data_out_15; L2_data_out_16 = DFFEAS(L2_data_out_16_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Q1_nx117 is clkpre_counter:cp|pre_dec:pdec|nx117 --operation mode is normal Q1_nx117 = !Q1_counter_0; --Q1_nx112 is clkpre_counter:cp|pre_dec:pdec|nx112 --operation mode is normal Q1_nx112 = !Q1_rec_sm_3 & Q1_rec_sm_0 & (Q1_ptrf_1 # Q1_ptrf_0); --Q1_nx119 is clkpre_counter:cp|pre_dec:pdec|nx119 --operation mode is normal Q1_nx119 = Q1_rec_sm_3 & !Q1_rec_sm_0; --Q1_NOT_nx249 is clkpre_counter:cp|pre_dec:pdec|NOT_nx249 --operation mode is normal Q1_NOT_nx249 = Q1_nx95 # Q1_nx94 & (Q1_ix6_ix12_nx4 # Q1_nx113); --Q1_nx114 is clkpre_counter:cp|pre_dec:pdec|nx114 --operation mode is normal Q1_nx114_carry_eqn = Q1_counter_inc_668_nx24; Q1_nx114 = Q1_counter_3 $ (Q1_nx114_carry_eqn); --Q1_nx116 is clkpre_counter:cp|pre_dec:pdec|nx116 --operation mode is arithmetic Q1_nx116_carry_eqn = Q1_counter_inc_668_nx16; Q1_nx116 = Q1_counter_1 $ (Q1_nx116_carry_eqn); --Q1_counter_inc_668_nx20 is clkpre_counter:cp|pre_dec:pdec|counter_inc_668_nx20 --operation mode is arithmetic Q1_counter_inc_668_nx20 = CARRY(!Q1_counter_inc_668_nx16 # !Q1_counter_1); --Q1_nx115 is clkpre_counter:cp|pre_dec:pdec|nx115 --operation mode is arithmetic Q1_nx115_carry_eqn = Q1_counter_inc_668_nx20; Q1_nx115 = Q1_counter_2 $ (!Q1_nx115_carry_eqn); --Q1_counter_inc_668_nx24 is clkpre_counter:cp|pre_dec:pdec|counter_inc_668_nx24 --operation mode is arithmetic Q1_counter_inc_668_nx24 = CARRY(Q1_counter_2 & (!Q1_counter_inc_668_nx20)); --Q1_nx96 is clkpre_counter:cp|pre_dec:pdec|nx96 --operation mode is normal Q1_nx96 = Q1_rec_sm_3 & !Q1_rec_sm_2 & Q1_rec_sm_0 & Q1_ix6_ix12_nx4; --Q1_nx97 is clkpre_counter:cp|pre_dec:pdec|nx97 --operation mode is normal Q1_nx97 = Q1_rec_sm_1 & (Q1_rec_sm_0) # !Q1_rec_sm_1 & Q1_rec_sm_3 & !Q1_rec_sm_0 & Q1_modgen_eq_680_nx12; --Q1_nx98 is clkpre_counter:cp|pre_dec:pdec|nx98 --operation mode is normal Q1_nx98 = !Q1_rec_sm_3 & !Q1_rec_sm_2 & Q1_rec_sm_0 & !Q1_modgen_eq_659_nx12; --Q1_nx99 is clkpre_counter:cp|pre_dec:pdec|nx99 --operation mode is normal Q1_nx99 = Q1_rec_sm_2 & (Q1_rec_sm_1 & (!Q1_modgen_eq_677_nx12) # !Q1_rec_sm_1 & !Q1_rec_sm_0) # !Q1_rec_sm_2 & Q1_rec_sm_1; --Q1_nx105 is clkpre_counter:cp|pre_dec:pdec|nx105 --operation mode is normal Q1_nx105 = Q1_nx101 # Q1_nx107 & Q1_nx111 & Q1_nx118; --Q1_nx110 is clkpre_counter:cp|pre_dec:pdec|nx110 --operation mode is normal Q1_nx110 = Q1_rec_sm_0 # !Q1_modgen_eq_677_nx12 # !Q1_rec_sm_1; --Q1_nx100 is clkpre_counter:cp|pre_dec:pdec|nx100 --operation mode is normal Q1_nx100 = Q1_nx101 # Q1_nx106 & Q1_nx111 & Q1_nx118; --Q1_nx102 is clkpre_counter:cp|pre_dec:pdec|nx102 --operation mode is normal Q1_nx102 = Q1_rec_sm_1 & !Q1_rec_sm_0 & (Q1_modgen_eq_677_nx12) # !Q1_rec_sm_1 & Q1_rec_sm_0 & !Q1_modgen_eq_674_nx12; --Q1_nx104 is clkpre_counter:cp|pre_dec:pdec|nx104 --operation mode is normal Q1_nx104 = Q1_rec_sm_3 & !Q1_ptrf_1 & !Q1_ptrf_0 & !Q1_modgen_eq_680_nx12 # !Q1_rec_sm_3 & Q1_ptrf_1 & Q1_ptrf_0; --Q1_nx109 is clkpre_counter:cp|pre_dec:pdec|nx109 --operation mode is normal Q1_nx109 = Q1_ptrf_1 # Q1_ptrf_0 # !Q1_rec_sm_3 & !Q1_modgen_eq_659_nx12; --Q1_nx108 is clkpre_counter:cp|pre_dec:pdec|nx108 --operation mode is normal Q1_nx108 = !Q1_rec_sm_3 & (Q1_nx37 # Q1_nx39); --Q1_modgen_eq_674_nx12 is clkpre_counter:cp|pre_dec:pdec|modgen_eq_674_nx12 --operation mode is normal Q1_modgen_eq_674_nx12 = Q1_counter_0 # Q1_counter_3 # Q1_counter_2 # !Q1_counter_1; --Q1_modgen_eq_677_nx12 is clkpre_counter:cp|pre_dec:pdec|modgen_eq_677_nx12 --operation mode is normal Q1_modgen_eq_677_nx12 = Q1_counter_3 # Q1_counter_1 # !Q1_counter_2 # !Q1_counter_0; --Y1_nx152 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx152 --operation mode is normal Y1_nx152 = Y1_current_state_3 # !Y1_current_state_1; --Y1_nx143 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx143 --operation mode is normal Y1_nx143 = Y1_current_state_2 # Y1_current_state_1 # !M1_freeze_buffer & Y1_current_state_0; --Y1_nx155 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx155 --operation mode is normal Y1_nx155 = Y1_nx180 # scsn_slave_d0_err & Y1_nx147; --Y1_nx160 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx160 --operation mode is normal Y1_nx160 = !L1_data_valid & L1_buffer_half & Y1_current_state_2 & Y1_nx146; --Y1_nx161 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx161 --operation mode is normal Y1_nx161 = !Y1_current_state_3 & Y1_current_state_2 & (M1_freeze_buffer # !Y1_current_state_0); --Y1_nx179 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx179 --operation mode is normal Y1_nx179 = !M1_freeze_buffer & !Y1_current_state_3 & Y1_current_state_1 & Y1_nx156; --Y1_nx162 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx162 --operation mode is normal Y1_nx162 = M1_freeze_buffer & (Y1_nx147 & Y1_nx153 # !Y1_nx152) # !M1_freeze_buffer & Y1_nx147 & (Y1_nx153); --Y1_nx163 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx163 --operation mode is normal Y1_nx163 = !Y1_current_state_0 & !Y1_nx152 & (Y1_current_state_2 # !N1_reply0_valid); --Y1_nx164 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx164 --operation mode is normal Y1_nx164 = Y1_nx155 # Y1_current_state_2 & Y1_nx146 & Y1_nx124; --Y1_nx165 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx165 --operation mode is normal Y1_nx165 = Y1_nx147 & (Y1_forward_buffer_54 # Y1_forward_buffer_53 # Y1_nx178); --Y1_nx166 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx166 --operation mode is normal Y1_nx166 = !N1_wait_for_bridge & Y1_current_state_2 & !Y1_current_state_0 & !Y1_nx152; --Y1_nx168 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx168 --operation mode is normal Y1_nx168 = Y1_current_state_2 & (Y1_nx157) # !Y1_current_state_2 & Y1_current_state_3 & !Y1_current_state_1; --Y1_nx173 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx173 --operation mode is normal Y1_nx173 = Y1_nx167 # Y1_nx169 & (Y1_nx176 # Y1_nx175); --Y1_nx145 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx145 --operation mode is normal Y1_nx145 = Y1_current_state_2 # Y1_nx152 # !M1_freeze_buffer # !L1_data_valid; --J1_nx430 is mcm_nw_apl:scsn_slave_nw_apl|nx430 --operation mode is normal J1_nx430 = !N1_request_50 & (N1_request_52 # N1_request_51); --J1_nx241 is mcm_nw_apl:scsn_slave_nw_apl|nx241 --operation mode is normal J1_nx241 = J1_current_state_3 & !J1_current_state_2 & !J1_current_state_1 & J1_current_state_0; --J1_nx383 is mcm_nw_apl:scsn_slave_nw_apl|nx383 --operation mode is normal J1_nx383 = J1_current_state_3 & J1_current_state_2 & J1_long_transaction & J1_NOT_ix34_ix32_nx8; --J1_waitcount_3 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_3 --operation mode is arithmetic J1_waitcount_3_carry_eqn = J1_waitcount_nx28; J1_waitcount_3_lut_out = J1_waitcount_3 $ (!J1_waitcount_3_carry_eqn); J1_waitcount_3 = DFFEAS(J1_waitcount_3_lut_out, X1__clk0, VCC, , , VCC, , , J1_nx383); --J1_waitcount_nx33 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_nx33 --operation mode is arithmetic J1_waitcount_nx33 = CARRY(!J1_waitcount_3 & (!J1_waitcount_nx28)); --J1_waitcount_2 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_2 --operation mode is arithmetic J1_waitcount_2_carry_eqn = J1_waitcount_nx21; J1_waitcount_2_lut_out = J1_waitcount_2 $ (J1_waitcount_2_carry_eqn); J1_waitcount_2 = DFFEAS(J1_waitcount_2_lut_out, X1__clk0, VCC, , , ~GND, , , J1_nx383); --J1_waitcount_nx28 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_nx28 --operation mode is arithmetic J1_waitcount_nx28 = CARRY(J1_waitcount_2 # !J1_waitcount_nx21); --J1_waitcount_1 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_1 --operation mode is arithmetic J1_waitcount_1_carry_eqn = J1_waitcount_nx15; J1_waitcount_1_lut_out = J1_waitcount_1 $ (!J1_waitcount_1_carry_eqn); J1_waitcount_1 = DFFEAS(J1_waitcount_1_lut_out, X1__clk0, VCC, , , ~GND, , , J1_nx383); --J1_waitcount_nx21 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_nx21 --operation mode is arithmetic J1_waitcount_nx21 = CARRY(!J1_waitcount_1 & (!J1_waitcount_nx15)); --J1_waitcount_0 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_0 --operation mode is arithmetic J1_waitcount_0_lut_out = J1_waitcount_0 $ J1_nx403; J1_waitcount_0 = DFFEAS(J1_waitcount_0_lut_out, X1__clk0, VCC, , , ~GND, , , J1_nx383); --J1_waitcount_nx15 is mcm_nw_apl:scsn_slave_nw_apl|waitcount_nx15 --operation mode is arithmetic J1_waitcount_nx15 = CARRY(J1_waitcount_0 # !J1_nx403); --C1_nx298 is gio_devices:gio|nx298 --operation mode is normal C1_nx298 = W1_q_b[0] & (C1_sel_5 # G1_bus_dout_0 & C1_ce_gen) # !W1_q_b[0] & G1_bus_dout_0 & (C1_ce_gen); --C1_nx299 is gio_devices:gio|nx299 --operation mode is normal C1_nx299 = B1_bus_dout_0 & (C1_ce_cp # E2_bus_dout_0 & C1_ce_ni_jtg_up) # !B1_bus_dout_0 & E2_bus_dout_0 & (C1_ce_ni_jtg_up); --C1_nx300 is gio_devices:gio|nx300 --operation mode is normal C1_nx300 = E1_bus_dout_0 & (C1_ce_ni_jtg_dn # D1_bus_dout_0 & C1_ce_dut_jtg) # !E1_bus_dout_0 & D1_bus_dout_0 & (C1_ce_dut_jtg); --R1_shiftd_1 is clkpre_counter:cp|pre_enc:pend|shiftd_1 --operation mode is normal R1_shiftd_1_lut_out = R1_FUNC_s_2 & R1_FUNC_s_1; R1_shiftd_1 = DFFEAS(R1_shiftd_1_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, R1_shiftd_0, , , R1_send_sm); --scsn_slave_data_in_0 is scsn_slave_data_in_0 --operation mode is normal scsn_slave_data_in_0_lut_out = scsn_slave_nw_pl_SAMPLES0_1 & scsn_slave_nw_pl_SAMPLES0_0; scsn_slave_data_in_0 = DFFEAS(scsn_slave_data_in_0_lut_out, X1__clk0, VCC, , scsn_slave_nw_pl_nx181, , , , ); --K1_d_buff is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|d_buff --operation mode is normal K1_d_buff_lut_out = scsn_slave_data_in_0; K1_d_buff = DFFEAS(K1_d_buff_lut_out, X1__clk0, VCC, , , , , , ); --K1_sync_counter_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|sync_counter_0 --operation mode is normal K1_sync_counter_0_lut_out = K1_current_state_3 & !K1_current_state_2 & !K1_current_state_0 # !K1_current_state_3 & K1_current_state_2 & (K1_nx142 # !K1_current_state_0); K1_sync_counter_0 = DFFEAS(K1_sync_counter_0_lut_out, X1__clk0, VCC, , K1_NOT_nx210, , , , ); --K1_timer_in_state_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_state_2 --operation mode is normal K1_timer_in_state_2_lut_out = K1_b_1 & (K1_nx159 # K1_nx158 & K1_nx181) # !K1_b_1 & K1_nx158 & (K1_nx181); K1_timer_in_state_2 = DFFEAS(K1_timer_in_state_2_lut_out, X1__clk0, VCC, , K1_timer_in_nx116, , , , ); --K1_timer_in_state_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_state_0 --operation mode is normal K1_timer_in_state_0_lut_out = K1_nx180 # K1_nx185 # K1_nx181 & K1_nx199; K1_timer_in_state_0 = DFFEAS(K1_timer_in_state_0_lut_out, X1__clk0, VCC, , K1_timer_in_nx116, , , , ); --K1_timer_in_state_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_state_1 --operation mode is normal K1_timer_in_state_1_lut_out = K1_nx183 # K1_nx184 # !K1_current_state_1 & !K1_nx175; K1_timer_in_state_1 = DFFEAS(K1_timer_in_state_1_lut_out, X1__clk0, VCC, , K1_timer_in_nx116, , , , ); --K1_current_state_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|current_state_1 --operation mode is normal K1_current_state_1_lut_out = K1_nx164 # K1_nx165 # K1_nx192 # K1_nx193; K1_current_state_1 = DFFEAS(K1_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --L1_buffer_full is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|buffer_full --operation mode is normal L1_buffer_full = L1_bitcounter_6 & (L1_bitcounter_5 # L1_bitcounter_4 & L1_nx280); --K1_ds_err is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|ds_err --operation mode is normal K1_ds_err_lut_out = K1_destuff_in_counter_2 & K1_destuff_in_counter_1 & K1_nx179 & K1_nx198; K1_ds_err = DFFEAS(K1_ds_err_lut_out, X1__clk0, VCC, , , , , , ); --K1_sync_counter_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|sync_counter_2 --operation mode is normal K1_sync_counter_2_lut_out = K1_current_state_3 & !K1_current_state_2 & !K1_current_state_0 # !K1_current_state_3 & K1_current_state_2 & (K1_nx140 # !K1_current_state_0); K1_sync_counter_2 = DFFEAS(K1_sync_counter_2_lut_out, X1__clk0, VCC, , K1_NOT_nx210, , , , ); --K1_sync_counter_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|sync_counter_1 --operation mode is normal K1_sync_counter_1_lut_out = K1_current_state_3 & !K1_current_state_2 & !K1_current_state_0 # !K1_current_state_3 & K1_current_state_2 & (K1_nx141 # !K1_current_state_0); K1_sync_counter_1 = DFFEAS(K1_sync_counter_1_lut_out, X1__clk0, VCC, , K1_NOT_nx210, , , , ); --K1_nx170 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx170 --operation mode is normal K1_nx170 = !K1_current_state_3 & K1_current_state_1; --K1_nx180 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx180 --operation mode is normal K1_nx180 = !K1_current_state_3 & K1_current_state_2 & K1_current_state_1 & !K1_current_state_0; --K1_nx167 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx167 --operation mode is normal K1_nx167 = K1_sync_counter_2 # K1_sync_counter_1; --K1_nx176 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx176 --operation mode is normal K1_nx176 = !K1_current_state_3 & K1_current_state_2 & !K1_current_state_1; --K1_nx169 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx169 --operation mode is normal K1_nx169 = L1_buffer_full # K1_ds_err; --K1_nx181 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx181 --operation mode is normal K1_nx181 = K1_current_state_3 & !K1_current_state_2 & !K1_current_state_1 & !K1_current_state_0; --K1_nx173 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx173 --operation mode is normal K1_nx173 = K1_current_state_2 # K1_current_state_1 & K1_current_state_0; --K1_nx189 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx189 --operation mode is normal K1_nx189 = K1_nx175 # K1_nx158 & (!K1_nx169 # !K1_current_state_0); --K1_destuff_in_counter_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_counter_2 --operation mode is normal K1_destuff_in_counter_2_carry_eqn = K1_destuff_in_counter_nx12; K1_destuff_in_counter_2_lut_out = K1_destuff_in_counter_2 $ (!K1_destuff_in_counter_2_carry_eqn); K1_destuff_in_counter_2 = DFFEAS(K1_destuff_in_counter_2_lut_out, X1__clk0, VCC, , K1_destuff_in_nx90, , , K1_SCLEAR, ); --K1_destuff_in_counter_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_counter_1 --operation mode is arithmetic K1_destuff_in_counter_1_carry_eqn = K1_destuff_in_counter_nx6; K1_destuff_in_counter_1_lut_out = K1_destuff_in_counter_1 $ (K1_destuff_in_counter_1_carry_eqn); K1_destuff_in_counter_1 = DFFEAS(K1_destuff_in_counter_1_lut_out, X1__clk0, VCC, , K1_destuff_in_nx90, , , K1_SCLEAR, ); --K1_destuff_in_counter_nx12 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_counter_nx12 --operation mode is arithmetic K1_destuff_in_counter_nx12 = CARRY(!K1_destuff_in_counter_nx6 # !K1_destuff_in_counter_1); --K1_destuff_in_counter_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_counter_0 --operation mode is arithmetic K1_destuff_in_counter_0_lut_out = !K1_destuff_in_counter_0; K1_destuff_in_counter_0 = DFFEAS(K1_destuff_in_counter_0_lut_out, X1__clk0, VCC, , K1_destuff_in_nx90, , , K1_SCLEAR, ); --K1_destuff_in_counter_nx6 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_counter_nx6 --operation mode is arithmetic K1_destuff_in_counter_nx6 = CARRY(K1_destuff_in_counter_0); --K1_nx179 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx179 --operation mode is normal K1_nx179 = !K1_current_state_1 & (K1_current_state_3 & !K1_current_state_2 & !K1_current_state_0 # !K1_current_state_3 & K1_current_state_2 & K1_current_state_0); --scsn_slave_data_in_1 is scsn_slave_data_in_1 --operation mode is normal scsn_slave_data_in_1_lut_out = scsn_slave_nw_pl_SAMPLES1_1 & scsn_slave_nw_pl_SAMPLES1_0; scsn_slave_data_in_1 = DFFEAS(scsn_slave_data_in_1_lut_out, X1__clk0, VCC, , scsn_slave_nw_pl_nx183, , , , ); --K2_d_buff is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|d_buff --operation mode is normal K2_d_buff_lut_out = scsn_slave_data_in_1; K2_d_buff = DFFEAS(K2_d_buff_lut_out, X1__clk0, VCC, , , , , , ); --K2_sync_counter_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|sync_counter_0 --operation mode is normal K2_sync_counter_0_lut_out = K2_current_state_3 & !K2_current_state_2 & !K2_current_state_0 # !K2_current_state_3 & K2_current_state_2 & (K2_nx142 # !K2_current_state_0); K2_sync_counter_0 = DFFEAS(K2_sync_counter_0_lut_out, X1__clk0, VCC, , K2_NOT_nx210, , , , ); --K2_timer_in_state_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_state_2 --operation mode is normal K2_timer_in_state_2_lut_out = K2_b_1 & (K2_nx159 # K2_nx158 & K2_nx181) # !K2_b_1 & K2_nx158 & (K2_nx181); K2_timer_in_state_2 = DFFEAS(K2_timer_in_state_2_lut_out, X1__clk0, VCC, , K2_timer_in_nx116, , , , ); --K2_timer_in_state_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_state_0 --operation mode is normal K2_timer_in_state_0_lut_out = K2_nx180 # K2_nx185 # K2_nx181 & K2_nx199; K2_timer_in_state_0 = DFFEAS(K2_timer_in_state_0_lut_out, X1__clk0, VCC, , K2_timer_in_nx116, , , , ); --K2_timer_in_state_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_state_1 --operation mode is normal K2_timer_in_state_1_lut_out = K2_nx183 # K2_nx184 # !K2_current_state_1 & !K2_nx175; K2_timer_in_state_1 = DFFEAS(K2_timer_in_state_1_lut_out, X1__clk0, VCC, , K2_timer_in_nx116, , , , ); --K2_current_state_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|current_state_1 --operation mode is normal K2_current_state_1_lut_out = K2_nx164 # K2_nx165 # K2_nx192 # K2_nx193; K2_current_state_1 = DFFEAS(K2_current_state_1_lut_out, X1__clk0, VCC, , , , , , ); --L2_buffer_full is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|buffer_full --operation mode is normal L2_buffer_full = L2_bitcounter_6 & (L2_bitcounter_5 # L2_bitcounter_4 & L2_nx280); --K2_ds_err is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|ds_err --operation mode is normal K2_ds_err_lut_out = K2_destuff_in_counter_2 & K2_destuff_in_counter_1 & K2_nx179 & K2_nx198; K2_ds_err = DFFEAS(K2_ds_err_lut_out, X1__clk0, VCC, , , , , , ); --K2_sync_counter_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|sync_counter_2 --operation mode is normal K2_sync_counter_2_lut_out = K2_current_state_3 & !K2_current_state_2 & !K2_current_state_0 # !K2_current_state_3 & K2_current_state_2 & (K2_nx140 # !K2_current_state_0); K2_sync_counter_2 = DFFEAS(K2_sync_counter_2_lut_out, X1__clk0, VCC, , K2_NOT_nx210, , , , ); --K2_sync_counter_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|sync_counter_1 --operation mode is normal K2_sync_counter_1_lut_out = K2_current_state_3 & !K2_current_state_2 & !K2_current_state_0 # !K2_current_state_3 & K2_current_state_2 & (K2_nx141 # !K2_current_state_0); K2_sync_counter_1 = DFFEAS(K2_sync_counter_1_lut_out, X1__clk0, VCC, , K2_NOT_nx210, , , , ); --K2_nx170 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx170 --operation mode is normal K2_nx170 = !K2_current_state_3 & K2_current_state_1; --K2_nx180 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx180 --operation mode is normal K2_nx180 = !K2_current_state_3 & K2_current_state_2 & K2_current_state_1 & !K2_current_state_0; --K2_nx167 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx167 --operation mode is normal K2_nx167 = K2_sync_counter_2 # K2_sync_counter_1; --K2_nx176 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx176 --operation mode is normal K2_nx176 = !K2_current_state_3 & K2_current_state_2 & !K2_current_state_1; --K2_nx169 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx169 --operation mode is normal K2_nx169 = L2_buffer_full # K2_ds_err; --K2_nx181 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx181 --operation mode is normal K2_nx181 = K2_current_state_3 & !K2_current_state_2 & !K2_current_state_1 & !K2_current_state_0; --K2_nx173 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx173 --operation mode is normal K2_nx173 = K2_current_state_2 # K2_current_state_1 & K2_current_state_0; --K2_nx189 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx189 --operation mode is normal K2_nx189 = K2_nx175 # K2_nx158 & (!K2_nx169 # !K2_current_state_0); --K2_destuff_in_counter_2 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_counter_2 --operation mode is normal K2_destuff_in_counter_2_carry_eqn = K2_destuff_in_counter_nx12; K2_destuff_in_counter_2_lut_out = K2_destuff_in_counter_2 $ (!K2_destuff_in_counter_2_carry_eqn); K2_destuff_in_counter_2 = DFFEAS(K2_destuff_in_counter_2_lut_out, X1__clk0, VCC, , K2_destuff_in_nx90, , , K2_SCLEAR, ); --K2_destuff_in_counter_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_counter_1 --operation mode is arithmetic K2_destuff_in_counter_1_carry_eqn = K2_destuff_in_counter_nx6; K2_destuff_in_counter_1_lut_out = K2_destuff_in_counter_1 $ (K2_destuff_in_counter_1_carry_eqn); K2_destuff_in_counter_1 = DFFEAS(K2_destuff_in_counter_1_lut_out, X1__clk0, VCC, , K2_destuff_in_nx90, , , K2_SCLEAR, ); --K2_destuff_in_counter_nx12 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_counter_nx12 --operation mode is arithmetic K2_destuff_in_counter_nx12 = CARRY(!K2_destuff_in_counter_nx6 # !K2_destuff_in_counter_1); --K2_destuff_in_counter_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_counter_0 --operation mode is arithmetic K2_destuff_in_counter_0_lut_out = !K2_destuff_in_counter_0; K2_destuff_in_counter_0 = DFFEAS(K2_destuff_in_counter_0_lut_out, X1__clk0, VCC, , K2_destuff_in_nx90, , , K2_SCLEAR, ); --K2_destuff_in_counter_nx6 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_counter_nx6 --operation mode is arithmetic K2_destuff_in_counter_nx6 = CARRY(K2_destuff_in_counter_0); --K2_nx179 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx179 --operation mode is normal K2_nx179 = !K2_current_state_1 & (K2_current_state_3 & !K2_current_state_2 & !K2_current_state_0 # !K2_current_state_3 & K2_current_state_2 & K2_current_state_0); --scsn_slave_d1_err is scsn_slave_d1_err --operation mode is normal scsn_slave_d1_err = !L2_data_valid & L2_buffer_full; --Y2_nx147 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx147 --operation mode is normal Y2_nx147 = !Y2_current_state_3 & !Y2_current_state_2 & !Y2_current_state_1 & Y2_current_state_0; --Y2_nx180 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx180 --operation mode is normal Y2_nx180 = !L2_data_valid & !Y2_current_state_3 & !Y2_current_state_2 & Y2_current_state_1; --L2_data_valid is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_valid --operation mode is normal L2_data_valid = L2_buffer_full & L2_nx278 & L2_nx282 & L2_nx283; --L2_buffer_half is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|buffer_half --operation mode is normal L2_buffer_half = L2_bitcounter_6 & (L2_bitcounter_5 # L2_bitcounter_4 & L2_nx281); --Y2_nx146 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx146 --operation mode is normal Y2_nx146 = !Y2_current_state_3 & !Y2_current_state_1; --Y2_nx156 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx156 --operation mode is normal Y2_nx156 = !Y2_current_state_2 & (N1_reply1_valid # Y2_current_state_0); --Y2_nx153 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx153 --operation mode is normal Y2_nx153 = Y2_forward_buffer_60 # Y2_forward_buffer_59; --N1_reply1_valid is mcm_nw_nwl:scsn_slave_nw_nwl|reply1_valid --operation mode is normal N1_reply1_valid = J1_reply_valid & !N1_current_state_0 & N1_nx221; --Y2_nx124 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx124 --operation mode is normal Y2_nx124 = !L2_data_valid & L2_buffer_half; --Y2_forward_buffer_54 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_54 --operation mode is arithmetic Y2_forward_buffer_54_carry_eqn = Y2_result_inc_424_nx44; Y2_forward_buffer_54 = L2_data_out_54 $ (!Y2_forward_buffer_54_carry_eqn); --Y2_result_inc_424_nx48 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx48 --operation mode is arithmetic Y2_result_inc_424_nx48 = CARRY(L2_data_out_54 & (!Y2_result_inc_424_nx44)); --Y2_forward_buffer_53 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_53 --operation mode is normal Y2_forward_buffer_53_carry_eqn = Y2_result_inc_424_nx48; Y2_forward_buffer_53 = L2_data_out_53 $ (Y2_forward_buffer_53_carry_eqn); --Y2_nx178 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx178 --operation mode is normal Y2_nx178 = Y2_forward_buffer_58 # Y2_forward_buffer_57 # Y2_forward_buffer_56 # Y2_forward_buffer_55; --N1_wait_for_bridge is mcm_nw_nwl:scsn_slave_nw_nwl|wait_for_bridge --operation mode is normal N1_wait_for_bridge = N1_current_state_2 $ (N1_current_state_1 & N1_current_state_0); --Y2_nx157 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx157 --operation mode is normal Y2_nx157 = !Y2_current_state_3 & (Y2_current_state_1 & Y2_current_state_0 # !Y2_current_state_1 & (!Y2_nx124)); --Y2_nx167 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx167 --operation mode is normal Y2_nx167 = !N1_wait_for_bridge & Y2_nx25 & Y2_nx146 & Y2_nx148; --Y2_nx169 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx169 --operation mode is normal Y2_nx169 = Y2_forward_buffer_58 # Y2_forward_buffer_57 # Y2_nx153 # Y2_nx174; --Y2_nx176 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx176 --operation mode is normal Y2_nx176 = Y2_nx177 # Y2_nx150 & (Y2_modgen_eq_337_nx0 # Y2_nx170); --Y2_nx175 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx175 --operation mode is normal Y2_nx175 = Y2_modgen_eq_336_nx24 & Y2_nx149 & (Y2_nx171 # Y2_nx172); --L1_data_out_32 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_32 --operation mode is normal L1_data_out_32_lut_out = L1_data_out_31; L1_data_out_32 = DFFEAS(L1_data_out_32_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_32 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_32 --operation mode is normal L2_data_out_32_lut_out = L2_data_out_31; L2_data_out_32 = DFFEAS(L2_data_out_32_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --C1_ix0_nx22 is gio_devices:gio|ix0_nx22 --operation mode is normal C1_ix0_nx22_regcasc_in = C1_ix0_nx20; C1_ix0_nx22 = DFFEAS(C1_ix0_nx22_regcasc_in, X1__clk0, VCC, , , , , , ); --J1_nx1105 is mcm_nw_apl:scsn_slave_nw_apl|nx1105 --operation mode is normal J1_nx1105 = !J1_current_state_3 & (J1_current_state_2 & (!J1_current_state_0) # !J1_current_state_2 & !J1_current_state_1); --B1_nx801 is clkpre_counter:cp|nx801 --operation mode is normal B1_nx801 = N1_request_45 & N1_request_46 & !N1_request_47 & !N1_request_48; --B1_L0time_7 is clkpre_counter:cp|L0time_7 --operation mode is normal B1_L0time_7_lut_out = N1_request_24; B1_L0time_7 = DFFEAS(B1_L0time_7_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_6 is clkpre_counter:cp|L0time_6 --operation mode is normal B1_L0time_6_lut_out = N1_request_25; B1_L0time_6 = DFFEAS(B1_L0time_6_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_5 is clkpre_counter:cp|L0time_5 --operation mode is normal B1_L0time_5_lut_out = N1_request_26; B1_L0time_5 = DFFEAS(B1_L0time_5_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_4 is clkpre_counter:cp|L0time_4 --operation mode is normal B1_L0time_4_lut_out = N1_request_27; B1_L0time_4 = DFFEAS(B1_L0time_4_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_3 is clkpre_counter:cp|L0time_3 --operation mode is normal B1_L0time_3_lut_out = N1_request_28; B1_L0time_3 = DFFEAS(B1_L0time_3_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_1 is clkpre_counter:cp|L0time_1 --operation mode is normal B1_L0time_1_lut_out = N1_request_30; B1_L0time_1 = DFFEAS(B1_L0time_1_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_2 is clkpre_counter:cp|L0time_2 --operation mode is normal B1_L0time_2_lut_out = N1_request_29; B1_L0time_2 = DFFEAS(B1_L0time_2_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_0 is clkpre_counter:cp|L0time_0 --operation mode is normal B1_L0time_0_lut_out = N1_request_31; B1_L0time_0 = DFFEAS(B1_L0time_0_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_11 is clkpre_counter:cp|L0time_11 --operation mode is normal B1_L0time_11_lut_out = N1_request_20; B1_L0time_11 = DFFEAS(B1_L0time_11_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_10 is clkpre_counter:cp|L0time_10 --operation mode is normal B1_L0time_10_lut_out = N1_request_21; B1_L0time_10 = DFFEAS(B1_L0time_10_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_9 is clkpre_counter:cp|L0time_9 --operation mode is normal B1_L0time_9_lut_out = N1_request_22; B1_L0time_9 = DFFEAS(B1_L0time_9_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_L0time_8 is clkpre_counter:cp|L0time_8 --operation mode is normal B1_L0time_8_lut_out = N1_request_23; B1_L0time_8 = DFFEAS(B1_L0time_8_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx864, , , , ); --B1_nx799 is clkpre_counter:cp|nx799 --operation mode is normal B1_nx799 = N1_request_45 & N1_request_46 & !N1_request_47 & N1_request_48; --B1_L1time_7 is clkpre_counter:cp|L1time_7 --operation mode is normal B1_L1time_7_lut_out = N1_request_24; B1_L1time_7 = DFFEAS(B1_L1time_7_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_6 is clkpre_counter:cp|L1time_6 --operation mode is normal B1_L1time_6_lut_out = N1_request_25; B1_L1time_6 = DFFEAS(B1_L1time_6_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_5 is clkpre_counter:cp|L1time_5 --operation mode is normal B1_L1time_5_lut_out = N1_request_26; B1_L1time_5 = DFFEAS(B1_L1time_5_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_4 is clkpre_counter:cp|L1time_4 --operation mode is normal B1_L1time_4_lut_out = N1_request_27; B1_L1time_4 = DFFEAS(B1_L1time_4_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_3 is clkpre_counter:cp|L1time_3 --operation mode is normal B1_L1time_3_lut_out = N1_request_28; B1_L1time_3 = DFFEAS(B1_L1time_3_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_1 is clkpre_counter:cp|L1time_1 --operation mode is normal B1_L1time_1_lut_out = N1_request_30; B1_L1time_1 = DFFEAS(B1_L1time_1_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_2 is clkpre_counter:cp|L1time_2 --operation mode is normal B1_L1time_2_lut_out = N1_request_29; B1_L1time_2 = DFFEAS(B1_L1time_2_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_0 is clkpre_counter:cp|L1time_0 --operation mode is normal B1_L1time_0_lut_out = N1_request_31; B1_L1time_0 = DFFEAS(B1_L1time_0_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_11 is clkpre_counter:cp|L1time_11 --operation mode is normal B1_L1time_11_lut_out = N1_request_20; B1_L1time_11 = DFFEAS(B1_L1time_11_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_10 is clkpre_counter:cp|L1time_10 --operation mode is normal B1_L1time_10_lut_out = N1_request_21; B1_L1time_10 = DFFEAS(B1_L1time_10_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_9 is clkpre_counter:cp|L1time_9 --operation mode is normal B1_L1time_9_lut_out = N1_request_22; B1_L1time_9 = DFFEAS(B1_L1time_9_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_L1time_8 is clkpre_counter:cp|L1time_8 --operation mode is normal B1_L1time_8_lut_out = N1_request_23; B1_L1time_8 = DFFEAS(B1_L1time_8_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx836, , , , ); --B1_nx802 is clkpre_counter:cp|nx802 --operation mode is normal B1_nx802 = N1_request_45 & N1_request_46 & N1_request_47 & !N1_request_48; --B1_L2time_7 is clkpre_counter:cp|L2time_7 --operation mode is normal B1_L2time_7_lut_out = N1_request_24; B1_L2time_7 = DFFEAS(B1_L2time_7_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_6 is clkpre_counter:cp|L2time_6 --operation mode is normal B1_L2time_6_lut_out = N1_request_25; B1_L2time_6 = DFFEAS(B1_L2time_6_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_5 is clkpre_counter:cp|L2time_5 --operation mode is normal B1_L2time_5_lut_out = N1_request_26; B1_L2time_5 = DFFEAS(B1_L2time_5_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_4 is clkpre_counter:cp|L2time_4 --operation mode is normal B1_L2time_4_lut_out = N1_request_27; B1_L2time_4 = DFFEAS(B1_L2time_4_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_3 is clkpre_counter:cp|L2time_3 --operation mode is normal B1_L2time_3_lut_out = N1_request_28; B1_L2time_3 = DFFEAS(B1_L2time_3_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_1 is clkpre_counter:cp|L2time_1 --operation mode is normal B1_L2time_1_lut_out = N1_request_30; B1_L2time_1 = DFFEAS(B1_L2time_1_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_2 is clkpre_counter:cp|L2time_2 --operation mode is normal B1_L2time_2_lut_out = N1_request_29; B1_L2time_2 = DFFEAS(B1_L2time_2_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_0 is clkpre_counter:cp|L2time_0 --operation mode is normal B1_L2time_0_lut_out = N1_request_31; B1_L2time_0 = DFFEAS(B1_L2time_0_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_11 is clkpre_counter:cp|L2time_11 --operation mode is normal B1_L2time_11_lut_out = N1_request_20; B1_L2time_11 = DFFEAS(B1_L2time_11_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_10 is clkpre_counter:cp|L2time_10 --operation mode is normal B1_L2time_10_lut_out = N1_request_21; B1_L2time_10 = DFFEAS(B1_L2time_10_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_9 is clkpre_counter:cp|L2time_9 --operation mode is normal B1_L2time_9_lut_out = N1_request_22; B1_L2time_9 = DFFEAS(B1_L2time_9_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --B1_L2time_8 is clkpre_counter:cp|L2time_8 --operation mode is normal B1_L2time_8_lut_out = N1_request_23; B1_L2time_8 = DFFEAS(B1_L2time_8_lut_out, X1__clk0, J1_chipRST_n, , B1_NOT_nx808, , , , ); --G1_ni_ir_cnt_rst_1 is general_config_notri:nic_notri|ni_ir_cnt_rst_1 --operation mode is arithmetic G1_ni_ir_cnt_rst_1_carry_eqn = G1_ni_ir_cnt_rst_nx10; G1_ni_ir_cnt_rst_1_lut_out = G1_ni_ir_cnt_rst_1 $ (G1_ni_ir_cnt_rst_1_carry_eqn); G1_ni_ir_cnt_rst_1 = DFFEAS(G1_ni_ir_cnt_rst_1_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx16 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx16 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx16 = CARRY(!G1_ni_ir_cnt_rst_nx10 # !G1_ni_ir_cnt_rst_1); --N1_nx231 is mcm_nw_nwl:scsn_slave_nw_nwl|nx231 --operation mode is normal N1_nx231 = !M1_freeze_buffer & !M2_freeze_buffer; --scsn_slave_nw_dll_ob0_nx1398 is scsn_slave_nw_dll_ob0_nx1398 --operation mode is normal scsn_slave_nw_dll_ob0_nx1398 = M1_request_data & !NOT_scsn_slave_nw_dll_ob0_NOT_crc_empty; --M1_timer_in_nx18 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_nx18 --operation mode is normal M1_timer_in_nx18 = M1_timer_in_state_0 # M1_timer_in_state_1 # !M1_timer_in_state_2; --M1_timer_in_state_inc_275_nx14 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|timer_in_state_inc_275_nx14 --operation mode is arithmetic M1_timer_in_state_inc_275_nx14 = CARRY(M1_timer_in_state_0); --M1_b_0_dup_143 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_143 --operation mode is normal M1_b_0_dup_143 = !M1_sleeptimer_state_0 & M1_sleeptimer_nx21; --M1_b_0_dup_136 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_136 --operation mode is arithmetic M1_b_0_dup_136_carry_eqn = M1_sleeptimer_state_inc_289_nx20; M1_b_0_dup_136 = M1_sleeptimer_nx21 & (M1_sleeptimer_state_1 $ M1_b_0_dup_136_carry_eqn); --M1_sleeptimer_state_inc_289_nx24 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_inc_289_nx24 --operation mode is arithmetic M1_sleeptimer_state_inc_289_nx24 = CARRY(!M1_sleeptimer_state_inc_289_nx20 # !M1_sleeptimer_state_1); --M1_sleeptimer_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_2 --operation mode is normal M1_sleeptimer_state_2_lut_out = M1_current_state_1 # M1_b_0_dup_129 # !M1_current_state_2; M1_sleeptimer_state_2 = DFFEAS(M1_sleeptimer_state_2_lut_out, X1__clk0, VCC, , , , , , ); --M1_sleeptimer_state_3 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_3 --operation mode is normal M1_sleeptimer_state_3_lut_out = M1_current_state_1 # M1_b_0_dup_122 # !M1_current_state_2; M1_sleeptimer_state_3 = DFFEAS(M1_sleeptimer_state_3_lut_out, X1__clk0, VCC, , , , , , ); --M1_sleeptimer_state_4 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_4 --operation mode is normal M1_sleeptimer_state_4_lut_out = M1_current_state_1 # M1_b_0_dup_115 # !M1_current_state_2; M1_sleeptimer_state_4 = DFFEAS(M1_sleeptimer_state_4_lut_out, X1__clk0, VCC, , , , , , ); --M1_sleeptimer_state_5 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_5 --operation mode is normal M1_sleeptimer_state_5_lut_out = M1_current_state_1 # M1_b_0_dup_108 # !M1_current_state_2; M1_sleeptimer_state_5 = DFFEAS(M1_sleeptimer_state_5_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_dll_ob0_ob_data_66 is scsn_slave_nw_dll_ob0_ob_data_66 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_66_lut_out = scsn_slave_nw_dll_ob0_ob_data_65; scsn_slave_nw_dll_ob0_ob_data_66 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_66_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_66, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_67 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_67 --operation mode is normal Y1_d_to_dll_67 = L1_data_out_67 & (Y1_nx151 # Y1_forward_buffer_59 & Y1_nx154) # !L1_data_out_67 & Y1_forward_buffer_59 & (Y1_nx154); --L1_data_out_68 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_68 --operation mode is normal L1_data_out_68_lut_out = L1_data_out_67; L1_data_out_68 = DFFEAS(L1_data_out_68_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_forward_buffer_60 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_60 --operation mode is normal Y1_forward_buffer_60 = !L1_data_out_60; --Y1_nx151 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx151 --operation mode is normal Y1_nx151 = !Y1_current_state_2 & (Y1_current_state_0 # !N1_altered_frame0); --Y1_nx154 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx154 --operation mode is normal Y1_nx154 = N1_altered_frame0 & !Y1_current_state_2 & !Y1_current_state_0; --Y1_d_we is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_we --operation mode is normal Y1_d_we = !Y1_current_state_3 & Y1_current_state_1 & (Y1_current_state_0 # !Y1_current_state_2); --M1_request_data is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|request_data --operation mode is normal M1_request_data = !M1_current_state_2 & M1_current_state_1 & M1_current_state_0 & !M1_stuff_bit_inserted; --nx1573 is nx1573 --operation mode is normal nx1573 = nx1574 # !scsn_slave_nw_dll_ob0_bitcounter_5 & !scsn_slave_nw_dll_ob0_bitcounter_3 & nx1575; --scsn_slave_nw_dll_ob0_ob_crc_13 is scsn_slave_nw_dll_ob0_ob_crc_13 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_13_lut_out = scsn_slave_nw_dll_ob0_ob_crc_12; scsn_slave_nw_dll_ob0_ob_crc_13 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_13_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_66, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_nx1398 is scsn_slave_nw_dll_ob1_nx1398 --operation mode is normal scsn_slave_nw_dll_ob1_nx1398 = M2_request_data & !NOT_scsn_slave_nw_dll_ob1_NOT_crc_empty; --M2_timer_in_nx18 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_nx18 --operation mode is normal M2_timer_in_nx18 = M2_timer_in_state_0 # M2_timer_in_state_1 # !M2_timer_in_state_2; --M2_timer_in_state_inc_275_nx14 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|timer_in_state_inc_275_nx14 --operation mode is arithmetic M2_timer_in_state_inc_275_nx14 = CARRY(M2_timer_in_state_0); --M2_b_0_dup_143 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_143 --operation mode is normal M2_b_0_dup_143 = !M2_sleeptimer_state_0 & M2_sleeptimer_nx21; --M2_b_0_dup_136 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_136 --operation mode is arithmetic M2_b_0_dup_136_carry_eqn = M2_sleeptimer_state_inc_289_nx20; M2_b_0_dup_136 = M2_sleeptimer_nx21 & (M2_sleeptimer_state_1 $ M2_b_0_dup_136_carry_eqn); --M2_sleeptimer_state_inc_289_nx24 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_inc_289_nx24 --operation mode is arithmetic M2_sleeptimer_state_inc_289_nx24 = CARRY(!M2_sleeptimer_state_inc_289_nx20 # !M2_sleeptimer_state_1); --M2_sleeptimer_state_2 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_2 --operation mode is normal M2_sleeptimer_state_2_lut_out = M2_current_state_1 # M2_b_0_dup_129 # !M2_current_state_2; M2_sleeptimer_state_2 = DFFEAS(M2_sleeptimer_state_2_lut_out, X1__clk0, VCC, , , , , , ); --M2_sleeptimer_state_3 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_3 --operation mode is normal M2_sleeptimer_state_3_lut_out = M2_current_state_1 # M2_b_0_dup_122 # !M2_current_state_2; M2_sleeptimer_state_3 = DFFEAS(M2_sleeptimer_state_3_lut_out, X1__clk0, VCC, , , , , , ); --M2_sleeptimer_state_4 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_4 --operation mode is normal M2_sleeptimer_state_4_lut_out = M2_current_state_1 # M2_b_0_dup_115 # !M2_current_state_2; M2_sleeptimer_state_4 = DFFEAS(M2_sleeptimer_state_4_lut_out, X1__clk0, VCC, , , , , , ); --M2_sleeptimer_state_5 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_5 --operation mode is normal M2_sleeptimer_state_5_lut_out = M2_current_state_1 # M2_b_0_dup_108 # !M2_current_state_2; M2_sleeptimer_state_5 = DFFEAS(M2_sleeptimer_state_5_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_dll_ob1_ob_data_66 is scsn_slave_nw_dll_ob1_ob_data_66 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_66_lut_out = scsn_slave_nw_dll_ob1_ob_data_65; scsn_slave_nw_dll_ob1_ob_data_66 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_66_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_66, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_67 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_67 --operation mode is normal Y2_d_to_dll_67 = L2_data_out_67 & (Y2_nx151 # Y2_forward_buffer_59 & Y2_nx154) # !L2_data_out_67 & Y2_forward_buffer_59 & (Y2_nx154); --L2_data_out_68 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_68 --operation mode is normal L2_data_out_68_lut_out = L2_data_out_67; L2_data_out_68 = DFFEAS(L2_data_out_68_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_forward_buffer_60 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_60 --operation mode is normal Y2_forward_buffer_60 = !L2_data_out_60; --Y2_nx151 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx151 --operation mode is normal Y2_nx151 = !Y2_current_state_2 & (Y2_current_state_0 # !N1_altered_frame1); --Y2_nx154 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx154 --operation mode is normal Y2_nx154 = N1_altered_frame1 & !Y2_current_state_2 & !Y2_current_state_0; --Y2_d_we is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_we --operation mode is normal Y2_d_we = !Y2_current_state_3 & Y2_current_state_1 & (Y2_current_state_0 # !Y2_current_state_2); --M2_request_data is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|request_data --operation mode is normal M2_request_data = !M2_current_state_2 & M2_current_state_1 & M2_current_state_0 & !M2_stuff_bit_inserted; --nx1576 is nx1576 --operation mode is normal nx1576 = nx1577 # !scsn_slave_nw_dll_ob1_bitcounter_5 & !scsn_slave_nw_dll_ob1_bitcounter_3 & nx1578; --scsn_slave_nw_dll_ob1_ob_crc_13 is scsn_slave_nw_dll_ob1_ob_crc_13 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_13_lut_out = scsn_slave_nw_dll_ob1_ob_crc_12; scsn_slave_nw_dll_ob1_ob_crc_13 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_13_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_66, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_cnt_rst_3 is general_config_notri:nic_notri|dut_ir_cnt_rst_3 --operation mode is arithmetic G1_dut_ir_cnt_rst_3_carry_eqn = G1_dut_ir_cnt_rst_nx22; G1_dut_ir_cnt_rst_3_lut_out = G1_dut_ir_cnt_rst_3 $ (G1_dut_ir_cnt_rst_3_carry_eqn); G1_dut_ir_cnt_rst_3 = DFFEAS(G1_dut_ir_cnt_rst_3_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx28 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx28 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx28 = CARRY(!G1_dut_ir_cnt_rst_nx22 # !G1_dut_ir_cnt_rst_3); --T1_NOT_c_cnt_4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_c_cnt_4 --operation mode is normal T1_NOT_c_cnt_4_lut_out = T1_c_ini_4 & !T1_nx472 & (T1_nx1153) # !T1_c_ini_4 & (T1_nx1152 # !T1_nx472 & T1_nx1153); T1_NOT_c_cnt_4 = DFFEAS(T1_NOT_c_cnt_4_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx552, , , , ); --T1_NOT_c_cnt_3 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_c_cnt_3 --operation mode is normal T1_NOT_c_cnt_3_lut_out = D1_cfr_1 & (T1_nx1152 # !T1_nx473 & T1_nx1153) # !D1_cfr_1 & !T1_nx473 & (T1_nx1153); T1_NOT_c_cnt_3 = DFFEAS(T1_NOT_c_cnt_3_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx552, , , , ); --T1_NOT_c_cnt_2 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_c_cnt_2 --operation mode is normal T1_NOT_c_cnt_2_lut_out = T1_nx9 & (T1_nx1152 # !T1_nx474 & T1_nx1153) # !T1_nx9 & !T1_nx474 & (T1_nx1153); T1_NOT_c_cnt_2 = DFFEAS(T1_NOT_c_cnt_2_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx552, , , , ); --T1_nx1136 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1136 --operation mode is normal T1_nx1136 = !T1_NOT_c_cnt_0 # !T1_NOT_c_cnt_1; --T1_NOT_c_cnt_0 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_c_cnt_0 --operation mode is normal T1_NOT_c_cnt_0_lut_out = !T1_nx476 & (T1_nx1138 # T1_nx1142 # T1_nx1143); T1_NOT_c_cnt_0 = DFFEAS(T1_NOT_c_cnt_0_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx552, , , , ); --T1_nx1140 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1140 --operation mode is normal T1_nx1140 = !T1_tms_sm_1 & T1_tms_sm_0; --T1_nx1145 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1145 --operation mode is normal T1_nx1145 = T1_c_mid_2 & (T1_NOT_c_cnt_2 # T1_c_mid_1 $ !T1_NOT_c_cnt_1) # !T1_c_mid_2 & (T1_c_mid_1 $ !T1_NOT_c_cnt_1 # !T1_NOT_c_cnt_2); --T1_nx1146 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1146 --operation mode is normal T1_nx1146 = T1_c_mid_3 & (T1_NOT_c_cnt_3 # T1_c_mid_4 $ !T1_NOT_c_cnt_4) # !T1_c_mid_3 & (T1_c_mid_4 $ !T1_NOT_c_cnt_4 # !T1_NOT_c_cnt_3); --T1_flag_start is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|flag_start --operation mode is normal T1_flag_start_lut_out = !D1_we_tms & T1_flag_wrote; T1_flag_start = DFFEAS(T1_flag_start_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T1_nx1148 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1148 --operation mode is normal T1_nx1148 = !T1_nx1135 & (T1_nx1136 # T1_nx1137 # !T1_NOT_c_cnt_2); --T1_nx1149 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1149 --operation mode is normal T1_nx1149 = T1_NOT_c_cnt_0 & T1_nx1140 & !T1_nx1145 & !T1_nx1146; --T1_nx1155 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1155 --operation mode is normal T1_nx1155 = !T1_b_cnt_0 & T1_tms_sm_1 & !T1_tms_sm_0; --T1_nx1156 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1156 --operation mode is normal T1_nx1156 = T1_b_cnt_4 # T1_b_cnt_3 # T1_b_cnt_2 # T1_b_cnt_1; --T1_NOT_modgen_eq_998_nx4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_modgen_eq_998_nx4 --operation mode is normal T1_NOT_modgen_eq_998_nx4 = T1_c_mid_2 $ T1_NOT_c_cnt_2; --T1_nx1139 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1139 --operation mode is normal T1_nx1139 = T1_NOT_c_cnt_0 & (T1_c_mid_1 $ T1_NOT_c_cnt_1); --D1_nx233 is jtag_master_1_notri:jtag_dut_notri|nx233 --operation mode is normal D1_nx233 = D1_state_jtag_3 & !T1_TMS & (D1_state_jtag_1 # D1_state_jtag_2) # !D1_state_jtag_3 & !D1_state_jtag_2 & (D1_state_jtag_1 $ !T1_TMS); --D1_nx231 is jtag_master_1_notri:jtag_dut_notri|nx231 --operation mode is normal D1_nx231 = D1_state_jtag_3 & (D1_state_jtag_2 $ !T1_TMS) # !D1_state_jtag_3 & !D1_state_jtag_1 & (D1_state_jtag_2 $ T1_TMS); --D1_nx232 is jtag_master_1_notri:jtag_dut_notri|nx232 --operation mode is normal D1_nx232 = D1_state_jtag_1 & (D1_state_jtag_2 # !T1_TMS) # !D1_state_jtag_1 & (D1_state_jtag_3 & T1_TMS); --D1_state_jtag_3 is jtag_master_1_notri:jtag_dut_notri|state_jtag_3 --operation mode is normal D1_state_jtag_3_lut_out = D1_state_jtag_2 & D1_nx228 # !D1_state_jtag_2 & (D1_nx229); D1_state_jtag_3 = DFFEAS(D1_state_jtag_3_lut_out, T1_TCK, J1_chipRST_n, , , , , , ); --D1_nx244 is jtag_master_1_notri:jtag_dut_notri|nx244 --operation mode is normal D1_nx244 = N1_request_48 & N1_request_47; --D1_nx245 is jtag_master_1_notri:jtag_dut_notri|nx245 --operation mode is normal D1_nx245 = C1_ce_dut_jtg & (!N1_request_43 & !N1_request_42 # !N1_request_41); --T1_tck_ena is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|tck_ena --operation mode is normal T1_tck_ena_lut_out = T1_NOT_modgen_eq_998_nx4 & T1_nx1139 & T1_nx1140 & !T1_nx1146; T1_tck_ena = DFFEAS(T1_tck_ena_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --D1_nx221 is jtag_master_1_notri:jtag_dut_notri|nx221 --operation mode is normal D1_nx221 = N1_request_48 & N1_request_47 & C1_ce_dut_jtg & !D1_nx540; --D1_nx230 is jtag_master_1_notri:jtag_dut_notri|nx230 --operation mode is normal D1_nx230 = D1_state_jtag_3 & (!D1_state_jtag_0 & T1_TMS # !D1_state_jtag_1) # !D1_state_jtag_3 & (!T1_TMS # !D1_state_jtag_0); --D1_nx243 is jtag_master_1_notri:jtag_dut_notri|nx243 --operation mode is normal D1_nx243 = D1_state_jtag_3 & (T1_TMS) # !D1_state_jtag_3 & D1_state_jtag_0; --D1_nx247 is jtag_master_1_notri:jtag_dut_notri|nx247 --operation mode is normal D1_nx247 = !D1_state_jtag_0 & D1_state_jtag_1; --D1_jtgsnd_ser_t_72 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_72 --operation mode is normal D1_jtgsnd_ser_t_72_lut_out = D1_jtgsnd_ser_t_71; D1_jtgsnd_ser_t_72 = DFFEAS(D1_jtgsnd_ser_t_72_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_18, , , D1_jtgsnd_we_g_2); --N1_request_3 is mcm_nw_nwl:scsn_slave_nw_nwl|request_3 --operation mode is normal N1_request_3 = N1_select_rq & (L2_data_out_3) # !N1_select_rq & L1_data_out_3; --D1_jtgsnd_we_g_1 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_we_g_1 --operation mode is normal D1_jtgsnd_we_g_1 = N1_request_48 & !N1_request_47 & !D1_nx540 & D1_nx253; --D1_jtgsnd_nx848 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_nx848 --operation mode is normal D1_jtgsnd_nx848 = D1_nx249 # !D1_nx540 & D1_nx250 & D1_nx253; --D1_nx242 is jtag_master_1_notri:jtag_dut_notri|nx242 --operation mode is normal D1_nx242 = D1_state_jtag_0 & D1_state_jtag_1 # !D1_state_jtag_0 & !D1_state_jtag_1 & D1_state_jtag_2; --T1_s_reg_3 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_3 --operation mode is normal T1_s_reg_3_lut_out = T1_s_reg_4; T1_s_reg_3 = DFFEAS(T1_s_reg_3_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_28, , , D1_we_tms); --T1_nx1151 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1151 --operation mode is normal T1_nx1151 = T1_b_cnt_4 # T1_b_cnt_3 # T1_b_cnt_0 # T1_nx1144; --T2_NOT_c_cnt_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_c_cnt_4 --operation mode is normal T2_NOT_c_cnt_4_lut_out = T2_c_ini_4 & !T2_nx472 & (T2_nx1153) # !T2_c_ini_4 & (T2_nx1152 # !T2_nx472 & T2_nx1153); T2_NOT_c_cnt_4 = DFFEAS(T2_NOT_c_cnt_4_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx552, , , , ); --T2_NOT_c_cnt_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_c_cnt_3 --operation mode is normal T2_NOT_c_cnt_3_lut_out = E1_cfr_1 & (T2_nx1152 # !T2_nx473 & T2_nx1153) # !E1_cfr_1 & !T2_nx473 & (T2_nx1153); T2_NOT_c_cnt_3 = DFFEAS(T2_NOT_c_cnt_3_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx552, , , , ); --T2_NOT_c_cnt_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_c_cnt_2 --operation mode is normal T2_NOT_c_cnt_2_lut_out = T2_nx9 & (T2_nx1152 # !T2_nx474 & T2_nx1153) # !T2_nx9 & !T2_nx474 & (T2_nx1153); T2_NOT_c_cnt_2 = DFFEAS(T2_NOT_c_cnt_2_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx552, , , , ); --T2_nx1136 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1136 --operation mode is normal T2_nx1136 = !T2_NOT_c_cnt_0 # !T2_NOT_c_cnt_1; --T2_NOT_c_cnt_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_c_cnt_0 --operation mode is normal T2_NOT_c_cnt_0_lut_out = !T2_nx476 & (T2_nx1138 # T2_nx1142 # T2_nx1143); T2_NOT_c_cnt_0 = DFFEAS(T2_NOT_c_cnt_0_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx552, , , , ); --T2_nx1140 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1140 --operation mode is normal T2_nx1140 = !T2_tms_sm_1 & T2_tms_sm_0; --T2_nx1145 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1145 --operation mode is normal T2_nx1145 = T2_c_mid_2 & (T2_NOT_c_cnt_2 # T2_c_mid_1 $ !T2_NOT_c_cnt_1) # !T2_c_mid_2 & (T2_c_mid_1 $ !T2_NOT_c_cnt_1 # !T2_NOT_c_cnt_2); --T2_nx1146 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1146 --operation mode is normal T2_nx1146 = T2_c_mid_3 & (T2_NOT_c_cnt_3 # T2_c_mid_4 $ !T2_NOT_c_cnt_4) # !T2_c_mid_3 & (T2_c_mid_4 $ !T2_NOT_c_cnt_4 # !T2_NOT_c_cnt_3); --T2_flag_start is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|flag_start --operation mode is normal T2_flag_start_lut_out = !E1_we_tms & T2_flag_wrote; T2_flag_start = DFFEAS(T2_flag_start_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T2_nx1148 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1148 --operation mode is normal T2_nx1148 = !T2_nx1135 & (T2_nx1136 # T2_nx1137 # !T2_NOT_c_cnt_2); --T2_nx1149 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1149 --operation mode is normal T2_nx1149 = T2_NOT_c_cnt_0 & T2_nx1140 & !T2_nx1145 & !T2_nx1146; --T2_nx1155 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1155 --operation mode is normal T2_nx1155 = !T2_b_cnt_0 & T2_tms_sm_1 & !T2_tms_sm_0; --T2_nx1156 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1156 --operation mode is normal T2_nx1156 = T2_b_cnt_4 # T2_b_cnt_3 # T2_b_cnt_2 # T2_b_cnt_1; --T2_NOT_modgen_eq_998_nx4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_modgen_eq_998_nx4 --operation mode is normal T2_NOT_modgen_eq_998_nx4 = T2_c_mid_2 $ T2_NOT_c_cnt_2; --T2_nx1139 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1139 --operation mode is normal T2_nx1139 = T2_NOT_c_cnt_0 & (T2_c_mid_1 $ T2_NOT_c_cnt_1); --T3_NOT_c_cnt_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_c_cnt_4 --operation mode is normal T3_NOT_c_cnt_4_lut_out = T3_c_ini_4 & !T3_nx472 & (T3_nx1153) # !T3_c_ini_4 & (T3_nx1152 # !T3_nx472 & T3_nx1153); T3_NOT_c_cnt_4 = DFFEAS(T3_NOT_c_cnt_4_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx552, , , , ); --T3_NOT_c_cnt_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_c_cnt_3 --operation mode is normal T3_NOT_c_cnt_3_lut_out = E2_cfr_1 & (T3_nx1152 # !T3_nx473 & T3_nx1153) # !E2_cfr_1 & !T3_nx473 & (T3_nx1153); T3_NOT_c_cnt_3 = DFFEAS(T3_NOT_c_cnt_3_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx552, , , , ); --T3_NOT_c_cnt_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_c_cnt_2 --operation mode is normal T3_NOT_c_cnt_2_lut_out = T3_nx9 & (T3_nx1152 # !T3_nx474 & T3_nx1153) # !T3_nx9 & !T3_nx474 & (T3_nx1153); T3_NOT_c_cnt_2 = DFFEAS(T3_NOT_c_cnt_2_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx552, , , , ); --T3_nx1136 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1136 --operation mode is normal T3_nx1136 = !T3_NOT_c_cnt_0 # !T3_NOT_c_cnt_1; --T3_NOT_c_cnt_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_c_cnt_0 --operation mode is normal T3_NOT_c_cnt_0_lut_out = !T3_nx476 & (T3_nx1138 # T3_nx1142 # T3_nx1143); T3_NOT_c_cnt_0 = DFFEAS(T3_NOT_c_cnt_0_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx552, , , , ); --T3_nx1140 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1140 --operation mode is normal T3_nx1140 = !T3_tms_sm_1 & T3_tms_sm_0; --T3_nx1145 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1145 --operation mode is normal T3_nx1145 = T3_c_mid_2 & (T3_NOT_c_cnt_2 # T3_c_mid_1 $ !T3_NOT_c_cnt_1) # !T3_c_mid_2 & (T3_c_mid_1 $ !T3_NOT_c_cnt_1 # !T3_NOT_c_cnt_2); --T3_nx1146 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1146 --operation mode is normal T3_nx1146 = T3_c_mid_3 & (T3_NOT_c_cnt_3 # T3_c_mid_4 $ !T3_NOT_c_cnt_4) # !T3_c_mid_3 & (T3_c_mid_4 $ !T3_NOT_c_cnt_4 # !T3_NOT_c_cnt_3); --T3_flag_start is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|flag_start --operation mode is normal T3_flag_start_lut_out = !E2_we_tms & T3_flag_wrote; T3_flag_start = DFFEAS(T3_flag_start_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T3_nx1148 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1148 --operation mode is normal T3_nx1148 = !T3_nx1135 & (T3_nx1136 # T3_nx1137 # !T3_NOT_c_cnt_2); --T3_nx1149 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1149 --operation mode is normal T3_nx1149 = T3_NOT_c_cnt_0 & T3_nx1140 & !T3_nx1145 & !T3_nx1146; --T3_nx1155 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1155 --operation mode is normal T3_nx1155 = !T3_b_cnt_0 & T3_tms_sm_1 & !T3_tms_sm_0; --T3_nx1156 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1156 --operation mode is normal T3_nx1156 = T3_b_cnt_4 # T3_b_cnt_3 # T3_b_cnt_2 # T3_b_cnt_1; --T3_NOT_modgen_eq_998_nx4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_modgen_eq_998_nx4 --operation mode is normal T3_NOT_modgen_eq_998_nx4 = T3_c_mid_2 $ T3_NOT_c_cnt_2; --T3_nx1139 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1139 --operation mode is normal T3_nx1139 = T3_NOT_c_cnt_0 & (T3_c_mid_1 $ T3_NOT_c_cnt_1); --E1_nx231 is jtag_master_2_notri:jtag_ni_dn_notri|nx231 --operation mode is normal E1_nx231 = E1_state_jtag_3 & !T2_TMS & (E1_state_jtag_1 # E1_state_jtag_2) # !E1_state_jtag_3 & !E1_state_jtag_2 & (E1_state_jtag_1 $ !T2_TMS); --E1_nx229 is jtag_master_2_notri:jtag_ni_dn_notri|nx229 --operation mode is normal E1_nx229 = E1_state_jtag_3 & (E1_state_jtag_2 $ !T2_TMS) # !E1_state_jtag_3 & !E1_state_jtag_1 & (E1_state_jtag_2 $ T2_TMS); --E1_nx230 is jtag_master_2_notri:jtag_ni_dn_notri|nx230 --operation mode is normal E1_nx230 = E1_state_jtag_1 & (E1_state_jtag_2 # !T2_TMS) # !E1_state_jtag_1 & (E1_state_jtag_3 & T2_TMS); --E1_state_jtag_3 is jtag_master_2_notri:jtag_ni_dn_notri|state_jtag_3 --operation mode is normal E1_state_jtag_3_lut_out = E1_state_jtag_2 & E1_nx226 # !E1_state_jtag_2 & (E1_nx227); E1_state_jtag_3 = DFFEAS(E1_state_jtag_3_lut_out, T2_TCK, J1_chipRST_n, , , , , , ); --E1_jtgsnd_ser_i_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_i_1 --operation mode is normal E1_jtgsnd_ser_i_1_lut_out = E1_jtgsnd_ser_i_0; E1_jtgsnd_ser_i_1 = DFFEAS(E1_jtgsnd_ser_i_1_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx966, N1_request_30, , , E1_jtgsnd_we_g_3); --E1_nx540 is jtag_master_2_notri:jtag_ni_dn_notri|nx540 --operation mode is normal E1_nx540 = N1_request_41 & (N1_request_43 # N1_request_42); --E1_nx249 is jtag_master_2_notri:jtag_ni_dn_notri|nx249 --operation mode is normal E1_nx249 = C1_ce_ni_jtg_dn & !J1_rd_wr_oase; --T2_tck_ena is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|tck_ena --operation mode is normal T2_tck_ena_lut_out = T2_NOT_modgen_eq_998_nx4 & T2_nx1139 & T2_nx1140 & !T2_nx1146; T2_tck_ena = DFFEAS(T2_tck_ena_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --E1_nx220 is jtag_master_2_notri:jtag_ni_dn_notri|nx220 --operation mode is normal E1_nx220 = N1_request_48 & N1_request_47 & C1_ce_ni_jtg_dn & !J1_rd_wr_oase; --E1_nx228 is jtag_master_2_notri:jtag_ni_dn_notri|nx228 --operation mode is normal E1_nx228 = E1_state_jtag_3 & (!E1_state_jtag_0 & T2_TMS # !E1_state_jtag_1) # !E1_state_jtag_3 & (!T2_TMS # !E1_state_jtag_0); --E1_nx239 is jtag_master_2_notri:jtag_ni_dn_notri|nx239 --operation mode is normal E1_nx239 = E1_state_jtag_3 & (T2_TMS) # !E1_state_jtag_3 & E1_state_jtag_0; --E1_nx242 is jtag_master_2_notri:jtag_ni_dn_notri|nx242 --operation mode is normal E1_nx242 = !E1_state_jtag_0 & E1_state_jtag_1; --E1_jtgsnd_ser_t_72 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_72 --operation mode is normal E1_jtgsnd_ser_t_72_lut_out = E1_jtgsnd_ser_t_71; E1_jtgsnd_ser_t_72 = DFFEAS(E1_jtgsnd_ser_t_72_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_18, , , E1_jtgsnd_we_g_2); --E1_jtgsnd_we_g_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_we_g_1 --operation mode is normal E1_jtgsnd_we_g_1 = N1_request_48 & !N1_request_47 & !E1_nx540 & E1_nx249; --E1_jtgsnd_nx868 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_nx868 --operation mode is normal E1_jtgsnd_nx868 = E1_nx245 # !E1_nx540 & E1_nx246 & E1_nx249; --E1_nx238 is jtag_master_2_notri:jtag_ni_dn_notri|nx238 --operation mode is normal E1_nx238 = E1_state_jtag_0 & E1_state_jtag_1 # !E1_state_jtag_0 & !E1_state_jtag_1 & E1_state_jtag_2; --E2_nx231 is jtag_master_2_notri:jtag_ni_up_notri|nx231 --operation mode is normal E2_nx231 = E2_state_jtag_3 & !T3_TMS & (E2_state_jtag_1 # E2_state_jtag_2) # !E2_state_jtag_3 & !E2_state_jtag_2 & (E2_state_jtag_1 $ !T3_TMS); --E2_nx229 is jtag_master_2_notri:jtag_ni_up_notri|nx229 --operation mode is normal E2_nx229 = E2_state_jtag_3 & (E2_state_jtag_2 $ !T3_TMS) # !E2_state_jtag_3 & !E2_state_jtag_1 & (E2_state_jtag_2 $ T3_TMS); --E2_nx230 is jtag_master_2_notri:jtag_ni_up_notri|nx230 --operation mode is normal E2_nx230 = E2_state_jtag_1 & (E2_state_jtag_2 # !T3_TMS) # !E2_state_jtag_1 & (E2_state_jtag_3 & T3_TMS); --E2_state_jtag_3 is jtag_master_2_notri:jtag_ni_up_notri|state_jtag_3 --operation mode is normal E2_state_jtag_3_lut_out = E2_state_jtag_2 & E2_nx226 # !E2_state_jtag_2 & (E2_nx227); E2_state_jtag_3 = DFFEAS(E2_state_jtag_3_lut_out, T3_TCK, J1_chipRST_n, , , , , , ); --E2_jtgsnd_ser_i_1 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_i_1 --operation mode is normal E2_jtgsnd_ser_i_1_lut_out = E2_jtgsnd_ser_i_0; E2_jtgsnd_ser_i_1 = DFFEAS(E2_jtgsnd_ser_i_1_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx966, N1_request_30, , , E2_jtgsnd_we_g_3); --E2_nx540 is jtag_master_2_notri:jtag_ni_up_notri|nx540 --operation mode is normal E2_nx540 = N1_request_41 & (N1_request_43 # N1_request_42); --E2_nx249 is jtag_master_2_notri:jtag_ni_up_notri|nx249 --operation mode is normal E2_nx249 = C1_ce_ni_jtg_up & !J1_rd_wr_oase; --T3_tck_ena is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|tck_ena --operation mode is normal T3_tck_ena_lut_out = T3_NOT_modgen_eq_998_nx4 & T3_nx1139 & T3_nx1140 & !T3_nx1146; T3_tck_ena = DFFEAS(T3_tck_ena_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --E2_nx220 is jtag_master_2_notri:jtag_ni_up_notri|nx220 --operation mode is normal E2_nx220 = N1_request_48 & N1_request_47 & C1_ce_ni_jtg_up & !J1_rd_wr_oase; --E2_nx228 is jtag_master_2_notri:jtag_ni_up_notri|nx228 --operation mode is normal E2_nx228 = E2_state_jtag_3 & (!E2_state_jtag_0 & T3_TMS # !E2_state_jtag_1) # !E2_state_jtag_3 & (!T3_TMS # !E2_state_jtag_0); --E2_nx239 is jtag_master_2_notri:jtag_ni_up_notri|nx239 --operation mode is normal E2_nx239 = E2_state_jtag_3 & (T3_TMS) # !E2_state_jtag_3 & E2_state_jtag_0; --E2_nx242 is jtag_master_2_notri:jtag_ni_up_notri|nx242 --operation mode is normal E2_nx242 = !E2_state_jtag_0 & E2_state_jtag_1; --E2_jtgsnd_ser_t_72 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_72 --operation mode is normal E2_jtgsnd_ser_t_72_lut_out = E2_jtgsnd_ser_t_71; E2_jtgsnd_ser_t_72 = DFFEAS(E2_jtgsnd_ser_t_72_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_18, , , E2_jtgsnd_we_g_2); --E2_jtgsnd_we_g_1 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_we_g_1 --operation mode is normal E2_jtgsnd_we_g_1 = N1_request_48 & !N1_request_47 & !E2_nx540 & E2_nx249; --E2_jtgsnd_nx868 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_nx868 --operation mode is normal E2_jtgsnd_nx868 = E2_nx245 # !E2_nx540 & E2_nx246 & E2_nx249; --E2_nx238 is jtag_master_2_notri:jtag_ni_up_notri|nx238 --operation mode is normal E2_nx238 = E2_state_jtag_0 & E2_state_jtag_1 # !E2_state_jtag_0 & !E2_state_jtag_1 & E2_state_jtag_2; --T2_s_reg_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_3 --operation mode is normal T2_s_reg_3_lut_out = T2_s_reg_4; T2_s_reg_3 = DFFEAS(T2_s_reg_3_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_28, , , E1_we_tms); --T2_nx1151 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1151 --operation mode is normal T2_nx1151 = T2_b_cnt_4 # T2_b_cnt_3 # T2_b_cnt_0 # T2_nx1144; --T3_s_reg_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_3 --operation mode is normal T3_s_reg_3_lut_out = T3_s_reg_4; T3_s_reg_3 = DFFEAS(T3_s_reg_3_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_28, , , E2_we_tms); --T3_nx1151 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1151 --operation mode is normal T3_nx1151 = T3_b_cnt_4 # T3_b_cnt_3 # T3_b_cnt_0 # T3_nx1144; --L1_data_out_15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_15 --operation mode is normal L1_data_out_15_lut_out = L1_data_out_14; L1_data_out_15 = DFFEAS(L1_data_out_15_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_15 --operation mode is normal L2_data_out_15_lut_out = L2_data_out_14; L2_data_out_15 = DFFEAS(L2_data_out_15_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Q1_ix6_ix12_nx4 is clkpre_counter:cp|pre_dec:pdec|ix6_ix12_nx4 --operation mode is normal Q1_ix6_ix12_nx4 = Q1_ptrf_1 # Q1_ptrf_0; --Q1_nx94 is clkpre_counter:cp|pre_dec:pdec|nx94 --operation mode is normal Q1_nx94 = !Q1_rec_sm_3 & !Q1_rec_sm_2 & !Q1_rec_sm_1 & Q1_modgen_eq_659_nx12; --Q1_nx95 is clkpre_counter:cp|pre_dec:pdec|nx95 --operation mode is normal Q1_nx95 = Q1_rec_sm_2 & (Q1_rec_sm_1 $ Q1_rec_sm_0) # !Q1_rec_sm_2 & !Q1_rec_sm_1 & !Q1_rec_sm_0; --Q1_nx113 is clkpre_counter:cp|pre_dec:pdec|nx113 --operation mode is normal Q1_nx113 = Q1_counter_2 & (Q1_counter_3) # !Q1_counter_2 & (Q1_counter_1 # Q1_counter_0 & !Q1_counter_3); --Q1_counter_inc_668_nx16 is clkpre_counter:cp|pre_dec:pdec|counter_inc_668_nx16 --operation mode is arithmetic Q1_counter_inc_668_nx16 = CARRY(Q1_counter_0); --Q1_modgen_eq_680_nx12 is clkpre_counter:cp|pre_dec:pdec|modgen_eq_680_nx12 --operation mode is normal Q1_modgen_eq_680_nx12 = Q1_counter_1 # Q1_counter_2 # !Q1_counter_3 # !Q1_counter_0; --Q1_modgen_eq_659_nx12 is clkpre_counter:cp|pre_dec:pdec|modgen_eq_659_nx12 --operation mode is normal Q1_modgen_eq_659_nx12 = Q1_counter_1 # !Q1_counter_2 # !Q1_counter_3 # !Q1_counter_0; --Q1_nx101 is clkpre_counter:cp|pre_dec:pdec|nx101 --operation mode is normal Q1_nx101 = !Q1_ptrf_1 & !Q1_ptrf_0 & !Q1_modgen_eq_680_nx12 & Q1_nx119; --Q1_nx107 is clkpre_counter:cp|pre_dec:pdec|nx107 --operation mode is normal Q1_nx107 = Q1_counter_3 # Q1_counter_0 & Q1_counter_1 & Q1_counter_2; --Q1_nx111 is clkpre_counter:cp|pre_dec:pdec|nx111 --operation mode is normal Q1_nx111 = !Q1_ptrf_1 & !Q1_ptrf_0 & Q1_modgen_eq_659_nx12; --Q1_nx118 is clkpre_counter:cp|pre_dec:pdec|nx118 --operation mode is normal Q1_nx118 = !Q1_rec_sm_3 & Q1_rec_sm_0; --Q1_nx106 is clkpre_counter:cp|pre_dec:pdec|nx106 --operation mode is normal Q1_nx106 = !Q1_counter_3 & (Q1_counter_0 & (!Q1_counter_2 # !Q1_counter_1) # !Q1_counter_0 & (Q1_counter_1 # Q1_counter_2)); --Q1_nx37 is clkpre_counter:cp|pre_dec:pdec|nx37 --operation mode is normal Q1_nx37 = Q1_counter_3 & (Q1_counter_1 # Q1_counter_2); --Q1_nx39 is clkpre_counter:cp|pre_dec:pdec|nx39 --operation mode is normal Q1_nx39 = !Q1_counter_3 & Q1_counter_2 & (!Q1_counter_1 # !Q1_counter_0); --scsn_slave_d0_err is scsn_slave_d0_err --operation mode is normal scsn_slave_d0_err = !L1_data_valid & L1_buffer_full; --Y1_nx147 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx147 --operation mode is normal Y1_nx147 = !Y1_current_state_3 & !Y1_current_state_2 & !Y1_current_state_1 & Y1_current_state_0; --Y1_nx180 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx180 --operation mode is normal Y1_nx180 = !L1_data_valid & !Y1_current_state_3 & !Y1_current_state_2 & Y1_current_state_1; --L1_data_valid is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_valid --operation mode is normal L1_data_valid = L1_buffer_full & L1_nx278 & L1_nx282 & L1_nx283; --L1_buffer_half is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|buffer_half --operation mode is normal L1_buffer_half = L1_bitcounter_6 & (L1_bitcounter_5 # L1_bitcounter_4 & L1_nx281); --Y1_nx146 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx146 --operation mode is normal Y1_nx146 = !Y1_current_state_3 & !Y1_current_state_1; --Y1_nx156 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx156 --operation mode is normal Y1_nx156 = !Y1_current_state_2 & (N1_reply0_valid # Y1_current_state_0); --Y1_nx153 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx153 --operation mode is normal Y1_nx153 = Y1_forward_buffer_60 # Y1_forward_buffer_59; --N1_reply0_valid is mcm_nw_nwl:scsn_slave_nw_nwl|reply0_valid --operation mode is normal N1_reply0_valid = J1_reply_valid & N1_current_state_0 & (N1_nx234 # N1_nx235); --Y1_nx124 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx124 --operation mode is normal Y1_nx124 = !L1_data_valid & L1_buffer_half; --Y1_forward_buffer_54 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_54 --operation mode is arithmetic Y1_forward_buffer_54_carry_eqn = Y1_result_inc_424_nx44; Y1_forward_buffer_54 = L1_data_out_54 $ (!Y1_forward_buffer_54_carry_eqn); --Y1_result_inc_424_nx48 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx48 --operation mode is arithmetic Y1_result_inc_424_nx48 = CARRY(L1_data_out_54 & (!Y1_result_inc_424_nx44)); --Y1_forward_buffer_53 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_53 --operation mode is normal Y1_forward_buffer_53_carry_eqn = Y1_result_inc_424_nx48; Y1_forward_buffer_53 = L1_data_out_53 $ (Y1_forward_buffer_53_carry_eqn); --Y1_nx178 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx178 --operation mode is normal Y1_nx178 = Y1_forward_buffer_58 # Y1_forward_buffer_57 # Y1_forward_buffer_56 # Y1_forward_buffer_55; --Y1_nx157 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx157 --operation mode is normal Y1_nx157 = !Y1_current_state_3 & (Y1_current_state_1 & Y1_current_state_0 # !Y1_current_state_1 & (!Y1_nx124)); --Y1_nx167 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx167 --operation mode is normal Y1_nx167 = !N1_wait_for_bridge & Y1_nx25 & Y1_nx146 & Y1_nx148; --Y1_nx169 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx169 --operation mode is normal Y1_nx169 = Y1_forward_buffer_58 # Y1_forward_buffer_57 # Y1_nx153 # Y1_nx174; --Y1_nx176 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx176 --operation mode is normal Y1_nx176 = Y1_nx177 # Y1_nx150 & (Y1_modgen_eq_337_nx0 # Y1_nx170); --Y1_nx175 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx175 --operation mode is normal Y1_nx175 = Y1_modgen_eq_336_nx24 & Y1_nx149 & (Y1_nx171 # Y1_nx172); --J1_NOT_ix34_ix32_nx8 is mcm_nw_apl:scsn_slave_nw_apl|NOT_ix34_ix32_nx8 --operation mode is normal J1_NOT_ix34_ix32_nx8 = J1_current_state_1 & J1_current_state_0; --J1_nx403 is mcm_nw_apl:scsn_slave_nw_apl|nx403 --operation mode is normal J1_nx403 = J1_nx424 & (J1_waitcount_5 # J1_waitcount_4 # J1_nx405); --W1_q_b[0] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[0] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[0]_PORT_A_data_in = F1_data_2p_0; W1_q_b[0]_PORT_A_data_in_reg = DFFE(W1_q_b[0]_PORT_A_data_in, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[0]_PORT_A_address_reg = DFFE(W1_q_b[0]_PORT_A_address, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[0]_PORT_B_address_reg = DFFE(W1_q_b[0]_PORT_B_address, W1_q_b[0]_clock_1, , , ); W1_q_b[0]_PORT_A_write_enable = VCC; W1_q_b[0]_PORT_A_write_enable_reg = DFFE(W1_q_b[0]_PORT_A_write_enable, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_B_read_enable = VCC; W1_q_b[0]_PORT_B_read_enable_reg = DFFE(W1_q_b[0]_PORT_B_read_enable, W1_q_b[0]_clock_1, , , ); W1_q_b[0]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[0]_clock_1 = X1__clk0; W1_q_b[0]_clock_enable_0 = F1_we_eff; W1_q_b[0]_clear_0 = !G1_NOT_ni_clear; W1_q_b[0]_PORT_B_data_out = MEMORY(W1_q_b[0]_PORT_A_data_in_reg, , W1_q_b[0]_PORT_A_address_reg, W1_q_b[0]_PORT_B_address_reg, W1_q_b[0]_PORT_A_write_enable_reg, W1_q_b[0]_PORT_B_read_enable_reg, , , W1_q_b[0]_clock_0, W1_q_b[0]_clock_1, W1_q_b[0]_clock_enable_0, , W1_q_b[0]_clear_0, ); W1_q_b[0]_PORT_B_data_out_reg = DFFE(W1_q_b[0]_PORT_B_data_out, W1_q_b[0]_clock_1, , , ); W1_q_b[0] = W1_q_b[0]_PORT_B_data_out_reg[0]; --W1_q_b[8] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[8] W1_q_b[0]_PORT_A_data_in = F1_data_2p_0; W1_q_b[0]_PORT_A_data_in_reg = DFFE(W1_q_b[0]_PORT_A_data_in, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[0]_PORT_A_address_reg = DFFE(W1_q_b[0]_PORT_A_address, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[0]_PORT_B_address_reg = DFFE(W1_q_b[0]_PORT_B_address, W1_q_b[0]_clock_1, , , ); W1_q_b[0]_PORT_A_write_enable = VCC; W1_q_b[0]_PORT_A_write_enable_reg = DFFE(W1_q_b[0]_PORT_A_write_enable, W1_q_b[0]_clock_0, W1_q_b[0]_clear_0, , W1_q_b[0]_clock_enable_0); W1_q_b[0]_PORT_B_read_enable = VCC; W1_q_b[0]_PORT_B_read_enable_reg = DFFE(W1_q_b[0]_PORT_B_read_enable, W1_q_b[0]_clock_1, , , ); W1_q_b[0]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[0]_clock_1 = X1__clk0; W1_q_b[0]_clock_enable_0 = F1_we_eff; W1_q_b[0]_clear_0 = !G1_NOT_ni_clear; W1_q_b[0]_PORT_B_data_out = MEMORY(W1_q_b[0]_PORT_A_data_in_reg, , W1_q_b[0]_PORT_A_address_reg, W1_q_b[0]_PORT_B_address_reg, W1_q_b[0]_PORT_A_write_enable_reg, W1_q_b[0]_PORT_B_read_enable_reg, , , W1_q_b[0]_clock_0, W1_q_b[0]_clock_1, W1_q_b[0]_clock_enable_0, , W1_q_b[0]_clear_0, ); W1_q_b[0]_PORT_B_data_out_reg = DFFE(W1_q_b[0]_PORT_B_data_out, W1_q_b[0]_clock_1, , , ); W1_q_b[8] = W1_q_b[0]_PORT_B_data_out_reg[1]; --G1_bus_dout_0 is general_config_notri:nic_notri|bus_dout_0 --operation mode is normal G1_bus_dout_0 = G1_nx505 # !N1_request_44 & G1_nx512 & G1_nx513; --C1_sel_5 is gio_devices:gio|sel_5 --operation mode is normal C1_sel_5_lut_out = !N1_request_35 & !N1_request_36 & N1_request_37 & C1_nx304; C1_sel_5 = DFFEAS(C1_sel_5_lut_out, X1__clk0, VCC, , , , , !J1_bus_req, ); --B1_bus_dout_0 is clkpre_counter:cp|bus_dout_0 --operation mode is normal B1_bus_dout_0 = B1_nx785 # B1_nx786 # B1_nx843 # B1_nx844; --E2_bus_dout_0 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_0 --operation mode is normal E2_bus_dout_0_lut_out = E2_nx223 # E2_nx224 # S3_dout_0 & !E2_nx540; E2_bus_dout_0 = DFFEAS(E2_bus_dout_0_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_0 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_0 --operation mode is normal E1_bus_dout_0_lut_out = E1_nx223 # E1_nx224 # S2_dout_0 & !E1_nx540; E1_bus_dout_0 = DFFEAS(E1_bus_dout_0_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_0 is jtag_master_1_notri:jtag_dut_notri|bus_dout_0 --operation mode is normal D1_bus_dout_0_lut_out = D1_nx225 # D1_nx226 # S1_dout_0 & !D1_nx540; D1_bus_dout_0 = DFFEAS(D1_bus_dout_0_lut_out, X1__clk0, VCC, , , , , , ); --R1_shiftd_0 is clkpre_counter:cp|pre_enc:pend|shiftd_0 --operation mode is normal R1_shiftd_0_lut_out = !R1_send_sm & R1_FUNC_s_2 & R1_FUNC_s_0; R1_shiftd_0 = DFFEAS(R1_shiftd_0_lut_out, X1__clk0, J1_chipRST_n, , R1_NOT_nx184, , , , ); --scsn_slave_nw_pl_SAMPLES0_1 is scsn_slave_nw_pl_SAMPLES0_1 --operation mode is normal scsn_slave_nw_pl_SAMPLES0_1_lut_out = scsn_slave_nw_pl_SAMPLES0_0; scsn_slave_nw_pl_SAMPLES0_1 = DFFEAS(scsn_slave_nw_pl_SAMPLES0_1_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_pl_SAMPLES0_0 is scsn_slave_nw_pl_SAMPLES0_0 --operation mode is normal scsn_slave_nw_pl_SAMPLES0_0_lut_out = PC_SER0_IN; scsn_slave_nw_pl_SAMPLES0_0 = DFFEAS(scsn_slave_nw_pl_SAMPLES0_0_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_pl_nx181 is scsn_slave_nw_pl_nx181 --operation mode is normal scsn_slave_nw_pl_nx181 = scsn_slave_nw_pl_SAMPLES0_1 $ !scsn_slave_nw_pl_SAMPLES0_0; --K1_nx142 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx142 --operation mode is normal K1_nx142 = !K1_sync_counter_0; --K1_NOT_nx210 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|NOT_nx210 --operation mode is normal K1_NOT_nx210 = K1_nx182 # K1_nx176 & (K1_sync_counter_0 # K1_nx167); --K1_b_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|b_1 --operation mode is normal K1_b_1_carry_eqn = K1_timer_in_state_inc_206_nx18; K1_b_1 = K1_timer_in_nx18 & (K1_timer_in_state_2 $ !K1_b_1_carry_eqn); --K1_nx159 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx159 --operation mode is normal K1_nx159 = !K1_current_state_3 & (K1_current_state_2 & (K1_current_state_0) # !K1_current_state_2 & K1_current_state_1); --K1_timer_in_nx116 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_nx116 --operation mode is normal K1_timer_in_nx116 = K1_current_state_1 & !K1_current_state_3 # !K1_current_state_1 & (K1_current_state_0 & !K1_current_state_3 # !K1_current_state_0 & (!K1_current_state_2)); --K1_nx185 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx185 --operation mode is normal K1_nx185 = K1_b_0 & (K1_nx177 # !K1_nx175 & K1_nx178) # !K1_b_0 & !K1_nx175 & (K1_nx178); --K1_nx199 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx199 --operation mode is normal K1_nx199 = !K1_timer_in_state_1 & (K1_timer_in_state_2 $ K1_timer_in_state_0); --K1_nx175 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx175 --operation mode is normal K1_nx175 = K1_current_state_3 # K1_current_state_2; --K1_nx183 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx183 --operation mode is normal K1_nx183 = !K1_current_state_3 & K1_b_1_dup_61 & (K1_current_state_0 # !K1_current_state_2); --K1_nx184 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx184 --operation mode is normal K1_nx184 = K1_nx180 # !K1_timer_in_state_2 & !K1_timer_in_state_1 & K1_nx171; --K1_nx164 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx164 --operation mode is normal K1_nx164 = K1_nx195 # !K1_current_state_0 & !K1_nx158 & K1_nx170; --K1_nx165 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx165 --operation mode is normal K1_nx165 = K1_nx170 & K1_nx172 & (K1_nx156 # K1_nx167); --K1_nx192 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx192 --operation mode is normal K1_nx192 = K1_current_state_0 & K1_nx157 & K1_nx167 # !K1_current_state_0 & (K1_nx168 # K1_nx157 & K1_nx167); --K1_nx193 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx193 --operation mode is normal K1_nx193 = K1_nx187 # K1_nx194 # K1_nx156 & K1_nx157; --L1_nx280 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx280 --operation mode is normal L1_nx280 = L1_bitcounter_3 # L1_bitcounter_2 & (L1_bitcounter_1 # L1_bitcounter_0); --K1_nx198 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx198 --operation mode is normal K1_nx198 = K1_destuff_in_counter_0 & (scsn_slave_data_in_0 $ !K1_data_out); --K1_nx140 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx140 --operation mode is normal K1_nx140_carry_eqn = K1_result_dec_242_nx18; K1_nx140 = K1_sync_counter_2 $ (K1_nx140_carry_eqn); --K1_nx141 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx141 --operation mode is arithmetic K1_nx141_carry_eqn = K1_result_dec_242_nx14; K1_nx141 = K1_sync_counter_1 $ (!K1_nx141_carry_eqn); --K1_result_dec_242_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|result_dec_242_nx18 --operation mode is arithmetic K1_result_dec_242_nx18 = CARRY(!K1_sync_counter_1 & (!K1_result_dec_242_nx14)); --K1_SCLEAR is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|SCLEAR --operation mode is normal K1_SCLEAR = K1_nx200 # scsn_slave_data_in_0 $ K1_data_out # !K1_buffer_flush_n; --K1_destuff_in_nx90 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|destuff_in_nx90 --operation mode is normal K1_destuff_in_nx90 = K1_current_state_2 & !K1_current_state_3 & !K1_current_state_1 & K1_current_state_0 # !K1_current_state_2 & !K1_current_state_0 & (!K1_current_state_1 # !K1_current_state_3); --scsn_slave_nw_pl_SAMPLES1_1 is scsn_slave_nw_pl_SAMPLES1_1 --operation mode is normal scsn_slave_nw_pl_SAMPLES1_1_lut_out = scsn_slave_nw_pl_SAMPLES1_0; scsn_slave_nw_pl_SAMPLES1_1 = DFFEAS(scsn_slave_nw_pl_SAMPLES1_1_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_pl_SAMPLES1_0 is scsn_slave_nw_pl_SAMPLES1_0 --operation mode is normal scsn_slave_nw_pl_SAMPLES1_0_lut_out = nx1583 # nx1584 # nx1585 # nx1587; scsn_slave_nw_pl_SAMPLES1_0 = DFFEAS(scsn_slave_nw_pl_SAMPLES1_0_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_pl_nx183 is scsn_slave_nw_pl_nx183 --operation mode is normal scsn_slave_nw_pl_nx183 = scsn_slave_nw_pl_SAMPLES1_1 $ !scsn_slave_nw_pl_SAMPLES1_0; --K2_nx142 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx142 --operation mode is normal K2_nx142 = !K2_sync_counter_0; --K2_NOT_nx210 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|NOT_nx210 --operation mode is normal K2_NOT_nx210 = K2_nx182 # K2_nx176 & (K2_sync_counter_0 # K2_nx167); --K2_b_1 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|b_1 --operation mode is normal K2_b_1_carry_eqn = K2_timer_in_state_inc_206_nx18; K2_b_1 = K2_timer_in_nx18 & (K2_timer_in_state_2 $ !K2_b_1_carry_eqn); --K2_nx159 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx159 --operation mode is normal K2_nx159 = !K2_current_state_3 & (K2_current_state_2 & (K2_current_state_0) # !K2_current_state_2 & K2_current_state_1); --K2_timer_in_nx116 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_nx116 --operation mode is normal K2_timer_in_nx116 = K2_current_state_1 & !K2_current_state_3 # !K2_current_state_1 & (K2_current_state_0 & !K2_current_state_3 # !K2_current_state_0 & (!K2_current_state_2)); --K2_nx185 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx185 --operation mode is normal K2_nx185 = K2_b_0 & (K2_nx177 # !K2_nx175 & K2_nx178) # !K2_b_0 & !K2_nx175 & (K2_nx178); --K2_nx199 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx199 --operation mode is normal K2_nx199 = !K2_timer_in_state_1 & (K2_timer_in_state_2 $ K2_timer_in_state_0); --K2_nx175 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx175 --operation mode is normal K2_nx175 = K2_current_state_3 # K2_current_state_2; --K2_nx183 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx183 --operation mode is normal K2_nx183 = !K2_current_state_3 & K2_b_1_dup_61 & (K2_current_state_0 # !K2_current_state_2); --K2_nx184 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx184 --operation mode is normal K2_nx184 = K2_nx180 # !K2_timer_in_state_2 & !K2_timer_in_state_1 & K2_nx171; --K2_nx164 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx164 --operation mode is normal K2_nx164 = K2_nx195 # !K2_current_state_0 & !K2_nx158 & K2_nx170; --K2_nx165 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx165 --operation mode is normal K2_nx165 = K2_nx170 & K2_nx172 & (K2_nx156 # K2_nx167); --K2_nx192 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx192 --operation mode is normal K2_nx192 = K2_current_state_0 & K2_nx157 & K2_nx167 # !K2_current_state_0 & (K2_nx168 # K2_nx157 & K2_nx167); --K2_nx193 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx193 --operation mode is normal K2_nx193 = K2_nx187 # K2_nx194 # K2_nx156 & K2_nx157; --L2_nx280 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx280 --operation mode is normal L2_nx280 = L2_bitcounter_3 # L2_bitcounter_2 & (L2_bitcounter_1 # L2_bitcounter_0); --K2_nx198 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx198 --operation mode is normal K2_nx198 = K2_destuff_in_counter_0 & (scsn_slave_data_in_1 $ !K2_data_out); --K2_nx140 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx140 --operation mode is normal K2_nx140_carry_eqn = K2_result_dec_242_nx18; K2_nx140 = K2_sync_counter_2 $ (K2_nx140_carry_eqn); --K2_nx141 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx141 --operation mode is arithmetic K2_nx141_carry_eqn = K2_result_dec_242_nx14; K2_nx141 = K2_sync_counter_1 $ (!K2_nx141_carry_eqn); --K2_result_dec_242_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|result_dec_242_nx18 --operation mode is arithmetic K2_result_dec_242_nx18 = CARRY(!K2_sync_counter_1 & (!K2_result_dec_242_nx14)); --K2_SCLEAR is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|SCLEAR --operation mode is normal K2_SCLEAR = K2_nx200 # scsn_slave_data_in_1 $ K2_data_out # !K2_buffer_flush_n; --K2_destuff_in_nx90 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|destuff_in_nx90 --operation mode is normal K2_destuff_in_nx90 = K2_current_state_2 & !K2_current_state_3 & !K2_current_state_1 & K2_current_state_0 # !K2_current_state_2 & !K2_current_state_0 & (!K2_current_state_1 # !K2_current_state_3); --L2_nx278 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx278 --operation mode is normal L2_nx278 = !L2_b_crc_11 & !L2_b_crc_10 & !L2_b_crc_9 & !L2_b_crc_8; --L2_nx282 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx282 --operation mode is normal L2_nx282 = !L2_b_crc_15 & !L2_b_crc_14 & !L2_b_crc_13 & !L2_b_crc_12; --L2_nx283 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx283 --operation mode is normal L2_nx283 = !L2_b_crc_1 & !L2_b_crc_0 & L2_nx279 & L2_nx284; --L2_nx281 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx281 --operation mode is normal L2_nx281 = L2_bitcounter_3 # L2_bitcounter_1 # L2_bitcounter_0 # L2_bitcounter_2; --Y2_forward_buffer_59 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_59 --operation mode is arithmetic Y2_forward_buffer_59_carry_eqn = Y2_result_inc_424_nx24; Y2_forward_buffer_59 = L2_data_out_59 $ (Y2_forward_buffer_59_carry_eqn); --Y2_result_inc_424_nx28 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx28 --operation mode is arithmetic Y2_result_inc_424_nx28 = CARRY(!Y2_result_inc_424_nx24 # !L2_data_out_59); --J1_reply_valid is mcm_nw_apl:scsn_slave_nw_apl|reply_valid --operation mode is normal J1_reply_valid = !J1_current_state_0 & (J1_current_state_3 $ (J1_current_state_2 # J1_current_state_1)); --N1_nx221 is mcm_nw_nwl:scsn_slave_nw_nwl|nx221 --operation mode is normal N1_nx221 = N1_current_state_2 & (N1_current_state_1 & (N1_nx818) # !N1_current_state_1 & !J1_bridge_alter) # !N1_current_state_2 & !J1_bridge_alter & N1_current_state_1; --L2_data_out_54 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_54 --operation mode is normal L2_data_out_54_lut_out = L2_data_out_53; L2_data_out_54 = DFFEAS(L2_data_out_54_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_forward_buffer_55 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_55 --operation mode is arithmetic Y2_forward_buffer_55_carry_eqn = Y2_result_inc_424_nx40; Y2_forward_buffer_55 = L2_data_out_55 $ (Y2_forward_buffer_55_carry_eqn); --Y2_result_inc_424_nx44 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx44 --operation mode is arithmetic Y2_result_inc_424_nx44 = CARRY(!Y2_result_inc_424_nx40 # !L2_data_out_55); --L2_data_out_53 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_53 --operation mode is normal L2_data_out_53_lut_out = L2_data_out_52; L2_data_out_53 = DFFEAS(L2_data_out_53_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_forward_buffer_58 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_58 --operation mode is arithmetic Y2_forward_buffer_58_carry_eqn = Y2_result_inc_424_nx28; Y2_forward_buffer_58 = L2_data_out_58 $ (!Y2_forward_buffer_58_carry_eqn); --Y2_result_inc_424_nx32 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx32 --operation mode is arithmetic Y2_result_inc_424_nx32 = CARRY(L2_data_out_58 & (!Y2_result_inc_424_nx28)); --Y2_forward_buffer_57 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_57 --operation mode is arithmetic Y2_forward_buffer_57_carry_eqn = Y2_result_inc_424_nx32; Y2_forward_buffer_57 = L2_data_out_57 $ (Y2_forward_buffer_57_carry_eqn); --Y2_result_inc_424_nx36 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx36 --operation mode is arithmetic Y2_result_inc_424_nx36 = CARRY(!Y2_result_inc_424_nx32 # !L2_data_out_57); --Y2_forward_buffer_56 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|forward_buffer_56 --operation mode is arithmetic Y2_forward_buffer_56_carry_eqn = Y2_result_inc_424_nx36; Y2_forward_buffer_56 = L2_data_out_56 $ (!Y2_forward_buffer_56_carry_eqn); --Y2_result_inc_424_nx40 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx40 --operation mode is arithmetic Y2_result_inc_424_nx40 = CARRY(L2_data_out_56 & (!Y2_result_inc_424_nx36)); --Y2_nx25 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx25 --operation mode is normal Y2_nx25 = Y2_b_dirty & (L2_data_valid # scsn_slave_d1_err); --Y2_nx148 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx148 --operation mode is normal Y2_nx148 = !Y2_current_state_2 & !Y2_current_state_0; --Y2_nx174 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx174 --operation mode is normal Y2_nx174 = Y2_forward_buffer_56 # Y2_forward_buffer_55 # Y2_forward_buffer_54 # Y2_forward_buffer_53; --Y2_modgen_eq_337_nx0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|modgen_eq_337_nx0 --operation mode is normal Y2_modgen_eq_337_nx0 = L2_data_out_62 $ Y2_forward_buffer_54; --Y2_nx150 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx150 --operation mode is normal Y2_nx150 = !scsn_slave_d1_err & Y2_modgen_eq_336_nx24 & Y2_nx147; --Y2_nx170 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx170 --operation mode is normal Y2_nx170 = L2_data_out_66 & (L2_data_out_65 $ Y2_forward_buffer_57 # !Y2_forward_buffer_58) # !L2_data_out_66 & (Y2_forward_buffer_58 # L2_data_out_65 $ Y2_forward_buffer_57); --Y2_nx177 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx177 --operation mode is normal Y2_nx177 = !L2_data_out_61 & !scsn_slave_d1_err & Y2_nx147; --Y2_modgen_eq_336_nx24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|modgen_eq_336_nx24 --operation mode is normal Y2_modgen_eq_336_nx24 = Y2_nx158 # !L2_data_out_66 # !L2_data_out_67 # !L2_data_out_68; --Y2_nx149 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx149 --operation mode is normal Y2_nx149 = !scsn_slave_d1_err & Y2_nx147; --Y2_nx171 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx171 --operation mode is normal Y2_nx171 = L2_data_out_64 & (L2_data_out_63 $ Y2_forward_buffer_55 # !Y2_forward_buffer_56) # !L2_data_out_64 & (Y2_forward_buffer_56 # L2_data_out_63 $ Y2_forward_buffer_55); --Y2_nx172 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx172 --operation mode is normal Y2_nx172 = L2_data_out_68 & (L2_data_out_67 $ Y2_forward_buffer_59 # !Y2_forward_buffer_60) # !L2_data_out_68 & (Y2_forward_buffer_60 # L2_data_out_67 $ Y2_forward_buffer_59); --C1_ix0_nx20 is gio_devices:gio|ix0_nx20 --operation mode is normal C1_ix0_nx20_lut_out = J1_bus_req; C1_ix0_nx20 = DFFEAS(C1_ix0_nx20_lut_out, X1__clk0, VCC, , , , , , ); --G1_ni_ir_cnt_rst_0 is general_config_notri:nic_notri|ni_ir_cnt_rst_0 --operation mode is arithmetic G1_ni_ir_cnt_rst_0_lut_out = G1_ni_ir_cnt_rst_0 $ G1_ni_ir_modgen_eq_826_nx32; G1_ni_ir_cnt_rst_0 = DFFEAS(G1_ni_ir_cnt_rst_0_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_ni_ir_cnt_rst_nx10 is general_config_notri:nic_notri|ni_ir_cnt_rst_nx10 --operation mode is arithmetic G1_ni_ir_cnt_rst_nx10 = CARRY(G1_ni_ir_cnt_rst_0 & G1_ni_ir_modgen_eq_826_nx32); --M1_sleeptimer_nx21 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_nx21 --operation mode is normal M1_sleeptimer_nx21 = M1_nx223 # !M1_sleeptimer_state_1 # !M1_sleeptimer_state_0; --M1_sleeptimer_state_inc_289_nx20 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_inc_289_nx20 --operation mode is arithmetic M1_sleeptimer_state_inc_289_nx20 = CARRY(M1_sleeptimer_state_0); --M1_b_0_dup_129 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_129 --operation mode is arithmetic M1_b_0_dup_129_carry_eqn = M1_sleeptimer_state_inc_289_nx24; M1_b_0_dup_129 = M1_sleeptimer_nx21 & (M1_sleeptimer_state_2 $ !M1_b_0_dup_129_carry_eqn); --M1_sleeptimer_state_inc_289_nx28 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_inc_289_nx28 --operation mode is arithmetic M1_sleeptimer_state_inc_289_nx28 = CARRY(M1_sleeptimer_state_2 & (!M1_sleeptimer_state_inc_289_nx24)); --M1_b_0_dup_122 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_122 --operation mode is arithmetic M1_b_0_dup_122_carry_eqn = M1_sleeptimer_state_inc_289_nx28; M1_b_0_dup_122 = M1_sleeptimer_nx21 & (M1_sleeptimer_state_3 $ M1_b_0_dup_122_carry_eqn); --M1_sleeptimer_state_inc_289_nx32 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_inc_289_nx32 --operation mode is arithmetic M1_sleeptimer_state_inc_289_nx32 = CARRY(!M1_sleeptimer_state_inc_289_nx28 # !M1_sleeptimer_state_3); --M1_b_0_dup_115 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_115 --operation mode is arithmetic M1_b_0_dup_115_carry_eqn = M1_sleeptimer_state_inc_289_nx32; M1_b_0_dup_115 = M1_sleeptimer_nx21 & (M1_sleeptimer_state_4 $ !M1_b_0_dup_115_carry_eqn); --M1_sleeptimer_state_inc_289_nx36 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|sleeptimer_state_inc_289_nx36 --operation mode is arithmetic M1_sleeptimer_state_inc_289_nx36 = CARRY(M1_sleeptimer_state_4 & (!M1_sleeptimer_state_inc_289_nx32)); --M1_b_0_dup_108 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|b_0_dup_108 --operation mode is normal M1_b_0_dup_108_carry_eqn = M1_sleeptimer_state_inc_289_nx36; M1_b_0_dup_108 = M1_sleeptimer_nx21 & (M1_sleeptimer_state_5 $ M1_b_0_dup_108_carry_eqn); --scsn_slave_nw_dll_ob0_ob_data_65 is scsn_slave_nw_dll_ob0_ob_data_65 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_65_lut_out = scsn_slave_nw_dll_ob0_ob_data_64; scsn_slave_nw_dll_ob0_ob_data_65 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_65_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_65, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_66 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_66 --operation mode is normal Y1_d_to_dll_66 = L1_data_out_66 & (Y1_nx151 # Y1_forward_buffer_58 & Y1_nx154) # !L1_data_out_66 & Y1_forward_buffer_58 & (Y1_nx154); --L1_data_out_67 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_67 --operation mode is normal L1_data_out_67_lut_out = L1_data_out_66; L1_data_out_67 = DFFEAS(L1_data_out_67_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_forward_buffer_59 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_59 --operation mode is arithmetic Y1_forward_buffer_59_carry_eqn = Y1_result_inc_424_nx24; Y1_forward_buffer_59 = L1_data_out_59 $ (Y1_forward_buffer_59_carry_eqn); --Y1_result_inc_424_nx28 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx28 --operation mode is arithmetic Y1_result_inc_424_nx28 = CARRY(!Y1_result_inc_424_nx24 # !L1_data_out_59); --L1_data_out_60 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_60 --operation mode is normal L1_data_out_60_lut_out = L1_data_out_59; L1_data_out_60 = DFFEAS(L1_data_out_60_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --N1_altered_frame0 is mcm_nw_nwl:scsn_slave_nw_nwl|altered_frame0 --operation mode is normal N1_altered_frame0 = J1_altered_frame & N1_current_state_0 & (!N1_current_state_1 # !N1_current_state_2); --M1_stuff_bit_inserted is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st0|stuff_bit_inserted --operation mode is normal M1_stuff_bit_inserted_lut_out = !M1_nx226 & (M1_current_state_1 # M1_current_state_2 & M1_current_state_0); M1_stuff_bit_inserted = DFFEAS(M1_stuff_bit_inserted_lut_out, X1__clk0, VCC, , M1_stuffing_strobe_in, , , , ); --nx1574 is nx1574 --operation mode is normal nx1574 = !scsn_slave_nw_dll_ob0_bitcounter_5 & !scsn_slave_nw_dll_ob0_bitcounter_4 # !scsn_slave_nw_dll_ob0_bitcounter_6; --nx1575 is nx1575 --operation mode is normal nx1575 = !scsn_slave_nw_dll_ob0_bitcounter_1 & !scsn_slave_nw_dll_ob0_bitcounter_0 # !scsn_slave_nw_dll_ob0_bitcounter_2; --scsn_slave_nw_dll_ob0_ob_crc_12 is scsn_slave_nw_dll_ob0_ob_crc_12 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_12_lut_out = scsn_slave_nw_dll_ob0_ob_crc_11; scsn_slave_nw_dll_ob0_ob_crc_12 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_12_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_65, , , scsn_slave_nw_dll_ob0_a_2); --M2_sleeptimer_nx21 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_nx21 --operation mode is normal M2_sleeptimer_nx21 = M2_nx223 # !M2_sleeptimer_state_1 # !M2_sleeptimer_state_0; --M2_sleeptimer_state_inc_289_nx20 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_inc_289_nx20 --operation mode is arithmetic M2_sleeptimer_state_inc_289_nx20 = CARRY(M2_sleeptimer_state_0); --M2_b_0_dup_129 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_129 --operation mode is arithmetic M2_b_0_dup_129_carry_eqn = M2_sleeptimer_state_inc_289_nx24; M2_b_0_dup_129 = M2_sleeptimer_nx21 & (M2_sleeptimer_state_2 $ !M2_b_0_dup_129_carry_eqn); --M2_sleeptimer_state_inc_289_nx28 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_inc_289_nx28 --operation mode is arithmetic M2_sleeptimer_state_inc_289_nx28 = CARRY(M2_sleeptimer_state_2 & (!M2_sleeptimer_state_inc_289_nx24)); --M2_b_0_dup_122 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_122 --operation mode is arithmetic M2_b_0_dup_122_carry_eqn = M2_sleeptimer_state_inc_289_nx28; M2_b_0_dup_122 = M2_sleeptimer_nx21 & (M2_sleeptimer_state_3 $ M2_b_0_dup_122_carry_eqn); --M2_sleeptimer_state_inc_289_nx32 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_inc_289_nx32 --operation mode is arithmetic M2_sleeptimer_state_inc_289_nx32 = CARRY(!M2_sleeptimer_state_inc_289_nx28 # !M2_sleeptimer_state_3); --M2_b_0_dup_115 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_115 --operation mode is arithmetic M2_b_0_dup_115_carry_eqn = M2_sleeptimer_state_inc_289_nx32; M2_b_0_dup_115 = M2_sleeptimer_nx21 & (M2_sleeptimer_state_4 $ !M2_b_0_dup_115_carry_eqn); --M2_sleeptimer_state_inc_289_nx36 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|sleeptimer_state_inc_289_nx36 --operation mode is arithmetic M2_sleeptimer_state_inc_289_nx36 = CARRY(M2_sleeptimer_state_4 & (!M2_sleeptimer_state_inc_289_nx32)); --M2_b_0_dup_108 is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|b_0_dup_108 --operation mode is normal M2_b_0_dup_108_carry_eqn = M2_sleeptimer_state_inc_289_nx36; M2_b_0_dup_108 = M2_sleeptimer_nx21 & (M2_sleeptimer_state_5 $ M2_b_0_dup_108_carry_eqn); --scsn_slave_nw_dll_ob1_ob_data_65 is scsn_slave_nw_dll_ob1_ob_data_65 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_65_lut_out = scsn_slave_nw_dll_ob1_ob_data_64; scsn_slave_nw_dll_ob1_ob_data_65 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_65_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_65, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_66 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_66 --operation mode is normal Y2_d_to_dll_66 = L2_data_out_66 & (Y2_nx151 # Y2_forward_buffer_58 & Y2_nx154) # !L2_data_out_66 & Y2_forward_buffer_58 & (Y2_nx154); --L2_data_out_67 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_67 --operation mode is normal L2_data_out_67_lut_out = L2_data_out_66; L2_data_out_67 = DFFEAS(L2_data_out_67_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_60 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_60 --operation mode is normal L2_data_out_60_lut_out = L2_data_out_59; L2_data_out_60 = DFFEAS(L2_data_out_60_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --N1_altered_frame1 is mcm_nw_nwl:scsn_slave_nw_nwl|altered_frame1 --operation mode is normal N1_altered_frame1 = J1_altered_frame & !N1_current_state_0 & (N1_current_state_2 # N1_current_state_1); --M2_stuff_bit_inserted is mcm_nw_sendtiming_4_7_63:scsn_slave_nw_dll_st1|stuff_bit_inserted --operation mode is normal M2_stuff_bit_inserted_lut_out = !M2_nx226 & (M2_current_state_1 # M2_current_state_2 & M2_current_state_0); M2_stuff_bit_inserted = DFFEAS(M2_stuff_bit_inserted_lut_out, X1__clk0, VCC, , M2_stuffing_strobe_in, , , , ); --nx1577 is nx1577 --operation mode is normal nx1577 = !scsn_slave_nw_dll_ob1_bitcounter_5 & !scsn_slave_nw_dll_ob1_bitcounter_4 # !scsn_slave_nw_dll_ob1_bitcounter_6; --nx1578 is nx1578 --operation mode is normal nx1578 = !scsn_slave_nw_dll_ob1_bitcounter_1 & !scsn_slave_nw_dll_ob1_bitcounter_0 # !scsn_slave_nw_dll_ob1_bitcounter_2; --scsn_slave_nw_dll_ob1_ob_crc_12 is scsn_slave_nw_dll_ob1_ob_crc_12 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_12_lut_out = scsn_slave_nw_dll_ob1_ob_crc_11; scsn_slave_nw_dll_ob1_ob_crc_12 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_12_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_65, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_cnt_rst_2 is general_config_notri:nic_notri|dut_ir_cnt_rst_2 --operation mode is arithmetic G1_dut_ir_cnt_rst_2_carry_eqn = G1_dut_ir_cnt_rst_nx16; G1_dut_ir_cnt_rst_2_lut_out = G1_dut_ir_cnt_rst_2 $ (!G1_dut_ir_cnt_rst_2_carry_eqn); G1_dut_ir_cnt_rst_2 = DFFEAS(G1_dut_ir_cnt_rst_2_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx22 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx22 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx22 = CARRY(G1_dut_ir_cnt_rst_2 & (!G1_dut_ir_cnt_rst_nx16)); --T1_c_ini_4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|c_ini_4 --operation mode is normal T1_c_ini_4 = !D1_cfr_1 & !D1_cfr_0; --T1_nx472 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx472 --operation mode is normal T1_nx472_carry_eqn = T1_result_dec_1003_nx30; T1_nx472 = T1_NOT_c_cnt_4 $ (!T1_nx472_carry_eqn); --T1_nx1152 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1152 --operation mode is normal T1_nx1152 = T1_tms_sm_1 & (T1_tms_sm_0 # T1_nx1141) # !T1_tms_sm_1 & !T1_tms_sm_0; --T1_nx1153 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1153 --operation mode is normal T1_nx1153 = T1_nx1138 # !T1_nx1135 & (T1_nx1136 # T1_nx1137); --T1_NOT_nx552 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_nx552 --operation mode is normal T1_NOT_nx552 = T1_b_cnt_0 # T1_nx1135 # T1_nx1147 # !T1_NOT_c_cnt_2; --D1_cfr_1 is jtag_master_1_notri:jtag_dut_notri|cfr_1 --operation mode is normal D1_cfr_1_lut_out = N1_request_30; D1_cfr_1 = DFFEAS(D1_cfr_1_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --T1_nx473 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx473 --operation mode is arithmetic T1_nx473_carry_eqn = T1_result_dec_1003_nx26; T1_nx473 = T1_NOT_c_cnt_3 $ (T1_nx473_carry_eqn); --T1_result_dec_1003_nx30 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_dec_1003_nx30 --operation mode is arithmetic T1_result_dec_1003_nx30 = CARRY(T1_NOT_c_cnt_3 & (!T1_result_dec_1003_nx26)); --T1_nx9 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx9 --operation mode is normal T1_nx9 = D1_cfr_1 & D1_cfr_0; --T1_nx474 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx474 --operation mode is arithmetic T1_nx474_carry_eqn = T1_result_dec_1003_nx22; T1_nx474 = T1_NOT_c_cnt_2 $ (!T1_nx474_carry_eqn); --T1_result_dec_1003_nx26 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_dec_1003_nx26 --operation mode is arithmetic T1_result_dec_1003_nx26 = CARRY(!T1_result_dec_1003_nx22 # !T1_NOT_c_cnt_2); --T1_NOT_c_cnt_1 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|NOT_c_cnt_1 --operation mode is normal T1_NOT_c_cnt_1_lut_out = !T1_nx475 & (T1_nx1138 # T1_nx1142 # T1_nx1143); T1_NOT_c_cnt_1 = DFFEAS(T1_NOT_c_cnt_1_lut_out, X1__clk0, J1_chipRST_n, , T1_NOT_nx552, , , , ); --T1_nx476 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx476 --operation mode is normal T1_nx476 = T1_NOT_c_cnt_0; --T1_nx1138 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1138 --operation mode is normal T1_nx1138 = T1_tms_sm_1 & !T1_tms_sm_0 & !T1_NOT_c_cnt_2 # !T1_tms_sm_1 & T1_tms_sm_0; --T1_nx1142 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1142 --operation mode is normal T1_nx1142 = T1_tms_sm_1 & !T1_tms_sm_0 & (!T1_NOT_c_cnt_3 # !T1_NOT_c_cnt_4); --T1_nx1143 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1143 --operation mode is normal T1_nx1143 = T1_tms_sm_1 & !T1_tms_sm_0 & (!T1_NOT_c_cnt_0 # !T1_NOT_c_cnt_1); --T1_c_mid_2 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|c_mid_2 --operation mode is arithmetic T1_c_mid_2_carry_eqn = T1_result_inc_994_nx14; T1_c_mid_2 = D1_cfr_1 $ (!T1_c_mid_2_carry_eqn); --T1_result_inc_994_nx18 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_inc_994_nx18 --operation mode is arithmetic T1_result_inc_994_nx18 = CARRY(D1_cfr_1 # !T1_result_inc_994_nx14); --T1_c_mid_1 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|c_mid_1 --operation mode is normal T1_c_mid_1 = T1_nx9; --T1_c_mid_3 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|c_mid_3 --operation mode is arithmetic T1_c_mid_3_carry_eqn = T1_result_inc_994_nx18; T1_c_mid_3 = T1_c_ini_4 $ (!T1_c_mid_3_carry_eqn); --T1_nx1050 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1050 --operation mode is arithmetic T1_nx1050 = CARRY(T1_c_ini_4 & (!T1_result_inc_994_nx18)); --T1_c_mid_4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|c_mid_4 --operation mode is normal T1_c_mid_4_carry_eqn = T1_nx1050; T1_c_mid_4 = T1_c_mid_4_carry_eqn; --T1_flag_wrote is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|flag_wrote --operation mode is normal T1_flag_wrote_lut_out = D1_we_tms; T1_flag_wrote = DFFEAS(T1_flag_wrote_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T1_nx1137 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1137 --operation mode is normal T1_nx1137 = !T1_NOT_c_cnt_3 # !T1_NOT_c_cnt_4; --T1_b_cnt_0 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_0 --operation mode is arithmetic T1_b_cnt_0_lut_out = T1_b_cnt_0 $ T1_cnt_e; T1_b_cnt_0 = DFFEAS(T1_b_cnt_0_lut_out, X1__clk0, VCC, , , N1_request_48, , , D1_we_tms); --T1_b_cnt_nx15 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_nx15 --operation mode is arithmetic T1_b_cnt_nx15 = CARRY(T1_b_cnt_0 # !T1_cnt_e); --T1_b_cnt_4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_4 --operation mode is normal T1_b_cnt_4_carry_eqn = T1_b_cnt_nx36; T1_b_cnt_4_lut_out = T1_b_cnt_4 $ (T1_b_cnt_4_carry_eqn); T1_b_cnt_4 = DFFEAS(T1_b_cnt_4_lut_out, X1__clk0, VCC, , , N1_request_44, , , D1_we_tms); --T1_b_cnt_3 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_3 --operation mode is arithmetic T1_b_cnt_3_carry_eqn = T1_b_cnt_nx27; T1_b_cnt_3_lut_out = T1_b_cnt_3 $ (!T1_b_cnt_3_carry_eqn); T1_b_cnt_3 = DFFEAS(T1_b_cnt_3_lut_out, X1__clk0, VCC, , , N1_request_45, , , D1_we_tms); --T1_b_cnt_nx36 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_nx36 --operation mode is arithmetic T1_b_cnt_nx36 = CARRY(!T1_b_cnt_3 & (!T1_b_cnt_nx27)); --T1_b_cnt_2 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_2 --operation mode is arithmetic T1_b_cnt_2_carry_eqn = T1_b_cnt_nx21; T1_b_cnt_2_lut_out = T1_b_cnt_2 $ (T1_b_cnt_2_carry_eqn); T1_b_cnt_2 = DFFEAS(T1_b_cnt_2_lut_out, X1__clk0, VCC, , , N1_request_46, , , D1_we_tms); --T1_b_cnt_nx27 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_nx27 --operation mode is arithmetic T1_b_cnt_nx27 = CARRY(T1_b_cnt_2 # !T1_b_cnt_nx21); --T1_b_cnt_1 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_1 --operation mode is arithmetic T1_b_cnt_1_carry_eqn = T1_b_cnt_nx15; T1_b_cnt_1_lut_out = T1_b_cnt_1 $ (!T1_b_cnt_1_carry_eqn); T1_b_cnt_1 = DFFEAS(T1_b_cnt_1_lut_out, X1__clk0, VCC, , , N1_request_47, , , D1_we_tms); --T1_b_cnt_nx21 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|b_cnt_nx21 --operation mode is arithmetic T1_b_cnt_nx21 = CARRY(!T1_b_cnt_1 & (!T1_b_cnt_nx15)); --D1_nx228 is jtag_master_1_notri:jtag_dut_notri|nx228 --operation mode is normal D1_nx228 = D1_state_jtag_0 & (D1_state_jtag_3 & !D1_state_jtag_1 # !D1_state_jtag_3 & (T1_TMS)) # !D1_state_jtag_0 & (D1_state_jtag_3); --D1_nx229 is jtag_master_1_notri:jtag_dut_notri|nx229 --operation mode is normal D1_nx229 = D1_state_jtag_0 & D1_state_jtag_3 & (D1_state_jtag_1 # !T1_TMS) # !D1_state_jtag_0 & D1_state_jtag_1 & (D1_state_jtag_3 # T1_TMS); --D1_nx540 is jtag_master_1_notri:jtag_dut_notri|nx540 --operation mode is normal D1_nx540 = N1_request_41 & (N1_request_43 # N1_request_42); --D1_jtgsnd_ser_t_71 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_71 --operation mode is normal D1_jtgsnd_ser_t_71_lut_out = D1_jtgsnd_ser_t_70; D1_jtgsnd_ser_t_71 = DFFEAS(D1_jtgsnd_ser_t_71_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_2, , , D1_jtgsnd_we_g_1); --D1_jtgsnd_we_g_2 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_we_g_2 --operation mode is normal D1_jtgsnd_we_g_2 = !N1_request_48 & N1_request_47 & !D1_nx540 & D1_nx253; --D1_jtgsnd_nx792 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_nx792 --operation mode is normal D1_jtgsnd_nx792 = D1_nx249 # !D1_nx540 & D1_nx252 & D1_nx253; --L1_data_out_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_3 --operation mode is normal L1_data_out_3_lut_out = L1_data_out_2; L1_data_out_3 = DFFEAS(L1_data_out_3_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_3 --operation mode is normal L2_data_out_3_lut_out = L2_data_out_2; L2_data_out_3 = DFFEAS(L2_data_out_3_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --D1_nx253 is jtag_master_1_notri:jtag_dut_notri|nx253 --operation mode is normal D1_nx253 = C1_ce_dut_jtg & !J1_rd_wr_oase; --D1_nx249 is jtag_master_1_notri:jtag_dut_notri|nx249 --operation mode is normal D1_nx249 = T1_tck_ena & D1_shift_trap & D1_jtgsnd_enable_shift; --D1_nx250 is jtag_master_1_notri:jtag_dut_notri|nx250 --operation mode is normal D1_nx250 = N1_request_48 & !N1_request_47; --T1_s_reg_4 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_4 --operation mode is normal T1_s_reg_4_lut_out = T1_s_reg_5; T1_s_reg_4 = DFFEAS(T1_s_reg_4_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_27, , , D1_we_tms); --T1_nx1144 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1144 --operation mode is normal T1_nx1144 = T1_b_cnt_2 # T1_b_cnt_1; --T2_c_ini_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|c_ini_4 --operation mode is normal T2_c_ini_4 = !E1_cfr_1 & !E1_cfr_0; --T2_nx472 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx472 --operation mode is normal T2_nx472_carry_eqn = T2_result_dec_1003_nx30; T2_nx472 = T2_NOT_c_cnt_4 $ (!T2_nx472_carry_eqn); --T2_nx1152 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1152 --operation mode is normal T2_nx1152 = T2_tms_sm_1 & (T2_tms_sm_0 # T2_nx1141) # !T2_tms_sm_1 & !T2_tms_sm_0; --T2_nx1153 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1153 --operation mode is normal T2_nx1153 = T2_nx1138 # !T2_nx1135 & (T2_nx1136 # T2_nx1137); --T2_NOT_nx552 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_nx552 --operation mode is normal T2_NOT_nx552 = T2_b_cnt_0 # T2_nx1135 # T2_nx1147 # !T2_NOT_c_cnt_2; --E1_cfr_1 is jtag_master_2_notri:jtag_ni_dn_notri|cfr_1 --operation mode is normal E1_cfr_1_lut_out = N1_request_30; E1_cfr_1 = DFFEAS(E1_cfr_1_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --T2_nx473 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx473 --operation mode is arithmetic T2_nx473_carry_eqn = T2_result_dec_1003_nx26; T2_nx473 = T2_NOT_c_cnt_3 $ (T2_nx473_carry_eqn); --T2_result_dec_1003_nx30 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_dec_1003_nx30 --operation mode is arithmetic T2_result_dec_1003_nx30 = CARRY(T2_NOT_c_cnt_3 & (!T2_result_dec_1003_nx26)); --T2_nx9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx9 --operation mode is normal T2_nx9 = E1_cfr_1 & E1_cfr_0; --T2_nx474 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx474 --operation mode is arithmetic T2_nx474_carry_eqn = T2_result_dec_1003_nx22; T2_nx474 = T2_NOT_c_cnt_2 $ (!T2_nx474_carry_eqn); --T2_result_dec_1003_nx26 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_dec_1003_nx26 --operation mode is arithmetic T2_result_dec_1003_nx26 = CARRY(!T2_result_dec_1003_nx22 # !T2_NOT_c_cnt_2); --T2_NOT_c_cnt_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|NOT_c_cnt_1 --operation mode is normal T2_NOT_c_cnt_1_lut_out = !T2_nx475 & (T2_nx1138 # T2_nx1142 # T2_nx1143); T2_NOT_c_cnt_1 = DFFEAS(T2_NOT_c_cnt_1_lut_out, X1__clk0, J1_chipRST_n, , T2_NOT_nx552, , , , ); --T2_nx476 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx476 --operation mode is normal T2_nx476 = T2_NOT_c_cnt_0; --T2_nx1138 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1138 --operation mode is normal T2_nx1138 = T2_tms_sm_1 & !T2_tms_sm_0 & !T2_NOT_c_cnt_2 # !T2_tms_sm_1 & T2_tms_sm_0; --T2_nx1142 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1142 --operation mode is normal T2_nx1142 = T2_tms_sm_1 & !T2_tms_sm_0 & (!T2_NOT_c_cnt_3 # !T2_NOT_c_cnt_4); --T2_nx1143 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1143 --operation mode is normal T2_nx1143 = T2_tms_sm_1 & !T2_tms_sm_0 & (!T2_NOT_c_cnt_0 # !T2_NOT_c_cnt_1); --T2_c_mid_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|c_mid_2 --operation mode is arithmetic T2_c_mid_2_carry_eqn = T2_result_inc_994_nx14; T2_c_mid_2 = E1_cfr_1 $ (!T2_c_mid_2_carry_eqn); --T2_result_inc_994_nx18 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_inc_994_nx18 --operation mode is arithmetic T2_result_inc_994_nx18 = CARRY(E1_cfr_1 # !T2_result_inc_994_nx14); --T2_c_mid_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|c_mid_1 --operation mode is normal T2_c_mid_1 = T2_nx9; --T2_c_mid_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|c_mid_3 --operation mode is arithmetic T2_c_mid_3_carry_eqn = T2_result_inc_994_nx18; T2_c_mid_3 = T2_c_ini_4 $ (!T2_c_mid_3_carry_eqn); --T2_nx1050 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1050 --operation mode is arithmetic T2_nx1050 = CARRY(T2_c_ini_4 & (!T2_result_inc_994_nx18)); --T2_c_mid_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|c_mid_4 --operation mode is normal T2_c_mid_4_carry_eqn = T2_nx1050; T2_c_mid_4 = T2_c_mid_4_carry_eqn; --T2_flag_wrote is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|flag_wrote --operation mode is normal T2_flag_wrote_lut_out = E1_we_tms; T2_flag_wrote = DFFEAS(T2_flag_wrote_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T2_nx1137 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1137 --operation mode is normal T2_nx1137 = !T2_NOT_c_cnt_3 # !T2_NOT_c_cnt_4; --T2_b_cnt_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_0 --operation mode is arithmetic T2_b_cnt_0_lut_out = T2_b_cnt_0 $ T2_cnt_e; T2_b_cnt_0 = DFFEAS(T2_b_cnt_0_lut_out, X1__clk0, VCC, , , N1_request_48, , , E1_we_tms); --T2_b_cnt_nx15 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_nx15 --operation mode is arithmetic T2_b_cnt_nx15 = CARRY(T2_b_cnt_0 # !T2_cnt_e); --T2_b_cnt_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_4 --operation mode is normal T2_b_cnt_4_carry_eqn = T2_b_cnt_nx36; T2_b_cnt_4_lut_out = T2_b_cnt_4 $ (T2_b_cnt_4_carry_eqn); T2_b_cnt_4 = DFFEAS(T2_b_cnt_4_lut_out, X1__clk0, VCC, , , N1_request_44, , , E1_we_tms); --T2_b_cnt_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_3 --operation mode is arithmetic T2_b_cnt_3_carry_eqn = T2_b_cnt_nx27; T2_b_cnt_3_lut_out = T2_b_cnt_3 $ (!T2_b_cnt_3_carry_eqn); T2_b_cnt_3 = DFFEAS(T2_b_cnt_3_lut_out, X1__clk0, VCC, , , N1_request_45, , , E1_we_tms); --T2_b_cnt_nx36 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_nx36 --operation mode is arithmetic T2_b_cnt_nx36 = CARRY(!T2_b_cnt_3 & (!T2_b_cnt_nx27)); --T2_b_cnt_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_2 --operation mode is arithmetic T2_b_cnt_2_carry_eqn = T2_b_cnt_nx21; T2_b_cnt_2_lut_out = T2_b_cnt_2 $ (T2_b_cnt_2_carry_eqn); T2_b_cnt_2 = DFFEAS(T2_b_cnt_2_lut_out, X1__clk0, VCC, , , N1_request_46, , , E1_we_tms); --T2_b_cnt_nx27 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_nx27 --operation mode is arithmetic T2_b_cnt_nx27 = CARRY(T2_b_cnt_2 # !T2_b_cnt_nx21); --T2_b_cnt_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_1 --operation mode is arithmetic T2_b_cnt_1_carry_eqn = T2_b_cnt_nx15; T2_b_cnt_1_lut_out = T2_b_cnt_1 $ (!T2_b_cnt_1_carry_eqn); T2_b_cnt_1 = DFFEAS(T2_b_cnt_1_lut_out, X1__clk0, VCC, , , N1_request_47, , , E1_we_tms); --T2_b_cnt_nx21 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|b_cnt_nx21 --operation mode is arithmetic T2_b_cnt_nx21 = CARRY(!T2_b_cnt_1 & (!T2_b_cnt_nx15)); --T3_c_ini_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|c_ini_4 --operation mode is normal T3_c_ini_4 = !E2_cfr_1 & !E2_cfr_0; --T3_nx472 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx472 --operation mode is normal T3_nx472_carry_eqn = T3_result_dec_1003_nx30; T3_nx472 = T3_NOT_c_cnt_4 $ (!T3_nx472_carry_eqn); --T3_nx1152 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1152 --operation mode is normal T3_nx1152 = T3_tms_sm_1 & (T3_tms_sm_0 # T3_nx1141) # !T3_tms_sm_1 & !T3_tms_sm_0; --T3_nx1153 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1153 --operation mode is normal T3_nx1153 = T3_nx1138 # !T3_nx1135 & (T3_nx1136 # T3_nx1137); --T3_NOT_nx552 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_nx552 --operation mode is normal T3_NOT_nx552 = T3_b_cnt_0 # T3_nx1135 # T3_nx1147 # !T3_NOT_c_cnt_2; --E2_cfr_1 is jtag_master_2_notri:jtag_ni_up_notri|cfr_1 --operation mode is normal E2_cfr_1_lut_out = N1_request_30; E2_cfr_1 = DFFEAS(E2_cfr_1_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --T3_nx473 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx473 --operation mode is arithmetic T3_nx473_carry_eqn = T3_result_dec_1003_nx26; T3_nx473 = T3_NOT_c_cnt_3 $ (T3_nx473_carry_eqn); --T3_result_dec_1003_nx30 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_dec_1003_nx30 --operation mode is arithmetic T3_result_dec_1003_nx30 = CARRY(T3_NOT_c_cnt_3 & (!T3_result_dec_1003_nx26)); --T3_nx9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx9 --operation mode is normal T3_nx9 = E2_cfr_1 & E2_cfr_0; --T3_nx474 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx474 --operation mode is arithmetic T3_nx474_carry_eqn = T3_result_dec_1003_nx22; T3_nx474 = T3_NOT_c_cnt_2 $ (!T3_nx474_carry_eqn); --T3_result_dec_1003_nx26 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_dec_1003_nx26 --operation mode is arithmetic T3_result_dec_1003_nx26 = CARRY(!T3_result_dec_1003_nx22 # !T3_NOT_c_cnt_2); --T3_NOT_c_cnt_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|NOT_c_cnt_1 --operation mode is normal T3_NOT_c_cnt_1_lut_out = !T3_nx475 & (T3_nx1138 # T3_nx1142 # T3_nx1143); T3_NOT_c_cnt_1 = DFFEAS(T3_NOT_c_cnt_1_lut_out, X1__clk0, J1_chipRST_n, , T3_NOT_nx552, , , , ); --T3_nx476 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx476 --operation mode is normal T3_nx476 = T3_NOT_c_cnt_0; --T3_nx1138 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1138 --operation mode is normal T3_nx1138 = T3_tms_sm_1 & !T3_tms_sm_0 & !T3_NOT_c_cnt_2 # !T3_tms_sm_1 & T3_tms_sm_0; --T3_nx1142 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1142 --operation mode is normal T3_nx1142 = T3_tms_sm_1 & !T3_tms_sm_0 & (!T3_NOT_c_cnt_3 # !T3_NOT_c_cnt_4); --T3_nx1143 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1143 --operation mode is normal T3_nx1143 = T3_tms_sm_1 & !T3_tms_sm_0 & (!T3_NOT_c_cnt_0 # !T3_NOT_c_cnt_1); --T3_c_mid_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|c_mid_2 --operation mode is arithmetic T3_c_mid_2_carry_eqn = T3_result_inc_994_nx14; T3_c_mid_2 = E2_cfr_1 $ (!T3_c_mid_2_carry_eqn); --T3_result_inc_994_nx18 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_inc_994_nx18 --operation mode is arithmetic T3_result_inc_994_nx18 = CARRY(E2_cfr_1 # !T3_result_inc_994_nx14); --T3_c_mid_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|c_mid_1 --operation mode is normal T3_c_mid_1 = T3_nx9; --T3_c_mid_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|c_mid_3 --operation mode is arithmetic T3_c_mid_3_carry_eqn = T3_result_inc_994_nx18; T3_c_mid_3 = T3_c_ini_4 $ (!T3_c_mid_3_carry_eqn); --T3_nx1050 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1050 --operation mode is arithmetic T3_nx1050 = CARRY(T3_c_ini_4 & (!T3_result_inc_994_nx18)); --T3_c_mid_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|c_mid_4 --operation mode is normal T3_c_mid_4_carry_eqn = T3_nx1050; T3_c_mid_4 = T3_c_mid_4_carry_eqn; --T3_flag_wrote is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|flag_wrote --operation mode is normal T3_flag_wrote_lut_out = E2_we_tms; T3_flag_wrote = DFFEAS(T3_flag_wrote_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --T3_nx1137 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1137 --operation mode is normal T3_nx1137 = !T3_NOT_c_cnt_3 # !T3_NOT_c_cnt_4; --T3_b_cnt_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_0 --operation mode is arithmetic T3_b_cnt_0_lut_out = T3_b_cnt_0 $ T3_cnt_e; T3_b_cnt_0 = DFFEAS(T3_b_cnt_0_lut_out, X1__clk0, VCC, , , N1_request_48, , , E2_we_tms); --T3_b_cnt_nx15 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_nx15 --operation mode is arithmetic T3_b_cnt_nx15 = CARRY(T3_b_cnt_0 # !T3_cnt_e); --T3_b_cnt_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_4 --operation mode is normal T3_b_cnt_4_carry_eqn = T3_b_cnt_nx36; T3_b_cnt_4_lut_out = T3_b_cnt_4 $ (T3_b_cnt_4_carry_eqn); T3_b_cnt_4 = DFFEAS(T3_b_cnt_4_lut_out, X1__clk0, VCC, , , N1_request_44, , , E2_we_tms); --T3_b_cnt_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_3 --operation mode is arithmetic T3_b_cnt_3_carry_eqn = T3_b_cnt_nx27; T3_b_cnt_3_lut_out = T3_b_cnt_3 $ (!T3_b_cnt_3_carry_eqn); T3_b_cnt_3 = DFFEAS(T3_b_cnt_3_lut_out, X1__clk0, VCC, , , N1_request_45, , , E2_we_tms); --T3_b_cnt_nx36 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_nx36 --operation mode is arithmetic T3_b_cnt_nx36 = CARRY(!T3_b_cnt_3 & (!T3_b_cnt_nx27)); --T3_b_cnt_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_2 --operation mode is arithmetic T3_b_cnt_2_carry_eqn = T3_b_cnt_nx21; T3_b_cnt_2_lut_out = T3_b_cnt_2 $ (T3_b_cnt_2_carry_eqn); T3_b_cnt_2 = DFFEAS(T3_b_cnt_2_lut_out, X1__clk0, VCC, , , N1_request_46, , , E2_we_tms); --T3_b_cnt_nx27 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_nx27 --operation mode is arithmetic T3_b_cnt_nx27 = CARRY(T3_b_cnt_2 # !T3_b_cnt_nx21); --T3_b_cnt_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_1 --operation mode is arithmetic T3_b_cnt_1_carry_eqn = T3_b_cnt_nx15; T3_b_cnt_1_lut_out = T3_b_cnt_1 $ (!T3_b_cnt_1_carry_eqn); T3_b_cnt_1 = DFFEAS(T3_b_cnt_1_lut_out, X1__clk0, VCC, , , N1_request_47, , , E2_we_tms); --T3_b_cnt_nx21 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|b_cnt_nx21 --operation mode is arithmetic T3_b_cnt_nx21 = CARRY(!T3_b_cnt_1 & (!T3_b_cnt_nx15)); --E1_nx226 is jtag_master_2_notri:jtag_ni_dn_notri|nx226 --operation mode is normal E1_nx226 = E1_state_jtag_0 & (E1_state_jtag_3 & !E1_state_jtag_1 # !E1_state_jtag_3 & (T2_TMS)) # !E1_state_jtag_0 & (E1_state_jtag_3); --E1_nx227 is jtag_master_2_notri:jtag_ni_dn_notri|nx227 --operation mode is normal E1_nx227 = E1_state_jtag_0 & E1_state_jtag_3 & (E1_state_jtag_1 # !T2_TMS) # !E1_state_jtag_0 & E1_state_jtag_1 & (E1_state_jtag_3 # T2_TMS); --E1_jtgsnd_ser_i_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_i_0 --operation mode is normal E1_jtgsnd_ser_i_0_lut_out = N1_request_31 & C1_ce_ni_jtg_dn & E1_nx240 & E1_nx244; E1_jtgsnd_ser_i_0 = DFFEAS(E1_jtgsnd_ser_i_0_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx966, , , , ); --E1_jtgsnd_ser_t_71 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_71 --operation mode is normal E1_jtgsnd_ser_t_71_lut_out = E1_jtgsnd_ser_t_70; E1_jtgsnd_ser_t_71 = DFFEAS(E1_jtgsnd_ser_t_71_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_2, , , E1_jtgsnd_we_g_1); --E1_jtgsnd_we_g_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_we_g_2 --operation mode is normal E1_jtgsnd_we_g_2 = !N1_request_48 & N1_request_47 & !E1_nx540 & E1_nx249; --E1_jtgsnd_nx812 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_nx812 --operation mode is normal E1_jtgsnd_nx812 = E1_nx245 # !E1_nx540 & E1_nx248 & E1_nx249; --E1_nx245 is jtag_master_2_notri:jtag_ni_dn_notri|nx245 --operation mode is normal E1_nx245 = T2_tck_ena & E1_shift_trap & E1_jtgsnd_enable_shift; --E1_nx246 is jtag_master_2_notri:jtag_ni_dn_notri|nx246 --operation mode is normal E1_nx246 = N1_request_48 & !N1_request_47; --E2_nx226 is jtag_master_2_notri:jtag_ni_up_notri|nx226 --operation mode is normal E2_nx226 = E2_state_jtag_0 & (E2_state_jtag_3 & !E2_state_jtag_1 # !E2_state_jtag_3 & (T3_TMS)) # !E2_state_jtag_0 & (E2_state_jtag_3); --E2_nx227 is jtag_master_2_notri:jtag_ni_up_notri|nx227 --operation mode is normal E2_nx227 = E2_state_jtag_0 & E2_state_jtag_3 & (E2_state_jtag_1 # !T3_TMS) # !E2_state_jtag_0 & E2_state_jtag_1 & (E2_state_jtag_3 # T3_TMS); --E2_jtgsnd_ser_i_0 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_i_0 --operation mode is normal E2_jtgsnd_ser_i_0_lut_out = N1_request_31 & C1_ce_ni_jtg_up & E2_nx240 & E2_nx244; E2_jtgsnd_ser_i_0 = DFFEAS(E2_jtgsnd_ser_i_0_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx966, , , , ); --E2_jtgsnd_ser_t_71 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_71 --operation mode is normal E2_jtgsnd_ser_t_71_lut_out = E2_jtgsnd_ser_t_70; E2_jtgsnd_ser_t_71 = DFFEAS(E2_jtgsnd_ser_t_71_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_2, , , E2_jtgsnd_we_g_1); --E2_jtgsnd_we_g_2 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_we_g_2 --operation mode is normal E2_jtgsnd_we_g_2 = !N1_request_48 & N1_request_47 & !E2_nx540 & E2_nx249; --E2_jtgsnd_nx812 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_nx812 --operation mode is normal E2_jtgsnd_nx812 = E2_nx245 # !E2_nx540 & E2_nx248 & E2_nx249; --E2_nx245 is jtag_master_2_notri:jtag_ni_up_notri|nx245 --operation mode is normal E2_nx245 = T3_tck_ena & E2_shift_trap & E2_jtgsnd_enable_shift; --E2_nx246 is jtag_master_2_notri:jtag_ni_up_notri|nx246 --operation mode is normal E2_nx246 = N1_request_48 & !N1_request_47; --T2_s_reg_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_4 --operation mode is normal T2_s_reg_4_lut_out = T2_s_reg_5; T2_s_reg_4 = DFFEAS(T2_s_reg_4_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_27, , , E1_we_tms); --T2_nx1144 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1144 --operation mode is normal T2_nx1144 = T2_b_cnt_2 # T2_b_cnt_1; --T3_s_reg_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_4 --operation mode is normal T3_s_reg_4_lut_out = T3_s_reg_5; T3_s_reg_4 = DFFEAS(T3_s_reg_4_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_27, , , E2_we_tms); --T3_nx1144 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1144 --operation mode is normal T3_nx1144 = T3_b_cnt_2 # T3_b_cnt_1; --L1_data_out_14 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_14 --operation mode is normal L1_data_out_14_lut_out = L1_data_out_13; L1_data_out_14 = DFFEAS(L1_data_out_14_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_14 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_14 --operation mode is normal L2_data_out_14_lut_out = L2_data_out_13; L2_data_out_14 = DFFEAS(L2_data_out_14_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_nx278 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx278 --operation mode is normal L1_nx278 = !L1_b_crc_11 & !L1_b_crc_10 & !L1_b_crc_9 & !L1_b_crc_8; --L1_nx282 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx282 --operation mode is normal L1_nx282 = !L1_b_crc_15 & !L1_b_crc_14 & !L1_b_crc_13 & !L1_b_crc_12; --L1_nx283 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx283 --operation mode is normal L1_nx283 = !L1_b_crc_1 & !L1_b_crc_0 & L1_nx279 & L1_nx284; --L1_nx281 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx281 --operation mode is normal L1_nx281 = L1_bitcounter_3 # L1_bitcounter_1 # L1_bitcounter_0 # L1_bitcounter_2; --N1_nx234 is mcm_nw_nwl:scsn_slave_nw_nwl|nx234 --operation mode is normal N1_nx234 = N1_current_state_2 & !N1_current_state_1 & (N1_bridge_buffered $ !N1_bridge); --N1_nx235 is mcm_nw_nwl:scsn_slave_nw_nwl|nx235 --operation mode is normal N1_nx235 = !J1_bridge_alter & !N1_current_state_2; --L1_data_out_54 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_54 --operation mode is normal L1_data_out_54_lut_out = L1_data_out_53; L1_data_out_54 = DFFEAS(L1_data_out_54_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_forward_buffer_55 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_55 --operation mode is arithmetic Y1_forward_buffer_55_carry_eqn = Y1_result_inc_424_nx40; Y1_forward_buffer_55 = L1_data_out_55 $ (Y1_forward_buffer_55_carry_eqn); --Y1_result_inc_424_nx44 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx44 --operation mode is arithmetic Y1_result_inc_424_nx44 = CARRY(!Y1_result_inc_424_nx40 # !L1_data_out_55); --L1_data_out_53 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_53 --operation mode is normal L1_data_out_53_lut_out = L1_data_out_52; L1_data_out_53 = DFFEAS(L1_data_out_53_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_forward_buffer_58 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_58 --operation mode is arithmetic Y1_forward_buffer_58_carry_eqn = Y1_result_inc_424_nx28; Y1_forward_buffer_58 = L1_data_out_58 $ (!Y1_forward_buffer_58_carry_eqn); --Y1_result_inc_424_nx32 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx32 --operation mode is arithmetic Y1_result_inc_424_nx32 = CARRY(L1_data_out_58 & (!Y1_result_inc_424_nx28)); --Y1_forward_buffer_57 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_57 --operation mode is arithmetic Y1_forward_buffer_57_carry_eqn = Y1_result_inc_424_nx32; Y1_forward_buffer_57 = L1_data_out_57 $ (Y1_forward_buffer_57_carry_eqn); --Y1_result_inc_424_nx36 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx36 --operation mode is arithmetic Y1_result_inc_424_nx36 = CARRY(!Y1_result_inc_424_nx32 # !L1_data_out_57); --Y1_forward_buffer_56 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|forward_buffer_56 --operation mode is arithmetic Y1_forward_buffer_56_carry_eqn = Y1_result_inc_424_nx36; Y1_forward_buffer_56 = L1_data_out_56 $ (!Y1_forward_buffer_56_carry_eqn); --Y1_result_inc_424_nx40 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx40 --operation mode is arithmetic Y1_result_inc_424_nx40 = CARRY(L1_data_out_56 & (!Y1_result_inc_424_nx36)); --Y1_nx25 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx25 --operation mode is normal Y1_nx25 = Y1_b_dirty & (L1_data_valid # scsn_slave_d0_err); --Y1_nx148 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx148 --operation mode is normal Y1_nx148 = !Y1_current_state_2 & !Y1_current_state_0; --Y1_nx174 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx174 --operation mode is normal Y1_nx174 = Y1_forward_buffer_56 # Y1_forward_buffer_55 # Y1_forward_buffer_54 # Y1_forward_buffer_53; --Y1_modgen_eq_337_nx0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|modgen_eq_337_nx0 --operation mode is normal Y1_modgen_eq_337_nx0 = L1_data_out_62 $ Y1_forward_buffer_54; --Y1_nx150 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx150 --operation mode is normal Y1_nx150 = !scsn_slave_d0_err & Y1_modgen_eq_336_nx24 & Y1_nx147; --Y1_nx170 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx170 --operation mode is normal Y1_nx170 = L1_data_out_66 & (L1_data_out_65 $ Y1_forward_buffer_57 # !Y1_forward_buffer_58) # !L1_data_out_66 & (Y1_forward_buffer_58 # L1_data_out_65 $ Y1_forward_buffer_57); --Y1_nx177 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx177 --operation mode is normal Y1_nx177 = !L1_data_out_61 & !scsn_slave_d0_err & Y1_nx147; --Y1_modgen_eq_336_nx24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|modgen_eq_336_nx24 --operation mode is normal Y1_modgen_eq_336_nx24 = Y1_nx158 # !L1_data_out_66 # !L1_data_out_67 # !L1_data_out_68; --Y1_nx149 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx149 --operation mode is normal Y1_nx149 = !scsn_slave_d0_err & Y1_nx147; --Y1_nx171 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx171 --operation mode is normal Y1_nx171 = L1_data_out_64 & (L1_data_out_63 $ Y1_forward_buffer_55 # !Y1_forward_buffer_56) # !L1_data_out_64 & (Y1_forward_buffer_56 # L1_data_out_63 $ Y1_forward_buffer_55); --Y1_nx172 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx172 --operation mode is normal Y1_nx172 = L1_data_out_68 & (L1_data_out_67 $ Y1_forward_buffer_59 # !Y1_forward_buffer_60) # !L1_data_out_68 & (Y1_forward_buffer_60 # L1_data_out_67 $ Y1_forward_buffer_59); --J1_nx424 is mcm_nw_apl:scsn_slave_nw_apl|nx424 --operation mode is normal J1_nx424 = !J1_current_state_3 & J1_current_state_0 & (J1_current_state_2 # J1_current_state_1); --F1_we_eff is ni2dpm_12:ni_ni_neg|we_eff --operation mode is normal F1_we_eff = F1_we_p & (!F1_oa_ctrl_s # !G1_ni_oase_mode); --G1_NOT_ni_clear is general_config_notri:nic_notri|NOT_ni_clear --operation mode is normal G1_NOT_ni_clear_lut_out = J1_rd_wr_oase # G1_ix69_ix22_nx12 # !C1_ce_gen; G1_NOT_ni_clear = DFFEAS(G1_NOT_ni_clear_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --F1_data_2p_0 is ni2dpm_12:ni_ni_neg|data_2p_0 --operation mode is normal F1_data_2p_0 = F1_ex_p_modgen_gt_612_nx56 & (F1_ex_p_q1pass_0) # !F1_ex_p_modgen_gt_612_nx56 & F1_ex_p_q1pass_1; --F1_naddr_0 is ni2dpm_12:ni_ni_neg|naddr_0 --operation mode is arithmetic F1_naddr_0_lut_out = F1_naddr_0 $ F1_we_eff; F1_naddr_0 = DFFEAS(F1_naddr_0_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx10 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx10 --operation mode is arithmetic F1_wa_p_Q_nx10 = CARRY(F1_naddr_0 & F1_we_eff); --F1_naddr_1 is ni2dpm_12:ni_ni_neg|naddr_1 --operation mode is arithmetic F1_naddr_1_carry_eqn = F1_wa_p_Q_nx10; F1_naddr_1_lut_out = F1_naddr_1 $ (F1_naddr_1_carry_eqn); F1_naddr_1 = DFFEAS(F1_naddr_1_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx16 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx16 --operation mode is arithmetic F1_wa_p_Q_nx16 = CARRY(!F1_wa_p_Q_nx10 # !F1_naddr_1); --F1_naddr_2 is ni2dpm_12:ni_ni_neg|naddr_2 --operation mode is arithmetic F1_naddr_2_carry_eqn = F1_wa_p_Q_nx16; F1_naddr_2_lut_out = F1_naddr_2 $ (!F1_naddr_2_carry_eqn); F1_naddr_2 = DFFEAS(F1_naddr_2_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx22 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx22 --operation mode is arithmetic F1_wa_p_Q_nx22 = CARRY(F1_naddr_2 & (!F1_wa_p_Q_nx16)); --F1_naddr_3 is ni2dpm_12:ni_ni_neg|naddr_3 --operation mode is arithmetic F1_naddr_3_carry_eqn = F1_wa_p_Q_nx22; F1_naddr_3_lut_out = F1_naddr_3 $ (F1_naddr_3_carry_eqn); F1_naddr_3 = DFFEAS(F1_naddr_3_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx28 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx28 --operation mode is arithmetic F1_wa_p_Q_nx28 = CARRY(!F1_wa_p_Q_nx22 # !F1_naddr_3); --F1_naddr_4 is ni2dpm_12:ni_ni_neg|naddr_4 --operation mode is arithmetic F1_naddr_4_carry_eqn = F1_wa_p_Q_nx28; F1_naddr_4_lut_out = F1_naddr_4 $ (!F1_naddr_4_carry_eqn); F1_naddr_4 = DFFEAS(F1_naddr_4_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx34 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx34 --operation mode is arithmetic F1_wa_p_Q_nx34 = CARRY(F1_naddr_4 & (!F1_wa_p_Q_nx28)); --F1_naddr_5 is ni2dpm_12:ni_ni_neg|naddr_5 --operation mode is arithmetic F1_naddr_5_carry_eqn = F1_wa_p_Q_nx34; F1_naddr_5_lut_out = F1_naddr_5 $ (F1_naddr_5_carry_eqn); F1_naddr_5 = DFFEAS(F1_naddr_5_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx40 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx40 --operation mode is arithmetic F1_wa_p_Q_nx40 = CARRY(!F1_wa_p_Q_nx34 # !F1_naddr_5); --F1_naddr_6 is ni2dpm_12:ni_ni_neg|naddr_6 --operation mode is arithmetic F1_naddr_6_carry_eqn = F1_wa_p_Q_nx40; F1_naddr_6_lut_out = F1_naddr_6 $ (!F1_naddr_6_carry_eqn); F1_naddr_6 = DFFEAS(F1_naddr_6_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx44 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx44 --operation mode is arithmetic F1_wa_p_Q_nx44 = CARRY(F1_naddr_6 & (!F1_wa_p_Q_nx40)); --F1_naddr_7 is ni2dpm_12:ni_ni_neg|naddr_7 --operation mode is arithmetic F1_naddr_7_carry_eqn = F1_wa_p_Q_nx44; F1_naddr_7_lut_out = F1_naddr_7 $ (F1_naddr_7_carry_eqn); F1_naddr_7 = DFFEAS(F1_naddr_7_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx48 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx48 --operation mode is arithmetic F1_wa_p_Q_nx48 = CARRY(!F1_wa_p_Q_nx44 # !F1_naddr_7); --F1_naddr_8 is ni2dpm_12:ni_ni_neg|naddr_8 --operation mode is arithmetic F1_naddr_8_carry_eqn = F1_wa_p_Q_nx48; F1_naddr_8_lut_out = F1_naddr_8 $ (!F1_naddr_8_carry_eqn); F1_naddr_8 = DFFEAS(F1_naddr_8_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx52 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx52 --operation mode is arithmetic F1_wa_p_Q_nx52 = CARRY(F1_naddr_8 & (!F1_wa_p_Q_nx48)); --F1_naddr_9 is ni2dpm_12:ni_ni_neg|naddr_9 --operation mode is arithmetic F1_naddr_9_carry_eqn = F1_wa_p_Q_nx52; F1_naddr_9_lut_out = F1_naddr_9 $ (F1_naddr_9_carry_eqn); F1_naddr_9 = DFFEAS(F1_naddr_9_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx57 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx57 --operation mode is arithmetic F1_wa_p_Q_nx57 = CARRY(!F1_wa_p_Q_nx52 # !F1_naddr_9); --F1_naddr_10 is ni2dpm_12:ni_ni_neg|naddr_10 --operation mode is arithmetic F1_naddr_10_carry_eqn = F1_wa_p_Q_nx57; F1_naddr_10_lut_out = F1_naddr_10 $ (!F1_naddr_10_carry_eqn); F1_naddr_10 = DFFEAS(F1_naddr_10_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_wa_p_Q_nx61 is ni2dpm_12:ni_ni_neg|wa_p_Q_nx61 --operation mode is arithmetic F1_wa_p_Q_nx61 = CARRY(F1_naddr_10 & (!F1_wa_p_Q_nx57)); --F1_naddr_11 is ni2dpm_12:ni_ni_neg|naddr_11 --operation mode is normal F1_naddr_11_carry_eqn = F1_wa_p_Q_nx61; F1_naddr_11_lut_out = F1_naddr_11 $ (F1_naddr_11_carry_eqn); F1_naddr_11 = DFFEAS(F1_naddr_11_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_nx505 is general_config_notri:nic_notri|nx505 --operation mode is normal G1_nx505 = G1_nx506 & (G1_nx508 # G1_se0_cnt_0 & G1_nx507); --G1_nx512 is general_config_notri:nic_notri|nx512 --operation mode is normal G1_nx512 = N1_request_43 # G1_nx509 # G1_sebd_out_0 & G1_NOT_ix69_ix30_nx10; --G1_nx513 is general_config_notri:nic_notri|nx513 --operation mode is normal G1_nx513 = DUT_P4_D[0] & !N1_request_42 & N1_request_41 # !N1_request_43; --C1_nx304 is gio_devices:gio|nx304 --operation mode is normal C1_nx304 = !N1_request_33 & N1_request_34; --B1_nx785 is clkpre_counter:cp|nx785 --operation mode is normal B1_nx785 = GLOBAL(DUT_CLK[0]) & (B1_nx804 # B1_strb_dout_0 & B1_nx803) # !GLOBAL(DUT_CLK[0]) & B1_strb_dout_0 & B1_nx803; --B1_nx786 is clkpre_counter:cp|nx786 --operation mode is normal B1_nx786 = B1_dout1pcnt_0 & (B1_nx795 # B1_dout3pcnt_0 & B1_nx796) # !B1_dout1pcnt_0 & B1_dout3pcnt_0 & (B1_nx796); --B1_nx843 is clkpre_counter:cp|nx843 --operation mode is normal B1_nx843 = B1_nx787 # B1_nx788 # B1_dout_ccnt_0 & B1_nx794; --B1_nx844 is clkpre_counter:cp|nx844 --operation mode is normal B1_nx844 = B1_dout0pcnt_0 & (B1_nx798 # B1_dout2pcnt_0 & B1_nx797) # !B1_dout0pcnt_0 & B1_dout2pcnt_0 & B1_nx797; --S3_dout_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_0 --operation mode is normal S3_dout_0 = S3_nx282 & (N1_request_47 # S3_nx280 & S3_nx281); --E2_nx223 is jtag_master_2_notri:jtag_ni_up_notri|nx223 --operation mode is normal E2_nx223 = N1_request_43 & !N1_request_42 & T3_busy & N1_request_41; --E2_nx224 is jtag_master_2_notri:jtag_ni_up_notri|nx224 --operation mode is normal E2_nx224 = E2_nx219 & (N1_request_43 & (E2_state_jtag_0) # !N1_request_43 & E2_cfr_0); --S2_dout_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_0 --operation mode is normal S2_dout_0 = S2_nx282 & (N1_request_47 # S2_nx280 & S2_nx281); --E1_nx223 is jtag_master_2_notri:jtag_ni_dn_notri|nx223 --operation mode is normal E1_nx223 = N1_request_43 & !N1_request_42 & T2_busy & N1_request_41; --E1_nx224 is jtag_master_2_notri:jtag_ni_dn_notri|nx224 --operation mode is normal E1_nx224 = E1_nx219 & (N1_request_43 & (E1_state_jtag_0) # !N1_request_43 & E1_cfr_0); --S1_dout_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_0 --operation mode is normal S1_dout_0 = S1_nx282 & (N1_request_47 # S1_nx280 & S1_nx281); --D1_nx225 is jtag_master_1_notri:jtag_dut_notri|nx225 --operation mode is normal D1_nx225 = N1_request_43 & !N1_request_42 & T1_busy & N1_request_41; --D1_nx226 is jtag_master_1_notri:jtag_dut_notri|nx226 --operation mode is normal D1_nx226 = D1_nx222 & (N1_request_43 & (D1_state_jtag_0) # !N1_request_43 & D1_cfr_0); --K1_nx182 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx182 --operation mode is normal K1_nx182 = !K1_current_state_0 & (K1_current_state_3 & !K1_current_state_2 & !K1_current_state_1 # !K1_current_state_3 & (!K1_current_state_1 # !K1_current_state_2)); --K1_timer_in_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_nx18 --operation mode is normal K1_timer_in_nx18 = K1_timer_in_state_0 # K1_timer_in_state_1 # !K1_timer_in_state_2; --K1_b_1_dup_61 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|b_1_dup_61 --operation mode is arithmetic K1_b_1_dup_61_carry_eqn = K1_timer_in_state_inc_206_nx14; K1_b_1_dup_61 = K1_timer_in_nx18 & (K1_timer_in_state_1 $ K1_b_1_dup_61_carry_eqn); --K1_timer_in_state_inc_206_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_state_inc_206_nx18 --operation mode is arithmetic K1_timer_in_state_inc_206_nx18 = CARRY(!K1_timer_in_state_inc_206_nx14 # !K1_timer_in_state_1); --K1_b_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|b_0 --operation mode is normal K1_b_0 = !K1_timer_in_state_0 & K1_timer_in_nx18; --K1_nx177 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx177 --operation mode is normal K1_nx177 = !K1_current_state_3 & (K1_current_state_1 # K1_current_state_0); --K1_nx178 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx178 --operation mode is normal K1_nx178 = !K1_current_state_1 & K1_current_state_0; --K1_nx171 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx171 --operation mode is normal K1_nx171 = !K1_current_state_2 & !K1_current_state_1 & !K1_current_state_0; --K1_nx172 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx172 --operation mode is normal K1_nx172 = K1_timer_in_state_2 # K1_timer_in_state_0; --K1_nx157 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx157 --operation mode is normal K1_nx157 = !K1_current_state_3 & (K1_current_state_1 & (!K1_timer_in_state_1) # !K1_current_state_1 & K1_current_state_2); --K1_nx168 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx168 --operation mode is normal K1_nx168 = !K1_current_state_3 & K1_current_state_2; --K1_nx187 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx187 --operation mode is normal K1_nx187 = K1_nx181 # scsn_slave_data_in_0 & !K1_nx175 & K1_nx178; --K1_nx194 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx194 --operation mode is normal K1_nx194 = L1_buffer_full & (K1_nx176 # K1_nx196) # !L1_buffer_full & K1_ds_err & (K1_nx176 # K1_nx196); --K1_data_out is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|data_out --operation mode is normal K1_data_out_lut_out = scsn_slave_data_in_0 # !K1_current_state_3 & !K1_current_state_2 & !K1_current_state_0; K1_data_out = DFFEAS(K1_data_out_lut_out, X1__clk0, VCC, , K1_destuff_in_nx90, , , , ); --K1_result_dec_242_nx14 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|result_dec_242_nx14 --operation mode is arithmetic K1_result_dec_242_nx14 = CARRY(K1_sync_counter_0); --K1_nx200 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|nx200 --operation mode is normal K1_nx200 = K1_destuff_in_counter_2 & K1_destuff_in_counter_1 & K1_destuff_in_counter_0; --nx1583 is nx1583 --operation mode is normal nx1583 = NI_SER1_IN & G1_sw_sel_2 & G1_sw_sel_1 & !G1_sw_sel_0; --nx1584 is nx1584 --operation mode is normal nx1584 = AD_SER1_IN & (G1_sw_sel_2 & G1_sw_sel_1 & G1_sw_sel_0 # !G1_sw_sel_2 & (G1_sw_sel_1 $ G1_sw_sel_0)); --nx1585 is nx1585 --operation mode is normal nx1585 = PC_SER1_IN & !G1_sw_sel_2 & !G1_sw_sel_1 & !G1_sw_sel_0; --nx1587 is nx1587 --operation mode is normal nx1587 = nx1582 # G1_sw_sel_0 & b_3 & !nx1593; --K2_nx182 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx182 --operation mode is normal K2_nx182 = !K2_current_state_0 & (K2_current_state_3 & !K2_current_state_2 & !K2_current_state_1 # !K2_current_state_3 & (!K2_current_state_1 # !K2_current_state_2)); --K2_timer_in_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_nx18 --operation mode is normal K2_timer_in_nx18 = K2_timer_in_state_0 # K2_timer_in_state_1 # !K2_timer_in_state_2; --K2_b_1_dup_61 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|b_1_dup_61 --operation mode is arithmetic K2_b_1_dup_61_carry_eqn = K2_timer_in_state_inc_206_nx14; K2_b_1_dup_61 = K2_timer_in_nx18 & (K2_timer_in_state_1 $ K2_b_1_dup_61_carry_eqn); --K2_timer_in_state_inc_206_nx18 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_state_inc_206_nx18 --operation mode is arithmetic K2_timer_in_state_inc_206_nx18 = CARRY(!K2_timer_in_state_inc_206_nx14 # !K2_timer_in_state_1); --K2_b_0 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|b_0 --operation mode is normal K2_b_0 = !K2_timer_in_state_0 & K2_timer_in_nx18; --K2_nx177 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx177 --operation mode is normal K2_nx177 = !K2_current_state_3 & (K2_current_state_1 # K2_current_state_0); --K2_nx178 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx178 --operation mode is normal K2_nx178 = !K2_current_state_1 & K2_current_state_0; --K2_nx171 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx171 --operation mode is normal K2_nx171 = !K2_current_state_2 & !K2_current_state_1 & !K2_current_state_0; --K2_nx172 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx172 --operation mode is normal K2_nx172 = K2_timer_in_state_2 # K2_timer_in_state_0; --K2_nx157 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx157 --operation mode is normal K2_nx157 = !K2_current_state_3 & (K2_current_state_1 & (!K2_timer_in_state_1) # !K2_current_state_1 & K2_current_state_2); --K2_nx168 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx168 --operation mode is normal K2_nx168 = !K2_current_state_3 & K2_current_state_2; --K2_nx187 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx187 --operation mode is normal K2_nx187 = K2_nx181 # scsn_slave_data_in_1 & !K2_nx175 & K2_nx178; --K2_nx194 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx194 --operation mode is normal K2_nx194 = L2_buffer_full & (K2_nx176 # K2_nx196) # !L2_buffer_full & K2_ds_err & (K2_nx176 # K2_nx196); --K2_data_out is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|data_out --operation mode is normal K2_data_out_lut_out = scsn_slave_data_in_1 # !K2_current_state_3 & !K2_current_state_2 & !K2_current_state_0; K2_data_out = DFFEAS(K2_data_out_lut_out, X1__clk0, VCC, , K2_destuff_in_nx90, , , , ); --K2_result_dec_242_nx14 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|result_dec_242_nx14 --operation mode is arithmetic K2_result_dec_242_nx14 = CARRY(K2_sync_counter_0); --K2_nx200 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|nx200 --operation mode is normal K2_nx200 = K2_destuff_in_counter_2 & K2_destuff_in_counter_1 & K2_destuff_in_counter_0; --L2_b_crc_11 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_11 --operation mode is normal L2_b_crc_11_lut_out = K2_buffer_flush_n & L2_b_crc_10; L2_b_crc_11 = DFFEAS(L2_b_crc_11_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_10 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_10 --operation mode is normal L2_b_crc_10_lut_out = K2_buffer_flush_n & L2_b_crc_9; L2_b_crc_10 = DFFEAS(L2_b_crc_10_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_9 --operation mode is normal L2_b_crc_9_lut_out = K2_buffer_flush_n & L2_b_crc_8; L2_b_crc_9 = DFFEAS(L2_b_crc_9_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_8 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_8 --operation mode is normal L2_b_crc_8_lut_out = K2_buffer_flush_n & L2_b_crc_7; L2_b_crc_8 = DFFEAS(L2_b_crc_8_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_15 --operation mode is normal L2_b_crc_15_lut_out = L2_b_crc_15 $ L2_b_crc_14; L2_b_crc_15 = DFFEAS(L2_b_crc_15_lut_out, X1__clk0, VCC, , L2_nx1520, , , !K2_buffer_flush_n, ); --L2_b_crc_14 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_14 --operation mode is normal L2_b_crc_14_lut_out = K2_buffer_flush_n & L2_b_crc_13; L2_b_crc_14 = DFFEAS(L2_b_crc_14_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_13 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_13 --operation mode is normal L2_b_crc_13_lut_out = K2_buffer_flush_n & L2_b_crc_12; L2_b_crc_13 = DFFEAS(L2_b_crc_13_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_12 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_12 --operation mode is normal L2_b_crc_12_lut_out = K2_buffer_flush_n & L2_b_crc_11; L2_b_crc_12 = DFFEAS(L2_b_crc_12_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_1 --operation mode is normal L2_b_crc_1_lut_out = K2_buffer_flush_n & L2_b_crc_0; L2_b_crc_1 = DFFEAS(L2_b_crc_1_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_0 --operation mode is normal L2_b_crc_0_lut_out = K2_data_out $ L2_b_crc_15; L2_b_crc_0 = DFFEAS(L2_b_crc_0_lut_out, X1__clk0, VCC, , L2_nx1520, , , !K2_buffer_flush_n, ); --L2_nx279 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx279 --operation mode is normal L2_nx279 = !L2_b_crc_7 & !L2_b_crc_6 & !L2_b_crc_5 & !L2_b_crc_4; --L2_nx284 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx284 --operation mode is normal L2_nx284 = !L2_b_crc_3 & !L2_b_crc_2; --L2_data_out_59 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_59 --operation mode is normal L2_data_out_59_lut_out = L2_data_out_58; L2_data_out_59 = DFFEAS(L2_data_out_59_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_result_inc_424_nx24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|result_inc_424_nx24 --operation mode is arithmetic Y2_result_inc_424_nx24 = CARRY(L2_data_out_60); --N1_nx818 is mcm_nw_nwl:scsn_slave_nw_nwl|nx818 --operation mode is normal N1_nx818 = N1_bridge_buffered $ !N1_bridge; --L2_data_out_55 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_55 --operation mode is normal L2_data_out_55_lut_out = L2_data_out_54; L2_data_out_55 = DFFEAS(L2_data_out_55_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_58 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_58 --operation mode is normal L2_data_out_58_lut_out = L2_data_out_57; L2_data_out_58 = DFFEAS(L2_data_out_58_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_57 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_57 --operation mode is normal L2_data_out_57_lut_out = L2_data_out_56; L2_data_out_57 = DFFEAS(L2_data_out_57_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_56 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_56 --operation mode is normal L2_data_out_56_lut_out = L2_data_out_55; L2_data_out_56 = DFFEAS(L2_data_out_56_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_b_dirty is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|b_dirty --operation mode is normal Y2_b_dirty_lut_out = !L2_data_valid & !scsn_slave_d1_err & !Y2_b_dirty; Y2_b_dirty = DFFEAS(Y2_b_dirty_lut_out, X1__clk0, VCC, , Y2_nx354, , , , ); --L2_data_out_62 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_62 --operation mode is normal L2_data_out_62_lut_out = L2_data_out_61; L2_data_out_62 = DFFEAS(L2_data_out_62_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_66 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_66 --operation mode is normal L2_data_out_66_lut_out = L2_data_out_65; L2_data_out_66 = DFFEAS(L2_data_out_66_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_65 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_65 --operation mode is normal L2_data_out_65_lut_out = L2_data_out_64; L2_data_out_65 = DFFEAS(L2_data_out_65_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_61 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_61 --operation mode is normal L2_data_out_61_lut_out = L2_data_out_60; L2_data_out_61 = DFFEAS(L2_data_out_61_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --Y2_nx158 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx158 --operation mode is normal Y2_nx158 = !L2_data_out_62 # !L2_data_out_63 # !L2_data_out_64 # !L2_data_out_65; --L2_data_out_64 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_64 --operation mode is normal L2_data_out_64_lut_out = L2_data_out_63; L2_data_out_64 = DFFEAS(L2_data_out_64_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L2_data_out_63 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_63 --operation mode is normal L2_data_out_63_lut_out = L2_data_out_62; L2_data_out_63 = DFFEAS(L2_data_out_63_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_ni_ir_modgen_eq_826_nx32 is general_config_notri:nic_notri|ni_ir_modgen_eq_826_nx32 --operation mode is normal G1_ni_ir_modgen_eq_826_nx32 = G1_nx441 # G1_nx442 # !G1_ni_ir_cnt_rst_8; --scsn_slave_nw_dll_ob0_ob_data_64 is scsn_slave_nw_dll_ob0_ob_data_64 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_64_lut_out = scsn_slave_nw_dll_ob0_ob_data_63; scsn_slave_nw_dll_ob0_ob_data_64 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_64_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_64, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_65 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_65 --operation mode is normal Y1_d_to_dll_65 = L1_data_out_65 & (Y1_nx151 # Y1_forward_buffer_57 & Y1_nx154) # !L1_data_out_65 & Y1_forward_buffer_57 & (Y1_nx154); --L1_data_out_66 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_66 --operation mode is normal L1_data_out_66_lut_out = L1_data_out_65; L1_data_out_66 = DFFEAS(L1_data_out_66_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_59 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_59 --operation mode is normal L1_data_out_59_lut_out = L1_data_out_58; L1_data_out_59 = DFFEAS(L1_data_out_59_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_result_inc_424_nx24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|result_inc_424_nx24 --operation mode is arithmetic Y1_result_inc_424_nx24 = CARRY(L1_data_out_60); --J1_altered_frame is mcm_nw_apl:scsn_slave_nw_apl|altered_frame --operation mode is normal J1_altered_frame = !J1_current_state_0 & (J1_current_state_3 & !J1_current_state_2 & !J1_current_state_1 # !J1_current_state_3 & (J1_current_state_2 $ J1_current_state_1)); --scsn_slave_nw_dll_ob0_ob_crc_11 is scsn_slave_nw_dll_ob0_ob_crc_11 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_11_lut_out = scsn_slave_nw_dll_ob0_ob_crc_10; scsn_slave_nw_dll_ob0_ob_crc_11 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_11_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_64, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_64 is scsn_slave_nw_dll_ob1_ob_data_64 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_64_lut_out = scsn_slave_nw_dll_ob1_ob_data_63; scsn_slave_nw_dll_ob1_ob_data_64 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_64_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_64, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_65 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_65 --operation mode is normal Y2_d_to_dll_65 = L2_data_out_65 & (Y2_nx151 # Y2_forward_buffer_57 & Y2_nx154) # !L2_data_out_65 & Y2_forward_buffer_57 & (Y2_nx154); --scsn_slave_nw_dll_ob1_ob_crc_11 is scsn_slave_nw_dll_ob1_ob_crc_11 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_11_lut_out = scsn_slave_nw_dll_ob1_ob_crc_10; scsn_slave_nw_dll_ob1_ob_crc_11 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_11_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_64, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_cnt_rst_1 is general_config_notri:nic_notri|dut_ir_cnt_rst_1 --operation mode is arithmetic G1_dut_ir_cnt_rst_1_carry_eqn = G1_dut_ir_cnt_rst_nx10; G1_dut_ir_cnt_rst_1_lut_out = G1_dut_ir_cnt_rst_1 $ (G1_dut_ir_cnt_rst_1_carry_eqn); G1_dut_ir_cnt_rst_1 = DFFEAS(G1_dut_ir_cnt_rst_1_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx16 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx16 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx16 = CARRY(!G1_dut_ir_cnt_rst_nx10 # !G1_dut_ir_cnt_rst_1); --D1_cfr_0 is jtag_master_1_notri:jtag_dut_notri|cfr_0 --operation mode is normal D1_cfr_0_lut_out = N1_request_31; D1_cfr_0 = DFFEAS(D1_cfr_0_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --T1_nx1147 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx1147 --operation mode is normal T1_nx1147 = T1_nx1136 # T1_nx1156 # !T1_NOT_c_cnt_3 # !T1_NOT_c_cnt_4; --T1_nx475 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|nx475 --operation mode is arithmetic T1_nx475_carry_eqn = T1_result_dec_1003_nx18; T1_nx475 = T1_NOT_c_cnt_1 $ (T1_nx475_carry_eqn); --T1_result_dec_1003_nx22 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_dec_1003_nx22 --operation mode is arithmetic T1_result_dec_1003_nx22 = CARRY(T1_NOT_c_cnt_1 & (!T1_result_dec_1003_nx18)); --T1_result_inc_994_nx14 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_inc_994_nx14 --operation mode is arithmetic T1_result_inc_994_nx14 = CARRY(!T1_nx9); --D1_jtgsnd_ser_t_70 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_70 --operation mode is normal D1_jtgsnd_ser_t_70_lut_out = D1_jtgsnd_ser_t_69; D1_jtgsnd_ser_t_70 = DFFEAS(D1_jtgsnd_ser_t_70_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_5, , , D1_jtgsnd_we_g_1); --N1_request_2 is mcm_nw_nwl:scsn_slave_nw_nwl|request_2 --operation mode is normal N1_request_2 = N1_select_rq & (L2_data_out_2) # !N1_select_rq & L1_data_out_2; --D1_nx252 is jtag_master_1_notri:jtag_dut_notri|nx252 --operation mode is normal D1_nx252 = !N1_request_48 & N1_request_47; --L1_data_out_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_2 --operation mode is normal L1_data_out_2_lut_out = L1_data_out_1; L1_data_out_2 = DFFEAS(L1_data_out_2_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_2 --operation mode is normal L2_data_out_2_lut_out = L2_data_out_1; L2_data_out_2 = DFFEAS(L2_data_out_2_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --D1_jtgsnd_NOT_protect is jtag_master_1_notri:jtag_dut_notri|jtgsnd_NOT_protect --operation mode is normal D1_jtgsnd_NOT_protect = J1_rd_wr_oase # D1_nx540 # D1_nx244 # !C1_ce_dut_jtg; --D1_jtgsnd_enable_shift is jtag_master_1_notri:jtag_dut_notri|jtgsnd_enable_shift --operation mode is normal D1_jtgsnd_enable_shift = DFFEAS(D1_jtgsnd_NOT_protect, X1__clk0, VCC, , D1_jtgsnd_nx938, , , , ); --T1_s_reg_5 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_5 --operation mode is normal T1_s_reg_5_lut_out = T1_s_reg_6; T1_s_reg_5 = DFFEAS(T1_s_reg_5_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_26, , , D1_we_tms); --E1_cfr_0 is jtag_master_2_notri:jtag_ni_dn_notri|cfr_0 --operation mode is normal E1_cfr_0_lut_out = N1_request_31; E1_cfr_0 = DFFEAS(E1_cfr_0_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --T2_nx1147 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx1147 --operation mode is normal T2_nx1147 = T2_nx1136 # T2_nx1156 # !T2_NOT_c_cnt_3 # !T2_NOT_c_cnt_4; --T2_nx475 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|nx475 --operation mode is arithmetic T2_nx475_carry_eqn = T2_result_dec_1003_nx18; T2_nx475 = T2_NOT_c_cnt_1 $ (T2_nx475_carry_eqn); --T2_result_dec_1003_nx22 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_dec_1003_nx22 --operation mode is arithmetic T2_result_dec_1003_nx22 = CARRY(T2_NOT_c_cnt_1 & (!T2_result_dec_1003_nx18)); --T2_result_inc_994_nx14 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_inc_994_nx14 --operation mode is arithmetic T2_result_inc_994_nx14 = CARRY(!T2_nx9); --E2_cfr_0 is jtag_master_2_notri:jtag_ni_up_notri|cfr_0 --operation mode is normal E2_cfr_0_lut_out = N1_request_31; E2_cfr_0 = DFFEAS(E2_cfr_0_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --T3_nx1147 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx1147 --operation mode is normal T3_nx1147 = T3_nx1136 # T3_nx1156 # !T3_NOT_c_cnt_3 # !T3_NOT_c_cnt_4; --T3_nx475 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|nx475 --operation mode is arithmetic T3_nx475_carry_eqn = T3_result_dec_1003_nx18; T3_nx475 = T3_NOT_c_cnt_1 $ (T3_nx475_carry_eqn); --T3_result_dec_1003_nx22 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_dec_1003_nx22 --operation mode is arithmetic T3_result_dec_1003_nx22 = CARRY(T3_NOT_c_cnt_1 & (!T3_result_dec_1003_nx18)); --T3_result_inc_994_nx14 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_inc_994_nx14 --operation mode is arithmetic T3_result_inc_994_nx14 = CARRY(!T3_nx9); --E1_nx240 is jtag_master_2_notri:jtag_ni_dn_notri|nx240 --operation mode is normal E1_nx240 = !J1_rd_wr_oase & (!N1_request_43 & !N1_request_42 # !N1_request_41); --E1_nx244 is jtag_master_2_notri:jtag_ni_dn_notri|nx244 --operation mode is normal E1_nx244 = N1_request_48 & N1_request_47; --E1_jtgsnd_ser_t_70 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_70 --operation mode is normal E1_jtgsnd_ser_t_70_lut_out = E1_jtgsnd_ser_t_69; E1_jtgsnd_ser_t_70 = DFFEAS(E1_jtgsnd_ser_t_70_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_5, , , E1_jtgsnd_we_g_1); --E1_nx248 is jtag_master_2_notri:jtag_ni_dn_notri|nx248 --operation mode is normal E1_nx248 = !N1_request_48 & N1_request_47; --E1_jtgsnd_NOT_protect is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_NOT_protect --operation mode is normal E1_jtgsnd_NOT_protect = J1_rd_wr_oase # E1_nx540 # E1_nx244 # !C1_ce_ni_jtg_dn; --E1_jtgsnd_enable_shift is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_enable_shift --operation mode is normal E1_jtgsnd_enable_shift = DFFEAS(E1_jtgsnd_NOT_protect, X1__clk0, VCC, , E1_jtgsnd_nx958, , , , ); --E2_nx240 is jtag_master_2_notri:jtag_ni_up_notri|nx240 --operation mode is normal E2_nx240 = !J1_rd_wr_oase & (!N1_request_43 & !N1_request_42 # !N1_request_41); --E2_nx244 is jtag_master_2_notri:jtag_ni_up_notri|nx244 --operation mode is normal E2_nx244 = N1_request_48 & N1_request_47; --E2_jtgsnd_ser_t_70 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_70 --operation mode is normal E2_jtgsnd_ser_t_70_lut_out = E2_jtgsnd_ser_t_69; E2_jtgsnd_ser_t_70 = DFFEAS(E2_jtgsnd_ser_t_70_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_5, , , E2_jtgsnd_we_g_1); --E2_nx248 is jtag_master_2_notri:jtag_ni_up_notri|nx248 --operation mode is normal E2_nx248 = !N1_request_48 & N1_request_47; --E2_jtgsnd_NOT_protect is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_NOT_protect --operation mode is normal E2_jtgsnd_NOT_protect = J1_rd_wr_oase # E2_nx540 # E2_nx244 # !C1_ce_ni_jtg_up; --E2_jtgsnd_enable_shift is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_enable_shift --operation mode is normal E2_jtgsnd_enable_shift = DFFEAS(E2_jtgsnd_NOT_protect, X1__clk0, VCC, , E2_jtgsnd_nx958, , , , ); --T2_s_reg_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_5 --operation mode is normal T2_s_reg_5_lut_out = T2_s_reg_6; T2_s_reg_5 = DFFEAS(T2_s_reg_5_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_26, , , E1_we_tms); --T3_s_reg_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_5 --operation mode is normal T3_s_reg_5_lut_out = T3_s_reg_6; T3_s_reg_5 = DFFEAS(T3_s_reg_5_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_26, , , E2_we_tms); --L1_data_out_13 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_13 --operation mode is normal L1_data_out_13_lut_out = L1_data_out_12; L1_data_out_13 = DFFEAS(L1_data_out_13_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_13 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_13 --operation mode is normal L2_data_out_13_lut_out = L2_data_out_12; L2_data_out_13 = DFFEAS(L2_data_out_13_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_b_crc_11 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_11 --operation mode is normal L1_b_crc_11_lut_out = K1_buffer_flush_n & L1_b_crc_10; L1_b_crc_11 = DFFEAS(L1_b_crc_11_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_10 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_10 --operation mode is normal L1_b_crc_10_lut_out = K1_buffer_flush_n & L1_b_crc_9; L1_b_crc_10 = DFFEAS(L1_b_crc_10_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_9 --operation mode is normal L1_b_crc_9_lut_out = K1_buffer_flush_n & L1_b_crc_8; L1_b_crc_9 = DFFEAS(L1_b_crc_9_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_8 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_8 --operation mode is normal L1_b_crc_8_lut_out = K1_buffer_flush_n & L1_b_crc_7; L1_b_crc_8 = DFFEAS(L1_b_crc_8_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_15 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_15 --operation mode is normal L1_b_crc_15_lut_out = L1_b_crc_15 $ L1_b_crc_14; L1_b_crc_15 = DFFEAS(L1_b_crc_15_lut_out, X1__clk0, VCC, , L1_nx1520, , , !K1_buffer_flush_n, ); --L1_b_crc_14 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_14 --operation mode is normal L1_b_crc_14_lut_out = K1_buffer_flush_n & L1_b_crc_13; L1_b_crc_14 = DFFEAS(L1_b_crc_14_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_13 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_13 --operation mode is normal L1_b_crc_13_lut_out = K1_buffer_flush_n & L1_b_crc_12; L1_b_crc_13 = DFFEAS(L1_b_crc_13_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_12 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_12 --operation mode is normal L1_b_crc_12_lut_out = K1_buffer_flush_n & L1_b_crc_11; L1_b_crc_12 = DFFEAS(L1_b_crc_12_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_1 --operation mode is normal L1_b_crc_1_lut_out = K1_buffer_flush_n & L1_b_crc_0; L1_b_crc_1 = DFFEAS(L1_b_crc_1_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_0 --operation mode is normal L1_b_crc_0_lut_out = K1_data_out $ L1_b_crc_15; L1_b_crc_0 = DFFEAS(L1_b_crc_0_lut_out, X1__clk0, VCC, , L1_nx1520, , , !K1_buffer_flush_n, ); --L1_nx279 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx279 --operation mode is normal L1_nx279 = !L1_b_crc_7 & !L1_b_crc_6 & !L1_b_crc_5 & !L1_b_crc_4; --L1_nx284 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx284 --operation mode is normal L1_nx284 = !L1_b_crc_3 & !L1_b_crc_2; --L1_data_out_55 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_55 --operation mode is normal L1_data_out_55_lut_out = L1_data_out_54; L1_data_out_55 = DFFEAS(L1_data_out_55_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_58 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_58 --operation mode is normal L1_data_out_58_lut_out = L1_data_out_57; L1_data_out_58 = DFFEAS(L1_data_out_58_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_57 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_57 --operation mode is normal L1_data_out_57_lut_out = L1_data_out_56; L1_data_out_57 = DFFEAS(L1_data_out_57_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_56 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_56 --operation mode is normal L1_data_out_56_lut_out = L1_data_out_55; L1_data_out_56 = DFFEAS(L1_data_out_56_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_b_dirty is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|b_dirty --operation mode is normal Y1_b_dirty_lut_out = !L1_data_valid & !scsn_slave_d0_err & !Y1_b_dirty; Y1_b_dirty = DFFEAS(Y1_b_dirty_lut_out, X1__clk0, VCC, , Y1_nx354, , , , ); --L1_data_out_62 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_62 --operation mode is normal L1_data_out_62_lut_out = L1_data_out_61; L1_data_out_62 = DFFEAS(L1_data_out_62_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_65 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_65 --operation mode is normal L1_data_out_65_lut_out = L1_data_out_64; L1_data_out_65 = DFFEAS(L1_data_out_65_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_61 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_61 --operation mode is normal L1_data_out_61_lut_out = L1_data_out_60; L1_data_out_61 = DFFEAS(L1_data_out_61_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --Y1_nx158 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx158 --operation mode is normal Y1_nx158 = !L1_data_out_62 # !L1_data_out_63 # !L1_data_out_64 # !L1_data_out_65; --L1_data_out_64 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_64 --operation mode is normal L1_data_out_64_lut_out = L1_data_out_63; L1_data_out_64 = DFFEAS(L1_data_out_64_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L1_data_out_63 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_63 --operation mode is normal L1_data_out_63_lut_out = L1_data_out_62; L1_data_out_63 = DFFEAS(L1_data_out_63_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --F1_oa_ctrl_s is ni2dpm_12:ni_ni_neg|oa_ctrl_s --operation mode is normal F1_oa_ctrl_s_lut_out = DUT_OA_CTR; F1_oa_ctrl_s = DFFEAS(F1_oa_ctrl_s_lut_out, !GLOBAL(DUT_P4_STR), VCC, , , , , , ); --F1_we_p is ni2dpm_12:ni_ni_neg|we_p --operation mode is normal F1_we_p_lut_out = !F1_NOT_we_p_r & (F1_nx364 # F1_nx365 # F1_nx366); F1_we_p = DFFEAS(F1_we_p_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ix69_ix22_nx12 is general_config_notri:nic_notri|ix69_ix22_nx12 --operation mode is normal G1_ix69_ix22_nx12 = N1_request_44 # N1_request_43 # N1_request_42 # !N1_request_41; --F1_ex_p_q1pass_1 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_1 --operation mode is normal F1_ex_p_q1pass_1 = G1_ni_sel_s_1 & (F1_data_1p_m_1) # !G1_ni_sel_s_1 & (F1_nx371 & (F1_data_1p_m_1) # !F1_nx371 & F1_data_1p_m_2); --F1_ex_p_q1pass_0 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_0 --operation mode is normal F1_ex_p_q1pass_0 = F1_ex_p_modgen_gt_597_nx56 & (G1_ni_or_mask_0 # F1_nx369) # !F1_ex_p_modgen_gt_597_nx56 & (F1_data_1p_m_1); --F1_ex_p_modgen_gt_612_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_612_nx56 --operation mode is normal F1_ex_p_modgen_gt_612_nx56 = G1_ni_sel_p_2 # G1_ni_sel_p_1 # !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --G1_se0_cnt_0 is general_config_notri:nic_notri|se0_cnt_0 --operation mode is arithmetic G1_se0_cnt_0_lut_out = G1_se0_cnt_0 $ G1_NOT_nx2121; G1_se0_cnt_0 = DFFEAS(G1_se0_cnt_0_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx9 is general_config_notri:nic_notri|se0_cnt_nx9 --operation mode is arithmetic G1_se0_cnt_nx9 = CARRY(G1_se0_cnt_0 & G1_NOT_nx2121); --G1_nx506 is general_config_notri:nic_notri|nx506 --operation mode is normal G1_nx506 = N1_request_44 & !N1_request_41; --G1_nx507 is general_config_notri:nic_notri|nx507 --operation mode is normal G1_nx507 = N1_request_43 & !N1_request_42; --G1_nx508 is general_config_notri:nic_notri|nx508 --operation mode is normal G1_nx508 = !N1_request_43 & (N1_request_42 & G1_ni_or_mask_0 # !N1_request_42 & (G1_ni_sel_s_0)); --G1_nx509 is general_config_notri:nic_notri|nx509 --operation mode is normal G1_nx509 = !N1_request_42 & G1_nx511 & (N1_request_41 # G1_sw_sel_0); --B1_strb_dout_0 is clkpre_counter:cp|strb_dout_0 --operation mode is arithmetic B1_strb_dout_0_lut_out = B1_strb_dout_0 $ B1_ccnt_count_en_s; B1_strb_dout_0 = DFFEAS(B1_strb_dout_0_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx10 is clkpre_counter:cp|ccnt_cnt_s_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx10 = CARRY(B1_strb_dout_0 & B1_ccnt_count_en_s); --B1_nx803 is clkpre_counter:cp|nx803 --operation mode is normal B1_nx803 = !N1_request_45 & N1_request_46 & N1_request_47 & !N1_request_48; --B1_nx804 is clkpre_counter:cp|nx804 --operation mode is normal B1_nx804 = !N1_request_45 & N1_request_46 & !N1_request_47 & N1_request_48; --B1_dout1pcnt_0 is clkpre_counter:cp|dout1pcnt_0 --operation mode is arithmetic B1_dout1pcnt_0_lut_out = B1_dout1pcnt_0 $ P2_UNKNOWN; B1_dout1pcnt_0 = DFFEAS(B1_dout1pcnt_0_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_0_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_0_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_0_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_0 & P2_UNKNOWN); --B1_dout3pcnt_0 is clkpre_counter:cp|dout3pcnt_0 --operation mode is arithmetic B1_dout3pcnt_0_lut_out = B1_dout3pcnt_0 $ P4_UNKNOWN; B1_dout3pcnt_0 = DFFEAS(B1_dout3pcnt_0_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_0_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_0_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_0_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_0 & P4_UNKNOWN); --B1_nx795 is clkpre_counter:cp|nx795 --operation mode is normal B1_nx795 = !N1_request_45 & !N1_request_46 & !N1_request_47 & N1_request_48; --B1_nx796 is clkpre_counter:cp|nx796 --operation mode is normal B1_nx796 = !N1_request_45 & !N1_request_46 & N1_request_47 & N1_request_48; --B1_dout_ccnt_0 is clkpre_counter:cp|dout_ccnt_0 --operation mode is arithmetic B1_dout_ccnt_0_lut_out = B1_dout_ccnt_0 $ B1_ccnt_count_en_0; B1_dout_ccnt_0 = DFFEAS(B1_dout_ccnt_0_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx10 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx10 = CARRY(B1_dout_ccnt_0 & B1_ccnt_count_en_0); --B1_nx787 is clkpre_counter:cp|nx787 --operation mode is normal B1_nx787 = B1_L0time_0 & (B1_nx801 # B1_L2time_0 & B1_nx802) # !B1_L0time_0 & B1_L2time_0 & (B1_nx802); --B1_nx788 is clkpre_counter:cp|nx788 --operation mode is normal B1_nx788 = B1_L1time_0 & (B1_nx799 # B1_c_time_0 & B1_nx800) # !B1_L1time_0 & B1_c_time_0 & (B1_nx800); --B1_nx794 is clkpre_counter:cp|nx794 --operation mode is normal B1_nx794 = !N1_request_45 & N1_request_46 & !N1_request_47 & !N1_request_48; --B1_dout0pcnt_0 is clkpre_counter:cp|dout0pcnt_0 --operation mode is arithmetic B1_dout0pcnt_0_lut_out = B1_dout0pcnt_0 $ P1_UNKNOWN; B1_dout0pcnt_0 = DFFEAS(B1_dout0pcnt_0_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_0_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_0_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_0_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_0 & P1_UNKNOWN); --B1_dout2pcnt_0 is clkpre_counter:cp|dout2pcnt_0 --operation mode is arithmetic B1_dout2pcnt_0_lut_out = B1_dout2pcnt_0 $ P3_UNKNOWN; B1_dout2pcnt_0 = DFFEAS(B1_dout2pcnt_0_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_0_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_0_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_0_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_0 & P3_UNKNOWN); --B1_nx797 is clkpre_counter:cp|nx797 --operation mode is normal B1_nx797 = !N1_request_45 & !N1_request_46 & N1_request_47 & !N1_request_48; --B1_nx798 is clkpre_counter:cp|nx798 --operation mode is normal B1_nx798 = !N1_request_45 & !N1_request_46 & !N1_request_47 & !N1_request_48; --S3_nx280 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx280 --operation mode is normal S3_nx280 = N1_request_48 # N1_request_46 & S3_SER0_DIN # !N1_request_46 & (S3_NI_P0_D_0); --S3_nx281 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx281 --operation mode is normal S3_nx281 = S3_NI_P2_D_0 # !N1_request_48; --S3_nx282 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx282 --operation mode is normal S3_nx282 = N1_request_48 & (S3_seribf_i_0) # !N1_request_48 & S3_NI_P4_D_0 # !N1_request_47; --T3_busy is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|busy --operation mode is normal T3_busy = T3_tms_sm_1 # T3_tms_sm_0; --S2_nx280 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx280 --operation mode is normal S2_nx280 = N1_request_48 # N1_request_46 & S2_SER0_DIN # !N1_request_46 & (S2_NI_P0_D_0); --S2_nx281 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx281 --operation mode is normal S2_nx281 = S2_NI_P2_D_0 # !N1_request_48; --S2_nx282 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx282 --operation mode is normal S2_nx282 = N1_request_48 & (S2_seribf_i_0) # !N1_request_48 & S2_NI_P4_D_0 # !N1_request_47; --T2_busy is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|busy --operation mode is normal T2_busy = T2_tms_sm_1 # T2_tms_sm_0; --S1_nx280 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx280 --operation mode is normal S1_nx280 = N1_request_48 # N1_request_46 & S1_SER0_DIN # !N1_request_46 & (S1_NI_P0_D_0); --S1_nx281 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx281 --operation mode is normal S1_nx281 = S1_NI_P2_D_0 # !N1_request_48; --S1_nx282 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx282 --operation mode is normal S1_nx282 = N1_request_48 & (S1_seribf_i_0) # !N1_request_48 & S1_NI_P4_D_0 # !N1_request_47; --T1_busy is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|busy --operation mode is normal T1_busy = T1_tms_sm_1 # T1_tms_sm_0; --K1_timer_in_state_inc_206_nx14 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt0|timer_in_state_inc_206_nx14 --operation mode is arithmetic K1_timer_in_state_inc_206_nx14 = CARRY(K1_timer_in_state_0); --nx1582 is nx1582 --operation mode is normal nx1582 = DUT_SER1_IN & (G1_sw_sel_2 & !G1_sw_sel_1 & !G1_sw_sel_0 # !G1_sw_sel_2 & G1_sw_sel_1 & G1_sw_sel_0); --nx1593 is nx1593 --operation mode is normal nx1593 = G1_sw_sel_1 # !G1_sw_sel_2; --K2_timer_in_state_inc_206_nx14 is mcm_nw_bittiming_4_2_7_7_2:scsn_slave_nw_dll_bt1|timer_in_state_inc_206_nx14 --operation mode is arithmetic K2_timer_in_state_inc_206_nx14 = CARRY(K2_timer_in_state_0); --L2_nx1520 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|nx1520 --operation mode is normal L2_nx1520 = K2_strobe_out & !L2_buffer_full # !K2_buffer_flush_n; --L2_b_crc_7 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_7 --operation mode is normal L2_b_crc_7_lut_out = K2_buffer_flush_n & L2_b_crc_6; L2_b_crc_7 = DFFEAS(L2_b_crc_7_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_6 --operation mode is normal L2_b_crc_6_lut_out = K2_buffer_flush_n & L2_b_crc_5; L2_b_crc_6 = DFFEAS(L2_b_crc_6_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_5 --operation mode is normal L2_b_crc_5_lut_out = K2_buffer_flush_n & L2_b_crc_4; L2_b_crc_5 = DFFEAS(L2_b_crc_5_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_4 --operation mode is normal L2_b_crc_4_lut_out = K2_buffer_flush_n & L2_b_crc_3; L2_b_crc_4 = DFFEAS(L2_b_crc_4_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_3 --operation mode is normal L2_b_crc_3_lut_out = K2_buffer_flush_n & L2_b_crc_2; L2_b_crc_3 = DFFEAS(L2_b_crc_3_lut_out, X1__clk0, VCC, , L2_nx1520, , , , ); --L2_b_crc_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|b_crc_2 --operation mode is normal L2_b_crc_2_lut_out = L2_b_crc_15 $ L2_b_crc_1; L2_b_crc_2 = DFFEAS(L2_b_crc_2_lut_out, X1__clk0, VCC, , L2_nx1520, , , !K2_buffer_flush_n, ); --Y2_nx354 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx354 --operation mode is normal Y2_nx354 = Y2_b_dirty & Y2_nx147 & (L2_data_valid # scsn_slave_d1_err) # !Y2_b_dirty & !L2_data_valid & !scsn_slave_d1_err; --G1_ni_ir_cnt_rst_8 is general_config_notri:nic_notri|ni_ir_cnt_rst_8 --operation mode is normal G1_ni_ir_cnt_rst_8_carry_eqn = G1_ni_ir_cnt_rst_nx50; G1_ni_ir_cnt_rst_8_lut_out = G1_ni_ir_cnt_rst_8 $ (!G1_ni_ir_cnt_rst_8_carry_eqn); G1_ni_ir_cnt_rst_8 = DFFEAS(G1_ni_ir_cnt_rst_8_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx618, ); --G1_nx441 is general_config_notri:nic_notri|nx441 --operation mode is normal G1_nx441 = !G1_ni_ir_cnt_rst_3 # !G1_ni_ir_cnt_rst_4 # !G1_ni_ir_cnt_rst_5 # !G1_ni_ir_cnt_rst_6; --G1_nx442 is general_config_notri:nic_notri|nx442 --operation mode is normal G1_nx442 = !G1_ni_rst_n # !G1_ni_ir_cnt_rst_0 # !G1_ni_ir_cnt_rst_1 # !G1_ni_ir_cnt_rst_2; --scsn_slave_nw_dll_ob0_ob_data_63 is scsn_slave_nw_dll_ob0_ob_data_63 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_63_lut_out = scsn_slave_nw_dll_ob0_ob_data_62; scsn_slave_nw_dll_ob0_ob_data_63 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_63_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_63, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_64 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_64 --operation mode is normal Y1_d_to_dll_64 = L1_data_out_64 & (Y1_nx151 # Y1_forward_buffer_56 & Y1_nx154) # !L1_data_out_64 & Y1_forward_buffer_56 & (Y1_nx154); --scsn_slave_nw_dll_ob0_ob_crc_10 is scsn_slave_nw_dll_ob0_ob_crc_10 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_10_lut_out = scsn_slave_nw_dll_ob0_ob_crc_9; scsn_slave_nw_dll_ob0_ob_crc_10 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_10_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_63, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_63 is scsn_slave_nw_dll_ob1_ob_data_63 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_63_lut_out = scsn_slave_nw_dll_ob1_ob_data_62; scsn_slave_nw_dll_ob1_ob_data_63 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_63_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_63, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_64 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_64 --operation mode is normal Y2_d_to_dll_64 = L2_data_out_64 & (Y2_nx151 # Y2_forward_buffer_56 & Y2_nx154) # !L2_data_out_64 & Y2_forward_buffer_56 & (Y2_nx154); --scsn_slave_nw_dll_ob1_ob_crc_10 is scsn_slave_nw_dll_ob1_ob_crc_10 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_10_lut_out = scsn_slave_nw_dll_ob1_ob_crc_9; scsn_slave_nw_dll_ob1_ob_crc_10 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_10_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_63, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_cnt_rst_0 is general_config_notri:nic_notri|dut_ir_cnt_rst_0 --operation mode is arithmetic G1_dut_ir_cnt_rst_0_lut_out = G1_dut_ir_cnt_rst_0 $ G1_dut_ir_modgen_eq_826_nx32; G1_dut_ir_cnt_rst_0 = DFFEAS(G1_dut_ir_cnt_rst_0_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_dut_ir_cnt_rst_nx10 is general_config_notri:nic_notri|dut_ir_cnt_rst_nx10 --operation mode is arithmetic G1_dut_ir_cnt_rst_nx10 = CARRY(G1_dut_ir_cnt_rst_0 & G1_dut_ir_modgen_eq_826_nx32); --T1_result_dec_1003_nx18 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|result_dec_1003_nx18 --operation mode is arithmetic T1_result_dec_1003_nx18 = CARRY(!T1_NOT_c_cnt_0); --D1_jtgsnd_ser_t_69 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_69 --operation mode is normal D1_jtgsnd_ser_t_69_lut_out = D1_jtgsnd_ser_t_68; D1_jtgsnd_ser_t_69 = DFFEAS(D1_jtgsnd_ser_t_69_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_21, , , D1_jtgsnd_we_g_2); --N1_request_5 is mcm_nw_nwl:scsn_slave_nw_nwl|request_5 --operation mode is normal N1_request_5 = N1_select_rq & (L2_data_out_5) # !N1_select_rq & L1_data_out_5; --L1_data_out_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_1 --operation mode is normal L1_data_out_1_lut_out = L1_data_out_0; L1_data_out_1 = DFFEAS(L1_data_out_1_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_1 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_1 --operation mode is normal L2_data_out_1_lut_out = L2_data_out_0; L2_data_out_1 = DFFEAS(L2_data_out_1_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --D1_jtgsnd_nx938 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_nx938 --operation mode is normal D1_jtgsnd_nx938 = T1_tck_ena & D1_shift_trap # !D1_jtgsnd_NOT_protect; --T1_s_reg_6 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_6 --operation mode is normal T1_s_reg_6_lut_out = T1_s_reg_7; T1_s_reg_6 = DFFEAS(T1_s_reg_6_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_25, , , D1_we_tms); --T2_result_dec_1003_nx18 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|result_dec_1003_nx18 --operation mode is arithmetic T2_result_dec_1003_nx18 = CARRY(!T2_NOT_c_cnt_0); --T3_result_dec_1003_nx18 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|result_dec_1003_nx18 --operation mode is arithmetic T3_result_dec_1003_nx18 = CARRY(!T3_NOT_c_cnt_0); --E1_jtgsnd_ser_t_69 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_69 --operation mode is normal E1_jtgsnd_ser_t_69_lut_out = E1_jtgsnd_ser_t_68; E1_jtgsnd_ser_t_69 = DFFEAS(E1_jtgsnd_ser_t_69_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_21, , , E1_jtgsnd_we_g_2); --E1_jtgsnd_nx958 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_nx958 --operation mode is normal E1_jtgsnd_nx958 = T2_tck_ena & E1_shift_trap # !E1_jtgsnd_NOT_protect; --E2_jtgsnd_ser_t_69 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_69 --operation mode is normal E2_jtgsnd_ser_t_69_lut_out = E2_jtgsnd_ser_t_68; E2_jtgsnd_ser_t_69 = DFFEAS(E2_jtgsnd_ser_t_69_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_21, , , E2_jtgsnd_we_g_2); --E2_jtgsnd_nx958 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_nx958 --operation mode is normal E2_jtgsnd_nx958 = T3_tck_ena & E2_shift_trap # !E2_jtgsnd_NOT_protect; --T2_s_reg_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_6 --operation mode is normal T2_s_reg_6_lut_out = T2_s_reg_7; T2_s_reg_6 = DFFEAS(T2_s_reg_6_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_25, , , E1_we_tms); --T3_s_reg_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_6 --operation mode is normal T3_s_reg_6_lut_out = T3_s_reg_7; T3_s_reg_6 = DFFEAS(T3_s_reg_6_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_25, , , E2_we_tms); --L1_data_out_12 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_12 --operation mode is normal L1_data_out_12_lut_out = L1_data_out_11; L1_data_out_12 = DFFEAS(L1_data_out_12_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_12 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_12 --operation mode is normal L2_data_out_12_lut_out = L2_data_out_11; L2_data_out_12 = DFFEAS(L2_data_out_12_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_nx1520 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|nx1520 --operation mode is normal L1_nx1520 = K1_strobe_out & !L1_buffer_full # !K1_buffer_flush_n; --L1_b_crc_7 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_7 --operation mode is normal L1_b_crc_7_lut_out = K1_buffer_flush_n & L1_b_crc_6; L1_b_crc_7 = DFFEAS(L1_b_crc_7_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_6 --operation mode is normal L1_b_crc_6_lut_out = K1_buffer_flush_n & L1_b_crc_5; L1_b_crc_6 = DFFEAS(L1_b_crc_6_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_5 --operation mode is normal L1_b_crc_5_lut_out = K1_buffer_flush_n & L1_b_crc_4; L1_b_crc_5 = DFFEAS(L1_b_crc_5_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_4 --operation mode is normal L1_b_crc_4_lut_out = K1_buffer_flush_n & L1_b_crc_3; L1_b_crc_4 = DFFEAS(L1_b_crc_4_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_3 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_3 --operation mode is normal L1_b_crc_3_lut_out = K1_buffer_flush_n & L1_b_crc_2; L1_b_crc_3 = DFFEAS(L1_b_crc_3_lut_out, X1__clk0, VCC, , L1_nx1520, , , , ); --L1_b_crc_2 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|b_crc_2 --operation mode is normal L1_b_crc_2_lut_out = L1_b_crc_15 $ L1_b_crc_1; L1_b_crc_2 = DFFEAS(L1_b_crc_2_lut_out, X1__clk0, VCC, , L1_nx1520, , , !K1_buffer_flush_n, ); --Y1_nx354 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx354 --operation mode is normal Y1_nx354 = Y1_b_dirty & Y1_nx147 & (L1_data_valid # scsn_slave_d0_err) # !Y1_b_dirty & !L1_data_valid & !scsn_slave_d0_err; --F1_NOT_we_p_r is ni2dpm_12:ni_ni_neg|NOT_we_p_r --operation mode is normal F1_NOT_we_p_r_lut_out = VCC; F1_NOT_we_p_r = DFFEAS(F1_NOT_we_p_r_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , F1_NOT_modgen_eq_588_nx44, , , , ); --F1_nx364 is ni2dpm_12:ni_ni_neg|nx364 --operation mode is normal F1_nx364 = F1_naddr_11 # !F1_naddr_8 # !F1_naddr_9 # !F1_naddr_10; --F1_nx365 is ni2dpm_12:ni_ni_neg|nx365 --operation mode is normal F1_nx365 = !F1_naddr_4 # !F1_naddr_5 # !F1_naddr_6 # !F1_naddr_7; --F1_nx366 is ni2dpm_12:ni_ni_neg|nx366 --operation mode is normal F1_nx366 = !F1_naddr_0 # !F1_naddr_1 # !F1_naddr_2 # !F1_naddr_3; --G1_ni_sel_s_1 is general_config_notri:nic_notri|ni_sel_s_1 --operation mode is normal G1_ni_sel_s_1_lut_out = N1_request_30; G1_ni_sel_s_1 = DFFEAS(G1_ni_sel_s_1_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --F1_data_1p_m_2 is ni2dpm_12:ni_ni_neg|data_1p_m_2 --operation mode is normal F1_data_1p_m_2 = G1_ni_or_mask_2 # !G1_NOT_ni_and_mask_2 & (G1_ni_xor_mask_2 $ F1_data_1p_2); --F1_data_1p_m_1 is ni2dpm_12:ni_ni_neg|data_1p_m_1 --operation mode is normal F1_data_1p_m_1 = G1_ni_or_mask_1 # !G1_NOT_ni_and_mask_1 & (G1_ni_xor_mask_1 $ F1_data_1p_1); --F1_nx371 is ni2dpm_12:ni_ni_neg|nx371 --operation mode is normal F1_nx371 = G1_ni_sel_s_2 # !G1_NOT_ni_sel_s_3; --G1_ni_or_mask_0 is general_config_notri:nic_notri|ni_or_mask_0 --operation mode is normal G1_ni_or_mask_0_lut_out = N1_request_31; G1_ni_or_mask_0 = DFFEAS(G1_ni_or_mask_0_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --F1_ex_p_modgen_gt_597_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_597_nx56 --operation mode is normal F1_ex_p_modgen_gt_597_nx56 = G1_ni_sel_s_2 # G1_ni_sel_s_1 # G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --F1_nx369 is ni2dpm_12:ni_ni_neg|nx369 --operation mode is normal F1_nx369 = !G1_NOT_ni_and_mask_0 & (G1_ni_xor_mask_0 $ F1_data_1p_0); --G1_NOT_nx2121 is general_config_notri:nic_notri|NOT_nx2121 --operation mode is normal G1_NOT_nx2121 = !DUT_SEBD_0 & !G1_modgen_eq_785_nx12 & (G1_nx433 # G1_nx434); --G1_ni_sel_s_0 is general_config_notri:nic_notri|ni_sel_s_0 --operation mode is normal G1_ni_sel_s_0_lut_out = N1_request_31; G1_ni_sel_s_0 = DFFEAS(G1_ni_sel_s_0_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --G1_nx511 is general_config_notri:nic_notri|nx511 --operation mode is normal G1_nx511 = N1_request_48 & F1_par_cnt_0 # !N1_request_48 & (F1_naddr_0) # !N1_request_41; --B1_ccnt_count_en_s is clkpre_counter:cp|ccnt_count_en_s --operation mode is normal B1_ccnt_count_en_s_lut_out = B1_ccnt_count_en_c; B1_ccnt_count_en_s = DFFEAS(B1_ccnt_count_en_s_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_NOT_ccnt_reset_cnt is clkpre_counter:cp|NOT_ccnt_reset_cnt --operation mode is normal B1_NOT_ccnt_reset_cnt_lut_out = B1_ccnt_sm_1 # B1_ccnt_sm_0 # !B1_ccnt_restart_s; B1_NOT_ccnt_reset_cnt = DFFEAS(B1_NOT_ccnt_reset_cnt_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_UNKNOWN is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|UNKNOWN --operation mode is normal P2_UNKNOWN_lut_out = P2_nx827 & (P2_nx829 & (P2_nx803) # !P2_nx829 & P2_nx802); P2_UNKNOWN = DFFEAS(P2_UNKNOWN_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_sreset_pcnt is clkpre_counter:cp|sreset_pcnt --operation mode is normal B1_sreset_pcnt = C1_ce_cp & !N1_request_45 & !N1_request_46 & !J1_rd_wr_oase; --P4_UNKNOWN is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|UNKNOWN --operation mode is normal P4_UNKNOWN_lut_out = P4_nx827 & (P4_nx829 & (P4_nx803) # !P4_nx829 & P4_nx802); P4_UNKNOWN = DFFEAS(P4_UNKNOWN_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_ccnt_count_en_0 is clkpre_counter:cp|ccnt_count_en_0 --operation mode is normal B1_ccnt_count_en_0_lut_out = B1_ccnt_count_en_c; B1_ccnt_count_en_0 = DFFEAS(B1_ccnt_count_en_0_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --P1_UNKNOWN is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|UNKNOWN --operation mode is normal P1_UNKNOWN_lut_out = P1_nx827 & (P1_nx829 & (P1_nx803) # !P1_nx829 & P1_nx802); P1_UNKNOWN = DFFEAS(P1_UNKNOWN_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_UNKNOWN is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|UNKNOWN --operation mode is normal P3_UNKNOWN_lut_out = P3_nx827 & (P3_nx829 & (P3_nx803) # !P3_nx829 & P3_nx802); P3_UNKNOWN = DFFEAS(P3_UNKNOWN_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --S3_SER0_DIN is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|SER0_DIN --operation mode is normal S3_SER0_DIN_lut_out = NI_TDO_up; S3_SER0_DIN = DFFEAS(S3_SER0_DIN_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P0_D_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_0 --operation mode is normal S3_NI_P0_D_0_lut_out = S3_NI_P2_CTRL; S3_NI_P0_D_0 = DFFEAS(S3_NI_P0_D_0_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_0 --operation mode is normal S3_NI_P2_D_0_lut_out = S3_NI_P2_D_1; S3_NI_P2_D_0 = DFFEAS(S3_NI_P2_D_0_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P4_D_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_0 --operation mode is normal S3_NI_P4_D_0_lut_out = S3_NI_P2_D_8; S3_NI_P4_D_0 = DFFEAS(S3_NI_P4_D_0_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_seribf_i_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|seribf_i_0 --operation mode is normal S3_seribf_i_0_lut_out = NI_TDO_up; S3_seribf_i_0 = DFFEAS(S3_seribf_i_0_lut_out, T3_TCK, VCC, , E2_shift_inst, , , , ); --S2_SER0_DIN is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|SER0_DIN --operation mode is normal S2_SER0_DIN_lut_out = NI_TDO_dn; S2_SER0_DIN = DFFEAS(S2_SER0_DIN_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P0_D_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_0 --operation mode is normal S2_NI_P0_D_0_lut_out = S2_NI_P2_CTRL; S2_NI_P0_D_0 = DFFEAS(S2_NI_P0_D_0_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_0 --operation mode is normal S2_NI_P2_D_0_lut_out = S2_NI_P2_D_1; S2_NI_P2_D_0 = DFFEAS(S2_NI_P2_D_0_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P4_D_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_0 --operation mode is normal S2_NI_P4_D_0_lut_out = S2_NI_P2_D_8; S2_NI_P4_D_0 = DFFEAS(S2_NI_P4_D_0_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_seribf_i_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|seribf_i_0 --operation mode is normal S2_seribf_i_0_lut_out = NI_TDO_dn; S2_seribf_i_0 = DFFEAS(S2_seribf_i_0_lut_out, T2_TCK, VCC, , E1_shift_inst, , , , ); --S1_SER0_DIN is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|SER0_DIN --operation mode is normal S1_SER0_DIN_lut_out = DUT_TDO; S1_SER0_DIN = DFFEAS(S1_SER0_DIN_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P0_D_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_0 --operation mode is normal S1_NI_P0_D_0_lut_out = S1_NI_P2_CTRL; S1_NI_P0_D_0 = DFFEAS(S1_NI_P0_D_0_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_0 --operation mode is normal S1_NI_P2_D_0_lut_out = S1_NI_P2_D_1; S1_NI_P2_D_0 = DFFEAS(S1_NI_P2_D_0_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P4_D_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_0 --operation mode is normal S1_NI_P4_D_0_lut_out = S1_NI_P2_D_8; S1_NI_P4_D_0 = DFFEAS(S1_NI_P4_D_0_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_seribf_i_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|seribf_i_0 --operation mode is normal S1_seribf_i_0_lut_out = DUT_TDO; S1_seribf_i_0 = DFFEAS(S1_seribf_i_0_lut_out, T1_TCK, VCC, , D1_shift_inst, , , , ); --scsn_slave_nw_dll_ob0_ob_data_62 is scsn_slave_nw_dll_ob0_ob_data_62 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_62_lut_out = scsn_slave_nw_dll_ob0_ob_data_61; scsn_slave_nw_dll_ob0_ob_data_62 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_62_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_62, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_63 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_63 --operation mode is normal Y1_d_to_dll_63 = L1_data_out_63 & (Y1_nx151 # Y1_forward_buffer_55 & Y1_nx154) # !L1_data_out_63 & Y1_forward_buffer_55 & (Y1_nx154); --scsn_slave_nw_dll_ob0_ob_crc_9 is scsn_slave_nw_dll_ob0_ob_crc_9 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_9_lut_out = scsn_slave_nw_dll_ob0_ob_crc_8; scsn_slave_nw_dll_ob0_ob_crc_9 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_9_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_62, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_62 is scsn_slave_nw_dll_ob1_ob_data_62 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_62_lut_out = scsn_slave_nw_dll_ob1_ob_data_61; scsn_slave_nw_dll_ob1_ob_data_62 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_62_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_62, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_63 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_63 --operation mode is normal Y2_d_to_dll_63 = L2_data_out_63 & (Y2_nx151 # Y2_forward_buffer_55 & Y2_nx154) # !L2_data_out_63 & Y2_forward_buffer_55 & (Y2_nx154); --scsn_slave_nw_dll_ob1_ob_crc_9 is scsn_slave_nw_dll_ob1_ob_crc_9 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_9_lut_out = scsn_slave_nw_dll_ob1_ob_crc_8; scsn_slave_nw_dll_ob1_ob_crc_9 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_9_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_62, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_modgen_eq_826_nx32 is general_config_notri:nic_notri|dut_ir_modgen_eq_826_nx32 --operation mode is normal G1_dut_ir_modgen_eq_826_nx32 = G1_nx439 # G1_nx440 # !G1_dut_ir_cnt_rst_8; --D1_jtgsnd_ser_t_68 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_68 --operation mode is normal D1_jtgsnd_ser_t_68_lut_out = D1_jtgsnd_ser_t_67; D1_jtgsnd_ser_t_68 = DFFEAS(D1_jtgsnd_ser_t_68_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_1, , , D1_jtgsnd_we_g_1); --L1_data_out_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_5 --operation mode is normal L1_data_out_5_lut_out = L1_data_out_4; L1_data_out_5 = DFFEAS(L1_data_out_5_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_5 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_5 --operation mode is normal L2_data_out_5_lut_out = L2_data_out_4; L2_data_out_5 = DFFEAS(L2_data_out_5_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --L1_data_out_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_0 --operation mode is normal L1_data_out_0_lut_out = K1_data_out; L1_data_out_0 = DFFEAS(L1_data_out_0_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_0 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_0 --operation mode is normal L2_data_out_0_lut_out = K2_data_out; L2_data_out_0 = DFFEAS(L2_data_out_0_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --T1_s_reg_7 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_7 --operation mode is normal T1_s_reg_7_lut_out = T1_s_reg_8; T1_s_reg_7 = DFFEAS(T1_s_reg_7_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_24, , , D1_we_tms); --E1_jtgsnd_ser_t_68 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_68 --operation mode is normal E1_jtgsnd_ser_t_68_lut_out = E1_jtgsnd_ser_t_67; E1_jtgsnd_ser_t_68 = DFFEAS(E1_jtgsnd_ser_t_68_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_1, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_68 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_68 --operation mode is normal E2_jtgsnd_ser_t_68_lut_out = E2_jtgsnd_ser_t_67; E2_jtgsnd_ser_t_68 = DFFEAS(E2_jtgsnd_ser_t_68_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_1, , , E2_jtgsnd_we_g_1); --T2_s_reg_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_7 --operation mode is normal T2_s_reg_7_lut_out = T2_s_reg_8; T2_s_reg_7 = DFFEAS(T2_s_reg_7_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_24, , , E1_we_tms); --T3_s_reg_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_7 --operation mode is normal T3_s_reg_7_lut_out = T3_s_reg_8; T3_s_reg_7 = DFFEAS(T3_s_reg_7_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_24, , , E2_we_tms); --L1_data_out_11 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_11 --operation mode is normal L1_data_out_11_lut_out = L1_data_out_10; L1_data_out_11 = DFFEAS(L1_data_out_11_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_11 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_11 --operation mode is normal L2_data_out_11_lut_out = L2_data_out_10; L2_data_out_11 = DFFEAS(L2_data_out_11_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --F1_NOT_modgen_eq_588_nx44 is ni2dpm_12:ni_ni_neg|NOT_modgen_eq_588_nx44 --operation mode is normal F1_NOT_modgen_eq_588_nx44 = !F1_nx364 & !F1_nx365 & !F1_nx366; --G1_ni_or_mask_2 is general_config_notri:nic_notri|ni_or_mask_2 --operation mode is normal G1_ni_or_mask_2_lut_out = N1_request_29; G1_ni_or_mask_2 = DFFEAS(G1_ni_or_mask_2_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_2 is general_config_notri:nic_notri|NOT_ni_and_mask_2 --operation mode is normal G1_NOT_ni_and_mask_2_lut_out = G1_NOT_ni_and_mask_2; G1_NOT_ni_and_mask_2 = DFFEAS(G1_NOT_ni_and_mask_2_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L731, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_2 is general_config_notri:nic_notri|ni_xor_mask_2 --operation mode is normal G1_ni_xor_mask_2_lut_out = G1_ni_xor_mask_2; G1_ni_xor_mask_2 = DFFEAS(G1_ni_xor_mask_2_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_9, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_2 is ni2dpm_12:ni_ni_neg|data_1p_2 --operation mode is normal F1_data_1p_2_lut_out = DUT_P4_D[2]; F1_data_1p_2 = DFFEAS(F1_data_1p_2_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_1 is general_config_notri:nic_notri|ni_or_mask_1 --operation mode is normal G1_ni_or_mask_1_lut_out = N1_request_30; G1_ni_or_mask_1 = DFFEAS(G1_ni_or_mask_1_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_1 is general_config_notri:nic_notri|NOT_ni_and_mask_1 --operation mode is normal G1_NOT_ni_and_mask_1_lut_out = G1_NOT_ni_and_mask_1; G1_NOT_ni_and_mask_1 = DFFEAS(G1_NOT_ni_and_mask_1_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L931, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_1 is general_config_notri:nic_notri|ni_xor_mask_1 --operation mode is normal G1_ni_xor_mask_1_lut_out = G1_ni_xor_mask_1; G1_ni_xor_mask_1 = DFFEAS(G1_ni_xor_mask_1_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_10, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_1 is ni2dpm_12:ni_ni_neg|data_1p_1 --operation mode is normal F1_data_1p_1_lut_out = DUT_P4_D[1]; F1_data_1p_1 = DFFEAS(F1_data_1p_1_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_NOT_ni_sel_s_3 is general_config_notri:nic_notri|NOT_ni_sel_s_3 --operation mode is normal G1_NOT_ni_sel_s_3_lut_out = !N1_request_28; G1_NOT_ni_sel_s_3 = DFFEAS(G1_NOT_ni_sel_s_3_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --G1_ni_sel_s_2 is general_config_notri:nic_notri|ni_sel_s_2 --operation mode is normal G1_ni_sel_s_2_lut_out = N1_request_29; G1_ni_sel_s_2 = DFFEAS(G1_ni_sel_s_2_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx466, , , , ); --G1_NOT_nx388 is general_config_notri:nic_notri|NOT_nx388 --operation mode is normal G1_NOT_nx388 = C1_ce_gen & !J1_rd_wr_oase & G1_NOT_ix69_ix30_nx10 & G1_nx510; --G1_NOT_ni_and_mask_0 is general_config_notri:nic_notri|NOT_ni_and_mask_0 --operation mode is normal G1_NOT_ni_and_mask_0_lut_out = G1_NOT_ni_and_mask_0; G1_NOT_ni_and_mask_0 = DFFEAS(G1_NOT_ni_and_mask_0_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L141, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_0 is general_config_notri:nic_notri|ni_xor_mask_0 --operation mode is normal G1_ni_xor_mask_0_lut_out = G1_ni_xor_mask_0; G1_ni_xor_mask_0 = DFFEAS(G1_ni_xor_mask_0_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_11, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_0 is ni2dpm_12:ni_ni_neg|data_1p_0 --operation mode is normal F1_data_1p_0_lut_out = DUT_P4_D[0]; F1_data_1p_0 = DFFEAS(F1_data_1p_0_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_modgen_eq_785_nx12 is general_config_notri:nic_notri|modgen_eq_785_nx12 --operation mode is normal G1_modgen_eq_785_nx12 = !G1_se_pre_cnt_3 # !G1_se_pre_cnt_2 # !G1_se_pre_cnt_1 # !G1_se_pre_cnt_0; --G1_nx433 is general_config_notri:nic_notri|nx433 --operation mode is normal G1_nx433 = !G1_se0_cnt_3 # !G1_se0_cnt_2 # !G1_se0_cnt_1 # !G1_se0_cnt_0; --G1_nx434 is general_config_notri:nic_notri|nx434 --operation mode is normal G1_nx434 = !G1_se0_cnt_7 # !G1_se0_cnt_6 # !G1_se0_cnt_5 # !G1_se0_cnt_4; --F1_par_cnt_0 is ni2dpm_12:ni_ni_neg|par_cnt_0 --operation mode is arithmetic F1_par_cnt_0_lut_out = F1_par_cnt_0 $ F1_par_en; F1_par_cnt_0 = DFFEAS(F1_par_cnt_0_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx10 is ni2dpm_12:ni_ni_neg|parc_Q_nx10 --operation mode is arithmetic F1_parc_Q_nx10 = CARRY(F1_par_cnt_0 & F1_par_en); --B1_ccnt_count_en_c is clkpre_counter:cp|ccnt_count_en_c --operation mode is normal B1_ccnt_count_en_c_lut_out = B1_ccnt_sm_1 & B1_ccnt_sm_0; B1_ccnt_count_en_c = DFFEAS(B1_ccnt_count_en_c_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_ccnt_restart_s is clkpre_counter:cp|ccnt_restart_s --operation mode is normal B1_ccnt_restart_s_lut_out = B1_ccnt_ce_s & (!B1_nx888 # !B1_nx887 # !C1_ce_cp); B1_ccnt_restart_s = DFFEAS(B1_ccnt_restart_s_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_ccnt_sm_1 is clkpre_counter:cp|ccnt_sm_1 --operation mode is normal B1_ccnt_sm_1_lut_out = B1_ccnt_sm_0 & (!B1_ccnt_sm_1 # !B1_ccnt_count_rdy); B1_ccnt_sm_1 = DFFEAS(B1_ccnt_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_ccnt_sm_0 is clkpre_counter:cp|ccnt_sm_0 --operation mode is normal B1_ccnt_sm_0_lut_out = B1_ccnt_sm_1 & (!B1_ccnt_count_rdy & B1_ccnt_sm_0) # !B1_ccnt_sm_1 & (B1_ccnt_restart_s # B1_ccnt_sm_0); B1_ccnt_sm_0 = DFFEAS(B1_ccnt_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_nx802 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx802 --operation mode is normal P2_nx802 = P2_rec_sm_3 & P2_rec_sm_0 & (P2_ptrf_1 # P2_ptrf_0); --P2_nx803 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx803 --operation mode is normal P2_nx803 = P2_ptrf_1 & P2_rec_sm_3 & (P2_nx817) # !P2_ptrf_1 & (P2_nx804); --P2_nx827 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx827 --operation mode is normal P2_nx827 = !P2_rec_sm_2 & !P2_rec_sm_1; --P2_nx829 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx829 --operation mode is normal P2_nx829 = !P2_counter_1 & !P2_counter_2; --P4_nx802 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx802 --operation mode is normal P4_nx802 = P4_rec_sm_3 & P4_rec_sm_0 & (P4_ptrf_1 # P4_ptrf_0); --P4_nx803 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx803 --operation mode is normal P4_nx803 = P4_ptrf_1 & P4_rec_sm_3 & (P4_nx817) # !P4_ptrf_1 & (P4_nx804); --P4_nx827 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx827 --operation mode is normal P4_nx827 = !P4_rec_sm_2 & !P4_rec_sm_1; --P4_nx829 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx829 --operation mode is normal P4_nx829 = !P4_counter_1 & !P4_counter_2; --P1_nx802 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx802 --operation mode is normal P1_nx802 = P1_rec_sm_3 & P1_rec_sm_0 & (P1_ptrf_1 # P1_ptrf_0); --P1_nx803 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx803 --operation mode is normal P1_nx803 = P1_ptrf_1 & P1_rec_sm_3 & (P1_nx817) # !P1_ptrf_1 & (P1_nx804); --P1_nx827 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx827 --operation mode is normal P1_nx827 = !P1_rec_sm_2 & !P1_rec_sm_1; --P1_nx829 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx829 --operation mode is normal P1_nx829 = !P1_counter_1 & !P1_counter_2; --P3_nx802 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx802 --operation mode is normal P3_nx802 = P3_rec_sm_3 & P3_rec_sm_0 & (P3_ptrf_1 # P3_ptrf_0); --P3_nx803 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx803 --operation mode is normal P3_nx803 = P3_ptrf_1 & P3_rec_sm_3 & (P3_nx817) # !P3_ptrf_1 & (P3_nx804); --P3_nx827 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx827 --operation mode is normal P3_nx827 = !P3_rec_sm_2 & !P3_rec_sm_1; --P3_nx829 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx829 --operation mode is normal P3_nx829 = !P3_counter_1 & !P3_counter_2; --S3_NI_P2_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_CTRL --operation mode is normal S3_NI_P2_CTRL_lut_out = S3_NI_P2_STRB; S3_NI_P2_CTRL = DFFEAS(S3_NI_P2_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_1 --operation mode is normal S3_NI_P2_D_1_lut_out = S3_NI_P4_D_3; S3_NI_P2_D_1 = DFFEAS(S3_NI_P2_D_1_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_8 --operation mode is normal S3_NI_P2_D_8_lut_out = S3_NI_P2_D_9; S3_NI_P2_D_8 = DFFEAS(S3_NI_P2_D_8_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P2_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_CTRL --operation mode is normal S2_NI_P2_CTRL_lut_out = S2_NI_P2_STRB; S2_NI_P2_CTRL = DFFEAS(S2_NI_P2_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_1 --operation mode is normal S2_NI_P2_D_1_lut_out = S2_NI_P4_D_3; S2_NI_P2_D_1 = DFFEAS(S2_NI_P2_D_1_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_8 --operation mode is normal S2_NI_P2_D_8_lut_out = S2_NI_P2_D_9; S2_NI_P2_D_8 = DFFEAS(S2_NI_P2_D_8_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P2_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_CTRL --operation mode is normal S1_NI_P2_CTRL_lut_out = S1_NI_P2_STRB; S1_NI_P2_CTRL = DFFEAS(S1_NI_P2_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_1 --operation mode is normal S1_NI_P2_D_1_lut_out = S1_NI_P4_D_3; S1_NI_P2_D_1 = DFFEAS(S1_NI_P2_D_1_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_8 --operation mode is normal S1_NI_P2_D_8_lut_out = S1_NI_P2_D_9; S1_NI_P2_D_8 = DFFEAS(S1_NI_P2_D_8_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_61 is scsn_slave_nw_dll_ob0_ob_data_61 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_61_lut_out = scsn_slave_nw_dll_ob0_ob_data_60; scsn_slave_nw_dll_ob0_ob_data_61 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_61_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_61, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_62 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_62 --operation mode is normal Y1_d_to_dll_62 = L1_data_out_62 & (Y1_nx151 # Y1_forward_buffer_54 & Y1_nx154) # !L1_data_out_62 & Y1_forward_buffer_54 & (Y1_nx154); --scsn_slave_nw_dll_ob0_ob_crc_8 is scsn_slave_nw_dll_ob0_ob_crc_8 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_8_lut_out = scsn_slave_nw_dll_ob0_ob_crc_7; scsn_slave_nw_dll_ob0_ob_crc_8 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_8_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_61, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_61 is scsn_slave_nw_dll_ob1_ob_data_61 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_61_lut_out = scsn_slave_nw_dll_ob1_ob_data_60; scsn_slave_nw_dll_ob1_ob_data_61 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_61_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_61, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_62 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_62 --operation mode is normal Y2_d_to_dll_62 = L2_data_out_62 & (Y2_nx151 # Y2_forward_buffer_54 & Y2_nx154) # !L2_data_out_62 & Y2_forward_buffer_54 & (Y2_nx154); --scsn_slave_nw_dll_ob1_ob_crc_8 is scsn_slave_nw_dll_ob1_ob_crc_8 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_8_lut_out = scsn_slave_nw_dll_ob1_ob_crc_7; scsn_slave_nw_dll_ob1_ob_crc_8 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_8_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_61, , , scsn_slave_nw_dll_ob1_a_2); --G1_dut_ir_cnt_rst_8 is general_config_notri:nic_notri|dut_ir_cnt_rst_8 --operation mode is normal G1_dut_ir_cnt_rst_8_carry_eqn = G1_dut_ir_cnt_rst_nx50; G1_dut_ir_cnt_rst_8_lut_out = G1_dut_ir_cnt_rst_8 $ (!G1_dut_ir_cnt_rst_8_carry_eqn); G1_dut_ir_cnt_rst_8 = DFFEAS(G1_dut_ir_cnt_rst_8_lut_out, X1__clk0, J1_chipRST_n, , , , , !G1_nx608, ); --G1_nx439 is general_config_notri:nic_notri|nx439 --operation mode is normal G1_nx439 = !G1_dut_ir_cnt_rst_3 # !G1_dut_ir_cnt_rst_4 # !G1_dut_ir_cnt_rst_5 # !G1_dut_ir_cnt_rst_6; --G1_nx440 is general_config_notri:nic_notri|nx440 --operation mode is normal G1_nx440 = !G1_dut_rst_n_i # !G1_dut_ir_cnt_rst_0 # !G1_dut_ir_cnt_rst_1 # !G1_dut_ir_cnt_rst_2; --D1_jtgsnd_ser_t_67 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_67 --operation mode is normal D1_jtgsnd_ser_t_67_lut_out = D1_jtgsnd_ser_t_66; D1_jtgsnd_ser_t_67 = DFFEAS(D1_jtgsnd_ser_t_67_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_6, , , D1_jtgsnd_we_g_1); --N1_request_1 is mcm_nw_nwl:scsn_slave_nw_nwl|request_1 --operation mode is normal N1_request_1 = N1_select_rq & (L2_data_out_1) # !N1_select_rq & L1_data_out_1; --L1_data_out_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_4 --operation mode is normal L1_data_out_4_lut_out = L1_data_out_3; L1_data_out_4 = DFFEAS(L1_data_out_4_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_4 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_4 --operation mode is normal L2_data_out_4_lut_out = L2_data_out_3; L2_data_out_4 = DFFEAS(L2_data_out_4_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --T1_s_reg_8 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_8 --operation mode is normal T1_s_reg_8_lut_out = T1_s_reg_9; T1_s_reg_8 = DFFEAS(T1_s_reg_8_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_23, , , D1_we_tms); --E1_jtgsnd_ser_t_67 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_67 --operation mode is normal E1_jtgsnd_ser_t_67_lut_out = E1_jtgsnd_ser_t_66; E1_jtgsnd_ser_t_67 = DFFEAS(E1_jtgsnd_ser_t_67_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_6, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_67 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_67 --operation mode is normal E2_jtgsnd_ser_t_67_lut_out = E2_jtgsnd_ser_t_66; E2_jtgsnd_ser_t_67 = DFFEAS(E2_jtgsnd_ser_t_67_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_6, , , E2_jtgsnd_we_g_1); --T2_s_reg_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_8 --operation mode is normal T2_s_reg_8_lut_out = T2_s_reg_9; T2_s_reg_8 = DFFEAS(T2_s_reg_8_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_23, , , E1_we_tms); --T3_s_reg_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_8 --operation mode is normal T3_s_reg_8_lut_out = T3_s_reg_9; T3_s_reg_8 = DFFEAS(T3_s_reg_8_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_23, , , E2_we_tms); --L1_data_out_10 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_10 --operation mode is normal L1_data_out_10_lut_out = L1_data_out_9; L1_data_out_10 = DFFEAS(L1_data_out_10_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_10 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_10 --operation mode is normal L2_data_out_10_lut_out = L2_data_out_9; L2_data_out_10 = DFFEAS(L2_data_out_10_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --G1_NOT_ix69_ix28_nx12 is general_config_notri:nic_notri|NOT_ix69_ix28_nx12 --operation mode is normal G1_NOT_ix69_ix28_nx12 = N1_request_44 & !N1_request_43 & N1_request_42 & !N1_request_41; --N1_request_9 is mcm_nw_nwl:scsn_slave_nw_nwl|request_9 --operation mode is normal N1_request_9 = N1_select_rq & (L2_data_out_9) # !N1_select_rq & L1_data_out_9; --N1_request_10 is mcm_nw_nwl:scsn_slave_nw_nwl|request_10 --operation mode is normal N1_request_10 = N1_select_rq & (L2_data_out_10) # !N1_select_rq & L1_data_out_10; --N1_request_11 is mcm_nw_nwl:scsn_slave_nw_nwl|request_11 --operation mode is normal N1_request_11 = N1_select_rq & (L2_data_out_11) # !N1_select_rq & L1_data_out_11; --G1_se_pre_cnt_0 is general_config_notri:nic_notri|se_pre_cnt_0 --operation mode is arithmetic G1_se_pre_cnt_0_lut_out = !G1_se_pre_cnt_0; G1_se_pre_cnt_0 = DFFEAS(G1_se_pre_cnt_0_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se_pre_cnt_nx5 is general_config_notri:nic_notri|se_pre_cnt_nx5 --operation mode is arithmetic G1_se_pre_cnt_nx5 = CARRY(G1_se_pre_cnt_0); --G1_se_pre_cnt_1 is general_config_notri:nic_notri|se_pre_cnt_1 --operation mode is arithmetic G1_se_pre_cnt_1_carry_eqn = G1_se_pre_cnt_nx5; G1_se_pre_cnt_1_lut_out = G1_se_pre_cnt_1 $ (G1_se_pre_cnt_1_carry_eqn); G1_se_pre_cnt_1 = DFFEAS(G1_se_pre_cnt_1_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se_pre_cnt_nx11 is general_config_notri:nic_notri|se_pre_cnt_nx11 --operation mode is arithmetic G1_se_pre_cnt_nx11 = CARRY(!G1_se_pre_cnt_nx5 # !G1_se_pre_cnt_1); --G1_se_pre_cnt_2 is general_config_notri:nic_notri|se_pre_cnt_2 --operation mode is arithmetic G1_se_pre_cnt_2_carry_eqn = G1_se_pre_cnt_nx11; G1_se_pre_cnt_2_lut_out = G1_se_pre_cnt_2 $ (!G1_se_pre_cnt_2_carry_eqn); G1_se_pre_cnt_2 = DFFEAS(G1_se_pre_cnt_2_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se_pre_cnt_nx16 is general_config_notri:nic_notri|se_pre_cnt_nx16 --operation mode is arithmetic G1_se_pre_cnt_nx16 = CARRY(G1_se_pre_cnt_2 & (!G1_se_pre_cnt_nx11)); --G1_se_pre_cnt_3 is general_config_notri:nic_notri|se_pre_cnt_3 --operation mode is normal G1_se_pre_cnt_3_carry_eqn = G1_se_pre_cnt_nx16; G1_se_pre_cnt_3_lut_out = G1_se_pre_cnt_3 $ (G1_se_pre_cnt_3_carry_eqn); G1_se_pre_cnt_3 = DFFEAS(G1_se_pre_cnt_3_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_1 is general_config_notri:nic_notri|se0_cnt_1 --operation mode is arithmetic G1_se0_cnt_1_carry_eqn = G1_se0_cnt_nx9; G1_se0_cnt_1_lut_out = G1_se0_cnt_1 $ (G1_se0_cnt_1_carry_eqn); G1_se0_cnt_1 = DFFEAS(G1_se0_cnt_1_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx15 is general_config_notri:nic_notri|se0_cnt_nx15 --operation mode is arithmetic G1_se0_cnt_nx15 = CARRY(!G1_se0_cnt_nx9 # !G1_se0_cnt_1); --G1_se0_cnt_2 is general_config_notri:nic_notri|se0_cnt_2 --operation mode is arithmetic G1_se0_cnt_2_carry_eqn = G1_se0_cnt_nx15; G1_se0_cnt_2_lut_out = G1_se0_cnt_2 $ (!G1_se0_cnt_2_carry_eqn); G1_se0_cnt_2 = DFFEAS(G1_se0_cnt_2_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx21 is general_config_notri:nic_notri|se0_cnt_nx21 --operation mode is arithmetic G1_se0_cnt_nx21 = CARRY(G1_se0_cnt_2 & (!G1_se0_cnt_nx15)); --G1_se0_cnt_3 is general_config_notri:nic_notri|se0_cnt_3 --operation mode is arithmetic G1_se0_cnt_3_carry_eqn = G1_se0_cnt_nx21; G1_se0_cnt_3_lut_out = G1_se0_cnt_3 $ (G1_se0_cnt_3_carry_eqn); G1_se0_cnt_3 = DFFEAS(G1_se0_cnt_3_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx27 is general_config_notri:nic_notri|se0_cnt_nx27 --operation mode is arithmetic G1_se0_cnt_nx27 = CARRY(!G1_se0_cnt_nx21 # !G1_se0_cnt_3); --G1_se0_cnt_4 is general_config_notri:nic_notri|se0_cnt_4 --operation mode is arithmetic G1_se0_cnt_4_carry_eqn = G1_se0_cnt_nx27; G1_se0_cnt_4_lut_out = G1_se0_cnt_4 $ (!G1_se0_cnt_4_carry_eqn); G1_se0_cnt_4 = DFFEAS(G1_se0_cnt_4_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx34 is general_config_notri:nic_notri|se0_cnt_nx34 --operation mode is arithmetic G1_se0_cnt_nx34 = CARRY(G1_se0_cnt_4 & (!G1_se0_cnt_nx27)); --G1_se0_cnt_5 is general_config_notri:nic_notri|se0_cnt_5 --operation mode is arithmetic G1_se0_cnt_5_carry_eqn = G1_se0_cnt_nx34; G1_se0_cnt_5_lut_out = G1_se0_cnt_5 $ (G1_se0_cnt_5_carry_eqn); G1_se0_cnt_5 = DFFEAS(G1_se0_cnt_5_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx38 is general_config_notri:nic_notri|se0_cnt_nx38 --operation mode is arithmetic G1_se0_cnt_nx38 = CARRY(!G1_se0_cnt_nx34 # !G1_se0_cnt_5); --G1_se0_cnt_6 is general_config_notri:nic_notri|se0_cnt_6 --operation mode is arithmetic G1_se0_cnt_6_carry_eqn = G1_se0_cnt_nx38; G1_se0_cnt_6_lut_out = G1_se0_cnt_6 $ (!G1_se0_cnt_6_carry_eqn); G1_se0_cnt_6 = DFFEAS(G1_se0_cnt_6_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se0_cnt_nx43 is general_config_notri:nic_notri|se0_cnt_nx43 --operation mode is arithmetic G1_se0_cnt_nx43 = CARRY(G1_se0_cnt_6 & (!G1_se0_cnt_nx38)); --G1_se0_cnt_7 is general_config_notri:nic_notri|se0_cnt_7 --operation mode is normal G1_se0_cnt_7_carry_eqn = G1_se0_cnt_nx43; G1_se0_cnt_7_lut_out = G1_se0_cnt_7 $ (G1_se0_cnt_7_carry_eqn); G1_se0_cnt_7 = DFFEAS(G1_se0_cnt_7_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --F1_par_en is ni2dpm_12:ni_ni_neg|par_en --operation mode is normal F1_par_en = F1_we_p & F1_nx152 & (!F1_oa_ctrl_s # !G1_ni_oase_mode); --B1_ccnt_ce_s is clkpre_counter:cp|ccnt_ce_s --operation mode is normal B1_ccnt_ce_s_lut_out = C1_ce_cp & !N1_request_45 & N1_request_46 & B1_nx888; B1_ccnt_ce_s = DFFEAS(B1_ccnt_ce_s_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --B1_nx887 is clkpre_counter:cp|nx887 --operation mode is normal B1_nx887 = !N1_request_45 & N1_request_46; --B1_nx888 is clkpre_counter:cp|nx888 --operation mode is normal B1_nx888 = !N1_request_47 & !N1_request_48; --B1_ccnt_count_rdy is clkpre_counter:cp|ccnt_count_rdy --operation mode is normal B1_ccnt_count_rdy_lut_out = B1_ccnt_qc_1 & B1_ccnt_qc_0 & B1_nx847 & B1_nx848; B1_ccnt_count_rdy = DFFEAS(B1_ccnt_count_rdy_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_rec_sm_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|rec_sm_3 --operation mode is normal P2_rec_sm_3_lut_out = P2_nx808 # P2_nx809 # P2_nx810 # P2_nx811; P2_rec_sm_3 = DFFEAS(P2_rec_sm_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_rec_sm_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|rec_sm_0 --operation mode is normal P2_rec_sm_0_lut_out = P2_nx830 & (P2_rec_sm_2 # P2_rec_sm_1 # P2_nx812); P2_rec_sm_0 = DFFEAS(P2_rec_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_ptrf_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|ptrf_1 --operation mode is normal P2_ptrf_1_lut_out = P2_ptrf_0; P2_ptrf_1 = DFFEAS(P2_ptrf_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_ptrf_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|ptrf_0 --operation mode is normal P2_ptrf_0_lut_out = DUT_PRE[1]; P2_ptrf_0 = DFFEAS(P2_ptrf_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_nx804 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx804 --operation mode is normal P2_nx804 = P2_rec_sm_3 & P2_ptrf_0 & (P2_nx817) # !P2_rec_sm_3 & (P2_nx805); --P2_nx817 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx817 --operation mode is normal P2_nx817 = P2_rec_sm_0 # P2_counter_0 & P2_counter_3; --P2_rec_sm_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|rec_sm_2 --operation mode is normal P2_rec_sm_2_lut_out = !P2_rec_sm_1 & (P2_rec_sm_2 & P2_rec_sm_0 # !P2_rec_sm_2 & (P2_nx814)); P2_rec_sm_2 = DFFEAS(P2_rec_sm_2_lut_out, X1__clk0, J1_chipRST_n, , P2_nx823, , , , ); --P2_rec_sm_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|rec_sm_1 --operation mode is normal P2_rec_sm_1_lut_out = P2_nx820 # P2_nx827 & (P2_nx821 # P2_nx822); P2_rec_sm_1 = DFFEAS(P2_rec_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P2_counter_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_1 --operation mode is normal P2_counter_1_lut_out = P2_nx116 & (P2_rec_sm_2 # P2_nx824 # P2_nx826); P2_counter_1 = DFFEAS(P2_counter_1_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx249, , , , ); --P2_counter_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_2 --operation mode is normal P2_counter_2_lut_out = P2_nx115 & (P2_rec_sm_2 # P2_nx824 # P2_nx826); P2_counter_2 = DFFEAS(P2_counter_2_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx249, , , , ); --P4_rec_sm_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|rec_sm_3 --operation mode is normal P4_rec_sm_3_lut_out = P4_nx808 # P4_nx809 # P4_nx810 # P4_nx811; P4_rec_sm_3 = DFFEAS(P4_rec_sm_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_rec_sm_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|rec_sm_0 --operation mode is normal P4_rec_sm_0_lut_out = P4_nx830 & (P4_rec_sm_2 # P4_rec_sm_1 # P4_nx812); P4_rec_sm_0 = DFFEAS(P4_rec_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_ptrf_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|ptrf_1 --operation mode is normal P4_ptrf_1_lut_out = P4_ptrf_0; P4_ptrf_1 = DFFEAS(P4_ptrf_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_ptrf_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|ptrf_0 --operation mode is normal P4_ptrf_0_lut_out = DUT_PRE[3]; P4_ptrf_0 = DFFEAS(P4_ptrf_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_nx804 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx804 --operation mode is normal P4_nx804 = P4_rec_sm_3 & P4_ptrf_0 & (P4_nx817) # !P4_rec_sm_3 & (P4_nx805); --P4_nx817 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx817 --operation mode is normal P4_nx817 = P4_rec_sm_0 # P4_counter_0 & P4_counter_3; --P4_rec_sm_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|rec_sm_2 --operation mode is normal P4_rec_sm_2_lut_out = !P4_rec_sm_1 & (P4_rec_sm_2 & P4_rec_sm_0 # !P4_rec_sm_2 & (P4_nx814)); P4_rec_sm_2 = DFFEAS(P4_rec_sm_2_lut_out, X1__clk0, J1_chipRST_n, , P4_nx823, , , , ); --P4_rec_sm_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|rec_sm_1 --operation mode is normal P4_rec_sm_1_lut_out = P4_nx820 # P4_nx827 & (P4_nx821 # P4_nx822); P4_rec_sm_1 = DFFEAS(P4_rec_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_counter_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_1 --operation mode is normal P4_counter_1_lut_out = P4_nx116 & (P4_rec_sm_2 # P4_nx824 # P4_nx826); P4_counter_1 = DFFEAS(P4_counter_1_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx249, , , , ); --P4_counter_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_2 --operation mode is normal P4_counter_2_lut_out = P4_nx115 & (P4_rec_sm_2 # P4_nx824 # P4_nx826); P4_counter_2 = DFFEAS(P4_counter_2_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx249, , , , ); --P1_rec_sm_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|rec_sm_3 --operation mode is normal P1_rec_sm_3_lut_out = P1_nx808 # P1_nx809 # P1_nx810 # P1_nx811; P1_rec_sm_3 = DFFEAS(P1_rec_sm_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_rec_sm_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|rec_sm_0 --operation mode is normal P1_rec_sm_0_lut_out = P1_nx830 & (P1_rec_sm_2 # P1_rec_sm_1 # P1_nx812); P1_rec_sm_0 = DFFEAS(P1_rec_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_ptrf_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|ptrf_1 --operation mode is normal P1_ptrf_1_lut_out = P1_ptrf_0; P1_ptrf_1 = DFFEAS(P1_ptrf_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_ptrf_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|ptrf_0 --operation mode is normal P1_ptrf_0_lut_out = DUT_PRE[0]; P1_ptrf_0 = DFFEAS(P1_ptrf_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_nx804 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx804 --operation mode is normal P1_nx804 = P1_rec_sm_3 & P1_ptrf_0 & (P1_nx817) # !P1_rec_sm_3 & (P1_nx805); --P1_nx817 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx817 --operation mode is normal P1_nx817 = P1_rec_sm_0 # P1_counter_0 & P1_counter_3; --P1_rec_sm_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|rec_sm_2 --operation mode is normal P1_rec_sm_2_lut_out = !P1_rec_sm_1 & (P1_rec_sm_2 & P1_rec_sm_0 # !P1_rec_sm_2 & (P1_nx814)); P1_rec_sm_2 = DFFEAS(P1_rec_sm_2_lut_out, X1__clk0, J1_chipRST_n, , P1_nx823, , , , ); --P1_rec_sm_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|rec_sm_1 --operation mode is normal P1_rec_sm_1_lut_out = P1_nx820 # P1_nx827 & (P1_nx821 # P1_nx822); P1_rec_sm_1 = DFFEAS(P1_rec_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_counter_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_1 --operation mode is normal P1_counter_1_lut_out = P1_nx116 & (P1_rec_sm_2 # P1_nx824 # P1_nx826); P1_counter_1 = DFFEAS(P1_counter_1_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx249, , , , ); --P1_counter_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_2 --operation mode is normal P1_counter_2_lut_out = P1_nx115 & (P1_rec_sm_2 # P1_nx824 # P1_nx826); P1_counter_2 = DFFEAS(P1_counter_2_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx249, , , , ); --P3_rec_sm_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|rec_sm_3 --operation mode is normal P3_rec_sm_3_lut_out = P3_nx808 # P3_nx809 # P3_nx810 # P3_nx811; P3_rec_sm_3 = DFFEAS(P3_rec_sm_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_rec_sm_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|rec_sm_0 --operation mode is normal P3_rec_sm_0_lut_out = P3_nx830 & (P3_rec_sm_2 # P3_rec_sm_1 # P3_nx812); P3_rec_sm_0 = DFFEAS(P3_rec_sm_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_ptrf_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|ptrf_1 --operation mode is normal P3_ptrf_1_lut_out = P3_ptrf_0; P3_ptrf_1 = DFFEAS(P3_ptrf_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_ptrf_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|ptrf_0 --operation mode is normal P3_ptrf_0_lut_out = DUT_PRE[2]; P3_ptrf_0 = DFFEAS(P3_ptrf_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_nx804 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx804 --operation mode is normal P3_nx804 = P3_rec_sm_3 & P3_ptrf_0 & (P3_nx817) # !P3_rec_sm_3 & (P3_nx805); --P3_nx817 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx817 --operation mode is normal P3_nx817 = P3_rec_sm_0 # P3_counter_0 & P3_counter_3; --P3_rec_sm_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|rec_sm_2 --operation mode is normal P3_rec_sm_2_lut_out = !P3_rec_sm_1 & (P3_rec_sm_2 & P3_rec_sm_0 # !P3_rec_sm_2 & (P3_nx814)); P3_rec_sm_2 = DFFEAS(P3_rec_sm_2_lut_out, X1__clk0, J1_chipRST_n, , P3_nx823, , , , ); --P3_rec_sm_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|rec_sm_1 --operation mode is normal P3_rec_sm_1_lut_out = P3_nx820 # P3_nx827 & (P3_nx821 # P3_nx822); P3_rec_sm_1 = DFFEAS(P3_rec_sm_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_counter_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_1 --operation mode is normal P3_counter_1_lut_out = P3_nx116 & (P3_rec_sm_2 # P3_nx824 # P3_nx826); P3_counter_1 = DFFEAS(P3_counter_1_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx249, , , , ); --P3_counter_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_2 --operation mode is normal P3_counter_2_lut_out = P3_nx115 & (P3_rec_sm_2 # P3_nx824 # P3_nx826); P3_counter_2 = DFFEAS(P3_counter_2_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx249, , , , ); --S3_NI_P2_STRB is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_STRB --operation mode is normal S3_NI_P2_STRB_lut_out = S3_NI_P0_D_1; S3_NI_P2_STRB = DFFEAS(S3_NI_P2_STRB_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P4_D_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_3 --operation mode is normal S3_NI_P4_D_3_lut_out = S3_NI_P2_D_2; S3_NI_P4_D_3 = DFFEAS(S3_NI_P4_D_3_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_9 --operation mode is normal S3_NI_P2_D_9_lut_out = S3_NI_P0_D_0; S3_NI_P2_D_9 = DFFEAS(S3_NI_P2_D_9_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P2_STRB is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_STRB --operation mode is normal S2_NI_P2_STRB_lut_out = S2_NI_P0_D_1; S2_NI_P2_STRB = DFFEAS(S2_NI_P2_STRB_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P4_D_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_3 --operation mode is normal S2_NI_P4_D_3_lut_out = S2_NI_P2_D_2; S2_NI_P4_D_3 = DFFEAS(S2_NI_P4_D_3_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_9 --operation mode is normal S2_NI_P2_D_9_lut_out = S2_NI_P0_D_0; S2_NI_P2_D_9 = DFFEAS(S2_NI_P2_D_9_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P2_STRB is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_STRB --operation mode is normal S1_NI_P2_STRB_lut_out = S1_NI_P0_D_1; S1_NI_P2_STRB = DFFEAS(S1_NI_P2_STRB_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P4_D_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_3 --operation mode is normal S1_NI_P4_D_3_lut_out = S1_NI_P2_D_2; S1_NI_P4_D_3 = DFFEAS(S1_NI_P4_D_3_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_9 --operation mode is normal S1_NI_P2_D_9_lut_out = S1_NI_P0_D_0; S1_NI_P2_D_9 = DFFEAS(S1_NI_P2_D_9_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_60 is scsn_slave_nw_dll_ob0_ob_data_60 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_60_lut_out = scsn_slave_nw_dll_ob0_ob_data_59; scsn_slave_nw_dll_ob0_ob_data_60 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_60_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_60, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_61 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_61 --operation mode is normal Y1_d_to_dll_61 = Y1_nx159 # L1_data_out_61 & !Y1_current_state_2 & Y1_current_state_0; --scsn_slave_nw_dll_ob0_ob_crc_7 is scsn_slave_nw_dll_ob0_ob_crc_7 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_7_lut_out = scsn_slave_nw_dll_ob0_ob_crc_6; scsn_slave_nw_dll_ob0_ob_crc_7 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_7_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_60, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_60 is scsn_slave_nw_dll_ob1_ob_data_60 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_60_lut_out = scsn_slave_nw_dll_ob1_ob_data_59; scsn_slave_nw_dll_ob1_ob_data_60 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_60_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_60, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_61 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_61 --operation mode is normal Y2_d_to_dll_61 = Y2_nx159 # L2_data_out_61 & !Y2_current_state_2 & Y2_current_state_0; --scsn_slave_nw_dll_ob1_ob_crc_7 is scsn_slave_nw_dll_ob1_ob_crc_7 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_7_lut_out = scsn_slave_nw_dll_ob1_ob_crc_6; scsn_slave_nw_dll_ob1_ob_crc_7 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_7_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_60, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_66 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_66 --operation mode is normal D1_jtgsnd_ser_t_66_lut_out = D1_jtgsnd_ser_t_65; D1_jtgsnd_ser_t_66 = DFFEAS(D1_jtgsnd_ser_t_66_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_17, , , D1_jtgsnd_we_g_2); --N1_request_6 is mcm_nw_nwl:scsn_slave_nw_nwl|request_6 --operation mode is normal N1_request_6 = N1_select_rq & (L2_data_out_6) # !N1_select_rq & L1_data_out_6; --T1_s_reg_9 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_9 --operation mode is normal T1_s_reg_9_lut_out = T1_s_reg_10; T1_s_reg_9 = DFFEAS(T1_s_reg_9_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_22, , , D1_we_tms); --E1_jtgsnd_ser_t_66 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_66 --operation mode is normal E1_jtgsnd_ser_t_66_lut_out = E1_jtgsnd_ser_t_65; E1_jtgsnd_ser_t_66 = DFFEAS(E1_jtgsnd_ser_t_66_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_17, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_66 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_66 --operation mode is normal E2_jtgsnd_ser_t_66_lut_out = E2_jtgsnd_ser_t_65; E2_jtgsnd_ser_t_66 = DFFEAS(E2_jtgsnd_ser_t_66_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_17, , , E2_jtgsnd_we_g_2); --T2_s_reg_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_9 --operation mode is normal T2_s_reg_9_lut_out = T2_s_reg_10; T2_s_reg_9 = DFFEAS(T2_s_reg_9_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_22, , , E1_we_tms); --T3_s_reg_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_9 --operation mode is normal T3_s_reg_9_lut_out = T3_s_reg_10; T3_s_reg_9 = DFFEAS(T3_s_reg_9_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_22, , , E2_we_tms); --L1_data_out_9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_9 --operation mode is normal L1_data_out_9_lut_out = L1_data_out_8; L1_data_out_9 = DFFEAS(L1_data_out_9_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_9 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_9 --operation mode is normal L2_data_out_9_lut_out = L2_data_out_8; L2_data_out_9 = DFFEAS(L2_data_out_9_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --F1_nx152 is ni2dpm_12:ni_ni_neg|nx152 --operation mode is normal F1_nx152 = F1_modgen_xor_1057_nx14 $ F1_modgen_xor_1057_nx18 $ F1_data_2p_7 $ F1_prty_bit; --B1_ccnt_qc_1 is clkpre_counter:cp|ccnt_qc_1 --operation mode is arithmetic B1_ccnt_qc_1_carry_eqn = B1_ccnt_cnt_c_Q_nx10; B1_ccnt_qc_1_lut_out = B1_ccnt_qc_1 $ (B1_ccnt_qc_1_carry_eqn); B1_ccnt_qc_1 = DFFEAS(B1_ccnt_qc_1_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx16 is clkpre_counter:cp|ccnt_cnt_c_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx16 = CARRY(!B1_ccnt_cnt_c_Q_nx10 # !B1_ccnt_qc_1); --B1_ccnt_qc_0 is clkpre_counter:cp|ccnt_qc_0 --operation mode is arithmetic B1_ccnt_qc_0_lut_out = B1_ccnt_qc_0 $ B1_ccnt_count_en_c; B1_ccnt_qc_0 = DFFEAS(B1_ccnt_qc_0_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx10 is clkpre_counter:cp|ccnt_cnt_c_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx10 = CARRY(B1_ccnt_qc_0 & B1_ccnt_count_en_c); --B1_nx847 is clkpre_counter:cp|nx847 --operation mode is normal B1_nx847 = B1_ccnt_qc_7 & B1_ccnt_qc_6 & !B1_ccnt_qc_5 & !B1_ccnt_qc_4; --B1_nx848 is clkpre_counter:cp|nx848 --operation mode is normal B1_nx848 = !B1_ccnt_qc_3 & B1_ccnt_qc_2; --P2_nx808 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx808 --operation mode is normal P2_nx808 = P2_rec_sm_3 & !P2_rec_sm_2 & P2_rec_sm_0 & P2_b_2; --P2_nx809 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx809 --operation mode is normal P2_nx809 = P2_rec_sm_1 & (P2_rec_sm_0) # !P2_rec_sm_1 & P2_rec_sm_3 & !P2_rec_sm_0 & P2_modgen_eq_680_nx12; --P2_nx810 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx810 --operation mode is normal P2_nx810 = !P2_rec_sm_3 & !P2_rec_sm_2 & P2_rec_sm_0 & !P2_modgen_eq_659_nx12; --P2_nx811 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx811 --operation mode is normal P2_nx811 = P2_rec_sm_2 & (P2_rec_sm_1 & (!P2_modgen_eq_677_nx12) # !P2_rec_sm_1 & !P2_rec_sm_0) # !P2_rec_sm_2 & P2_rec_sm_1; --P2_nx812 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx812 --operation mode is normal P2_nx812 = P2_rec_sm_0 & (P2_nx819 # P2_nx818) # !P2_rec_sm_0 & P2_nx813; --P2_nx830 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx830 --operation mode is normal P2_nx830 = P2_rec_sm_1 & P2_rec_sm_0 # !P2_rec_sm_1 & (P2_modgen_eq_674_nx12 # !P2_rec_sm_0) # !P2_rec_sm_2; --P2_nx805 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx805 --operation mode is normal P2_nx805 = P2_rec_sm_0 & !P2_counter_0 & !P2_ptrf_0 & !P2_counter_3; --P2_counter_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_0 --operation mode is normal P2_counter_0_lut_out = P2_nx117 & (P2_rec_sm_2 # P2_nx824 # P2_nx826); P2_counter_0 = DFFEAS(P2_counter_0_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx249, , , , ); --P2_counter_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_3 --operation mode is normal P2_counter_3_lut_out = P2_nx114 & (P2_rec_sm_2 # P2_nx824 # P2_nx826); P2_counter_3 = DFFEAS(P2_counter_3_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx249, , , , ); --P2_nx814 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx814 --operation mode is normal P2_nx814 = P2_nx821 # !P2_rec_sm_3 & (P2_nx815 # P2_nx816); --P2_nx823 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx823 --operation mode is normal P2_nx823 = P2_rec_sm_0 # !P2_modgen_eq_677_nx12 # !P2_rec_sm_1; --P2_nx820 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx820 --operation mode is normal P2_nx820 = P2_rec_sm_2 & (!P2_modgen_eq_674_nx12 & !P2_nx828 # !P2_nx823); --P2_nx821 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx821 --operation mode is normal P2_nx821 = !P2_ptrf_1 & !P2_ptrf_0 & !P2_modgen_eq_680_nx12 & P2_nx826; --P2_nx822 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx822 --operation mode is normal P2_nx822 = !P2_rec_sm_3 & P2_rec_sm_0 & (P2_nx141 # P2_nx145); --P2_nx116 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx116 --operation mode is arithmetic P2_nx116_carry_eqn = P2_counter_inc_668_nx16; P2_nx116 = P2_counter_1 $ (P2_nx116_carry_eqn); --P2_counter_inc_668_nx20 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_inc_668_nx20 --operation mode is arithmetic P2_counter_inc_668_nx20 = CARRY(!P2_counter_inc_668_nx16 # !P2_counter_1); --P2_nx824 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx824 --operation mode is normal P2_nx824 = !P2_rec_sm_3 & P2_rec_sm_0 & (P2_ptrf_1 # P2_ptrf_0); --P2_nx826 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx826 --operation mode is normal P2_nx826 = P2_rec_sm_3 & !P2_rec_sm_0; --P2_NOT_nx249 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|NOT_nx249 --operation mode is normal P2_NOT_nx249 = P2_nx807 # P2_nx806 & (P2_b_2 # P2_nx825); --P2_nx115 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx115 --operation mode is arithmetic P2_nx115_carry_eqn = P2_counter_inc_668_nx20; P2_nx115 = P2_counter_2 $ (!P2_nx115_carry_eqn); --P2_counter_inc_668_nx24 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_inc_668_nx24 --operation mode is arithmetic P2_counter_inc_668_nx24 = CARRY(P2_counter_2 & (!P2_counter_inc_668_nx20)); --P4_nx808 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx808 --operation mode is normal P4_nx808 = P4_rec_sm_3 & !P4_rec_sm_2 & P4_rec_sm_0 & P4_b_2; --P4_nx809 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx809 --operation mode is normal P4_nx809 = P4_rec_sm_1 & (P4_rec_sm_0) # !P4_rec_sm_1 & P4_rec_sm_3 & !P4_rec_sm_0 & P4_modgen_eq_680_nx12; --P4_nx810 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx810 --operation mode is normal P4_nx810 = !P4_rec_sm_3 & !P4_rec_sm_2 & P4_rec_sm_0 & !P4_modgen_eq_659_nx12; --P4_nx811 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx811 --operation mode is normal P4_nx811 = P4_rec_sm_2 & (P4_rec_sm_1 & (!P4_modgen_eq_677_nx12) # !P4_rec_sm_1 & !P4_rec_sm_0) # !P4_rec_sm_2 & P4_rec_sm_1; --P4_nx812 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx812 --operation mode is normal P4_nx812 = P4_rec_sm_0 & (P4_nx819 # P4_nx818) # !P4_rec_sm_0 & P4_nx813; --P4_nx830 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx830 --operation mode is normal P4_nx830 = P4_rec_sm_1 & P4_rec_sm_0 # !P4_rec_sm_1 & (P4_modgen_eq_674_nx12 # !P4_rec_sm_0) # !P4_rec_sm_2; --P4_nx805 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx805 --operation mode is normal P4_nx805 = P4_rec_sm_0 & !P4_counter_0 & !P4_ptrf_0 & !P4_counter_3; --P4_counter_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_0 --operation mode is normal P4_counter_0_lut_out = P4_nx117 & (P4_rec_sm_2 # P4_nx824 # P4_nx826); P4_counter_0 = DFFEAS(P4_counter_0_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx249, , , , ); --P4_counter_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_3 --operation mode is normal P4_counter_3_lut_out = P4_nx114 & (P4_rec_sm_2 # P4_nx824 # P4_nx826); P4_counter_3 = DFFEAS(P4_counter_3_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx249, , , , ); --P4_nx814 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx814 --operation mode is normal P4_nx814 = P4_nx821 # !P4_rec_sm_3 & (P4_nx815 # P4_nx816); --P4_nx823 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx823 --operation mode is normal P4_nx823 = P4_rec_sm_0 # !P4_modgen_eq_677_nx12 # !P4_rec_sm_1; --P4_nx820 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx820 --operation mode is normal P4_nx820 = P4_rec_sm_2 & (!P4_modgen_eq_674_nx12 & !P4_nx828 # !P4_nx823); --P4_nx821 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx821 --operation mode is normal P4_nx821 = !P4_ptrf_1 & !P4_ptrf_0 & !P4_modgen_eq_680_nx12 & P4_nx826; --P4_nx822 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx822 --operation mode is normal P4_nx822 = !P4_rec_sm_3 & P4_rec_sm_0 & (P4_nx141 # P4_nx145); --P4_nx116 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx116 --operation mode is arithmetic P4_nx116_carry_eqn = P4_counter_inc_668_nx16; P4_nx116 = P4_counter_1 $ (P4_nx116_carry_eqn); --P4_counter_inc_668_nx20 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_inc_668_nx20 --operation mode is arithmetic P4_counter_inc_668_nx20 = CARRY(!P4_counter_inc_668_nx16 # !P4_counter_1); --P4_nx824 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx824 --operation mode is normal P4_nx824 = !P4_rec_sm_3 & P4_rec_sm_0 & (P4_ptrf_1 # P4_ptrf_0); --P4_nx826 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx826 --operation mode is normal P4_nx826 = P4_rec_sm_3 & !P4_rec_sm_0; --P4_NOT_nx249 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|NOT_nx249 --operation mode is normal P4_NOT_nx249 = P4_nx807 # P4_nx806 & (P4_b_2 # P4_nx825); --P4_nx115 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx115 --operation mode is arithmetic P4_nx115_carry_eqn = P4_counter_inc_668_nx20; P4_nx115 = P4_counter_2 $ (!P4_nx115_carry_eqn); --P4_counter_inc_668_nx24 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_inc_668_nx24 --operation mode is arithmetic P4_counter_inc_668_nx24 = CARRY(P4_counter_2 & (!P4_counter_inc_668_nx20)); --P1_nx808 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx808 --operation mode is normal P1_nx808 = P1_rec_sm_3 & !P1_rec_sm_2 & P1_rec_sm_0 & P1_b_2; --P1_nx809 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx809 --operation mode is normal P1_nx809 = P1_rec_sm_1 & (P1_rec_sm_0) # !P1_rec_sm_1 & P1_rec_sm_3 & !P1_rec_sm_0 & P1_modgen_eq_680_nx12; --P1_nx810 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx810 --operation mode is normal P1_nx810 = !P1_rec_sm_3 & !P1_rec_sm_2 & P1_rec_sm_0 & !P1_modgen_eq_659_nx12; --P1_nx811 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx811 --operation mode is normal P1_nx811 = P1_rec_sm_2 & (P1_rec_sm_1 & (!P1_modgen_eq_677_nx12) # !P1_rec_sm_1 & !P1_rec_sm_0) # !P1_rec_sm_2 & P1_rec_sm_1; --P1_nx812 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx812 --operation mode is normal P1_nx812 = P1_rec_sm_0 & (P1_nx819 # P1_nx818) # !P1_rec_sm_0 & P1_nx813; --P1_nx830 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx830 --operation mode is normal P1_nx830 = P1_rec_sm_1 & P1_rec_sm_0 # !P1_rec_sm_1 & (P1_modgen_eq_674_nx12 # !P1_rec_sm_0) # !P1_rec_sm_2; --P1_nx805 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx805 --operation mode is normal P1_nx805 = P1_rec_sm_0 & !P1_counter_0 & !P1_ptrf_0 & !P1_counter_3; --P1_counter_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_0 --operation mode is normal P1_counter_0_lut_out = P1_nx117 & (P1_rec_sm_2 # P1_nx824 # P1_nx826); P1_counter_0 = DFFEAS(P1_counter_0_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx249, , , , ); --P1_counter_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_3 --operation mode is normal P1_counter_3_lut_out = P1_nx114 & (P1_rec_sm_2 # P1_nx824 # P1_nx826); P1_counter_3 = DFFEAS(P1_counter_3_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx249, , , , ); --P1_nx814 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx814 --operation mode is normal P1_nx814 = P1_nx821 # !P1_rec_sm_3 & (P1_nx815 # P1_nx816); --P1_nx823 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx823 --operation mode is normal P1_nx823 = P1_rec_sm_0 # !P1_modgen_eq_677_nx12 # !P1_rec_sm_1; --P1_nx820 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx820 --operation mode is normal P1_nx820 = P1_rec_sm_2 & (!P1_modgen_eq_674_nx12 & !P1_nx828 # !P1_nx823); --P1_nx821 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx821 --operation mode is normal P1_nx821 = !P1_ptrf_1 & !P1_ptrf_0 & !P1_modgen_eq_680_nx12 & P1_nx826; --P1_nx822 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx822 --operation mode is normal P1_nx822 = !P1_rec_sm_3 & P1_rec_sm_0 & (P1_nx141 # P1_nx145); --P1_nx116 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx116 --operation mode is arithmetic P1_nx116_carry_eqn = P1_counter_inc_668_nx16; P1_nx116 = P1_counter_1 $ (P1_nx116_carry_eqn); --P1_counter_inc_668_nx20 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_inc_668_nx20 --operation mode is arithmetic P1_counter_inc_668_nx20 = CARRY(!P1_counter_inc_668_nx16 # !P1_counter_1); --P1_nx824 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx824 --operation mode is normal P1_nx824 = !P1_rec_sm_3 & P1_rec_sm_0 & (P1_ptrf_1 # P1_ptrf_0); --P1_nx826 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx826 --operation mode is normal P1_nx826 = P1_rec_sm_3 & !P1_rec_sm_0; --P1_NOT_nx249 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|NOT_nx249 --operation mode is normal P1_NOT_nx249 = P1_nx807 # P1_nx806 & (P1_b_2 # P1_nx825); --P1_nx115 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx115 --operation mode is arithmetic P1_nx115_carry_eqn = P1_counter_inc_668_nx20; P1_nx115 = P1_counter_2 $ (!P1_nx115_carry_eqn); --P1_counter_inc_668_nx24 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_inc_668_nx24 --operation mode is arithmetic P1_counter_inc_668_nx24 = CARRY(P1_counter_2 & (!P1_counter_inc_668_nx20)); --P3_nx808 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx808 --operation mode is normal P3_nx808 = P3_rec_sm_3 & !P3_rec_sm_2 & P3_rec_sm_0 & P3_b_2; --P3_nx809 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx809 --operation mode is normal P3_nx809 = P3_rec_sm_1 & (P3_rec_sm_0) # !P3_rec_sm_1 & P3_rec_sm_3 & !P3_rec_sm_0 & P3_modgen_eq_680_nx12; --P3_nx810 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx810 --operation mode is normal P3_nx810 = !P3_rec_sm_3 & !P3_rec_sm_2 & P3_rec_sm_0 & !P3_modgen_eq_659_nx12; --P3_nx811 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx811 --operation mode is normal P3_nx811 = P3_rec_sm_2 & (P3_rec_sm_1 & (!P3_modgen_eq_677_nx12) # !P3_rec_sm_1 & !P3_rec_sm_0) # !P3_rec_sm_2 & P3_rec_sm_1; --P3_nx812 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx812 --operation mode is normal P3_nx812 = P3_rec_sm_0 & (P3_nx819 # P3_nx818) # !P3_rec_sm_0 & P3_nx813; --P3_nx830 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx830 --operation mode is normal P3_nx830 = P3_rec_sm_1 & P3_rec_sm_0 # !P3_rec_sm_1 & (P3_modgen_eq_674_nx12 # !P3_rec_sm_0) # !P3_rec_sm_2; --P3_nx805 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx805 --operation mode is normal P3_nx805 = P3_rec_sm_0 & !P3_counter_0 & !P3_ptrf_0 & !P3_counter_3; --P3_counter_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_0 --operation mode is normal P3_counter_0_lut_out = P3_nx117 & (P3_rec_sm_2 # P3_nx824 # P3_nx826); P3_counter_0 = DFFEAS(P3_counter_0_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx249, , , , ); --P3_counter_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_3 --operation mode is normal P3_counter_3_lut_out = P3_nx114 & (P3_rec_sm_2 # P3_nx824 # P3_nx826); P3_counter_3 = DFFEAS(P3_counter_3_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx249, , , , ); --P3_nx814 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx814 --operation mode is normal P3_nx814 = P3_nx821 # !P3_rec_sm_3 & (P3_nx815 # P3_nx816); --P3_nx823 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx823 --operation mode is normal P3_nx823 = P3_rec_sm_0 # !P3_modgen_eq_677_nx12 # !P3_rec_sm_1; --P3_nx820 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx820 --operation mode is normal P3_nx820 = P3_rec_sm_2 & (!P3_modgen_eq_674_nx12 & !P3_nx828 # !P3_nx823); --P3_nx821 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx821 --operation mode is normal P3_nx821 = !P3_ptrf_1 & !P3_ptrf_0 & !P3_modgen_eq_680_nx12 & P3_nx826; --P3_nx822 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx822 --operation mode is normal P3_nx822 = !P3_rec_sm_3 & P3_rec_sm_0 & (P3_nx141 # P3_nx145); --P3_nx116 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx116 --operation mode is arithmetic P3_nx116_carry_eqn = P3_counter_inc_668_nx16; P3_nx116 = P3_counter_1 $ (P3_nx116_carry_eqn); --P3_counter_inc_668_nx20 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_inc_668_nx20 --operation mode is arithmetic P3_counter_inc_668_nx20 = CARRY(!P3_counter_inc_668_nx16 # !P3_counter_1); --P3_nx824 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx824 --operation mode is normal P3_nx824 = !P3_rec_sm_3 & P3_rec_sm_0 & (P3_ptrf_1 # P3_ptrf_0); --P3_nx826 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx826 --operation mode is normal P3_nx826 = P3_rec_sm_3 & !P3_rec_sm_0; --P3_NOT_nx249 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|NOT_nx249 --operation mode is normal P3_NOT_nx249 = P3_nx807 # P3_nx806 & (P3_b_2 # P3_nx825); --P3_nx115 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx115 --operation mode is arithmetic P3_nx115_carry_eqn = P3_counter_inc_668_nx20; P3_nx115 = P3_counter_2 $ (!P3_nx115_carry_eqn); --P3_counter_inc_668_nx24 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_inc_668_nx24 --operation mode is arithmetic P3_counter_inc_668_nx24 = CARRY(P3_counter_2 & (!P3_counter_inc_668_nx20)); --S3_NI_P0_D_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_1 --operation mode is normal S3_NI_P0_D_1_lut_out = S3_NI_P2_PREout; S3_NI_P0_D_1 = DFFEAS(S3_NI_P0_D_1_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_2 --operation mode is normal S3_NI_P2_D_2_lut_out = S3_NI_P2_D_3; S3_NI_P2_D_2 = DFFEAS(S3_NI_P2_D_2_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_1 --operation mode is normal S2_NI_P0_D_1_lut_out = S2_NI_P2_PREout; S2_NI_P0_D_1 = DFFEAS(S2_NI_P0_D_1_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_2 --operation mode is normal S2_NI_P2_D_2_lut_out = S2_NI_P2_D_3; S2_NI_P2_D_2 = DFFEAS(S2_NI_P2_D_2_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_1 --operation mode is normal S1_NI_P0_D_1_lut_out = S1_NI_P2_PREout; S1_NI_P0_D_1 = DFFEAS(S1_NI_P0_D_1_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_2 --operation mode is normal S1_NI_P2_D_2_lut_out = S1_NI_P2_D_3; S1_NI_P2_D_2 = DFFEAS(S1_NI_P2_D_2_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_59 is scsn_slave_nw_dll_ob0_ob_data_59 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_59_lut_out = scsn_slave_nw_dll_ob0_ob_data_58; scsn_slave_nw_dll_ob0_ob_data_59 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_59_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_59, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_60 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_60 --operation mode is normal Y1_d_to_dll_60 = !Y1_current_state_2 & Y1_forward_buffer_60 & (Y1_current_state_0 # !N1_altered_frame0); --Y1_nx159 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|nx159 --operation mode is normal Y1_nx159 = !N1_altered_frame0 & Y1_nx148 & (Y1_modgen_eq_336_nx24 # !N1_bridge); --scsn_slave_nw_dll_ob0_ob_crc_6 is scsn_slave_nw_dll_ob0_ob_crc_6 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_6_lut_out = scsn_slave_nw_dll_ob0_ob_crc_5; scsn_slave_nw_dll_ob0_ob_crc_6 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_6_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_59, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_59 is scsn_slave_nw_dll_ob1_ob_data_59 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_59_lut_out = scsn_slave_nw_dll_ob1_ob_data_58; scsn_slave_nw_dll_ob1_ob_data_59 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_59_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_59, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_60 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_60 --operation mode is normal Y2_d_to_dll_60 = !Y2_current_state_2 & Y2_forward_buffer_60 & (Y2_current_state_0 # !N1_altered_frame1); --Y2_nx159 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|nx159 --operation mode is normal Y2_nx159 = !N1_altered_frame1 & Y2_nx148 & (Y2_modgen_eq_336_nx24 # !N1_bridge); --scsn_slave_nw_dll_ob1_ob_crc_6 is scsn_slave_nw_dll_ob1_ob_crc_6 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_6_lut_out = scsn_slave_nw_dll_ob1_ob_crc_5; scsn_slave_nw_dll_ob1_ob_crc_6 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_6_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_59, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_65 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_65 --operation mode is normal D1_jtgsnd_ser_t_65_lut_out = D1_jtgsnd_ser_t_64; D1_jtgsnd_ser_t_65 = DFFEAS(D1_jtgsnd_ser_t_65_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_22, , , D1_jtgsnd_we_g_2); --N1_request_17 is mcm_nw_nwl:scsn_slave_nw_nwl|request_17 --operation mode is normal N1_request_17 = N1_select_rq & (L2_data_out_17) # !N1_select_rq & L1_data_out_17; --L1_data_out_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_6 --operation mode is normal L1_data_out_6_lut_out = L1_data_out_5; L1_data_out_6 = DFFEAS(L1_data_out_6_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_6 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_6 --operation mode is normal L2_data_out_6_lut_out = L2_data_out_5; L2_data_out_6 = DFFEAS(L2_data_out_6_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --T1_s_reg_10 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_10 --operation mode is normal T1_s_reg_10_lut_out = T1_s_reg_11; T1_s_reg_10 = DFFEAS(T1_s_reg_10_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_21, , , D1_we_tms); --E1_jtgsnd_ser_t_65 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_65 --operation mode is normal E1_jtgsnd_ser_t_65_lut_out = E1_jtgsnd_ser_t_64; E1_jtgsnd_ser_t_65 = DFFEAS(E1_jtgsnd_ser_t_65_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_22, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_65 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_65 --operation mode is normal E2_jtgsnd_ser_t_65_lut_out = E2_jtgsnd_ser_t_64; E2_jtgsnd_ser_t_65 = DFFEAS(E2_jtgsnd_ser_t_65_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_22, , , E2_jtgsnd_we_g_2); --T2_s_reg_10 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_10 --operation mode is normal T2_s_reg_10_lut_out = T2_s_reg_11; T2_s_reg_10 = DFFEAS(T2_s_reg_10_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_21, , , E1_we_tms); --T3_s_reg_10 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_10 --operation mode is normal T3_s_reg_10_lut_out = T3_s_reg_11; T3_s_reg_10 = DFFEAS(T3_s_reg_10_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_21, , , E2_we_tms); --L1_data_out_8 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_8 --operation mode is normal L1_data_out_8_lut_out = L1_data_out_7; L1_data_out_8 = DFFEAS(L1_data_out_8_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_8 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_8 --operation mode is normal L2_data_out_8_lut_out = L2_data_out_7; L2_data_out_8 = DFFEAS(L2_data_out_8_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --F1_modgen_xor_1057_nx14 is ni2dpm_12:ni_ni_neg|modgen_xor_1057_nx14 --operation mode is normal F1_modgen_xor_1057_nx14 = F1_data_2p_0 $ F1_data_2p_1 $ F1_data_2p_2 $ F1_data_2p_3; --F1_modgen_xor_1057_nx18 is ni2dpm_12:ni_ni_neg|modgen_xor_1057_nx18 --operation mode is normal F1_modgen_xor_1057_nx18 = F1_data_2p_6 $ F1_data_2p_5 $ F1_data_2p_4; --F1_data_2p_7 is ni2dpm_12:ni_ni_neg|data_2p_7 --operation mode is normal F1_data_2p_7 = G1_NOT_ni_sel_p_3 & F1_ex_p_q1pass_8 # !G1_NOT_ni_sel_p_3 & (F1_ex_p_q1pass_7); --F1_prty_bit is ni2dpm_12:ni_ni_neg|prty_bit --operation mode is normal F1_prty_bit = G1_NOT_ni_sel_p_3 & (F1_nx376 & F1_nx377) # !G1_NOT_ni_sel_p_3 & F1_ex_p_q1pass_8; --B1_ccnt_qc_7 is clkpre_counter:cp|ccnt_qc_7 --operation mode is normal B1_ccnt_qc_7_carry_eqn = B1_ccnt_cnt_c_Q_nx41; B1_ccnt_qc_7_lut_out = B1_ccnt_qc_7 $ (B1_ccnt_qc_7_carry_eqn); B1_ccnt_qc_7 = DFFEAS(B1_ccnt_qc_7_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_qc_6 is clkpre_counter:cp|ccnt_qc_6 --operation mode is arithmetic B1_ccnt_qc_6_carry_eqn = B1_ccnt_cnt_c_Q_nx36; B1_ccnt_qc_6_lut_out = B1_ccnt_qc_6 $ (!B1_ccnt_qc_6_carry_eqn); B1_ccnt_qc_6 = DFFEAS(B1_ccnt_qc_6_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx41 is clkpre_counter:cp|ccnt_cnt_c_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx41 = CARRY(B1_ccnt_qc_6 & (!B1_ccnt_cnt_c_Q_nx36)); --B1_ccnt_qc_5 is clkpre_counter:cp|ccnt_qc_5 --operation mode is arithmetic B1_ccnt_qc_5_carry_eqn = B1_ccnt_cnt_c_Q_nx32; B1_ccnt_qc_5_lut_out = B1_ccnt_qc_5 $ (B1_ccnt_qc_5_carry_eqn); B1_ccnt_qc_5 = DFFEAS(B1_ccnt_qc_5_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx36 is clkpre_counter:cp|ccnt_cnt_c_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx36 = CARRY(!B1_ccnt_cnt_c_Q_nx32 # !B1_ccnt_qc_5); --B1_ccnt_qc_4 is clkpre_counter:cp|ccnt_qc_4 --operation mode is arithmetic B1_ccnt_qc_4_carry_eqn = B1_ccnt_cnt_c_Q_nx28; B1_ccnt_qc_4_lut_out = B1_ccnt_qc_4 $ (!B1_ccnt_qc_4_carry_eqn); B1_ccnt_qc_4 = DFFEAS(B1_ccnt_qc_4_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx32 is clkpre_counter:cp|ccnt_cnt_c_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx32 = CARRY(B1_ccnt_qc_4 & (!B1_ccnt_cnt_c_Q_nx28)); --B1_ccnt_qc_3 is clkpre_counter:cp|ccnt_qc_3 --operation mode is arithmetic B1_ccnt_qc_3_carry_eqn = B1_ccnt_cnt_c_Q_nx22; B1_ccnt_qc_3_lut_out = B1_ccnt_qc_3 $ (B1_ccnt_qc_3_carry_eqn); B1_ccnt_qc_3 = DFFEAS(B1_ccnt_qc_3_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx28 is clkpre_counter:cp|ccnt_cnt_c_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx28 = CARRY(!B1_ccnt_cnt_c_Q_nx22 # !B1_ccnt_qc_3); --B1_ccnt_qc_2 is clkpre_counter:cp|ccnt_qc_2 --operation mode is arithmetic B1_ccnt_qc_2_carry_eqn = B1_ccnt_cnt_c_Q_nx16; B1_ccnt_qc_2_lut_out = B1_ccnt_qc_2 $ (!B1_ccnt_qc_2_carry_eqn); B1_ccnt_qc_2 = DFFEAS(B1_ccnt_qc_2_lut_out, X1__clk0, B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_c_Q_nx22 is clkpre_counter:cp|ccnt_cnt_c_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_c_Q_nx22 = CARRY(B1_ccnt_qc_2 & (!B1_ccnt_cnt_c_Q_nx16)); --P2_b_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|b_2 --operation mode is normal P2_b_2 = P2_ptrf_1 # P2_ptrf_0; --P2_modgen_eq_680_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_eq_680_nx12 --operation mode is normal P2_modgen_eq_680_nx12 = P2_counter_1 # P2_counter_2 # !P2_counter_3 # !P2_counter_0; --P2_modgen_eq_659_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_eq_659_nx12 --operation mode is normal P2_modgen_eq_659_nx12 = P2_counter_1 # !P2_counter_2 # !P2_counter_3 # !P2_counter_0; --P2_modgen_eq_677_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_eq_677_nx12 --operation mode is normal P2_modgen_eq_677_nx12 = P2_counter_3 # P2_counter_1 # !P2_counter_2 # !P2_counter_0; --P2_nx813 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx813 --operation mode is normal P2_nx813 = P2_rec_sm_3 & !P2_ptrf_1 & !P2_ptrf_0 & !P2_modgen_eq_680_nx12 # !P2_rec_sm_3 & P2_ptrf_1 & P2_ptrf_0; --P2_nx819 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx819 --operation mode is normal P2_nx819 = P2_ptrf_1 # P2_ptrf_0 # !P2_rec_sm_3 & !P2_modgen_eq_659_nx12; --P2_nx818 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx818 --operation mode is normal P2_nx818 = !P2_rec_sm_3 & (P2_modgen_gt_664_nx52 & !P2_modgen_gt_665_nx52 # !P2_nx25); --P2_modgen_eq_674_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_eq_674_nx12 --operation mode is normal P2_modgen_eq_674_nx12 = P2_counter_0 # P2_counter_3 # P2_counter_2 # !P2_counter_1; --P2_nx117 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx117 --operation mode is normal P2_nx117 = !P2_counter_0; --P2_nx114 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx114 --operation mode is normal P2_nx114_carry_eqn = P2_counter_inc_668_nx24; P2_nx114 = P2_counter_3 $ (P2_nx114_carry_eqn); --P2_nx815 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx815 --operation mode is normal P2_nx815 = P2_rec_sm_0 & P2_nx38 & P2_modgen_eq_659_nx12 & !P2_b_2; --P2_nx816 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx816 --operation mode is normal P2_nx816 = P2_rec_sm_0 & !P2_nx25 & P2_modgen_eq_659_nx12 & !P2_b_2; --P2_nx828 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx828 --operation mode is normal P2_nx828 = P2_rec_sm_1 # !P2_rec_sm_0; --P2_nx141 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx141 --operation mode is normal P2_nx141 = !P2_ptrf_1 & !P2_ptrf_0 & P2_nx40 & P2_modgen_eq_659_nx12; --P2_PTRGG is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|PTRGG --operation mode is normal P2_PTRGG = DFFEAS(P2_nx141, X1__clk0, J1_chipRST_n, , , , , P2_modgen_eq_658_nx12, ); --P2_nx145 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx145 --operation mode is normal P2_nx145 = P2_modgen_eq_659_nx12 & P2_modgen_gt_664_nx52 & !P2_modgen_gt_665_nx52 & !P2_b_2; --P2_CLEAR is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|CLEAR --operation mode is normal P2_CLEAR = DFFEAS(P2_nx145, X1__clk0, J1_chipRST_n, , , , , P2_modgen_eq_658_nx12, ); --P2_counter_inc_668_nx16 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|counter_inc_668_nx16 --operation mode is arithmetic P2_counter_inc_668_nx16 = CARRY(P2_counter_0); --P2_nx806 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx806 --operation mode is normal P2_nx806 = !P2_rec_sm_3 & !P2_rec_sm_2 & !P2_rec_sm_1 & P2_modgen_eq_659_nx12; --P2_nx807 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx807 --operation mode is normal P2_nx807 = P2_rec_sm_2 & (P2_rec_sm_1 $ P2_rec_sm_0) # !P2_rec_sm_2 & !P2_rec_sm_1 & !P2_rec_sm_0; --P2_nx825 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx825 --operation mode is normal P2_nx825 = P2_counter_2 & (P2_counter_3) # !P2_counter_2 & (P2_counter_1 # P2_counter_0 & !P2_counter_3); --P4_b_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|b_2 --operation mode is normal P4_b_2 = P4_ptrf_1 # P4_ptrf_0; --P4_modgen_eq_680_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_eq_680_nx12 --operation mode is normal P4_modgen_eq_680_nx12 = P4_counter_1 # P4_counter_2 # !P4_counter_3 # !P4_counter_0; --P4_modgen_eq_659_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_eq_659_nx12 --operation mode is normal P4_modgen_eq_659_nx12 = P4_counter_1 # !P4_counter_2 # !P4_counter_3 # !P4_counter_0; --P4_modgen_eq_677_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_eq_677_nx12 --operation mode is normal P4_modgen_eq_677_nx12 = P4_counter_3 # P4_counter_1 # !P4_counter_2 # !P4_counter_0; --P4_nx813 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx813 --operation mode is normal P4_nx813 = P4_rec_sm_3 & !P4_ptrf_1 & !P4_ptrf_0 & !P4_modgen_eq_680_nx12 # !P4_rec_sm_3 & P4_ptrf_1 & P4_ptrf_0; --P4_nx819 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx819 --operation mode is normal P4_nx819 = P4_ptrf_1 # P4_ptrf_0 # !P4_rec_sm_3 & !P4_modgen_eq_659_nx12; --P4_nx818 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx818 --operation mode is normal P4_nx818 = !P4_rec_sm_3 & (P4_modgen_gt_664_nx52 & !P4_modgen_gt_665_nx52 # !P4_nx25); --P4_modgen_eq_674_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_eq_674_nx12 --operation mode is normal P4_modgen_eq_674_nx12 = P4_counter_0 # P4_counter_3 # P4_counter_2 # !P4_counter_1; --P4_nx117 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx117 --operation mode is normal P4_nx117 = !P4_counter_0; --P4_nx114 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx114 --operation mode is normal P4_nx114_carry_eqn = P4_counter_inc_668_nx24; P4_nx114 = P4_counter_3 $ (P4_nx114_carry_eqn); --P4_nx815 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx815 --operation mode is normal P4_nx815 = P4_rec_sm_0 & P4_nx38 & P4_modgen_eq_659_nx12 & !P4_b_2; --P4_nx816 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx816 --operation mode is normal P4_nx816 = P4_rec_sm_0 & !P4_nx25 & P4_modgen_eq_659_nx12 & !P4_b_2; --P4_nx828 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx828 --operation mode is normal P4_nx828 = P4_rec_sm_1 # !P4_rec_sm_0; --P4_nx141 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx141 --operation mode is normal P4_nx141 = !P4_ptrf_1 & !P4_ptrf_0 & P4_nx40 & P4_modgen_eq_659_nx12; --P4_PTRGG is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|PTRGG --operation mode is normal P4_PTRGG = DFFEAS(P4_nx141, X1__clk0, J1_chipRST_n, , , , , P4_modgen_eq_658_nx12, ); --P4_nx145 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx145 --operation mode is normal P4_nx145 = P4_modgen_eq_659_nx12 & P4_modgen_gt_664_nx52 & !P4_modgen_gt_665_nx52 & !P4_b_2; --P4_CLEAR is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|CLEAR --operation mode is normal P4_CLEAR = DFFEAS(P4_nx145, X1__clk0, J1_chipRST_n, , , , , P4_modgen_eq_658_nx12, ); --P4_counter_inc_668_nx16 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|counter_inc_668_nx16 --operation mode is arithmetic P4_counter_inc_668_nx16 = CARRY(P4_counter_0); --P4_nx806 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx806 --operation mode is normal P4_nx806 = !P4_rec_sm_3 & !P4_rec_sm_2 & !P4_rec_sm_1 & P4_modgen_eq_659_nx12; --P4_nx807 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx807 --operation mode is normal P4_nx807 = P4_rec_sm_2 & (P4_rec_sm_1 $ P4_rec_sm_0) # !P4_rec_sm_2 & !P4_rec_sm_1 & !P4_rec_sm_0; --P4_nx825 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx825 --operation mode is normal P4_nx825 = P4_counter_2 & (P4_counter_3) # !P4_counter_2 & (P4_counter_1 # P4_counter_0 & !P4_counter_3); --P1_b_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|b_2 --operation mode is normal P1_b_2 = P1_ptrf_1 # P1_ptrf_0; --P1_modgen_eq_680_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_eq_680_nx12 --operation mode is normal P1_modgen_eq_680_nx12 = P1_counter_1 # P1_counter_2 # !P1_counter_3 # !P1_counter_0; --P1_modgen_eq_659_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_eq_659_nx12 --operation mode is normal P1_modgen_eq_659_nx12 = P1_counter_1 # !P1_counter_2 # !P1_counter_3 # !P1_counter_0; --P1_modgen_eq_677_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_eq_677_nx12 --operation mode is normal P1_modgen_eq_677_nx12 = P1_counter_3 # P1_counter_1 # !P1_counter_2 # !P1_counter_0; --P1_nx813 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx813 --operation mode is normal P1_nx813 = P1_rec_sm_3 & !P1_ptrf_1 & !P1_ptrf_0 & !P1_modgen_eq_680_nx12 # !P1_rec_sm_3 & P1_ptrf_1 & P1_ptrf_0; --P1_nx819 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx819 --operation mode is normal P1_nx819 = P1_ptrf_1 # P1_ptrf_0 # !P1_rec_sm_3 & !P1_modgen_eq_659_nx12; --P1_nx818 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx818 --operation mode is normal P1_nx818 = !P1_rec_sm_3 & (P1_modgen_gt_664_nx52 & !P1_modgen_gt_665_nx52 # !P1_nx25); --P1_modgen_eq_674_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_eq_674_nx12 --operation mode is normal P1_modgen_eq_674_nx12 = P1_counter_0 # P1_counter_3 # P1_counter_2 # !P1_counter_1; --P1_nx117 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx117 --operation mode is normal P1_nx117 = !P1_counter_0; --P1_nx114 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx114 --operation mode is normal P1_nx114_carry_eqn = P1_counter_inc_668_nx24; P1_nx114 = P1_counter_3 $ (P1_nx114_carry_eqn); --P1_nx815 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx815 --operation mode is normal P1_nx815 = P1_rec_sm_0 & P1_nx38 & P1_modgen_eq_659_nx12 & !P1_b_2; --P1_nx816 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx816 --operation mode is normal P1_nx816 = P1_rec_sm_0 & !P1_nx25 & P1_modgen_eq_659_nx12 & !P1_b_2; --P1_nx828 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx828 --operation mode is normal P1_nx828 = P1_rec_sm_1 # !P1_rec_sm_0; --P1_nx141 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx141 --operation mode is normal P1_nx141 = !P1_ptrf_1 & !P1_ptrf_0 & P1_nx40 & P1_modgen_eq_659_nx12; --P1_PTRGG is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|PTRGG --operation mode is normal P1_PTRGG = DFFEAS(P1_nx141, X1__clk0, J1_chipRST_n, , , , , P1_modgen_eq_658_nx12, ); --P1_nx145 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx145 --operation mode is normal P1_nx145 = P1_modgen_eq_659_nx12 & P1_modgen_gt_664_nx52 & !P1_modgen_gt_665_nx52 & !P1_b_2; --P1_CLEAR is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|CLEAR --operation mode is normal P1_CLEAR = DFFEAS(P1_nx145, X1__clk0, J1_chipRST_n, , , , , P1_modgen_eq_658_nx12, ); --P1_counter_inc_668_nx16 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|counter_inc_668_nx16 --operation mode is arithmetic P1_counter_inc_668_nx16 = CARRY(P1_counter_0); --P1_nx806 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx806 --operation mode is normal P1_nx806 = !P1_rec_sm_3 & !P1_rec_sm_2 & !P1_rec_sm_1 & P1_modgen_eq_659_nx12; --P1_nx807 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx807 --operation mode is normal P1_nx807 = P1_rec_sm_2 & (P1_rec_sm_1 $ P1_rec_sm_0) # !P1_rec_sm_2 & !P1_rec_sm_1 & !P1_rec_sm_0; --P1_nx825 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx825 --operation mode is normal P1_nx825 = P1_counter_2 & (P1_counter_3) # !P1_counter_2 & (P1_counter_1 # P1_counter_0 & !P1_counter_3); --P3_b_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|b_2 --operation mode is normal P3_b_2 = P3_ptrf_1 # P3_ptrf_0; --P3_modgen_eq_680_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_eq_680_nx12 --operation mode is normal P3_modgen_eq_680_nx12 = P3_counter_1 # P3_counter_2 # !P3_counter_3 # !P3_counter_0; --P3_modgen_eq_659_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_eq_659_nx12 --operation mode is normal P3_modgen_eq_659_nx12 = P3_counter_1 # !P3_counter_2 # !P3_counter_3 # !P3_counter_0; --P3_modgen_eq_677_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_eq_677_nx12 --operation mode is normal P3_modgen_eq_677_nx12 = P3_counter_3 # P3_counter_1 # !P3_counter_2 # !P3_counter_0; --P3_nx813 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx813 --operation mode is normal P3_nx813 = P3_rec_sm_3 & !P3_ptrf_1 & !P3_ptrf_0 & !P3_modgen_eq_680_nx12 # !P3_rec_sm_3 & P3_ptrf_1 & P3_ptrf_0; --P3_nx819 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx819 --operation mode is normal P3_nx819 = P3_ptrf_1 # P3_ptrf_0 # !P3_rec_sm_3 & !P3_modgen_eq_659_nx12; --P3_nx818 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx818 --operation mode is normal P3_nx818 = !P3_rec_sm_3 & (P3_modgen_gt_664_nx52 & !P3_modgen_gt_665_nx52 # !P3_nx25); --P3_modgen_eq_674_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_eq_674_nx12 --operation mode is normal P3_modgen_eq_674_nx12 = P3_counter_0 # P3_counter_3 # P3_counter_2 # !P3_counter_1; --P3_nx117 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx117 --operation mode is normal P3_nx117 = !P3_counter_0; --P3_nx114 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx114 --operation mode is normal P3_nx114_carry_eqn = P3_counter_inc_668_nx24; P3_nx114 = P3_counter_3 $ (P3_nx114_carry_eqn); --P3_nx815 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx815 --operation mode is normal P3_nx815 = P3_rec_sm_0 & P3_nx38 & P3_modgen_eq_659_nx12 & !P3_b_2; --P3_nx816 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx816 --operation mode is normal P3_nx816 = P3_rec_sm_0 & !P3_nx25 & P3_modgen_eq_659_nx12 & !P3_b_2; --P3_nx828 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx828 --operation mode is normal P3_nx828 = P3_rec_sm_1 # !P3_rec_sm_0; --P3_nx141 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx141 --operation mode is normal P3_nx141 = !P3_ptrf_1 & !P3_ptrf_0 & P3_nx40 & P3_modgen_eq_659_nx12; --P3_PTRGG is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|PTRGG --operation mode is normal P3_PTRGG = DFFEAS(P3_nx141, X1__clk0, J1_chipRST_n, , , , , P3_modgen_eq_658_nx12, ); --P3_nx145 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx145 --operation mode is normal P3_nx145 = P3_modgen_eq_659_nx12 & P3_modgen_gt_664_nx52 & !P3_modgen_gt_665_nx52 & !P3_b_2; --P3_CLEAR is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|CLEAR --operation mode is normal P3_CLEAR = DFFEAS(P3_nx145, X1__clk0, J1_chipRST_n, , , , , P3_modgen_eq_658_nx12, ); --P3_counter_inc_668_nx16 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|counter_inc_668_nx16 --operation mode is arithmetic P3_counter_inc_668_nx16 = CARRY(P3_counter_0); --P3_nx806 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx806 --operation mode is normal P3_nx806 = !P3_rec_sm_3 & !P3_rec_sm_2 & !P3_rec_sm_1 & P3_modgen_eq_659_nx12; --P3_nx807 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx807 --operation mode is normal P3_nx807 = P3_rec_sm_2 & (P3_rec_sm_1 $ P3_rec_sm_0) # !P3_rec_sm_2 & !P3_rec_sm_1 & !P3_rec_sm_0; --P3_nx825 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx825 --operation mode is normal P3_nx825 = P3_counter_2 & (P3_counter_3) # !P3_counter_2 & (P3_counter_1 # P3_counter_0 & !P3_counter_3); --S3_NI_P2_PREout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_PREout --operation mode is normal S3_NI_P2_PREout_lut_out = S3_NI_P0_D_2; S3_NI_P2_PREout = DFFEAS(S3_NI_P2_PREout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_3 --operation mode is normal S3_NI_P2_D_3_lut_out = S3_NI_P4_D_2; S3_NI_P2_D_3 = DFFEAS(S3_NI_P2_D_3_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P2_PREout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_PREout --operation mode is normal S2_NI_P2_PREout_lut_out = S2_NI_P0_D_2; S2_NI_P2_PREout = DFFEAS(S2_NI_P2_PREout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_3 --operation mode is normal S2_NI_P2_D_3_lut_out = S2_NI_P4_D_2; S2_NI_P2_D_3 = DFFEAS(S2_NI_P2_D_3_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P2_PREout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_PREout --operation mode is normal S1_NI_P2_PREout_lut_out = S1_NI_P0_D_2; S1_NI_P2_PREout = DFFEAS(S1_NI_P2_PREout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_3 --operation mode is normal S1_NI_P2_D_3_lut_out = S1_NI_P4_D_2; S1_NI_P2_D_3 = DFFEAS(S1_NI_P2_D_3_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_58 is scsn_slave_nw_dll_ob0_ob_data_58 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_58_lut_out = scsn_slave_nw_dll_ob0_ob_data_57; scsn_slave_nw_dll_ob0_ob_data_58 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_58_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_58, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_59 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_59 --operation mode is normal Y1_d_to_dll_59 = !Y1_current_state_2 & Y1_forward_buffer_59 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_5 is scsn_slave_nw_dll_ob0_ob_crc_5 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_5_lut_out = scsn_slave_nw_dll_ob0_ob_crc_4; scsn_slave_nw_dll_ob0_ob_crc_5 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_5_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_58, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_58 is scsn_slave_nw_dll_ob1_ob_data_58 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_58_lut_out = scsn_slave_nw_dll_ob1_ob_data_57; scsn_slave_nw_dll_ob1_ob_data_58 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_58_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_58, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_59 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_59 --operation mode is normal Y2_d_to_dll_59 = !Y2_current_state_2 & Y2_forward_buffer_59 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_5 is scsn_slave_nw_dll_ob1_ob_crc_5 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_5_lut_out = scsn_slave_nw_dll_ob1_ob_crc_4; scsn_slave_nw_dll_ob1_ob_crc_5 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_5_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_58, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_64 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_64 --operation mode is normal D1_jtgsnd_ser_t_64_lut_out = D1_jtgsnd_ser_t_63; D1_jtgsnd_ser_t_64 = DFFEAS(D1_jtgsnd_ser_t_64_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_7, , , D1_jtgsnd_we_g_1); --T1_s_reg_11 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_11 --operation mode is normal T1_s_reg_11_lut_out = T1_s_reg_12; T1_s_reg_11 = DFFEAS(T1_s_reg_11_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_20, , , D1_we_tms); --E1_jtgsnd_ser_t_64 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_64 --operation mode is normal E1_jtgsnd_ser_t_64_lut_out = E1_jtgsnd_ser_t_63; E1_jtgsnd_ser_t_64 = DFFEAS(E1_jtgsnd_ser_t_64_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_7, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_64 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_64 --operation mode is normal E2_jtgsnd_ser_t_64_lut_out = E2_jtgsnd_ser_t_63; E2_jtgsnd_ser_t_64 = DFFEAS(E2_jtgsnd_ser_t_64_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_7, , , E2_jtgsnd_we_g_1); --T2_s_reg_11 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_11 --operation mode is normal T2_s_reg_11_lut_out = T2_s_reg_12; T2_s_reg_11 = DFFEAS(T2_s_reg_11_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_20, , , E1_we_tms); --T3_s_reg_11 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_11 --operation mode is normal T3_s_reg_11_lut_out = T3_s_reg_12; T3_s_reg_11 = DFFEAS(T3_s_reg_11_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_20, , , E2_we_tms); --L1_data_out_7 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib0|data_out_7 --operation mode is normal L1_data_out_7_lut_out = L1_data_out_6; L1_data_out_7 = DFFEAS(L1_data_out_7_lut_out, X1__clk0, VCC, , L1_NOT_nx676, , , !K1_buffer_flush_n, ); --L2_data_out_7 is mcm_nw_inbuf_69_4_7:scsn_slave_nw_dll_ib1|data_out_7 --operation mode is normal L2_data_out_7_lut_out = L2_data_out_6; L2_data_out_7 = DFFEAS(L2_data_out_7_lut_out, X1__clk0, VCC, , L2_NOT_nx676, , , !K2_buffer_flush_n, ); --F1_data_2p_1 is ni2dpm_12:ni_ni_neg|data_2p_1 --operation mode is normal F1_data_2p_1 = G1_ni_sel_p_1 & (F1_ex_p_q1pass_1) # !G1_ni_sel_p_1 & (F1_nx370 & (F1_ex_p_q1pass_1) # !F1_nx370 & F1_ex_p_q1pass_2); --F1_data_2p_2 is ni2dpm_12:ni_ni_neg|data_2p_2 --operation mode is normal F1_data_2p_2 = F1_ex_p_modgen_gt_608_nx56 & (F1_ex_p_q1pass_2) # !F1_ex_p_modgen_gt_608_nx56 & F1_ex_p_q1pass_3; --F1_data_2p_3 is ni2dpm_12:ni_ni_neg|data_2p_3 --operation mode is normal F1_data_2p_3 = G1_NOT_ni_sel_p_3 & (G1_ni_sel_p_2 & (F1_ex_p_q1pass_3) # !G1_ni_sel_p_2 & F1_ex_p_q1pass_4) # !G1_NOT_ni_sel_p_3 & (F1_ex_p_q1pass_3); --F1_data_2p_6 is ni2dpm_12:ni_ni_neg|data_2p_6 --operation mode is normal F1_data_2p_6 = F1_ex_p_modgen_gt_600_nx56 & (F1_ex_p_q1pass_6) # !F1_ex_p_modgen_gt_600_nx56 & F1_ex_p_q1pass_7; --F1_data_2p_5 is ni2dpm_12:ni_ni_neg|data_2p_5 --operation mode is normal F1_data_2p_5 = G1_NOT_ni_sel_p_3 & (F1_nx372 & (F1_ex_p_q1pass_5) # !F1_nx372 & F1_ex_p_q1pass_6) # !G1_NOT_ni_sel_p_3 & (F1_ex_p_q1pass_5); --F1_data_2p_4 is ni2dpm_12:ni_ni_neg|data_2p_4 --operation mode is normal F1_data_2p_4 = F1_ex_p_modgen_gt_604_nx56 & (F1_ex_p_q1pass_4) # !F1_ex_p_modgen_gt_604_nx56 & F1_ex_p_q1pass_5; --F1_ex_p_q1pass_8 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_8 --operation mode is normal F1_ex_p_q1pass_8 = F1_ex_p_modgen_gt_589_nx54 & F1_data_1p_m_8 # !F1_ex_p_modgen_gt_589_nx54 & (F1_nx368); --F1_ex_p_q1pass_7 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_7 --operation mode is normal F1_ex_p_q1pass_7 = G1_NOT_ni_sel_s_3 & F1_data_1p_m_8 # !G1_NOT_ni_sel_s_3 & (F1_data_1p_m_7); --F1_nx376 is ni2dpm_12:ni_ni_neg|nx376 --operation mode is normal F1_nx376 = G1_ni_sel_p_2 # F1_nx374 & (F1_nx362 # !G1_ni_sel_p_1); --F1_nx377 is ni2dpm_12:ni_ni_neg|nx377 --operation mode is normal F1_nx377 = F1_nx375 & (F1_nx363 # !G1_ni_sel_p_1) # !G1_ni_sel_p_2; --P2_nx25 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx25 --operation mode is normal P2_nx25 = !P2_counter_1 & !P2_counter_2 # !P2_counter_3; --P2_modgen_gt_664_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_gt_664_nx52 --operation mode is normal P2_modgen_gt_664_nx52 = !P2_counter_3 & (!P2_counter_2 # !P2_counter_1 # !P2_counter_0); --P2_modgen_gt_665_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_gt_665_nx52 --operation mode is normal P2_modgen_gt_665_nx52 = !P2_counter_3 & !P2_counter_2; --P2_nx38 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx38 --operation mode is normal P2_nx38 = P2_counter_3 & (!P2_counter_1 & !P2_counter_2) # !P2_counter_3 & P2_counter_0 & P2_counter_1 & P2_counter_2; --P2_nx40 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|nx40 --operation mode is normal P2_nx40 = !P2_counter_3 & !P2_counter_2 & (P2_counter_0 # P2_counter_1); --P2_modgen_eq_658_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|modgen_eq_658_nx12 --operation mode is normal P2_modgen_eq_658_nx12 = P2_rec_sm_3 # P2_rec_sm_2 # P2_rec_sm_1 # !P2_rec_sm_0; --P4_nx25 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx25 --operation mode is normal P4_nx25 = !P4_counter_1 & !P4_counter_2 # !P4_counter_3; --P4_modgen_gt_664_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_gt_664_nx52 --operation mode is normal P4_modgen_gt_664_nx52 = !P4_counter_3 & (!P4_counter_2 # !P4_counter_1 # !P4_counter_0); --P4_modgen_gt_665_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_gt_665_nx52 --operation mode is normal P4_modgen_gt_665_nx52 = !P4_counter_3 & !P4_counter_2; --P4_nx38 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx38 --operation mode is normal P4_nx38 = P4_counter_3 & (!P4_counter_1 & !P4_counter_2) # !P4_counter_3 & P4_counter_0 & P4_counter_1 & P4_counter_2; --P4_nx40 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|nx40 --operation mode is normal P4_nx40 = !P4_counter_3 & !P4_counter_2 & (P4_counter_0 # P4_counter_1); --P4_modgen_eq_658_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|modgen_eq_658_nx12 --operation mode is normal P4_modgen_eq_658_nx12 = P4_rec_sm_3 # P4_rec_sm_2 # P4_rec_sm_1 # !P4_rec_sm_0; --P1_nx25 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx25 --operation mode is normal P1_nx25 = !P1_counter_1 & !P1_counter_2 # !P1_counter_3; --P1_modgen_gt_664_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_gt_664_nx52 --operation mode is normal P1_modgen_gt_664_nx52 = !P1_counter_3 & (!P1_counter_2 # !P1_counter_1 # !P1_counter_0); --P1_modgen_gt_665_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_gt_665_nx52 --operation mode is normal P1_modgen_gt_665_nx52 = !P1_counter_3 & !P1_counter_2; --P1_nx38 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx38 --operation mode is normal P1_nx38 = P1_counter_3 & (!P1_counter_1 & !P1_counter_2) # !P1_counter_3 & P1_counter_0 & P1_counter_1 & P1_counter_2; --P1_nx40 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|nx40 --operation mode is normal P1_nx40 = !P1_counter_3 & !P1_counter_2 & (P1_counter_0 # P1_counter_1); --P1_modgen_eq_658_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|modgen_eq_658_nx12 --operation mode is normal P1_modgen_eq_658_nx12 = P1_rec_sm_3 # P1_rec_sm_2 # P1_rec_sm_1 # !P1_rec_sm_0; --P3_nx25 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx25 --operation mode is normal P3_nx25 = !P3_counter_1 & !P3_counter_2 # !P3_counter_3; --P3_modgen_gt_664_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_gt_664_nx52 --operation mode is normal P3_modgen_gt_664_nx52 = !P3_counter_3 & (!P3_counter_2 # !P3_counter_1 # !P3_counter_0); --P3_modgen_gt_665_nx52 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_gt_665_nx52 --operation mode is normal P3_modgen_gt_665_nx52 = !P3_counter_3 & !P3_counter_2; --P3_nx38 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx38 --operation mode is normal P3_nx38 = P3_counter_3 & (!P3_counter_1 & !P3_counter_2) # !P3_counter_3 & P3_counter_0 & P3_counter_1 & P3_counter_2; --P3_nx40 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|nx40 --operation mode is normal P3_nx40 = !P3_counter_3 & !P3_counter_2 & (P3_counter_0 # P3_counter_1); --P3_modgen_eq_658_nx12 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|modgen_eq_658_nx12 --operation mode is normal P3_modgen_eq_658_nx12 = P3_rec_sm_3 # P3_rec_sm_2 # P3_rec_sm_1 # !P3_rec_sm_0; --S3_NI_P0_D_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_2 --operation mode is normal S3_NI_P0_D_2_lut_out = S3_NI_P2_CLKout; S3_NI_P0_D_2 = DFFEAS(S3_NI_P0_D_2_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P4_D_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_2 --operation mode is normal S3_NI_P4_D_2_lut_out = S3_NI_P2_D_4; S3_NI_P4_D_2 = DFFEAS(S3_NI_P4_D_2_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_2 --operation mode is normal S2_NI_P0_D_2_lut_out = S2_NI_P2_CLKout; S2_NI_P0_D_2 = DFFEAS(S2_NI_P0_D_2_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P4_D_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_2 --operation mode is normal S2_NI_P4_D_2_lut_out = S2_NI_P2_D_4; S2_NI_P4_D_2 = DFFEAS(S2_NI_P4_D_2_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_2 --operation mode is normal S1_NI_P0_D_2_lut_out = S1_NI_P2_CLKout; S1_NI_P0_D_2 = DFFEAS(S1_NI_P0_D_2_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P4_D_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_2 --operation mode is normal S1_NI_P4_D_2_lut_out = S1_NI_P2_D_4; S1_NI_P4_D_2 = DFFEAS(S1_NI_P4_D_2_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_57 is scsn_slave_nw_dll_ob0_ob_data_57 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_57_lut_out = scsn_slave_nw_dll_ob0_ob_data_56; scsn_slave_nw_dll_ob0_ob_data_57 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_57_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_57, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_58 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_58 --operation mode is normal Y1_d_to_dll_58 = !Y1_current_state_2 & Y1_forward_buffer_58 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_4 is scsn_slave_nw_dll_ob0_ob_crc_4 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_4_lut_out = scsn_slave_nw_dll_ob0_ob_crc_3; scsn_slave_nw_dll_ob0_ob_crc_4 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_4_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_57, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_57 is scsn_slave_nw_dll_ob1_ob_data_57 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_57_lut_out = scsn_slave_nw_dll_ob1_ob_data_56; scsn_slave_nw_dll_ob1_ob_data_57 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_57_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_57, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_58 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_58 --operation mode is normal Y2_d_to_dll_58 = !Y2_current_state_2 & Y2_forward_buffer_58 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_4 is scsn_slave_nw_dll_ob1_ob_crc_4 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_4_lut_out = scsn_slave_nw_dll_ob1_ob_crc_3; scsn_slave_nw_dll_ob1_ob_crc_4 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_4_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_57, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_63 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_63 --operation mode is normal D1_jtgsnd_ser_t_63_lut_out = D1_jtgsnd_ser_t_62; D1_jtgsnd_ser_t_63 = DFFEAS(D1_jtgsnd_ser_t_63_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_8, , , D1_jtgsnd_we_g_1); --N1_request_7 is mcm_nw_nwl:scsn_slave_nw_nwl|request_7 --operation mode is normal N1_request_7 = N1_select_rq & (L2_data_out_7) # !N1_select_rq & L1_data_out_7; --T1_s_reg_12 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_12 --operation mode is normal T1_s_reg_12_lut_out = T1_s_reg_13; T1_s_reg_12 = DFFEAS(T1_s_reg_12_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_19, , , D1_we_tms); --E1_jtgsnd_ser_t_63 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_63 --operation mode is normal E1_jtgsnd_ser_t_63_lut_out = E1_jtgsnd_ser_t_62; E1_jtgsnd_ser_t_63 = DFFEAS(E1_jtgsnd_ser_t_63_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_8, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_63 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_63 --operation mode is normal E2_jtgsnd_ser_t_63_lut_out = E2_jtgsnd_ser_t_62; E2_jtgsnd_ser_t_63 = DFFEAS(E2_jtgsnd_ser_t_63_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_8, , , E2_jtgsnd_we_g_1); --T2_s_reg_12 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_12 --operation mode is normal T2_s_reg_12_lut_out = T2_s_reg_13; T2_s_reg_12 = DFFEAS(T2_s_reg_12_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_19, , , E1_we_tms); --T3_s_reg_12 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_12 --operation mode is normal T3_s_reg_12_lut_out = T3_s_reg_13; T3_s_reg_12 = DFFEAS(T3_s_reg_12_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_19, , , E2_we_tms); --F1_ex_p_q1pass_2 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_2 --operation mode is normal F1_ex_p_q1pass_2 = F1_ex_p_modgen_gt_595_nx56 & (F1_data_1p_m_2) # !F1_ex_p_modgen_gt_595_nx56 & F1_data_1p_m_3; --F1_nx370 is ni2dpm_12:ni_ni_neg|nx370 --operation mode is normal F1_nx370 = G1_ni_sel_p_2 # !G1_NOT_ni_sel_p_3; --F1_ex_p_q1pass_3 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_3 --operation mode is normal F1_ex_p_q1pass_3 = G1_NOT_ni_sel_s_3 & (G1_ni_sel_s_2 & (F1_data_1p_m_3) # !G1_ni_sel_s_2 & F1_data_1p_m_4) # !G1_NOT_ni_sel_s_3 & (F1_data_1p_m_3); --F1_ex_p_modgen_gt_608_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_608_nx56 --operation mode is normal F1_ex_p_modgen_gt_608_nx56 = G1_ni_sel_p_2 # G1_ni_sel_p_1 & !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --F1_ex_p_q1pass_4 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_4 --operation mode is normal F1_ex_p_q1pass_4 = F1_ex_p_modgen_gt_593_nx56 & (F1_data_1p_m_4) # !F1_ex_p_modgen_gt_593_nx56 & F1_data_1p_m_5; --F1_ex_p_q1pass_6 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_6 --operation mode is normal F1_ex_p_q1pass_6 = F1_ex_p_modgen_gt_591_nx56 & (F1_data_1p_m_6) # !F1_ex_p_modgen_gt_591_nx56 & F1_data_1p_m_7; --F1_ex_p_modgen_gt_600_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_600_nx56 --operation mode is normal F1_ex_p_modgen_gt_600_nx56 = G1_ni_sel_p_2 & G1_ni_sel_p_1 & !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --F1_ex_p_q1pass_5 is ni2dpm_12:ni_ni_neg|ex_p_q1pass_5 --operation mode is normal F1_ex_p_q1pass_5 = G1_NOT_ni_sel_s_3 & (F1_nx373 & (F1_data_1p_m_5) # !F1_nx373 & F1_data_1p_m_6) # !G1_NOT_ni_sel_s_3 & (F1_data_1p_m_5); --F1_nx372 is ni2dpm_12:ni_ni_neg|nx372 --operation mode is normal F1_nx372 = G1_ni_sel_p_2 & G1_ni_sel_p_1; --F1_ex_p_modgen_gt_604_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_604_nx56 --operation mode is normal F1_ex_p_modgen_gt_604_nx56 = G1_ni_sel_p_2 & (G1_ni_sel_p_1 # !G1_NOT_ni_sel_p_0) # !G1_NOT_ni_sel_p_3; --F1_data_1p_m_8 is ni2dpm_12:ni_ni_neg|data_1p_m_8 --operation mode is normal F1_data_1p_m_8 = G1_ni_or_mask_8 # !G1_NOT_ni_and_mask_8 & (G1_ni_xor_mask_8 $ F1_data_1p_8); --F1_ex_p_modgen_gt_589_nx54 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_589_nx54 --operation mode is normal F1_ex_p_modgen_gt_589_nx54 = !G1_NOT_ni_sel_s_3 & (G1_ni_sel_s_2 # G1_ni_sel_s_1 # G1_ni_sel_s_0); --F1_nx368 is ni2dpm_12:ni_ni_neg|nx368 --operation mode is normal F1_nx368 = G1_ni_or_mask_9 # !G1_NOT_ni_and_mask_9 & (G1_ni_xor_mask_9 $ F1_data_1p_9); --F1_data_1p_m_7 is ni2dpm_12:ni_ni_neg|data_1p_m_7 --operation mode is normal F1_data_1p_m_7 = G1_ni_or_mask_7 # !G1_NOT_ni_and_mask_7 & (G1_ni_xor_mask_7 $ F1_data_1p_7); --F1_nx362 is ni2dpm_12:ni_ni_neg|nx362 --operation mode is normal F1_nx362 = G1_NOT_ni_sel_p_0 & (F1_ex_p_q1pass_2) # !G1_NOT_ni_sel_p_0 & F1_ex_p_q1pass_3; --F1_nx374 is ni2dpm_12:ni_ni_neg|nx374 --operation mode is normal F1_nx374 = G1_ni_sel_p_1 # G1_NOT_ni_sel_p_0 & (F1_ex_p_q1pass_0) # !G1_NOT_ni_sel_p_0 & F1_ex_p_q1pass_1; --F1_nx363 is ni2dpm_12:ni_ni_neg|nx363 --operation mode is normal F1_nx363 = G1_NOT_ni_sel_p_0 & (F1_ex_p_q1pass_6) # !G1_NOT_ni_sel_p_0 & F1_ex_p_q1pass_7; --F1_nx375 is ni2dpm_12:ni_ni_neg|nx375 --operation mode is normal F1_nx375 = G1_ni_sel_p_1 # G1_NOT_ni_sel_p_0 & (F1_ex_p_q1pass_4) # !G1_NOT_ni_sel_p_0 & F1_ex_p_q1pass_5; --S3_NI_P2_CLKout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_CLKout --operation mode is normal S3_NI_P2_CLKout_lut_out = S3_NI_P0_D_3; S3_NI_P2_CLKout = DFFEAS(S3_NI_P2_CLKout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_4 --operation mode is normal S3_NI_P2_D_4_lut_out = S3_NI_P2_D_5; S3_NI_P2_D_4 = DFFEAS(S3_NI_P2_D_4_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P2_CLKout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_CLKout --operation mode is normal S2_NI_P2_CLKout_lut_out = S2_NI_P0_D_3; S2_NI_P2_CLKout = DFFEAS(S2_NI_P2_CLKout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_4 --operation mode is normal S2_NI_P2_D_4_lut_out = S2_NI_P2_D_5; S2_NI_P2_D_4 = DFFEAS(S2_NI_P2_D_4_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P2_CLKout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_CLKout --operation mode is normal S1_NI_P2_CLKout_lut_out = S1_NI_P0_D_3; S1_NI_P2_CLKout = DFFEAS(S1_NI_P2_CLKout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_4 --operation mode is normal S1_NI_P2_D_4_lut_out = S1_NI_P2_D_5; S1_NI_P2_D_4 = DFFEAS(S1_NI_P2_D_4_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_56 is scsn_slave_nw_dll_ob0_ob_data_56 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_56_lut_out = scsn_slave_nw_dll_ob0_ob_data_55; scsn_slave_nw_dll_ob0_ob_data_56 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_56_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_56, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_57 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_57 --operation mode is normal Y1_d_to_dll_57 = !Y1_current_state_2 & Y1_forward_buffer_57 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_3 is scsn_slave_nw_dll_ob0_ob_crc_3 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_3_lut_out = scsn_slave_nw_dll_ob0_ob_crc_2; scsn_slave_nw_dll_ob0_ob_crc_3 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_3_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_56, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_56 is scsn_slave_nw_dll_ob1_ob_data_56 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_56_lut_out = scsn_slave_nw_dll_ob1_ob_data_55; scsn_slave_nw_dll_ob1_ob_data_56 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_56_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_56, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_57 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_57 --operation mode is normal Y2_d_to_dll_57 = !Y2_current_state_2 & Y2_forward_buffer_57 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_3 is scsn_slave_nw_dll_ob1_ob_crc_3 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_3_lut_out = scsn_slave_nw_dll_ob1_ob_crc_2; scsn_slave_nw_dll_ob1_ob_crc_3 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_3_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_56, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_62 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_62 --operation mode is normal D1_jtgsnd_ser_t_62_lut_out = D1_jtgsnd_ser_t_61; D1_jtgsnd_ser_t_62 = DFFEAS(D1_jtgsnd_ser_t_62_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_9, , , D1_jtgsnd_we_g_1); --N1_request_8 is mcm_nw_nwl:scsn_slave_nw_nwl|request_8 --operation mode is normal N1_request_8 = N1_select_rq & (L2_data_out_8) # !N1_select_rq & L1_data_out_8; --T1_s_reg_13 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_13 --operation mode is normal T1_s_reg_13_lut_out = T1_s_reg_14; T1_s_reg_13 = DFFEAS(T1_s_reg_13_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_18, , , D1_we_tms); --E1_jtgsnd_ser_t_62 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_62 --operation mode is normal E1_jtgsnd_ser_t_62_lut_out = E1_jtgsnd_ser_t_61; E1_jtgsnd_ser_t_62 = DFFEAS(E1_jtgsnd_ser_t_62_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_9, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_62 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_62 --operation mode is normal E2_jtgsnd_ser_t_62_lut_out = E2_jtgsnd_ser_t_61; E2_jtgsnd_ser_t_62 = DFFEAS(E2_jtgsnd_ser_t_62_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_9, , , E2_jtgsnd_we_g_1); --T2_s_reg_13 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_13 --operation mode is normal T2_s_reg_13_lut_out = T2_s_reg_14; T2_s_reg_13 = DFFEAS(T2_s_reg_13_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_18, , , E1_we_tms); --T3_s_reg_13 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_13 --operation mode is normal T3_s_reg_13_lut_out = T3_s_reg_14; T3_s_reg_13 = DFFEAS(T3_s_reg_13_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_18, , , E2_we_tms); --F1_data_1p_m_3 is ni2dpm_12:ni_ni_neg|data_1p_m_3 --operation mode is normal F1_data_1p_m_3 = G1_ni_or_mask_3 # !G1_NOT_ni_and_mask_3 & (G1_ni_xor_mask_3 $ F1_data_1p_3); --F1_ex_p_modgen_gt_595_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_595_nx56 --operation mode is normal F1_ex_p_modgen_gt_595_nx56 = G1_ni_sel_s_2 # G1_ni_sel_s_1 & G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --F1_data_1p_m_4 is ni2dpm_12:ni_ni_neg|data_1p_m_4 --operation mode is normal F1_data_1p_m_4 = G1_ni_or_mask_4 # !G1_NOT_ni_and_mask_4 & (G1_ni_xor_mask_4 $ F1_data_1p_4); --F1_data_1p_m_5 is ni2dpm_12:ni_ni_neg|data_1p_m_5 --operation mode is normal F1_data_1p_m_5 = G1_ni_or_mask_5 # !G1_NOT_ni_and_mask_5 & (G1_ni_xor_mask_5 $ F1_data_1p_5); --F1_ex_p_modgen_gt_593_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_593_nx56 --operation mode is normal F1_ex_p_modgen_gt_593_nx56 = G1_ni_sel_s_2 & (G1_ni_sel_s_1 # G1_ni_sel_s_0) # !G1_NOT_ni_sel_s_3; --F1_data_1p_m_6 is ni2dpm_12:ni_ni_neg|data_1p_m_6 --operation mode is normal F1_data_1p_m_6 = G1_ni_or_mask_6 # !G1_NOT_ni_and_mask_6 & (G1_ni_xor_mask_6 $ F1_data_1p_6); --F1_ex_p_modgen_gt_591_nx56 is ni2dpm_12:ni_ni_neg|ex_p_modgen_gt_591_nx56 --operation mode is normal F1_ex_p_modgen_gt_591_nx56 = G1_ni_sel_s_2 & G1_ni_sel_s_1 & G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --F1_nx373 is ni2dpm_12:ni_ni_neg|nx373 --operation mode is normal F1_nx373 = G1_ni_sel_s_2 & G1_ni_sel_s_1; --G1_ni_or_mask_8 is general_config_notri:nic_notri|ni_or_mask_8 --operation mode is normal G1_ni_or_mask_8_lut_out = G1_ni_or_mask_8; G1_ni_or_mask_8 = DFFEAS(G1_ni_or_mask_8_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_23, , , G1_NOT_ix69_ix28_nx12); --G1_NOT_ni_and_mask_8 is general_config_notri:nic_notri|NOT_ni_and_mask_8 --operation mode is normal G1_NOT_ni_and_mask_8_lut_out = G1_NOT_ni_and_mask_8; G1_NOT_ni_and_mask_8 = DFFEAS(G1_NOT_ni_and_mask_8_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L521, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_8 is general_config_notri:nic_notri|ni_xor_mask_8 --operation mode is normal G1_ni_xor_mask_8_lut_out = G1_ni_xor_mask_8; G1_ni_xor_mask_8 = DFFEAS(G1_ni_xor_mask_8_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_3, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_8 is ni2dpm_12:ni_ni_neg|data_1p_8 --operation mode is normal F1_data_1p_8_lut_out = DUT_P4_D[8]; F1_data_1p_8 = DFFEAS(F1_data_1p_8_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_9 is general_config_notri:nic_notri|ni_or_mask_9 --operation mode is normal G1_ni_or_mask_9_lut_out = G1_ni_or_mask_9; G1_ni_or_mask_9 = DFFEAS(G1_ni_or_mask_9_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_22, , , G1_NOT_ix69_ix28_nx12); --G1_NOT_ni_and_mask_9 is general_config_notri:nic_notri|NOT_ni_and_mask_9 --operation mode is normal G1_NOT_ni_and_mask_9_lut_out = G1_NOT_ni_and_mask_9; G1_NOT_ni_and_mask_9 = DFFEAS(G1_NOT_ni_and_mask_9_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L321, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_9 is general_config_notri:nic_notri|ni_xor_mask_9 --operation mode is normal G1_ni_xor_mask_9_lut_out = G1_ni_xor_mask_9; G1_ni_xor_mask_9 = DFFEAS(G1_ni_xor_mask_9_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_2, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_9 is ni2dpm_12:ni_ni_neg|data_1p_9 --operation mode is normal F1_data_1p_9_lut_out = DUT_P4_D[9]; F1_data_1p_9 = DFFEAS(F1_data_1p_9_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_7 is general_config_notri:nic_notri|ni_or_mask_7 --operation mode is normal G1_ni_or_mask_7_lut_out = N1_request_24; G1_ni_or_mask_7 = DFFEAS(G1_ni_or_mask_7_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_7 is general_config_notri:nic_notri|NOT_ni_and_mask_7 --operation mode is normal G1_NOT_ni_and_mask_7_lut_out = G1_NOT_ni_and_mask_7; G1_NOT_ni_and_mask_7 = DFFEAS(G1_NOT_ni_and_mask_7_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L721, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_7 is general_config_notri:nic_notri|ni_xor_mask_7 --operation mode is normal G1_ni_xor_mask_7_lut_out = G1_ni_xor_mask_7; G1_ni_xor_mask_7 = DFFEAS(G1_ni_xor_mask_7_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_4, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_7 is ni2dpm_12:ni_ni_neg|data_1p_7 --operation mode is normal F1_data_1p_7_lut_out = DUT_P4_D[7]; F1_data_1p_7 = DFFEAS(F1_data_1p_7_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P0_D_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_3 --operation mode is normal S3_NI_P0_D_3_lut_out = S3_NI_P1_D_0; S3_NI_P0_D_3 = DFFEAS(S3_NI_P0_D_3_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_5 --operation mode is normal S3_NI_P2_D_5_lut_out = S3_NI_P4_D_1; S3_NI_P2_D_5 = DFFEAS(S3_NI_P2_D_5_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_3 --operation mode is normal S2_NI_P0_D_3_lut_out = S2_NI_P1_D_0; S2_NI_P0_D_3 = DFFEAS(S2_NI_P0_D_3_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_5 --operation mode is normal S2_NI_P2_D_5_lut_out = S2_NI_P4_D_1; S2_NI_P2_D_5 = DFFEAS(S2_NI_P2_D_5_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_3 --operation mode is normal S1_NI_P0_D_3_lut_out = S1_NI_P1_D_0; S1_NI_P0_D_3 = DFFEAS(S1_NI_P0_D_3_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_5 --operation mode is normal S1_NI_P2_D_5_lut_out = S1_NI_P4_D_1; S1_NI_P2_D_5 = DFFEAS(S1_NI_P2_D_5_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_55 is scsn_slave_nw_dll_ob0_ob_data_55 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_55_lut_out = scsn_slave_nw_dll_ob0_ob_data_54; scsn_slave_nw_dll_ob0_ob_data_55 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_55_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_55, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_56 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_56 --operation mode is normal Y1_d_to_dll_56 = !Y1_current_state_2 & Y1_forward_buffer_56 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_2 is scsn_slave_nw_dll_ob0_ob_crc_2 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_2_lut_out = scsn_slave_nw_dll_ob0_ob_crc_1 $ (scsn_slave_nw_dll_ob0_ob_crc_15 & (scsn_slave_nw_dll_ob0_NOT_ob_empty)); scsn_slave_nw_dll_ob0_ob_crc_2 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_2_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_55, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_55 is scsn_slave_nw_dll_ob1_ob_data_55 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_55_lut_out = scsn_slave_nw_dll_ob1_ob_data_54; scsn_slave_nw_dll_ob1_ob_data_55 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_55_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_55, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_56 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_56 --operation mode is normal Y2_d_to_dll_56 = !Y2_current_state_2 & Y2_forward_buffer_56 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_2 is scsn_slave_nw_dll_ob1_ob_crc_2 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_2_lut_out = scsn_slave_nw_dll_ob1_ob_crc_1 $ (scsn_slave_nw_dll_ob1_ob_crc_15 & (scsn_slave_nw_dll_ob1_NOT_ob_empty)); scsn_slave_nw_dll_ob1_ob_crc_2 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_2_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_55, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_61 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_61 --operation mode is normal D1_jtgsnd_ser_t_61_lut_out = D1_jtgsnd_ser_t_60; D1_jtgsnd_ser_t_61 = DFFEAS(D1_jtgsnd_ser_t_61_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_23, , , D1_jtgsnd_we_g_2); --T1_s_reg_14 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_14 --operation mode is normal T1_s_reg_14_lut_out = T1_s_reg_15; T1_s_reg_14 = DFFEAS(T1_s_reg_14_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_17, , , D1_we_tms); --E1_jtgsnd_ser_t_61 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_61 --operation mode is normal E1_jtgsnd_ser_t_61_lut_out = E1_jtgsnd_ser_t_60; E1_jtgsnd_ser_t_61 = DFFEAS(E1_jtgsnd_ser_t_61_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_23, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_61 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_61 --operation mode is normal E2_jtgsnd_ser_t_61_lut_out = E2_jtgsnd_ser_t_60; E2_jtgsnd_ser_t_61 = DFFEAS(E2_jtgsnd_ser_t_61_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_23, , , E2_jtgsnd_we_g_2); --T2_s_reg_14 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_14 --operation mode is normal T2_s_reg_14_lut_out = T2_s_reg_15; T2_s_reg_14 = DFFEAS(T2_s_reg_14_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_17, , , E1_we_tms); --T3_s_reg_14 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_14 --operation mode is normal T3_s_reg_14_lut_out = T3_s_reg_15; T3_s_reg_14 = DFFEAS(T3_s_reg_14_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_17, , , E2_we_tms); --G1_ni_or_mask_3 is general_config_notri:nic_notri|ni_or_mask_3 --operation mode is normal G1_ni_or_mask_3_lut_out = N1_request_28; G1_ni_or_mask_3 = DFFEAS(G1_ni_or_mask_3_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_3 is general_config_notri:nic_notri|NOT_ni_and_mask_3 --operation mode is normal G1_NOT_ni_and_mask_3_lut_out = G1_NOT_ni_and_mask_3; G1_NOT_ni_and_mask_3 = DFFEAS(G1_NOT_ni_and_mask_3_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L531, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_3 is general_config_notri:nic_notri|ni_xor_mask_3 --operation mode is normal G1_ni_xor_mask_3_lut_out = G1_ni_xor_mask_3; G1_ni_xor_mask_3 = DFFEAS(G1_ni_xor_mask_3_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_8, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_3 is ni2dpm_12:ni_ni_neg|data_1p_3 --operation mode is normal F1_data_1p_3_lut_out = DUT_P4_D[3]; F1_data_1p_3 = DFFEAS(F1_data_1p_3_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_4 is general_config_notri:nic_notri|ni_or_mask_4 --operation mode is normal G1_ni_or_mask_4_lut_out = N1_request_27; G1_ni_or_mask_4 = DFFEAS(G1_ni_or_mask_4_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_4 is general_config_notri:nic_notri|NOT_ni_and_mask_4 --operation mode is normal G1_NOT_ni_and_mask_4_lut_out = G1_NOT_ni_and_mask_4; G1_NOT_ni_and_mask_4 = DFFEAS(G1_NOT_ni_and_mask_4_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L331, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_4 is general_config_notri:nic_notri|ni_xor_mask_4 --operation mode is normal G1_ni_xor_mask_4_lut_out = G1_ni_xor_mask_4; G1_ni_xor_mask_4 = DFFEAS(G1_ni_xor_mask_4_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_7, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_4 is ni2dpm_12:ni_ni_neg|data_1p_4 --operation mode is normal F1_data_1p_4_lut_out = DUT_P4_D[4]; F1_data_1p_4 = DFFEAS(F1_data_1p_4_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_5 is general_config_notri:nic_notri|ni_or_mask_5 --operation mode is normal G1_ni_or_mask_5_lut_out = N1_request_26; G1_ni_or_mask_5 = DFFEAS(G1_ni_or_mask_5_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_5 is general_config_notri:nic_notri|NOT_ni_and_mask_5 --operation mode is normal G1_NOT_ni_and_mask_5_lut_out = G1_NOT_ni_and_mask_5; G1_NOT_ni_and_mask_5 = DFFEAS(G1_NOT_ni_and_mask_5_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L131, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_5 is general_config_notri:nic_notri|ni_xor_mask_5 --operation mode is normal G1_ni_xor_mask_5_lut_out = G1_ni_xor_mask_5; G1_ni_xor_mask_5 = DFFEAS(G1_ni_xor_mask_5_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_6, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_5 is ni2dpm_12:ni_ni_neg|data_1p_5 --operation mode is normal F1_data_1p_5_lut_out = DUT_P4_D[5]; F1_data_1p_5 = DFFEAS(F1_data_1p_5_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_ni_or_mask_6 is general_config_notri:nic_notri|ni_or_mask_6 --operation mode is normal G1_ni_or_mask_6_lut_out = N1_request_25; G1_ni_or_mask_6 = DFFEAS(G1_ni_or_mask_6_lut_out, X1__clk0, J1_chipRST_n, , G1_NOT_nx388, , , , ); --G1_NOT_ni_and_mask_6 is general_config_notri:nic_notri|NOT_ni_and_mask_6 --operation mode is normal G1_NOT_ni_and_mask_6_lut_out = G1_NOT_ni_and_mask_6; G1_NOT_ni_and_mask_6 = DFFEAS(G1_NOT_ni_and_mask_6_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1L921, , , G1_NOT_ix69_ix28_nx12); --G1_ni_xor_mask_6 is general_config_notri:nic_notri|ni_xor_mask_6 --operation mode is normal G1_ni_xor_mask_6_lut_out = G1_ni_xor_mask_6; G1_ni_xor_mask_6 = DFFEAS(G1_ni_xor_mask_6_lut_out, X1__clk0, J1_chipRST_n, , G1_nx428, N1_request_5, , , G1_NOT_ix69_ix28_nx12); --F1_data_1p_6 is ni2dpm_12:ni_ni_neg|data_1p_6 --operation mode is normal F1_data_1p_6_lut_out = DUT_P4_D[6]; F1_data_1p_6 = DFFEAS(F1_data_1p_6_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --N1_request_13 is mcm_nw_nwl:scsn_slave_nw_nwl|request_13 --operation mode is normal N1_request_13 = N1_select_rq & (L2_data_out_13) # !N1_select_rq & L1_data_out_13; --N1_request_12 is mcm_nw_nwl:scsn_slave_nw_nwl|request_12 --operation mode is normal N1_request_12 = N1_select_rq & (L2_data_out_12) # !N1_select_rq & L1_data_out_12; --N1_request_14 is mcm_nw_nwl:scsn_slave_nw_nwl|request_14 --operation mode is normal N1_request_14 = N1_select_rq & (L2_data_out_14) # !N1_select_rq & L1_data_out_14; --N1_request_4 is mcm_nw_nwl:scsn_slave_nw_nwl|request_4 --operation mode is normal N1_request_4 = N1_select_rq & (L2_data_out_4) # !N1_select_rq & L1_data_out_4; --S3_NI_P1_D_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_0 --operation mode is normal S3_NI_P1_D_0_lut_out = S3_NI_P1_D_1; S3_NI_P1_D_0 = DFFEAS(S3_NI_P1_D_0_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P4_D_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_1 --operation mode is normal S3_NI_P4_D_1_lut_out = S3_NI_P2_D_6; S3_NI_P4_D_1 = DFFEAS(S3_NI_P4_D_1_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_0 --operation mode is normal S2_NI_P1_D_0_lut_out = S2_NI_P1_D_1; S2_NI_P1_D_0 = DFFEAS(S2_NI_P1_D_0_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P4_D_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_1 --operation mode is normal S2_NI_P4_D_1_lut_out = S2_NI_P2_D_6; S2_NI_P4_D_1 = DFFEAS(S2_NI_P4_D_1_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_0 --operation mode is normal S1_NI_P1_D_0_lut_out = S1_NI_P1_D_1; S1_NI_P1_D_0 = DFFEAS(S1_NI_P1_D_0_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P4_D_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_1 --operation mode is normal S1_NI_P4_D_1_lut_out = S1_NI_P2_D_6; S1_NI_P4_D_1 = DFFEAS(S1_NI_P4_D_1_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_54 is scsn_slave_nw_dll_ob0_ob_data_54 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_54_lut_out = scsn_slave_nw_dll_ob0_ob_data_53; scsn_slave_nw_dll_ob0_ob_data_54 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_54_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_54, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_55 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_55 --operation mode is normal Y1_d_to_dll_55 = !Y1_current_state_2 & Y1_forward_buffer_55 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_1 is scsn_slave_nw_dll_ob0_ob_crc_1 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_1_lut_out = scsn_slave_nw_dll_ob0_ob_crc_0; scsn_slave_nw_dll_ob0_ob_crc_1 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_1_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_54, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_54 is scsn_slave_nw_dll_ob1_ob_data_54 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_54_lut_out = scsn_slave_nw_dll_ob1_ob_data_53; scsn_slave_nw_dll_ob1_ob_data_54 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_54_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_54, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_55 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_55 --operation mode is normal Y2_d_to_dll_55 = !Y2_current_state_2 & Y2_forward_buffer_55 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_1 is scsn_slave_nw_dll_ob1_ob_crc_1 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_1_lut_out = scsn_slave_nw_dll_ob1_ob_crc_0; scsn_slave_nw_dll_ob1_ob_crc_1 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_1_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_54, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_60 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_60 --operation mode is normal D1_jtgsnd_ser_t_60_lut_out = D1_jtgsnd_ser_t_59; D1_jtgsnd_ser_t_60 = DFFEAS(D1_jtgsnd_ser_t_60_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_10, , , D1_jtgsnd_we_g_1); --T1_s_reg_15 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_15 --operation mode is normal T1_s_reg_15_lut_out = T1_s_reg_16; T1_s_reg_15 = DFFEAS(T1_s_reg_15_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_16, , , D1_we_tms); --E1_jtgsnd_ser_t_60 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_60 --operation mode is normal E1_jtgsnd_ser_t_60_lut_out = E1_jtgsnd_ser_t_59; E1_jtgsnd_ser_t_60 = DFFEAS(E1_jtgsnd_ser_t_60_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_10, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_60 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_60 --operation mode is normal E2_jtgsnd_ser_t_60_lut_out = E2_jtgsnd_ser_t_59; E2_jtgsnd_ser_t_60 = DFFEAS(E2_jtgsnd_ser_t_60_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_10, , , E2_jtgsnd_we_g_1); --T2_s_reg_15 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_15 --operation mode is normal T2_s_reg_15_lut_out = T2_s_reg_16; T2_s_reg_15 = DFFEAS(T2_s_reg_15_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_16, , , E1_we_tms); --T3_s_reg_15 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_15 --operation mode is normal T3_s_reg_15_lut_out = T3_s_reg_16; T3_s_reg_15 = DFFEAS(T3_s_reg_15_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_16, , , E2_we_tms); --N1_request_16 is mcm_nw_nwl:scsn_slave_nw_nwl|request_16 --operation mode is normal N1_request_16 = N1_select_rq & (L2_data_out_16) # !N1_select_rq & L1_data_out_16; --N1_request_15 is mcm_nw_nwl:scsn_slave_nw_nwl|request_15 --operation mode is normal N1_request_15 = N1_select_rq & (L2_data_out_15) # !N1_select_rq & L1_data_out_15; --S3_NI_P1_D_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_1 --operation mode is normal S3_NI_P1_D_1_lut_out = S3_NI_P0_D_4; S3_NI_P1_D_1 = DFFEAS(S3_NI_P1_D_1_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_6 --operation mode is normal S3_NI_P2_D_6_lut_out = S3_NI_P2_D_7; S3_NI_P2_D_6 = DFFEAS(S3_NI_P2_D_6_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_1 --operation mode is normal S2_NI_P1_D_1_lut_out = S2_NI_P0_D_4; S2_NI_P1_D_1 = DFFEAS(S2_NI_P1_D_1_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_6 --operation mode is normal S2_NI_P2_D_6_lut_out = S2_NI_P2_D_7; S2_NI_P2_D_6 = DFFEAS(S2_NI_P2_D_6_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_1 --operation mode is normal S1_NI_P1_D_1_lut_out = S1_NI_P0_D_4; S1_NI_P1_D_1 = DFFEAS(S1_NI_P1_D_1_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_6 --operation mode is normal S1_NI_P2_D_6_lut_out = S1_NI_P2_D_7; S1_NI_P2_D_6 = DFFEAS(S1_NI_P2_D_6_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_53 is scsn_slave_nw_dll_ob0_ob_data_53 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_53_lut_out = scsn_slave_nw_dll_ob0_ob_data_52; scsn_slave_nw_dll_ob0_ob_data_53 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_53_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_53, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_54 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_54 --operation mode is normal Y1_d_to_dll_54 = !Y1_current_state_2 & Y1_forward_buffer_54 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob0_ob_crc_0 is scsn_slave_nw_dll_ob0_ob_crc_0 --operation mode is normal scsn_slave_nw_dll_ob0_ob_crc_0_lut_out = scsn_slave_nw_dll_ob0_ob_data_52 $ (scsn_slave_nw_dll_ob0_ob_crc_15 & (scsn_slave_nw_dll_ob0_NOT_ob_empty)); scsn_slave_nw_dll_ob0_ob_crc_0 = DFFEAS(scsn_slave_nw_dll_ob0_ob_crc_0_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_53, , , scsn_slave_nw_dll_ob0_a_2); --scsn_slave_nw_dll_ob1_ob_data_53 is scsn_slave_nw_dll_ob1_ob_data_53 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_53_lut_out = scsn_slave_nw_dll_ob1_ob_data_52; scsn_slave_nw_dll_ob1_ob_data_53 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_53_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_53, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_54 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_54 --operation mode is normal Y2_d_to_dll_54 = !Y2_current_state_2 & Y2_forward_buffer_54 & (Y2_current_state_0 # !N1_altered_frame1); --scsn_slave_nw_dll_ob1_ob_crc_0 is scsn_slave_nw_dll_ob1_ob_crc_0 --operation mode is normal scsn_slave_nw_dll_ob1_ob_crc_0_lut_out = scsn_slave_nw_dll_ob1_ob_data_52 $ (scsn_slave_nw_dll_ob1_ob_crc_15 & (scsn_slave_nw_dll_ob1_NOT_ob_empty)); scsn_slave_nw_dll_ob1_ob_crc_0 = DFFEAS(scsn_slave_nw_dll_ob1_ob_crc_0_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_53, , , scsn_slave_nw_dll_ob1_a_2); --D1_jtgsnd_ser_t_59 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_59 --operation mode is normal D1_jtgsnd_ser_t_59_lut_out = D1_jtgsnd_ser_t_58; D1_jtgsnd_ser_t_59 = DFFEAS(D1_jtgsnd_ser_t_59_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_11, , , D1_jtgsnd_we_g_1); --T1_s_reg_16 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_16 --operation mode is normal T1_s_reg_16_lut_out = T1_s_reg_17; T1_s_reg_16 = DFFEAS(T1_s_reg_16_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_15, , , D1_we_tms); --E1_jtgsnd_ser_t_59 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_59 --operation mode is normal E1_jtgsnd_ser_t_59_lut_out = E1_jtgsnd_ser_t_58; E1_jtgsnd_ser_t_59 = DFFEAS(E1_jtgsnd_ser_t_59_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_11, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_59 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_59 --operation mode is normal E2_jtgsnd_ser_t_59_lut_out = E2_jtgsnd_ser_t_58; E2_jtgsnd_ser_t_59 = DFFEAS(E2_jtgsnd_ser_t_59_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_11, , , E2_jtgsnd_we_g_1); --T2_s_reg_16 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_16 --operation mode is normal T2_s_reg_16_lut_out = T2_s_reg_17; T2_s_reg_16 = DFFEAS(T2_s_reg_16_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_15, , , E1_we_tms); --T3_s_reg_16 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_16 --operation mode is normal T3_s_reg_16_lut_out = T3_s_reg_17; T3_s_reg_16 = DFFEAS(T3_s_reg_16_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_15, , , E2_we_tms); --S3_NI_P0_D_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_4 --operation mode is normal S3_NI_P0_D_4_lut_out = S3_NI_P1_D_2; S3_NI_P0_D_4 = DFFEAS(S3_NI_P0_D_4_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S3_NI_P2_D_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P2_D_7 --operation mode is normal S3_NI_P2_D_7_lut_out = S3_NI_P4_D_0; S3_NI_P2_D_7 = DFFEAS(S3_NI_P2_D_7_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_4 --operation mode is normal S2_NI_P0_D_4_lut_out = S2_NI_P1_D_2; S2_NI_P0_D_4 = DFFEAS(S2_NI_P0_D_4_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S2_NI_P2_D_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P2_D_7 --operation mode is normal S2_NI_P2_D_7_lut_out = S2_NI_P4_D_0; S2_NI_P2_D_7 = DFFEAS(S2_NI_P2_D_7_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_4 --operation mode is normal S1_NI_P0_D_4_lut_out = S1_NI_P1_D_2; S1_NI_P0_D_4 = DFFEAS(S1_NI_P0_D_4_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S1_NI_P2_D_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P2_D_7 --operation mode is normal S1_NI_P2_D_7_lut_out = S1_NI_P4_D_0; S1_NI_P2_D_7 = DFFEAS(S1_NI_P2_D_7_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_52 is scsn_slave_nw_dll_ob0_ob_data_52 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_52_lut_out = scsn_slave_nw_dll_ob0_ob_data_51; scsn_slave_nw_dll_ob0_ob_data_52 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_52_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_52, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_53 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_53 --operation mode is normal Y1_d_to_dll_53 = !Y1_current_state_2 & Y1_forward_buffer_53 & (Y1_current_state_0 # !N1_altered_frame0); --scsn_slave_nw_dll_ob1_ob_data_52 is scsn_slave_nw_dll_ob1_ob_data_52 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_52_lut_out = scsn_slave_nw_dll_ob1_ob_data_51; scsn_slave_nw_dll_ob1_ob_data_52 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_52_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_52, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_53 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_53 --operation mode is normal Y2_d_to_dll_53 = !Y2_current_state_2 & Y2_forward_buffer_53 & (Y2_current_state_0 # !N1_altered_frame1); --D1_jtgsnd_ser_t_58 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_58 --operation mode is normal D1_jtgsnd_ser_t_58_lut_out = D1_jtgsnd_ser_t_57; D1_jtgsnd_ser_t_58 = DFFEAS(D1_jtgsnd_ser_t_58_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_24, , , D1_jtgsnd_we_g_2); --T1_s_reg_17 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_17 --operation mode is normal T1_s_reg_17_lut_out = T1_s_reg_18; T1_s_reg_17 = DFFEAS(T1_s_reg_17_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_14, , , D1_we_tms); --E1_jtgsnd_ser_t_58 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_58 --operation mode is normal E1_jtgsnd_ser_t_58_lut_out = E1_jtgsnd_ser_t_57; E1_jtgsnd_ser_t_58 = DFFEAS(E1_jtgsnd_ser_t_58_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_24, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_58 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_58 --operation mode is normal E2_jtgsnd_ser_t_58_lut_out = E2_jtgsnd_ser_t_57; E2_jtgsnd_ser_t_58 = DFFEAS(E2_jtgsnd_ser_t_58_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_24, , , E2_jtgsnd_we_g_2); --T2_s_reg_17 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_17 --operation mode is normal T2_s_reg_17_lut_out = T2_s_reg_18; T2_s_reg_17 = DFFEAS(T2_s_reg_17_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_14, , , E1_we_tms); --T3_s_reg_17 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_17 --operation mode is normal T3_s_reg_17_lut_out = T3_s_reg_18; T3_s_reg_17 = DFFEAS(T3_s_reg_17_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_14, , , E2_we_tms); --S3_NI_P1_D_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_2 --operation mode is normal S3_NI_P1_D_2_lut_out = S3_NI_P1_D_3; S3_NI_P1_D_2 = DFFEAS(S3_NI_P1_D_2_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_2 --operation mode is normal S2_NI_P1_D_2_lut_out = S2_NI_P1_D_3; S2_NI_P1_D_2 = DFFEAS(S2_NI_P1_D_2_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_2 --operation mode is normal S1_NI_P1_D_2_lut_out = S1_NI_P1_D_3; S1_NI_P1_D_2 = DFFEAS(S1_NI_P1_D_2_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_51 is scsn_slave_nw_dll_ob0_ob_data_51 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_51_lut_out = scsn_slave_nw_dll_ob0_ob_data_50; scsn_slave_nw_dll_ob0_ob_data_51 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_51_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_51, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_52 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_52 --operation mode is normal Y1_d_to_dll_52 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_52 # !Y1_current_state_0 & (J1_reply_52)); --scsn_slave_nw_dll_ob1_ob_data_51 is scsn_slave_nw_dll_ob1_ob_data_51 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_51_lut_out = scsn_slave_nw_dll_ob1_ob_data_50; scsn_slave_nw_dll_ob1_ob_data_51 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_51_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_51, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_52 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_52 --operation mode is normal Y2_d_to_dll_52 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_52 # !Y2_current_state_0 & (J1_reply_52)); --D1_jtgsnd_ser_t_57 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_57 --operation mode is normal D1_jtgsnd_ser_t_57_lut_out = D1_jtgsnd_ser_t_56; D1_jtgsnd_ser_t_57 = DFFEAS(D1_jtgsnd_ser_t_57_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_12, , , D1_jtgsnd_we_g_1); --T1_s_reg_18 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_18 --operation mode is normal T1_s_reg_18_lut_out = T1_s_reg_19; T1_s_reg_18 = DFFEAS(T1_s_reg_18_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_13, , , D1_we_tms); --E1_jtgsnd_ser_t_57 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_57 --operation mode is normal E1_jtgsnd_ser_t_57_lut_out = E1_jtgsnd_ser_t_56; E1_jtgsnd_ser_t_57 = DFFEAS(E1_jtgsnd_ser_t_57_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_12, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_57 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_57 --operation mode is normal E2_jtgsnd_ser_t_57_lut_out = E2_jtgsnd_ser_t_56; E2_jtgsnd_ser_t_57 = DFFEAS(E2_jtgsnd_ser_t_57_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_12, , , E2_jtgsnd_we_g_1); --T2_s_reg_18 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_18 --operation mode is normal T2_s_reg_18_lut_out = T2_s_reg_19; T2_s_reg_18 = DFFEAS(T2_s_reg_18_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_13, , , E1_we_tms); --T3_s_reg_18 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_18 --operation mode is normal T3_s_reg_18_lut_out = T3_s_reg_19; T3_s_reg_18 = DFFEAS(T3_s_reg_18_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_13, , , E2_we_tms); --S3_NI_P1_D_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_3 --operation mode is normal S3_NI_P1_D_3_lut_out = S3_NI_P0_D_5; S3_NI_P1_D_3 = DFFEAS(S3_NI_P1_D_3_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_3 --operation mode is normal S2_NI_P1_D_3_lut_out = S2_NI_P0_D_5; S2_NI_P1_D_3 = DFFEAS(S2_NI_P1_D_3_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_3 --operation mode is normal S1_NI_P1_D_3_lut_out = S1_NI_P0_D_5; S1_NI_P1_D_3 = DFFEAS(S1_NI_P1_D_3_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_50 is scsn_slave_nw_dll_ob0_ob_data_50 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_50_lut_out = scsn_slave_nw_dll_ob0_ob_data_49; scsn_slave_nw_dll_ob0_ob_data_50 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_50_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_50, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_51 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_51 --operation mode is normal Y1_d_to_dll_51 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_51 # !Y1_current_state_0 & (J1_reply_51)); --J1_reply_52 is mcm_nw_apl:scsn_slave_nw_apl|reply_52 --operation mode is normal J1_reply_52 = N1_request_52 # !J1_current_state_1 & !J1_current_state_0 & !J1_ix34_ix22_nx10; --scsn_slave_nw_dll_ob1_ob_data_50 is scsn_slave_nw_dll_ob1_ob_data_50 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_50_lut_out = scsn_slave_nw_dll_ob1_ob_data_49; scsn_slave_nw_dll_ob1_ob_data_50 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_50_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_50, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_51 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_51 --operation mode is normal Y2_d_to_dll_51 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_51 # !Y2_current_state_0 & (J1_reply_51)); --D1_jtgsnd_ser_t_56 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_56 --operation mode is normal D1_jtgsnd_ser_t_56_lut_out = D1_jtgsnd_ser_t_55; D1_jtgsnd_ser_t_56 = DFFEAS(D1_jtgsnd_ser_t_56_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_25, , , D1_jtgsnd_we_g_2); --T1_s_reg_19 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_19 --operation mode is normal T1_s_reg_19_lut_out = T1_s_reg_20; T1_s_reg_19 = DFFEAS(T1_s_reg_19_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_12, , , D1_we_tms); --E1_jtgsnd_ser_t_56 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_56 --operation mode is normal E1_jtgsnd_ser_t_56_lut_out = E1_jtgsnd_ser_t_55; E1_jtgsnd_ser_t_56 = DFFEAS(E1_jtgsnd_ser_t_56_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_25, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_56 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_56 --operation mode is normal E2_jtgsnd_ser_t_56_lut_out = E2_jtgsnd_ser_t_55; E2_jtgsnd_ser_t_56 = DFFEAS(E2_jtgsnd_ser_t_56_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_25, , , E2_jtgsnd_we_g_2); --T2_s_reg_19 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_19 --operation mode is normal T2_s_reg_19_lut_out = T2_s_reg_20; T2_s_reg_19 = DFFEAS(T2_s_reg_19_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_12, , , E1_we_tms); --T3_s_reg_19 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_19 --operation mode is normal T3_s_reg_19_lut_out = T3_s_reg_20; T3_s_reg_19 = DFFEAS(T3_s_reg_19_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_12, , , E2_we_tms); --S3_NI_P0_D_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_5 --operation mode is normal S3_NI_P0_D_5_lut_out = S3_NI_P1_D_4; S3_NI_P0_D_5 = DFFEAS(S3_NI_P0_D_5_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_5 --operation mode is normal S2_NI_P0_D_5_lut_out = S2_NI_P1_D_4; S2_NI_P0_D_5 = DFFEAS(S2_NI_P0_D_5_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_5 --operation mode is normal S1_NI_P0_D_5_lut_out = S1_NI_P1_D_4; S1_NI_P0_D_5 = DFFEAS(S1_NI_P0_D_5_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_49 is scsn_slave_nw_dll_ob0_ob_data_49 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_49_lut_out = scsn_slave_nw_dll_ob0_ob_data_48; scsn_slave_nw_dll_ob0_ob_data_49 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_49_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_49, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_50 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_50 --operation mode is normal Y1_d_to_dll_50 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_50 # !Y1_current_state_0 & (J1_reply_50)); --J1_reply_51 is mcm_nw_apl:scsn_slave_nw_apl|reply_51 --operation mode is normal J1_reply_51 = N1_request_51 # !J1_current_state_1 & !J1_current_state_0 & !J1_ix34_ix22_nx10; --J1_ix34_ix22_nx10 is mcm_nw_apl:scsn_slave_nw_apl|ix34_ix22_nx10 --operation mode is normal J1_ix34_ix22_nx10 = J1_current_state_2 # !J1_current_state_3; --scsn_slave_nw_dll_ob1_ob_data_49 is scsn_slave_nw_dll_ob1_ob_data_49 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_49_lut_out = scsn_slave_nw_dll_ob1_ob_data_48; scsn_slave_nw_dll_ob1_ob_data_49 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_49_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_49, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_50 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_50 --operation mode is normal Y2_d_to_dll_50 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_50 # !Y2_current_state_0 & (J1_reply_50)); --D1_jtgsnd_ser_t_55 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_55 --operation mode is normal D1_jtgsnd_ser_t_55_lut_out = D1_jtgsnd_ser_t_54; D1_jtgsnd_ser_t_55 = DFFEAS(D1_jtgsnd_ser_t_55_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_13, , , D1_jtgsnd_we_g_1); --T1_s_reg_20 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_20 --operation mode is normal T1_s_reg_20_lut_out = T1_s_reg_21; T1_s_reg_20 = DFFEAS(T1_s_reg_20_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_11, , , D1_we_tms); --E1_jtgsnd_ser_t_55 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_55 --operation mode is normal E1_jtgsnd_ser_t_55_lut_out = E1_jtgsnd_ser_t_54; E1_jtgsnd_ser_t_55 = DFFEAS(E1_jtgsnd_ser_t_55_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_13, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_55 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_55 --operation mode is normal E2_jtgsnd_ser_t_55_lut_out = E2_jtgsnd_ser_t_54; E2_jtgsnd_ser_t_55 = DFFEAS(E2_jtgsnd_ser_t_55_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_13, , , E2_jtgsnd_we_g_1); --T2_s_reg_20 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_20 --operation mode is normal T2_s_reg_20_lut_out = T2_s_reg_21; T2_s_reg_20 = DFFEAS(T2_s_reg_20_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_11, , , E1_we_tms); --T3_s_reg_20 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_20 --operation mode is normal T3_s_reg_20_lut_out = T3_s_reg_21; T3_s_reg_20 = DFFEAS(T3_s_reg_20_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_11, , , E2_we_tms); --S3_NI_P1_D_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_4 --operation mode is normal S3_NI_P1_D_4_lut_out = S3_NI_P0_D_6; S3_NI_P1_D_4 = DFFEAS(S3_NI_P1_D_4_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_4 --operation mode is normal S2_NI_P1_D_4_lut_out = S2_NI_P0_D_6; S2_NI_P1_D_4 = DFFEAS(S2_NI_P1_D_4_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_4 --operation mode is normal S1_NI_P1_D_4_lut_out = S1_NI_P0_D_6; S1_NI_P1_D_4 = DFFEAS(S1_NI_P1_D_4_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_48 is scsn_slave_nw_dll_ob0_ob_data_48 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_48_lut_out = scsn_slave_nw_dll_ob0_ob_data_47; scsn_slave_nw_dll_ob0_ob_data_48 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_48_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_48, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_49 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_49 --operation mode is normal Y1_d_to_dll_49 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_49 # !Y1_current_state_0 & (J1_reply_49)); --J1_reply_50 is mcm_nw_apl:scsn_slave_nw_apl|reply_50 --operation mode is normal J1_reply_50 = N1_request_50 # !J1_current_state_1 & !J1_current_state_0 & !J1_ix34_ix22_nx10; --scsn_slave_nw_dll_ob1_ob_data_48 is scsn_slave_nw_dll_ob1_ob_data_48 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_48_lut_out = scsn_slave_nw_dll_ob1_ob_data_47; scsn_slave_nw_dll_ob1_ob_data_48 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_48_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_48, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_49 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_49 --operation mode is normal Y2_d_to_dll_49 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_49 # !Y2_current_state_0 & (J1_reply_49)); --D1_jtgsnd_ser_t_54 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_54 --operation mode is normal D1_jtgsnd_ser_t_54_lut_out = D1_jtgsnd_ser_t_53; D1_jtgsnd_ser_t_54 = DFFEAS(D1_jtgsnd_ser_t_54_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_14, , , D1_jtgsnd_we_g_1); --T1_s_reg_21 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_21 --operation mode is normal T1_s_reg_21_lut_out = T1_s_reg_22; T1_s_reg_21 = DFFEAS(T1_s_reg_21_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_10, , , D1_we_tms); --E1_jtgsnd_ser_t_54 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_54 --operation mode is normal E1_jtgsnd_ser_t_54_lut_out = E1_jtgsnd_ser_t_53; E1_jtgsnd_ser_t_54 = DFFEAS(E1_jtgsnd_ser_t_54_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_14, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_54 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_54 --operation mode is normal E2_jtgsnd_ser_t_54_lut_out = E2_jtgsnd_ser_t_53; E2_jtgsnd_ser_t_54 = DFFEAS(E2_jtgsnd_ser_t_54_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_14, , , E2_jtgsnd_we_g_1); --T2_s_reg_21 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_21 --operation mode is normal T2_s_reg_21_lut_out = T2_s_reg_22; T2_s_reg_21 = DFFEAS(T2_s_reg_21_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_10, , , E1_we_tms); --T3_s_reg_21 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_21 --operation mode is normal T3_s_reg_21_lut_out = T3_s_reg_22; T3_s_reg_21 = DFFEAS(T3_s_reg_21_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_10, , , E2_we_tms); --S3_NI_P0_D_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_6 --operation mode is normal S3_NI_P0_D_6_lut_out = S3_NI_P0_D_7; S3_NI_P0_D_6 = DFFEAS(S3_NI_P0_D_6_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_6 --operation mode is normal S2_NI_P0_D_6_lut_out = S2_NI_P0_D_7; S2_NI_P0_D_6 = DFFEAS(S2_NI_P0_D_6_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_6 --operation mode is normal S1_NI_P0_D_6_lut_out = S1_NI_P0_D_7; S1_NI_P0_D_6 = DFFEAS(S1_NI_P0_D_6_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_47 is scsn_slave_nw_dll_ob0_ob_data_47 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_47_lut_out = scsn_slave_nw_dll_ob0_ob_data_46; scsn_slave_nw_dll_ob0_ob_data_47 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_47_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_47, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_48 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_48 --operation mode is normal Y1_d_to_dll_48 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_48 # !Y1_current_state_0 & (J1_reply_48)); --J1_reply_49 is mcm_nw_apl:scsn_slave_nw_apl|reply_49 --operation mode is normal J1_reply_49 = N1_request_49 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_47 is scsn_slave_nw_dll_ob1_ob_data_47 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_47_lut_out = scsn_slave_nw_dll_ob1_ob_data_46; scsn_slave_nw_dll_ob1_ob_data_47 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_47_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_47, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_48 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_48 --operation mode is normal Y2_d_to_dll_48 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_48 # !Y2_current_state_0 & (J1_reply_48)); --D1_jtgsnd_ser_t_53 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_53 --operation mode is normal D1_jtgsnd_ser_t_53_lut_out = D1_jtgsnd_ser_t_52; D1_jtgsnd_ser_t_53 = DFFEAS(D1_jtgsnd_ser_t_53_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_26, , , D1_jtgsnd_we_g_2); --T1_s_reg_22 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_22 --operation mode is normal T1_s_reg_22_lut_out = T1_s_reg_23; T1_s_reg_22 = DFFEAS(T1_s_reg_22_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_9, , , D1_we_tms); --E1_jtgsnd_ser_t_53 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_53 --operation mode is normal E1_jtgsnd_ser_t_53_lut_out = E1_jtgsnd_ser_t_52; E1_jtgsnd_ser_t_53 = DFFEAS(E1_jtgsnd_ser_t_53_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_26, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_53 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_53 --operation mode is normal E2_jtgsnd_ser_t_53_lut_out = E2_jtgsnd_ser_t_52; E2_jtgsnd_ser_t_53 = DFFEAS(E2_jtgsnd_ser_t_53_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_26, , , E2_jtgsnd_we_g_2); --T2_s_reg_22 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_22 --operation mode is normal T2_s_reg_22_lut_out = T2_s_reg_23; T2_s_reg_22 = DFFEAS(T2_s_reg_22_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_9, , , E1_we_tms); --T3_s_reg_22 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_22 --operation mode is normal T3_s_reg_22_lut_out = T3_s_reg_23; T3_s_reg_22 = DFFEAS(T3_s_reg_22_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_9, , , E2_we_tms); --S3_NI_P0_D_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_7 --operation mode is normal S3_NI_P0_D_7_lut_out = S3_NI_P0_D_8; S3_NI_P0_D_7 = DFFEAS(S3_NI_P0_D_7_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_7 --operation mode is normal S2_NI_P0_D_7_lut_out = S2_NI_P0_D_8; S2_NI_P0_D_7 = DFFEAS(S2_NI_P0_D_7_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_7 --operation mode is normal S1_NI_P0_D_7_lut_out = S1_NI_P0_D_8; S1_NI_P0_D_7 = DFFEAS(S1_NI_P0_D_7_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_46 is scsn_slave_nw_dll_ob0_ob_data_46 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_46_lut_out = scsn_slave_nw_dll_ob0_ob_data_45; scsn_slave_nw_dll_ob0_ob_data_46 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_46_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_46, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_47 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_47 --operation mode is normal Y1_d_to_dll_47 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_47 # !Y1_current_state_0 & (J1_reply_47)); --J1_reply_48 is mcm_nw_apl:scsn_slave_nw_apl|reply_48 --operation mode is normal J1_reply_48 = N1_request_48 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_46 is scsn_slave_nw_dll_ob1_ob_data_46 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_46_lut_out = scsn_slave_nw_dll_ob1_ob_data_45; scsn_slave_nw_dll_ob1_ob_data_46 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_46_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_46, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_47 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_47 --operation mode is normal Y2_d_to_dll_47 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_47 # !Y2_current_state_0 & (J1_reply_47)); --D1_jtgsnd_ser_t_52 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_52 --operation mode is normal D1_jtgsnd_ser_t_52_lut_out = D1_jtgsnd_ser_t_51; D1_jtgsnd_ser_t_52 = DFFEAS(D1_jtgsnd_ser_t_52_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_27, , , D1_jtgsnd_we_g_2); --T1_s_reg_23 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_23 --operation mode is normal T1_s_reg_23_lut_out = T1_s_reg_24; T1_s_reg_23 = DFFEAS(T1_s_reg_23_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_8, , , D1_we_tms); --E1_jtgsnd_ser_t_52 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_52 --operation mode is normal E1_jtgsnd_ser_t_52_lut_out = E1_jtgsnd_ser_t_51; E1_jtgsnd_ser_t_52 = DFFEAS(E1_jtgsnd_ser_t_52_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_27, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_52 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_52 --operation mode is normal E2_jtgsnd_ser_t_52_lut_out = E2_jtgsnd_ser_t_51; E2_jtgsnd_ser_t_52 = DFFEAS(E2_jtgsnd_ser_t_52_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_27, , , E2_jtgsnd_we_g_2); --T2_s_reg_23 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_23 --operation mode is normal T2_s_reg_23_lut_out = T2_s_reg_24; T2_s_reg_23 = DFFEAS(T2_s_reg_23_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_8, , , E1_we_tms); --T3_s_reg_23 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_23 --operation mode is normal T3_s_reg_23_lut_out = T3_s_reg_24; T3_s_reg_23 = DFFEAS(T3_s_reg_23_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_8, , , E2_we_tms); --S3_NI_P0_D_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_8 --operation mode is normal S3_NI_P0_D_8_lut_out = S3_NI_P_CTRL; S3_NI_P0_D_8 = DFFEAS(S3_NI_P0_D_8_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_8 --operation mode is normal S2_NI_P0_D_8_lut_out = S2_NI_P_CTRL; S2_NI_P0_D_8 = DFFEAS(S2_NI_P0_D_8_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_8 --operation mode is normal S1_NI_P0_D_8_lut_out = S1_NI_P_CTRL; S1_NI_P0_D_8 = DFFEAS(S1_NI_P0_D_8_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_45 is scsn_slave_nw_dll_ob0_ob_data_45 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_45_lut_out = scsn_slave_nw_dll_ob0_ob_data_44; scsn_slave_nw_dll_ob0_ob_data_45 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_45_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_45, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_46 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_46 --operation mode is normal Y1_d_to_dll_46 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_46 # !Y1_current_state_0 & (J1_reply_46)); --J1_reply_47 is mcm_nw_apl:scsn_slave_nw_apl|reply_47 --operation mode is normal J1_reply_47 = N1_request_47 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_45 is scsn_slave_nw_dll_ob1_ob_data_45 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_45_lut_out = scsn_slave_nw_dll_ob1_ob_data_44; scsn_slave_nw_dll_ob1_ob_data_45 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_45_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_45, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_46 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_46 --operation mode is normal Y2_d_to_dll_46 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_46 # !Y2_current_state_0 & (J1_reply_46)); --D1_jtgsnd_ser_t_51 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_51 --operation mode is normal D1_jtgsnd_ser_t_51_lut_out = D1_jtgsnd_ser_t_50; D1_jtgsnd_ser_t_51 = DFFEAS(D1_jtgsnd_ser_t_51_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_18, , , D1_jtgsnd_we_g_2); --T1_s_reg_24 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_24 --operation mode is normal T1_s_reg_24_lut_out = T1_s_reg_25; T1_s_reg_24 = DFFEAS(T1_s_reg_24_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_7, , , D1_we_tms); --E1_jtgsnd_ser_t_51 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_51 --operation mode is normal E1_jtgsnd_ser_t_51_lut_out = E1_jtgsnd_ser_t_50; E1_jtgsnd_ser_t_51 = DFFEAS(E1_jtgsnd_ser_t_51_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_18, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_51 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_51 --operation mode is normal E2_jtgsnd_ser_t_51_lut_out = E2_jtgsnd_ser_t_50; E2_jtgsnd_ser_t_51 = DFFEAS(E2_jtgsnd_ser_t_51_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_18, , , E2_jtgsnd_we_g_2); --T2_s_reg_24 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_24 --operation mode is normal T2_s_reg_24_lut_out = T2_s_reg_25; T2_s_reg_24 = DFFEAS(T2_s_reg_24_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_7, , , E1_we_tms); --T3_s_reg_24 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_24 --operation mode is normal T3_s_reg_24_lut_out = T3_s_reg_25; T3_s_reg_24 = DFFEAS(T3_s_reg_24_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_7, , , E2_we_tms); --S3_NI_P_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P_CTRL --operation mode is normal S3_NI_P_CTRL_lut_out = S3_NI_P1_D_5; S3_NI_P_CTRL = DFFEAS(S3_NI_P_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P_CTRL --operation mode is normal S2_NI_P_CTRL_lut_out = S2_NI_P1_D_5; S2_NI_P_CTRL = DFFEAS(S2_NI_P_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P_CTRL --operation mode is normal S1_NI_P_CTRL_lut_out = S1_NI_P1_D_5; S1_NI_P_CTRL = DFFEAS(S1_NI_P_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_44 is scsn_slave_nw_dll_ob0_ob_data_44 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_44_lut_out = scsn_slave_nw_dll_ob0_ob_data_43; scsn_slave_nw_dll_ob0_ob_data_44 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_44_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_44, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_45 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_45 --operation mode is normal Y1_d_to_dll_45 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_45 # !Y1_current_state_0 & (J1_reply_45)); --J1_reply_46 is mcm_nw_apl:scsn_slave_nw_apl|reply_46 --operation mode is normal J1_reply_46 = N1_request_46 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_44 is scsn_slave_nw_dll_ob1_ob_data_44 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_44_lut_out = scsn_slave_nw_dll_ob1_ob_data_43; scsn_slave_nw_dll_ob1_ob_data_44 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_44_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_44, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_45 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_45 --operation mode is normal Y2_d_to_dll_45 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_45 # !Y2_current_state_0 & (J1_reply_45)); --D1_jtgsnd_ser_t_50 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_50 --operation mode is normal D1_jtgsnd_ser_t_50_lut_out = D1_jtgsnd_ser_t_49; D1_jtgsnd_ser_t_50 = DFFEAS(D1_jtgsnd_ser_t_50_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_15, , , D1_jtgsnd_we_g_1); --T1_s_reg_25 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_25 --operation mode is normal T1_s_reg_25_lut_out = T1_s_reg_26; T1_s_reg_25 = DFFEAS(T1_s_reg_25_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_6, , , D1_we_tms); --E1_jtgsnd_ser_t_50 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_50 --operation mode is normal E1_jtgsnd_ser_t_50_lut_out = E1_jtgsnd_ser_t_49; E1_jtgsnd_ser_t_50 = DFFEAS(E1_jtgsnd_ser_t_50_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_15, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_50 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_50 --operation mode is normal E2_jtgsnd_ser_t_50_lut_out = E2_jtgsnd_ser_t_49; E2_jtgsnd_ser_t_50 = DFFEAS(E2_jtgsnd_ser_t_50_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_15, , , E2_jtgsnd_we_g_1); --T2_s_reg_25 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_25 --operation mode is normal T2_s_reg_25_lut_out = T2_s_reg_26; T2_s_reg_25 = DFFEAS(T2_s_reg_25_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_6, , , E1_we_tms); --T3_s_reg_25 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_25 --operation mode is normal T3_s_reg_25_lut_out = T3_s_reg_26; T3_s_reg_25 = DFFEAS(T3_s_reg_25_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_6, , , E2_we_tms); --S3_NI_P1_D_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_5 --operation mode is normal S3_NI_P1_D_5_lut_out = S3_NI_P0_D_9; S3_NI_P1_D_5 = DFFEAS(S3_NI_P1_D_5_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_5 --operation mode is normal S2_NI_P1_D_5_lut_out = S2_NI_P0_D_9; S2_NI_P1_D_5 = DFFEAS(S2_NI_P1_D_5_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_5 --operation mode is normal S1_NI_P1_D_5_lut_out = S1_NI_P0_D_9; S1_NI_P1_D_5 = DFFEAS(S1_NI_P1_D_5_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_43 is scsn_slave_nw_dll_ob0_ob_data_43 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_43_lut_out = scsn_slave_nw_dll_ob0_ob_data_42; scsn_slave_nw_dll_ob0_ob_data_43 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_43_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_43, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_44 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_44 --operation mode is normal Y1_d_to_dll_44 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_44 # !Y1_current_state_0 & (J1_reply_44)); --J1_reply_45 is mcm_nw_apl:scsn_slave_nw_apl|reply_45 --operation mode is normal J1_reply_45 = N1_request_45 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_43 is scsn_slave_nw_dll_ob1_ob_data_43 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_43_lut_out = scsn_slave_nw_dll_ob1_ob_data_42; scsn_slave_nw_dll_ob1_ob_data_43 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_43_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_43, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_44 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_44 --operation mode is normal Y2_d_to_dll_44 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_44 # !Y2_current_state_0 & (J1_reply_44)); --D1_jtgsnd_ser_t_49 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_49 --operation mode is normal D1_jtgsnd_ser_t_49_lut_out = D1_jtgsnd_ser_t_48; D1_jtgsnd_ser_t_49 = DFFEAS(D1_jtgsnd_ser_t_49_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_31, , , D1_jtgsnd_we_g_1); --T1_s_reg_26 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_26 --operation mode is normal T1_s_reg_26_lut_out = T1_s_reg_27; T1_s_reg_26 = DFFEAS(T1_s_reg_26_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_5, , , D1_we_tms); --E1_jtgsnd_ser_t_49 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_49 --operation mode is normal E1_jtgsnd_ser_t_49_lut_out = E1_jtgsnd_ser_t_48; E1_jtgsnd_ser_t_49 = DFFEAS(E1_jtgsnd_ser_t_49_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_31, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_49 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_49 --operation mode is normal E2_jtgsnd_ser_t_49_lut_out = E2_jtgsnd_ser_t_48; E2_jtgsnd_ser_t_49 = DFFEAS(E2_jtgsnd_ser_t_49_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_31, , , E2_jtgsnd_we_g_1); --T2_s_reg_26 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_26 --operation mode is normal T2_s_reg_26_lut_out = T2_s_reg_27; T2_s_reg_26 = DFFEAS(T2_s_reg_26_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_5, , , E1_we_tms); --T3_s_reg_26 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_26 --operation mode is normal T3_s_reg_26_lut_out = T3_s_reg_27; T3_s_reg_26 = DFFEAS(T3_s_reg_26_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_5, , , E2_we_tms); --S3_NI_P0_D_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_D_9 --operation mode is normal S3_NI_P0_D_9_lut_out = S3_NI_P1_D_6; S3_NI_P0_D_9 = DFFEAS(S3_NI_P0_D_9_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_D_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_D_9 --operation mode is normal S2_NI_P0_D_9_lut_out = S2_NI_P1_D_6; S2_NI_P0_D_9 = DFFEAS(S2_NI_P0_D_9_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_D_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_D_9 --operation mode is normal S1_NI_P0_D_9_lut_out = S1_NI_P1_D_6; S1_NI_P0_D_9 = DFFEAS(S1_NI_P0_D_9_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_42 is scsn_slave_nw_dll_ob0_ob_data_42 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_42_lut_out = scsn_slave_nw_dll_ob0_ob_data_41; scsn_slave_nw_dll_ob0_ob_data_42 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_42_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_42, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_43 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_43 --operation mode is normal Y1_d_to_dll_43 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_43 # !Y1_current_state_0 & (J1_reply_43)); --J1_reply_44 is mcm_nw_apl:scsn_slave_nw_apl|reply_44 --operation mode is normal J1_reply_44 = N1_request_44 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_42 is scsn_slave_nw_dll_ob1_ob_data_42 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_42_lut_out = scsn_slave_nw_dll_ob1_ob_data_41; scsn_slave_nw_dll_ob1_ob_data_42 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_42_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_42, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_43 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_43 --operation mode is normal Y2_d_to_dll_43 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_43 # !Y2_current_state_0 & (J1_reply_43)); --D1_jtgsnd_ser_t_48 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_48 --operation mode is normal D1_jtgsnd_ser_t_48_lut_out = D1_jtgsnd_ser_t_47; D1_jtgsnd_ser_t_48 = DFFEAS(D1_jtgsnd_ser_t_48_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_30, , , D1_jtgsnd_we_g_1); --T1_s_reg_27 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_27 --operation mode is normal T1_s_reg_27_lut_out = T1_s_reg_28; T1_s_reg_27 = DFFEAS(T1_s_reg_27_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_4, , , D1_we_tms); --E1_jtgsnd_ser_t_48 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_48 --operation mode is normal E1_jtgsnd_ser_t_48_lut_out = E1_jtgsnd_ser_t_47; E1_jtgsnd_ser_t_48 = DFFEAS(E1_jtgsnd_ser_t_48_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_30, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_48 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_48 --operation mode is normal E2_jtgsnd_ser_t_48_lut_out = E2_jtgsnd_ser_t_47; E2_jtgsnd_ser_t_48 = DFFEAS(E2_jtgsnd_ser_t_48_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_30, , , E2_jtgsnd_we_g_1); --T2_s_reg_27 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_27 --operation mode is normal T2_s_reg_27_lut_out = T2_s_reg_28; T2_s_reg_27 = DFFEAS(T2_s_reg_27_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_4, , , E1_we_tms); --T3_s_reg_27 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_27 --operation mode is normal T3_s_reg_27_lut_out = T3_s_reg_28; T3_s_reg_27 = DFFEAS(T3_s_reg_27_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_4, , , E2_we_tms); --S3_NI_P1_D_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_6 --operation mode is normal S3_NI_P1_D_6_lut_out = S3_NI_P0_CTRL; S3_NI_P1_D_6 = DFFEAS(S3_NI_P1_D_6_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_6 --operation mode is normal S2_NI_P1_D_6_lut_out = S2_NI_P0_CTRL; S2_NI_P1_D_6 = DFFEAS(S2_NI_P1_D_6_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_6 --operation mode is normal S1_NI_P1_D_6_lut_out = S1_NI_P0_CTRL; S1_NI_P1_D_6 = DFFEAS(S1_NI_P1_D_6_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_41 is scsn_slave_nw_dll_ob0_ob_data_41 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_41_lut_out = scsn_slave_nw_dll_ob0_ob_data_40; scsn_slave_nw_dll_ob0_ob_data_41 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_41_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_41, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_42 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_42 --operation mode is normal Y1_d_to_dll_42 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_42 # !Y1_current_state_0 & (J1_reply_42)); --J1_reply_43 is mcm_nw_apl:scsn_slave_nw_apl|reply_43 --operation mode is normal J1_reply_43 = N1_request_43 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_41 is scsn_slave_nw_dll_ob1_ob_data_41 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_41_lut_out = scsn_slave_nw_dll_ob1_ob_data_40; scsn_slave_nw_dll_ob1_ob_data_41 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_41_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_41, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_42 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_42 --operation mode is normal Y2_d_to_dll_42 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_42 # !Y2_current_state_0 & (J1_reply_42)); --D1_jtgsnd_ser_t_47 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_47 --operation mode is normal D1_jtgsnd_ser_t_47_lut_out = D1_jtgsnd_ser_t_46; D1_jtgsnd_ser_t_47 = DFFEAS(D1_jtgsnd_ser_t_47_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_28, , , D1_jtgsnd_we_g_2); --T1_s_reg_28 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_28 --operation mode is normal T1_s_reg_28_lut_out = T1_s_reg_29; T1_s_reg_28 = DFFEAS(T1_s_reg_28_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_3, , , D1_we_tms); --E1_jtgsnd_ser_t_47 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_47 --operation mode is normal E1_jtgsnd_ser_t_47_lut_out = E1_jtgsnd_ser_t_46; E1_jtgsnd_ser_t_47 = DFFEAS(E1_jtgsnd_ser_t_47_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_28, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_47 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_47 --operation mode is normal E2_jtgsnd_ser_t_47_lut_out = E2_jtgsnd_ser_t_46; E2_jtgsnd_ser_t_47 = DFFEAS(E2_jtgsnd_ser_t_47_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_28, , , E2_jtgsnd_we_g_2); --T2_s_reg_28 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_28 --operation mode is normal T2_s_reg_28_lut_out = T2_s_reg_29; T2_s_reg_28 = DFFEAS(T2_s_reg_28_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_3, , , E1_we_tms); --T3_s_reg_28 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_28 --operation mode is normal T3_s_reg_28_lut_out = T3_s_reg_29; T3_s_reg_28 = DFFEAS(T3_s_reg_28_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_3, , , E2_we_tms); --S3_NI_P0_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_CTRL --operation mode is normal S3_NI_P0_CTRL_lut_out = S3_NI_P1_D_7; S3_NI_P0_CTRL = DFFEAS(S3_NI_P0_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_CTRL --operation mode is normal S2_NI_P0_CTRL_lut_out = S2_NI_P1_D_7; S2_NI_P0_CTRL = DFFEAS(S2_NI_P0_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_CTRL --operation mode is normal S1_NI_P0_CTRL_lut_out = S1_NI_P1_D_7; S1_NI_P0_CTRL = DFFEAS(S1_NI_P0_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_40 is scsn_slave_nw_dll_ob0_ob_data_40 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_40_lut_out = scsn_slave_nw_dll_ob0_ob_data_39; scsn_slave_nw_dll_ob0_ob_data_40 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_40_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_40, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_41 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_41 --operation mode is normal Y1_d_to_dll_41 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_41 # !Y1_current_state_0 & (J1_reply_41)); --J1_reply_42 is mcm_nw_apl:scsn_slave_nw_apl|reply_42 --operation mode is normal J1_reply_42 = N1_request_42 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_40 is scsn_slave_nw_dll_ob1_ob_data_40 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_40_lut_out = scsn_slave_nw_dll_ob1_ob_data_39; scsn_slave_nw_dll_ob1_ob_data_40 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_40_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_40, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_41 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_41 --operation mode is normal Y2_d_to_dll_41 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_41 # !Y2_current_state_0 & (J1_reply_41)); --D1_jtgsnd_ser_t_46 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_46 --operation mode is normal D1_jtgsnd_ser_t_46_lut_out = D1_jtgsnd_ser_t_45; D1_jtgsnd_ser_t_46 = DFFEAS(D1_jtgsnd_ser_t_46_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_29, , , D1_jtgsnd_we_g_1); --T1_s_reg_29 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_29 --operation mode is normal T1_s_reg_29_lut_out = T1_s_reg_30; T1_s_reg_29 = DFFEAS(T1_s_reg_29_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_2, , , D1_we_tms); --E1_jtgsnd_ser_t_46 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_46 --operation mode is normal E1_jtgsnd_ser_t_46_lut_out = E1_jtgsnd_ser_t_45; E1_jtgsnd_ser_t_46 = DFFEAS(E1_jtgsnd_ser_t_46_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_29, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_46 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_46 --operation mode is normal E2_jtgsnd_ser_t_46_lut_out = E2_jtgsnd_ser_t_45; E2_jtgsnd_ser_t_46 = DFFEAS(E2_jtgsnd_ser_t_46_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_29, , , E2_jtgsnd_we_g_1); --T2_s_reg_29 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_29 --operation mode is normal T2_s_reg_29_lut_out = T2_s_reg_30; T2_s_reg_29 = DFFEAS(T2_s_reg_29_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_2, , , E1_we_tms); --T3_s_reg_29 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_29 --operation mode is normal T3_s_reg_29_lut_out = T3_s_reg_30; T3_s_reg_29 = DFFEAS(T3_s_reg_29_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_2, , , E2_we_tms); --S3_NI_P1_D_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_7 --operation mode is normal S3_NI_P1_D_7_lut_out = S3_NI_P1_D_8; S3_NI_P1_D_7 = DFFEAS(S3_NI_P1_D_7_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_7 --operation mode is normal S2_NI_P1_D_7_lut_out = S2_NI_P1_D_8; S2_NI_P1_D_7 = DFFEAS(S2_NI_P1_D_7_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_7 --operation mode is normal S1_NI_P1_D_7_lut_out = S1_NI_P1_D_8; S1_NI_P1_D_7 = DFFEAS(S1_NI_P1_D_7_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_39 is scsn_slave_nw_dll_ob0_ob_data_39 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_39_lut_out = scsn_slave_nw_dll_ob0_ob_data_38; scsn_slave_nw_dll_ob0_ob_data_39 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_39_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_39, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_40 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_40 --operation mode is normal Y1_d_to_dll_40 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_40 # !Y1_current_state_0 & (J1_reply_40)); --J1_reply_41 is mcm_nw_apl:scsn_slave_nw_apl|reply_41 --operation mode is normal J1_reply_41 = N1_request_41 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_39 is scsn_slave_nw_dll_ob1_ob_data_39 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_39_lut_out = scsn_slave_nw_dll_ob1_ob_data_38; scsn_slave_nw_dll_ob1_ob_data_39 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_39_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_39, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_40 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_40 --operation mode is normal Y2_d_to_dll_40 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_40 # !Y2_current_state_0 & (J1_reply_40)); --D1_jtgsnd_ser_t_45 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_45 --operation mode is normal D1_jtgsnd_ser_t_45_lut_out = D1_jtgsnd_ser_t_44; D1_jtgsnd_ser_t_45 = DFFEAS(D1_jtgsnd_ser_t_45_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_28, , , D1_jtgsnd_we_g_1); --T1_s_reg_30 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_30 --operation mode is normal T1_s_reg_30_lut_out = T1_s_reg_31; T1_s_reg_30 = DFFEAS(T1_s_reg_30_lut_out, X1__clk0, VCC, , T1_nx657, N1_request_1, , , D1_we_tms); --E1_jtgsnd_ser_t_45 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_45 --operation mode is normal E1_jtgsnd_ser_t_45_lut_out = E1_jtgsnd_ser_t_44; E1_jtgsnd_ser_t_45 = DFFEAS(E1_jtgsnd_ser_t_45_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_28, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_45 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_45 --operation mode is normal E2_jtgsnd_ser_t_45_lut_out = E2_jtgsnd_ser_t_44; E2_jtgsnd_ser_t_45 = DFFEAS(E2_jtgsnd_ser_t_45_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_28, , , E2_jtgsnd_we_g_1); --T2_s_reg_30 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_30 --operation mode is normal T2_s_reg_30_lut_out = T2_s_reg_31; T2_s_reg_30 = DFFEAS(T2_s_reg_30_lut_out, X1__clk0, VCC, , T2_nx657, N1_request_1, , , E1_we_tms); --T3_s_reg_30 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_30 --operation mode is normal T3_s_reg_30_lut_out = T3_s_reg_31; T3_s_reg_30 = DFFEAS(T3_s_reg_30_lut_out, X1__clk0, VCC, , T3_nx657, N1_request_1, , , E2_we_tms); --S3_NI_P1_D_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_8 --operation mode is normal S3_NI_P1_D_8_lut_out = S3_NI_P0_STRB; S3_NI_P1_D_8 = DFFEAS(S3_NI_P1_D_8_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_8 --operation mode is normal S2_NI_P1_D_8_lut_out = S2_NI_P0_STRB; S2_NI_P1_D_8 = DFFEAS(S2_NI_P1_D_8_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_8 --operation mode is normal S1_NI_P1_D_8_lut_out = S1_NI_P0_STRB; S1_NI_P1_D_8 = DFFEAS(S1_NI_P1_D_8_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_38 is scsn_slave_nw_dll_ob0_ob_data_38 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_38_lut_out = scsn_slave_nw_dll_ob0_ob_data_37; scsn_slave_nw_dll_ob0_ob_data_38 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_38_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_38, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_39 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_39 --operation mode is normal Y1_d_to_dll_39 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_39 # !Y1_current_state_0 & (J1_reply_39)); --J1_reply_40 is mcm_nw_apl:scsn_slave_nw_apl|reply_40 --operation mode is normal J1_reply_40 = N1_request_40 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_38 is scsn_slave_nw_dll_ob1_ob_data_38 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_38_lut_out = scsn_slave_nw_dll_ob1_ob_data_37; scsn_slave_nw_dll_ob1_ob_data_38 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_38_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_38, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_39 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_39 --operation mode is normal Y2_d_to_dll_39 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_39 # !Y2_current_state_0 & (J1_reply_39)); --D1_jtgsnd_ser_t_44 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_44 --operation mode is normal D1_jtgsnd_ser_t_44_lut_out = D1_jtgsnd_ser_t_43; D1_jtgsnd_ser_t_44 = DFFEAS(D1_jtgsnd_ser_t_44_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_29, , , D1_jtgsnd_we_g_2); --T1_s_reg_31 is jtag_master_1_notri:jtag_dut_notri|jtag_tms:jtgtms|s_reg_31 --operation mode is normal T1_s_reg_31_lut_out = D1_we_tms & N1_request_0; T1_s_reg_31 = DFFEAS(T1_s_reg_31_lut_out, X1__clk0, VCC, , T1_nx657, , , , ); --E1_jtgsnd_ser_t_44 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_44 --operation mode is normal E1_jtgsnd_ser_t_44_lut_out = E1_jtgsnd_ser_t_43; E1_jtgsnd_ser_t_44 = DFFEAS(E1_jtgsnd_ser_t_44_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_29, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_44 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_44 --operation mode is normal E2_jtgsnd_ser_t_44_lut_out = E2_jtgsnd_ser_t_43; E2_jtgsnd_ser_t_44 = DFFEAS(E2_jtgsnd_ser_t_44_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_29, , , E2_jtgsnd_we_g_2); --T2_s_reg_31 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_tms:jtgtms|s_reg_31 --operation mode is normal T2_s_reg_31_lut_out = E1_we_tms & N1_request_0; T2_s_reg_31 = DFFEAS(T2_s_reg_31_lut_out, X1__clk0, VCC, , T2_nx657, , , , ); --T3_s_reg_31 is jtag_master_2_notri:jtag_ni_up_notri|jtag_tms:jtgtms|s_reg_31 --operation mode is normal T3_s_reg_31_lut_out = E2_we_tms & N1_request_0; T3_s_reg_31 = DFFEAS(T3_s_reg_31_lut_out, X1__clk0, VCC, , T3_nx657, , , , ); --S3_NI_P0_STRB is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_STRB --operation mode is normal S3_NI_P0_STRB_lut_out = S3_NI_P1_D_9; S3_NI_P0_STRB = DFFEAS(S3_NI_P0_STRB_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_STRB is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_STRB --operation mode is normal S2_NI_P0_STRB_lut_out = S2_NI_P1_D_9; S2_NI_P0_STRB = DFFEAS(S2_NI_P0_STRB_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_STRB is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_STRB --operation mode is normal S1_NI_P0_STRB_lut_out = S1_NI_P1_D_9; S1_NI_P0_STRB = DFFEAS(S1_NI_P0_STRB_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_37 is scsn_slave_nw_dll_ob0_ob_data_37 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_37_lut_out = scsn_slave_nw_dll_ob0_ob_data_36; scsn_slave_nw_dll_ob0_ob_data_37 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_37_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_37, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_38 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_38 --operation mode is normal Y1_d_to_dll_38 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_38 # !Y1_current_state_0 & (J1_reply_38)); --J1_reply_39 is mcm_nw_apl:scsn_slave_nw_apl|reply_39 --operation mode is normal J1_reply_39 = N1_request_39 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_37 is scsn_slave_nw_dll_ob1_ob_data_37 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_37_lut_out = scsn_slave_nw_dll_ob1_ob_data_36; scsn_slave_nw_dll_ob1_ob_data_37 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_37_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_37, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_38 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_38 --operation mode is normal Y2_d_to_dll_38 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_38 # !Y2_current_state_0 & (J1_reply_38)); --D1_jtgsnd_ser_t_43 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_43 --operation mode is normal D1_jtgsnd_ser_t_43_lut_out = D1_jtgsnd_ser_t_42; D1_jtgsnd_ser_t_43 = DFFEAS(D1_jtgsnd_ser_t_43_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_27, , , D1_jtgsnd_we_g_1); --N1_request_0 is mcm_nw_nwl:scsn_slave_nw_nwl|request_0 --operation mode is normal N1_request_0 = N1_select_rq & (L2_data_out_0) # !N1_select_rq & L1_data_out_0; --E1_jtgsnd_ser_t_43 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_43 --operation mode is normal E1_jtgsnd_ser_t_43_lut_out = E1_jtgsnd_ser_t_42; E1_jtgsnd_ser_t_43 = DFFEAS(E1_jtgsnd_ser_t_43_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_27, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_43 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_43 --operation mode is normal E2_jtgsnd_ser_t_43_lut_out = E2_jtgsnd_ser_t_42; E2_jtgsnd_ser_t_43 = DFFEAS(E2_jtgsnd_ser_t_43_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_27, , , E2_jtgsnd_we_g_1); --S3_NI_P1_D_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_D_9 --operation mode is normal S3_NI_P1_D_9_lut_out = S3_NI_P1_CTRL; S3_NI_P1_D_9 = DFFEAS(S3_NI_P1_D_9_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_D_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_D_9 --operation mode is normal S2_NI_P1_D_9_lut_out = S2_NI_P1_CTRL; S2_NI_P1_D_9 = DFFEAS(S2_NI_P1_D_9_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_D_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_D_9 --operation mode is normal S1_NI_P1_D_9_lut_out = S1_NI_P1_CTRL; S1_NI_P1_D_9 = DFFEAS(S1_NI_P1_D_9_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_36 is scsn_slave_nw_dll_ob0_ob_data_36 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_36_lut_out = scsn_slave_nw_dll_ob0_ob_data_35; scsn_slave_nw_dll_ob0_ob_data_36 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_36_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_36, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_37 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_37 --operation mode is normal Y1_d_to_dll_37 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_37 # !Y1_current_state_0 & (J1_reply_37)); --J1_reply_38 is mcm_nw_apl:scsn_slave_nw_apl|reply_38 --operation mode is normal J1_reply_38 = N1_request_38 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_36 is scsn_slave_nw_dll_ob1_ob_data_36 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_36_lut_out = scsn_slave_nw_dll_ob1_ob_data_35; scsn_slave_nw_dll_ob1_ob_data_36 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_36_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_36, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_37 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_37 --operation mode is normal Y2_d_to_dll_37 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_37 # !Y2_current_state_0 & (J1_reply_37)); --D1_jtgsnd_ser_t_42 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_42 --operation mode is normal D1_jtgsnd_ser_t_42_lut_out = D1_jtgsnd_ser_t_41; D1_jtgsnd_ser_t_42 = DFFEAS(D1_jtgsnd_ser_t_42_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_26, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_42 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_42 --operation mode is normal E1_jtgsnd_ser_t_42_lut_out = E1_jtgsnd_ser_t_41; E1_jtgsnd_ser_t_42 = DFFEAS(E1_jtgsnd_ser_t_42_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_26, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_42 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_42 --operation mode is normal E2_jtgsnd_ser_t_42_lut_out = E2_jtgsnd_ser_t_41; E2_jtgsnd_ser_t_42 = DFFEAS(E2_jtgsnd_ser_t_42_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_26, , , E2_jtgsnd_we_g_1); --S3_NI_P1_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_CTRL --operation mode is normal S3_NI_P1_CTRL_lut_out = S3_NI_P0_PREout; S3_NI_P1_CTRL = DFFEAS(S3_NI_P1_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_CTRL --operation mode is normal S2_NI_P1_CTRL_lut_out = S2_NI_P0_PREout; S2_NI_P1_CTRL = DFFEAS(S2_NI_P1_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_CTRL --operation mode is normal S1_NI_P1_CTRL_lut_out = S1_NI_P0_PREout; S1_NI_P1_CTRL = DFFEAS(S1_NI_P1_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_35 is scsn_slave_nw_dll_ob0_ob_data_35 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_35_lut_out = scsn_slave_nw_dll_ob0_ob_data_34; scsn_slave_nw_dll_ob0_ob_data_35 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_35_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_35, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_36 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_36 --operation mode is normal Y1_d_to_dll_36 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_36 # !Y1_current_state_0 & (J1_reply_36)); --J1_reply_37 is mcm_nw_apl:scsn_slave_nw_apl|reply_37 --operation mode is normal J1_reply_37 = N1_request_37 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_35 is scsn_slave_nw_dll_ob1_ob_data_35 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_35_lut_out = scsn_slave_nw_dll_ob1_ob_data_34; scsn_slave_nw_dll_ob1_ob_data_35 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_35_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_35, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_36 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_36 --operation mode is normal Y2_d_to_dll_36 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_36 # !Y2_current_state_0 & (J1_reply_36)); --D1_jtgsnd_ser_t_41 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_41 --operation mode is normal D1_jtgsnd_ser_t_41_lut_out = D1_jtgsnd_ser_t_40; D1_jtgsnd_ser_t_41 = DFFEAS(D1_jtgsnd_ser_t_41_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_30, , , D1_jtgsnd_we_g_2); --E1_jtgsnd_ser_t_41 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_41 --operation mode is normal E1_jtgsnd_ser_t_41_lut_out = E1_jtgsnd_ser_t_40; E1_jtgsnd_ser_t_41 = DFFEAS(E1_jtgsnd_ser_t_41_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_30, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_41 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_41 --operation mode is normal E2_jtgsnd_ser_t_41_lut_out = E2_jtgsnd_ser_t_40; E2_jtgsnd_ser_t_41 = DFFEAS(E2_jtgsnd_ser_t_41_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_30, , , E2_jtgsnd_we_g_2); --S3_NI_P0_PREout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_PREout --operation mode is normal S3_NI_P0_PREout_lut_out = S3_NI_P1_STRB; S3_NI_P0_PREout = DFFEAS(S3_NI_P0_PREout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_PREout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_PREout --operation mode is normal S2_NI_P0_PREout_lut_out = S2_NI_P1_STRB; S2_NI_P0_PREout = DFFEAS(S2_NI_P0_PREout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_PREout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_PREout --operation mode is normal S1_NI_P0_PREout_lut_out = S1_NI_P1_STRB; S1_NI_P0_PREout = DFFEAS(S1_NI_P0_PREout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_34 is scsn_slave_nw_dll_ob0_ob_data_34 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_34_lut_out = scsn_slave_nw_dll_ob0_ob_data_33; scsn_slave_nw_dll_ob0_ob_data_34 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_34_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_34, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_35 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_35 --operation mode is normal Y1_d_to_dll_35 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_35 # !Y1_current_state_0 & (J1_reply_35)); --J1_reply_36 is mcm_nw_apl:scsn_slave_nw_apl|reply_36 --operation mode is normal J1_reply_36 = N1_request_36 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_34 is scsn_slave_nw_dll_ob1_ob_data_34 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_34_lut_out = scsn_slave_nw_dll_ob1_ob_data_33; scsn_slave_nw_dll_ob1_ob_data_34 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_34_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_34, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_35 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_35 --operation mode is normal Y2_d_to_dll_35 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_35 # !Y2_current_state_0 & (J1_reply_35)); --D1_jtgsnd_ser_t_40 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_40 --operation mode is normal D1_jtgsnd_ser_t_40_lut_out = D1_jtgsnd_ser_t_39; D1_jtgsnd_ser_t_40 = DFFEAS(D1_jtgsnd_ser_t_40_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_25, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_40 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_40 --operation mode is normal E1_jtgsnd_ser_t_40_lut_out = E1_jtgsnd_ser_t_39; E1_jtgsnd_ser_t_40 = DFFEAS(E1_jtgsnd_ser_t_40_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_25, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_40 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_40 --operation mode is normal E2_jtgsnd_ser_t_40_lut_out = E2_jtgsnd_ser_t_39; E2_jtgsnd_ser_t_40 = DFFEAS(E2_jtgsnd_ser_t_40_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_25, , , E2_jtgsnd_we_g_1); --S3_NI_P1_STRB is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_STRB --operation mode is normal S3_NI_P1_STRB_lut_out = S3_NI_P1_PREout; S3_NI_P1_STRB = DFFEAS(S3_NI_P1_STRB_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_STRB is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_STRB --operation mode is normal S2_NI_P1_STRB_lut_out = S2_NI_P1_PREout; S2_NI_P1_STRB = DFFEAS(S2_NI_P1_STRB_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_STRB is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_STRB --operation mode is normal S1_NI_P1_STRB_lut_out = S1_NI_P1_PREout; S1_NI_P1_STRB = DFFEAS(S1_NI_P1_STRB_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_33 is scsn_slave_nw_dll_ob0_ob_data_33 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_33_lut_out = scsn_slave_nw_dll_ob0_ob_data_32; scsn_slave_nw_dll_ob0_ob_data_33 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_33_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_33, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_34 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_34 --operation mode is normal Y1_d_to_dll_34 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_34 # !Y1_current_state_0 & (J1_reply_34)); --J1_reply_35 is mcm_nw_apl:scsn_slave_nw_apl|reply_35 --operation mode is normal J1_reply_35 = N1_request_35 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_33 is scsn_slave_nw_dll_ob1_ob_data_33 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_33_lut_out = scsn_slave_nw_dll_ob1_ob_data_32; scsn_slave_nw_dll_ob1_ob_data_33 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_33_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_33, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_34 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_34 --operation mode is normal Y2_d_to_dll_34 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_34 # !Y2_current_state_0 & (J1_reply_34)); --D1_jtgsnd_ser_t_39 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_39 --operation mode is normal D1_jtgsnd_ser_t_39_lut_out = D1_jtgsnd_ser_t_38; D1_jtgsnd_ser_t_39 = DFFEAS(D1_jtgsnd_ser_t_39_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_24, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_39 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_39 --operation mode is normal E1_jtgsnd_ser_t_39_lut_out = E1_jtgsnd_ser_t_38; E1_jtgsnd_ser_t_39 = DFFEAS(E1_jtgsnd_ser_t_39_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_24, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_39 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_39 --operation mode is normal E2_jtgsnd_ser_t_39_lut_out = E2_jtgsnd_ser_t_38; E2_jtgsnd_ser_t_39 = DFFEAS(E2_jtgsnd_ser_t_39_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_24, , , E2_jtgsnd_we_g_1); --S3_NI_P1_PREout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P1_PREout --operation mode is normal S3_NI_P1_PREout_lut_out = S3_NI_P0_CLKout; S3_NI_P1_PREout = DFFEAS(S3_NI_P1_PREout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P1_PREout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P1_PREout --operation mode is normal S2_NI_P1_PREout_lut_out = S2_NI_P0_CLKout; S2_NI_P1_PREout = DFFEAS(S2_NI_P1_PREout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P1_PREout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P1_PREout --operation mode is normal S1_NI_P1_PREout_lut_out = S1_NI_P0_CLKout; S1_NI_P1_PREout = DFFEAS(S1_NI_P1_PREout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_32 is scsn_slave_nw_dll_ob0_ob_data_32 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_32_lut_out = scsn_slave_nw_dll_ob0_ob_data_31; scsn_slave_nw_dll_ob0_ob_data_32 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_32_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_32, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_33 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_33 --operation mode is normal Y1_d_to_dll_33 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_33 # !Y1_current_state_0 & (J1_reply_33)); --J1_reply_34 is mcm_nw_apl:scsn_slave_nw_apl|reply_34 --operation mode is normal J1_reply_34 = N1_request_34 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_32 is scsn_slave_nw_dll_ob1_ob_data_32 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_32_lut_out = scsn_slave_nw_dll_ob1_ob_data_31; scsn_slave_nw_dll_ob1_ob_data_32 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_32_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_32, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_33 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_33 --operation mode is normal Y2_d_to_dll_33 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_33 # !Y2_current_state_0 & (J1_reply_33)); --D1_jtgsnd_ser_t_38 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_38 --operation mode is normal D1_jtgsnd_ser_t_38_lut_out = D1_jtgsnd_ser_t_37; D1_jtgsnd_ser_t_38 = DFFEAS(D1_jtgsnd_ser_t_38_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_31, , , D1_jtgsnd_we_g_2); --E1_jtgsnd_ser_t_38 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_38 --operation mode is normal E1_jtgsnd_ser_t_38_lut_out = E1_jtgsnd_ser_t_37; E1_jtgsnd_ser_t_38 = DFFEAS(E1_jtgsnd_ser_t_38_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_31, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_38 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_38 --operation mode is normal E2_jtgsnd_ser_t_38_lut_out = E2_jtgsnd_ser_t_37; E2_jtgsnd_ser_t_38 = DFFEAS(E2_jtgsnd_ser_t_38_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_31, , , E2_jtgsnd_we_g_2); --S3_NI_P0_CLKout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P0_CLKout --operation mode is normal S3_NI_P0_CLKout_lut_out = S3_SER0_DOUT; S3_NI_P0_CLKout = DFFEAS(S3_NI_P0_CLKout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P0_CLKout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P0_CLKout --operation mode is normal S2_NI_P0_CLKout_lut_out = S2_SER0_DOUT; S2_NI_P0_CLKout = DFFEAS(S2_NI_P0_CLKout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P0_CLKout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P0_CLKout --operation mode is normal S1_NI_P0_CLKout_lut_out = S1_SER0_DOUT; S1_NI_P0_CLKout = DFFEAS(S1_NI_P0_CLKout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_31 is scsn_slave_nw_dll_ob0_ob_data_31 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_31_lut_out = scsn_slave_nw_dll_ob0_ob_data_30; scsn_slave_nw_dll_ob0_ob_data_31 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_31_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_31, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_32 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_32 --operation mode is normal Y1_d_to_dll_32 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_32 # !Y1_current_state_0 & (J1_reply_32)); --J1_reply_33 is mcm_nw_apl:scsn_slave_nw_apl|reply_33 --operation mode is normal J1_reply_33 = N1_request_33 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_31 is scsn_slave_nw_dll_ob1_ob_data_31 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_31_lut_out = scsn_slave_nw_dll_ob1_ob_data_30; scsn_slave_nw_dll_ob1_ob_data_31 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_31_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_31, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_32 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_32 --operation mode is normal Y2_d_to_dll_32 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_32 # !Y2_current_state_0 & (J1_reply_32)); --D1_jtgsnd_ser_t_37 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_37 --operation mode is normal D1_jtgsnd_ser_t_37_lut_out = D1_jtgsnd_ser_t_36; D1_jtgsnd_ser_t_37 = DFFEAS(D1_jtgsnd_ser_t_37_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_23, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_37 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_37 --operation mode is normal E1_jtgsnd_ser_t_37_lut_out = E1_jtgsnd_ser_t_36; E1_jtgsnd_ser_t_37 = DFFEAS(E1_jtgsnd_ser_t_37_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_23, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_37 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_37 --operation mode is normal E2_jtgsnd_ser_t_37_lut_out = E2_jtgsnd_ser_t_36; E2_jtgsnd_ser_t_37 = DFFEAS(E2_jtgsnd_ser_t_37_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_23, , , E2_jtgsnd_we_g_1); --S3_SER0_DOUT is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|SER0_DOUT --operation mode is normal S3_SER0_DOUT_lut_out = S3_SER0_DIN; S3_SER0_DOUT = DFFEAS(S3_SER0_DOUT_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_SER0_DOUT is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|SER0_DOUT --operation mode is normal S2_SER0_DOUT_lut_out = S2_SER0_DIN; S2_SER0_DOUT = DFFEAS(S2_SER0_DOUT_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_SER0_DOUT is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|SER0_DOUT --operation mode is normal S1_SER0_DOUT_lut_out = S1_SER0_DIN; S1_SER0_DOUT = DFFEAS(S1_SER0_DOUT_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob0_ob_data_30 is scsn_slave_nw_dll_ob0_ob_data_30 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_30_lut_out = scsn_slave_nw_dll_ob0_ob_data_29; scsn_slave_nw_dll_ob0_ob_data_30 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_30_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_30, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_31 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_31 --operation mode is normal Y1_d_to_dll_31 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_31 # !Y1_current_state_0 & (J1_reply_31)); --J1_reply_32 is mcm_nw_apl:scsn_slave_nw_apl|reply_32 --operation mode is normal J1_reply_32 = N1_request_32 & (J1_current_state_1 # J1_current_state_0 # J1_ix34_ix22_nx10); --scsn_slave_nw_dll_ob1_ob_data_30 is scsn_slave_nw_dll_ob1_ob_data_30 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_30_lut_out = scsn_slave_nw_dll_ob1_ob_data_29; scsn_slave_nw_dll_ob1_ob_data_30 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_30_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_30, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_31 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_31 --operation mode is normal Y2_d_to_dll_31 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_31 # !Y2_current_state_0 & (J1_reply_31)); --D1_jtgsnd_ser_t_36 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_36 --operation mode is normal D1_jtgsnd_ser_t_36_lut_out = D1_jtgsnd_ser_t_35; D1_jtgsnd_ser_t_36 = DFFEAS(D1_jtgsnd_ser_t_36_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_22, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_36 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_36 --operation mode is normal E1_jtgsnd_ser_t_36_lut_out = E1_jtgsnd_ser_t_35; E1_jtgsnd_ser_t_36 = DFFEAS(E1_jtgsnd_ser_t_36_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_22, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_36 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_36 --operation mode is normal E2_jtgsnd_ser_t_36_lut_out = E2_jtgsnd_ser_t_35; E2_jtgsnd_ser_t_36 = DFFEAS(E2_jtgsnd_ser_t_36_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_22, , , E2_jtgsnd_we_g_1); --scsn_slave_nw_dll_ob0_ob_data_29 is scsn_slave_nw_dll_ob0_ob_data_29 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_29_lut_out = scsn_slave_nw_dll_ob0_ob_data_28; scsn_slave_nw_dll_ob0_ob_data_29 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_29_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_29, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_30 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_30 --operation mode is normal Y1_d_to_dll_30 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_30 # !Y1_current_state_0 & (J1_reply_30)); --J1_reply_31 is mcm_nw_apl:scsn_slave_nw_apl|reply_31 --operation mode is normal J1_reply_31 = N1_request_31 & (J1_a_0_dup_54 # J1_read_data_0 & !J1_ix34_ix30_nx12) # !N1_request_31 & J1_read_data_0 & (!J1_ix34_ix30_nx12); --N1_request_32 is mcm_nw_nwl:scsn_slave_nw_nwl|request_32 --operation mode is normal N1_request_32 = N1_select_rq & (L2_data_out_32) # !N1_select_rq & L1_data_out_32; --scsn_slave_nw_dll_ob1_ob_data_29 is scsn_slave_nw_dll_ob1_ob_data_29 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_29_lut_out = scsn_slave_nw_dll_ob1_ob_data_28; scsn_slave_nw_dll_ob1_ob_data_29 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_29_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_29, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_30 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_30 --operation mode is normal Y2_d_to_dll_30 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_30 # !Y2_current_state_0 & (J1_reply_30)); --D1_jtgsnd_ser_t_35 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_35 --operation mode is normal D1_jtgsnd_ser_t_35_lut_out = D1_jtgsnd_ser_t_34; D1_jtgsnd_ser_t_35 = DFFEAS(D1_jtgsnd_ser_t_35_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_31, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_35 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_35 --operation mode is normal E1_jtgsnd_ser_t_35_lut_out = E1_jtgsnd_ser_t_34; E1_jtgsnd_ser_t_35 = DFFEAS(E1_jtgsnd_ser_t_35_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_31, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_35 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_35 --operation mode is normal E2_jtgsnd_ser_t_35_lut_out = E2_jtgsnd_ser_t_34; E2_jtgsnd_ser_t_35 = DFFEAS(E2_jtgsnd_ser_t_35_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_31, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_28 is scsn_slave_nw_dll_ob0_ob_data_28 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_28_lut_out = scsn_slave_nw_dll_ob0_ob_data_27; scsn_slave_nw_dll_ob0_ob_data_28 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_28_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_28, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_29 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_29 --operation mode is normal Y1_d_to_dll_29 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_29 # !Y1_current_state_0 & (J1_reply_29)); --J1_reply_30 is mcm_nw_apl:scsn_slave_nw_apl|reply_30 --operation mode is normal J1_reply_30 = N1_request_30 & (J1_a_0_dup_54 # J1_read_data_1 & !J1_ix34_ix30_nx12) # !N1_request_30 & J1_read_data_1 & (!J1_ix34_ix30_nx12); --J1_read_data_0 is mcm_nw_apl:scsn_slave_nw_apl|read_data_0 --operation mode is normal J1_read_data_0_lut_out = C1_bus_dout_0; J1_read_data_0 = DFFEAS(J1_read_data_0_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --J1_a_0_dup_54 is mcm_nw_apl:scsn_slave_nw_apl|a_0_dup_54 --operation mode is normal J1_a_0_dup_54 = !J1_current_state_3 & J1_current_state_1 & !J1_current_state_0; --J1_ix34_ix30_nx12 is mcm_nw_apl:scsn_slave_nw_apl|ix34_ix30_nx12 --operation mode is normal J1_ix34_ix30_nx12 = J1_current_state_3 # J1_current_state_1 # J1_current_state_0 # !J1_current_state_2; --scsn_slave_nw_dll_ob1_ob_data_28 is scsn_slave_nw_dll_ob1_ob_data_28 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_28_lut_out = scsn_slave_nw_dll_ob1_ob_data_27; scsn_slave_nw_dll_ob1_ob_data_28 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_28_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_28, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_29 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_29 --operation mode is normal Y2_d_to_dll_29 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_29 # !Y2_current_state_0 & (J1_reply_29)); --D1_jtgsnd_ser_t_34 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_34 --operation mode is normal D1_jtgsnd_ser_t_34_lut_out = D1_jtgsnd_ser_t_33; D1_jtgsnd_ser_t_34 = DFFEAS(D1_jtgsnd_ser_t_34_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_17, , , D1_jtgsnd_we_g_1); --D1_jtgsnd_we_g_0 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_we_g_0 --operation mode is normal D1_jtgsnd_we_g_0 = !N1_request_48 & !N1_request_47 & !D1_nx540 & D1_nx253; --D1_jtgsnd_nx796 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_nx796 --operation mode is normal D1_jtgsnd_nx796 = D1_nx249 # !D1_nx540 & D1_nx251 & D1_nx253; --E1_jtgsnd_ser_t_34 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_34 --operation mode is normal E1_jtgsnd_ser_t_34_lut_out = E1_jtgsnd_ser_t_33; E1_jtgsnd_ser_t_34 = DFFEAS(E1_jtgsnd_ser_t_34_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_17, , , E1_jtgsnd_we_g_1); --E1_jtgsnd_we_g_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_we_g_0 --operation mode is normal E1_jtgsnd_we_g_0 = !N1_request_48 & !N1_request_47 & !E1_nx540 & E1_nx249; --E1_jtgsnd_nx816 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_nx816 --operation mode is normal E1_jtgsnd_nx816 = E1_nx245 # !E1_nx540 & E1_nx247 & E1_nx249; --E2_jtgsnd_ser_t_34 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_34 --operation mode is normal E2_jtgsnd_ser_t_34_lut_out = E2_jtgsnd_ser_t_33; E2_jtgsnd_ser_t_34 = DFFEAS(E2_jtgsnd_ser_t_34_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_17, , , E2_jtgsnd_we_g_1); --E2_jtgsnd_we_g_0 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_we_g_0 --operation mode is normal E2_jtgsnd_we_g_0 = !N1_request_48 & !N1_request_47 & !E2_nx540 & E2_nx249; --E2_jtgsnd_nx816 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_nx816 --operation mode is normal E2_jtgsnd_nx816 = E2_nx245 # !E2_nx540 & E2_nx247 & E2_nx249; --scsn_slave_nw_dll_ob0_ob_data_27 is scsn_slave_nw_dll_ob0_ob_data_27 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_27_lut_out = scsn_slave_nw_dll_ob0_ob_data_26; scsn_slave_nw_dll_ob0_ob_data_27 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_27_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_27, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_28 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_28 --operation mode is normal Y1_d_to_dll_28 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_28 # !Y1_current_state_0 & (J1_reply_28)); --J1_reply_29 is mcm_nw_apl:scsn_slave_nw_apl|reply_29 --operation mode is normal J1_reply_29 = N1_request_29 & (J1_a_0_dup_54 # J1_read_data_2 & !J1_ix34_ix30_nx12) # !N1_request_29 & J1_read_data_2 & (!J1_ix34_ix30_nx12); --J1_read_data_1 is mcm_nw_apl:scsn_slave_nw_apl|read_data_1 --operation mode is normal J1_read_data_1_lut_out = C1_bus_dout_1; J1_read_data_1 = DFFEAS(J1_read_data_1_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --J1_nx397 is mcm_nw_apl:scsn_slave_nw_apl|nx397 --operation mode is normal J1_nx397 = !J1_current_state_3 & J1_current_state_1 & J1_current_state_0; --scsn_slave_nw_dll_ob1_ob_data_27 is scsn_slave_nw_dll_ob1_ob_data_27 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_27_lut_out = scsn_slave_nw_dll_ob1_ob_data_26; scsn_slave_nw_dll_ob1_ob_data_27 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_27_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_27, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_28 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_28 --operation mode is normal Y2_d_to_dll_28 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_28 # !Y2_current_state_0 & (J1_reply_28)); --D1_jtgsnd_ser_t_33 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_33 --operation mode is normal D1_jtgsnd_ser_t_33_lut_out = D1_jtgsnd_ser_t_32; D1_jtgsnd_ser_t_33 = DFFEAS(D1_jtgsnd_ser_t_33_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_21, , , D1_jtgsnd_we_g_1); --D1_nx251 is jtag_master_1_notri:jtag_dut_notri|nx251 --operation mode is normal D1_nx251 = !N1_request_48 & !N1_request_47; --E1_jtgsnd_ser_t_33 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_33 --operation mode is normal E1_jtgsnd_ser_t_33_lut_out = E1_jtgsnd_ser_t_32; E1_jtgsnd_ser_t_33 = DFFEAS(E1_jtgsnd_ser_t_33_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_21, , , E1_jtgsnd_we_g_1); --E1_nx247 is jtag_master_2_notri:jtag_ni_dn_notri|nx247 --operation mode is normal E1_nx247 = !N1_request_48 & !N1_request_47; --E2_jtgsnd_ser_t_33 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_33 --operation mode is normal E2_jtgsnd_ser_t_33_lut_out = E2_jtgsnd_ser_t_32; E2_jtgsnd_ser_t_33 = DFFEAS(E2_jtgsnd_ser_t_33_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_21, , , E2_jtgsnd_we_g_1); --E2_nx247 is jtag_master_2_notri:jtag_ni_up_notri|nx247 --operation mode is normal E2_nx247 = !N1_request_48 & !N1_request_47; --scsn_slave_nw_dll_ob0_ob_data_26 is scsn_slave_nw_dll_ob0_ob_data_26 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_26_lut_out = scsn_slave_nw_dll_ob0_ob_data_25; scsn_slave_nw_dll_ob0_ob_data_26 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_26_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_26, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_27 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_27 --operation mode is normal Y1_d_to_dll_27 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_27 # !Y1_current_state_0 & (J1_reply_27)); --J1_reply_28 is mcm_nw_apl:scsn_slave_nw_apl|reply_28 --operation mode is normal J1_reply_28 = N1_request_28 & (J1_a_0_dup_54 # J1_read_data_3 & !J1_ix34_ix30_nx12) # !N1_request_28 & J1_read_data_3 & (!J1_ix34_ix30_nx12); --J1_read_data_2 is mcm_nw_apl:scsn_slave_nw_apl|read_data_2 --operation mode is normal J1_read_data_2_lut_out = C1_bus_dout_2; J1_read_data_2 = DFFEAS(J1_read_data_2_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_1 is gio_devices:gio|bus_dout_1 --operation mode is normal C1_bus_dout_1_lut_out = C1_nx295 # C1_nx296 # C1_nx297; C1_bus_dout_1 = DFFEAS(C1_bus_dout_1_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --scsn_slave_nw_dll_ob1_ob_data_26 is scsn_slave_nw_dll_ob1_ob_data_26 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_26_lut_out = scsn_slave_nw_dll_ob1_ob_data_25; scsn_slave_nw_dll_ob1_ob_data_26 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_26_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_26, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_27 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_27 --operation mode is normal Y2_d_to_dll_27 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_27 # !Y2_current_state_0 & (J1_reply_27)); --D1_jtgsnd_ser_t_32 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_32 --operation mode is normal D1_jtgsnd_ser_t_32_lut_out = D1_jtgsnd_ser_t_31; D1_jtgsnd_ser_t_32 = DFFEAS(D1_jtgsnd_ser_t_32_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_30, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_32 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_32 --operation mode is normal E1_jtgsnd_ser_t_32_lut_out = E1_jtgsnd_ser_t_31; E1_jtgsnd_ser_t_32 = DFFEAS(E1_jtgsnd_ser_t_32_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_30, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_32 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_32 --operation mode is normal E2_jtgsnd_ser_t_32_lut_out = E2_jtgsnd_ser_t_31; E2_jtgsnd_ser_t_32 = DFFEAS(E2_jtgsnd_ser_t_32_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_30, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_25 is scsn_slave_nw_dll_ob0_ob_data_25 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_25_lut_out = scsn_slave_nw_dll_ob0_ob_data_24; scsn_slave_nw_dll_ob0_ob_data_25 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_25_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_25, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_26 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_26 --operation mode is normal Y1_d_to_dll_26 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_26 # !Y1_current_state_0 & (J1_reply_26)); --J1_reply_27 is mcm_nw_apl:scsn_slave_nw_apl|reply_27 --operation mode is normal J1_reply_27 = N1_request_27 & (J1_a_0_dup_54 # J1_read_data_4 & !J1_ix34_ix30_nx12) # !N1_request_27 & J1_read_data_4 & (!J1_ix34_ix30_nx12); --J1_read_data_3 is mcm_nw_apl:scsn_slave_nw_apl|read_data_3 --operation mode is normal J1_read_data_3_lut_out = C1_bus_dout_3; J1_read_data_3 = DFFEAS(J1_read_data_3_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_2 is gio_devices:gio|bus_dout_2 --operation mode is normal C1_bus_dout_2_lut_out = C1_nx292 # C1_nx293 # C1_nx294; C1_bus_dout_2 = DFFEAS(C1_bus_dout_2_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx295 is gio_devices:gio|nx295 --operation mode is normal C1_nx295 = W1_q_b[1] & (C1_sel_5 # G1_bus_dout_1 & C1_ce_gen) # !W1_q_b[1] & G1_bus_dout_1 & (C1_ce_gen); --C1_nx296 is gio_devices:gio|nx296 --operation mode is normal C1_nx296 = B1_bus_dout_1 & (C1_ce_cp # E2_bus_dout_1 & C1_ce_ni_jtg_up) # !B1_bus_dout_1 & E2_bus_dout_1 & (C1_ce_ni_jtg_up); --C1_nx297 is gio_devices:gio|nx297 --operation mode is normal C1_nx297 = E1_bus_dout_1 & (C1_ce_ni_jtg_dn # D1_bus_dout_1 & C1_ce_dut_jtg) # !E1_bus_dout_1 & D1_bus_dout_1 & (C1_ce_dut_jtg); --scsn_slave_nw_dll_ob1_ob_data_25 is scsn_slave_nw_dll_ob1_ob_data_25 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_25_lut_out = scsn_slave_nw_dll_ob1_ob_data_24; scsn_slave_nw_dll_ob1_ob_data_25 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_25_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_25, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_26 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_26 --operation mode is normal Y2_d_to_dll_26 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_26 # !Y2_current_state_0 & (J1_reply_26)); --D1_jtgsnd_ser_t_31 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_31 --operation mode is normal D1_jtgsnd_ser_t_31_lut_out = D1_jtgsnd_ser_t_30; D1_jtgsnd_ser_t_31 = DFFEAS(D1_jtgsnd_ser_t_31_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_18, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_31 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_31 --operation mode is normal E1_jtgsnd_ser_t_31_lut_out = E1_jtgsnd_ser_t_30; E1_jtgsnd_ser_t_31 = DFFEAS(E1_jtgsnd_ser_t_31_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_18, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_31 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_31 --operation mode is normal E2_jtgsnd_ser_t_31_lut_out = E2_jtgsnd_ser_t_30; E2_jtgsnd_ser_t_31 = DFFEAS(E2_jtgsnd_ser_t_31_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_18, , , E2_jtgsnd_we_g_1); --scsn_slave_nw_dll_ob0_ob_data_24 is scsn_slave_nw_dll_ob0_ob_data_24 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_24_lut_out = scsn_slave_nw_dll_ob0_ob_data_23; scsn_slave_nw_dll_ob0_ob_data_24 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_24_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_24, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_25 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_25 --operation mode is normal Y1_d_to_dll_25 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_25 # !Y1_current_state_0 & (J1_reply_25)); --J1_reply_26 is mcm_nw_apl:scsn_slave_nw_apl|reply_26 --operation mode is normal J1_reply_26 = N1_request_26 & (J1_a_0_dup_54 # J1_read_data_5 & !J1_ix34_ix30_nx12) # !N1_request_26 & J1_read_data_5 & (!J1_ix34_ix30_nx12); --J1_read_data_4 is mcm_nw_apl:scsn_slave_nw_apl|read_data_4 --operation mode is normal J1_read_data_4_lut_out = C1_bus_dout_4; J1_read_data_4 = DFFEAS(J1_read_data_4_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_3 is gio_devices:gio|bus_dout_3 --operation mode is normal C1_bus_dout_3_lut_out = C1_nx289 # C1_nx290 # C1_nx291; C1_bus_dout_3 = DFFEAS(C1_bus_dout_3_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx292 is gio_devices:gio|nx292 --operation mode is normal C1_nx292 = W1_q_b[2] & (C1_sel_5 # G1_bus_dout_2 & C1_ce_gen) # !W1_q_b[2] & G1_bus_dout_2 & (C1_ce_gen); --C1_nx293 is gio_devices:gio|nx293 --operation mode is normal C1_nx293 = B1_bus_dout_2 & (C1_ce_cp # E2_bus_dout_2 & C1_ce_ni_jtg_up) # !B1_bus_dout_2 & E2_bus_dout_2 & (C1_ce_ni_jtg_up); --C1_nx294 is gio_devices:gio|nx294 --operation mode is normal C1_nx294 = E1_bus_dout_2 & (C1_ce_ni_jtg_dn # D1_bus_dout_2 & C1_ce_dut_jtg) # !E1_bus_dout_2 & D1_bus_dout_2 & (C1_ce_dut_jtg); --W1_q_b[1] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[1] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[1]_PORT_A_data_in = F1_data_2p_1; W1_q_b[1]_PORT_A_data_in_reg = DFFE(W1_q_b[1]_PORT_A_data_in, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[1]_PORT_A_address_reg = DFFE(W1_q_b[1]_PORT_A_address, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[1]_PORT_B_address_reg = DFFE(W1_q_b[1]_PORT_B_address, W1_q_b[1]_clock_1, , , ); W1_q_b[1]_PORT_A_write_enable = VCC; W1_q_b[1]_PORT_A_write_enable_reg = DFFE(W1_q_b[1]_PORT_A_write_enable, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_B_read_enable = VCC; W1_q_b[1]_PORT_B_read_enable_reg = DFFE(W1_q_b[1]_PORT_B_read_enable, W1_q_b[1]_clock_1, , , ); W1_q_b[1]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[1]_clock_1 = X1__clk0; W1_q_b[1]_clock_enable_0 = F1_we_eff; W1_q_b[1]_clear_0 = !G1_NOT_ni_clear; W1_q_b[1]_PORT_B_data_out = MEMORY(W1_q_b[1]_PORT_A_data_in_reg, , W1_q_b[1]_PORT_A_address_reg, W1_q_b[1]_PORT_B_address_reg, W1_q_b[1]_PORT_A_write_enable_reg, W1_q_b[1]_PORT_B_read_enable_reg, , , W1_q_b[1]_clock_0, W1_q_b[1]_clock_1, W1_q_b[1]_clock_enable_0, , W1_q_b[1]_clear_0, ); W1_q_b[1]_PORT_B_data_out_reg = DFFE(W1_q_b[1]_PORT_B_data_out, W1_q_b[1]_clock_1, , , ); W1_q_b[1] = W1_q_b[1]_PORT_B_data_out_reg[0]; --W1_q_b[9] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[9] W1_q_b[1]_PORT_A_data_in = F1_data_2p_1; W1_q_b[1]_PORT_A_data_in_reg = DFFE(W1_q_b[1]_PORT_A_data_in, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[1]_PORT_A_address_reg = DFFE(W1_q_b[1]_PORT_A_address, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[1]_PORT_B_address_reg = DFFE(W1_q_b[1]_PORT_B_address, W1_q_b[1]_clock_1, , , ); W1_q_b[1]_PORT_A_write_enable = VCC; W1_q_b[1]_PORT_A_write_enable_reg = DFFE(W1_q_b[1]_PORT_A_write_enable, W1_q_b[1]_clock_0, W1_q_b[1]_clear_0, , W1_q_b[1]_clock_enable_0); W1_q_b[1]_PORT_B_read_enable = VCC; W1_q_b[1]_PORT_B_read_enable_reg = DFFE(W1_q_b[1]_PORT_B_read_enable, W1_q_b[1]_clock_1, , , ); W1_q_b[1]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[1]_clock_1 = X1__clk0; W1_q_b[1]_clock_enable_0 = F1_we_eff; W1_q_b[1]_clear_0 = !G1_NOT_ni_clear; W1_q_b[1]_PORT_B_data_out = MEMORY(W1_q_b[1]_PORT_A_data_in_reg, , W1_q_b[1]_PORT_A_address_reg, W1_q_b[1]_PORT_B_address_reg, W1_q_b[1]_PORT_A_write_enable_reg, W1_q_b[1]_PORT_B_read_enable_reg, , , W1_q_b[1]_clock_0, W1_q_b[1]_clock_1, W1_q_b[1]_clock_enable_0, , W1_q_b[1]_clear_0, ); W1_q_b[1]_PORT_B_data_out_reg = DFFE(W1_q_b[1]_PORT_B_data_out, W1_q_b[1]_clock_1, , , ); W1_q_b[9] = W1_q_b[1]_PORT_B_data_out_reg[1]; --G1_bus_dout_1 is general_config_notri:nic_notri|bus_dout_1 --operation mode is normal G1_bus_dout_1 = G1_nx502 # !N1_request_44 & G1_nx515 & G1_nx516; --B1_bus_dout_1 is clkpre_counter:cp|bus_dout_1 --operation mode is normal B1_bus_dout_1 = B1_nx781 # B1_nx782 # B1_nx841 # B1_nx842; --E2_bus_dout_1 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_1 --operation mode is normal E2_bus_dout_1_lut_out = S3_dout_1 & (E2_nx219 & E2_nx237 # !E2_nx540) # !S3_dout_1 & E2_nx219 & (E2_nx237); E2_bus_dout_1 = DFFEAS(E2_bus_dout_1_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_1 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_1 --operation mode is normal E1_bus_dout_1_lut_out = S2_dout_1 & (E1_nx219 & E1_nx237 # !E1_nx540) # !S2_dout_1 & E1_nx219 & (E1_nx237); E1_bus_dout_1 = DFFEAS(E1_bus_dout_1_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_1 is jtag_master_1_notri:jtag_dut_notri|bus_dout_1 --operation mode is normal D1_bus_dout_1_lut_out = S1_dout_1 & (D1_nx222 & D1_nx241 # !D1_nx540) # !S1_dout_1 & D1_nx222 & (D1_nx241); D1_bus_dout_1 = DFFEAS(D1_bus_dout_1_lut_out, X1__clk0, VCC, , , , , , ); --scsn_slave_nw_dll_ob1_ob_data_24 is scsn_slave_nw_dll_ob1_ob_data_24 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_24_lut_out = scsn_slave_nw_dll_ob1_ob_data_23; scsn_slave_nw_dll_ob1_ob_data_24 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_24_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_24, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_25 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_25 --operation mode is normal Y2_d_to_dll_25 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_25 # !Y2_current_state_0 & (J1_reply_25)); --D1_jtgsnd_ser_t_30 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_30 --operation mode is normal D1_jtgsnd_ser_t_30_lut_out = D1_jtgsnd_ser_t_29; D1_jtgsnd_ser_t_30 = DFFEAS(D1_jtgsnd_ser_t_30_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_29, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_30 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_30 --operation mode is normal E1_jtgsnd_ser_t_30_lut_out = E1_jtgsnd_ser_t_29; E1_jtgsnd_ser_t_30 = DFFEAS(E1_jtgsnd_ser_t_30_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_29, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_30 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_30 --operation mode is normal E2_jtgsnd_ser_t_30_lut_out = E2_jtgsnd_ser_t_29; E2_jtgsnd_ser_t_30 = DFFEAS(E2_jtgsnd_ser_t_30_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_29, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_23 is scsn_slave_nw_dll_ob0_ob_data_23 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_23_lut_out = scsn_slave_nw_dll_ob0_ob_data_22; scsn_slave_nw_dll_ob0_ob_data_23 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_23_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_23, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_24 --operation mode is normal Y1_d_to_dll_24 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_24 # !Y1_current_state_0 & (J1_reply_24)); --J1_reply_25 is mcm_nw_apl:scsn_slave_nw_apl|reply_25 --operation mode is normal J1_reply_25 = N1_request_25 & (J1_a_0_dup_54 # J1_read_data_6 & !J1_ix34_ix30_nx12) # !N1_request_25 & J1_read_data_6 & (!J1_ix34_ix30_nx12); --J1_read_data_5 is mcm_nw_apl:scsn_slave_nw_apl|read_data_5 --operation mode is normal J1_read_data_5_lut_out = C1_bus_dout_5; J1_read_data_5 = DFFEAS(J1_read_data_5_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_4 is gio_devices:gio|bus_dout_4 --operation mode is normal C1_bus_dout_4_lut_out = C1_nx286 # C1_nx287 # C1_nx288; C1_bus_dout_4 = DFFEAS(C1_bus_dout_4_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx289 is gio_devices:gio|nx289 --operation mode is normal C1_nx289 = W1_q_b[3] & (C1_sel_5 # G1_bus_dout_3 & C1_ce_gen) # !W1_q_b[3] & G1_bus_dout_3 & (C1_ce_gen); --C1_nx290 is gio_devices:gio|nx290 --operation mode is normal C1_nx290 = B1_bus_dout_3 & (C1_ce_cp # E2_bus_dout_3 & C1_ce_ni_jtg_up) # !B1_bus_dout_3 & E2_bus_dout_3 & (C1_ce_ni_jtg_up); --C1_nx291 is gio_devices:gio|nx291 --operation mode is normal C1_nx291 = E1_bus_dout_3 & (C1_ce_ni_jtg_dn # D1_bus_dout_3 & C1_ce_dut_jtg) # !E1_bus_dout_3 & D1_bus_dout_3 & (C1_ce_dut_jtg); --W1_q_b[2] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[2] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[2]_PORT_A_data_in = F1_data_2p_2; W1_q_b[2]_PORT_A_data_in_reg = DFFE(W1_q_b[2]_PORT_A_data_in, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[2]_PORT_A_address_reg = DFFE(W1_q_b[2]_PORT_A_address, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[2]_PORT_B_address_reg = DFFE(W1_q_b[2]_PORT_B_address, W1_q_b[2]_clock_1, , , ); W1_q_b[2]_PORT_A_write_enable = VCC; W1_q_b[2]_PORT_A_write_enable_reg = DFFE(W1_q_b[2]_PORT_A_write_enable, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_B_read_enable = VCC; W1_q_b[2]_PORT_B_read_enable_reg = DFFE(W1_q_b[2]_PORT_B_read_enable, W1_q_b[2]_clock_1, , , ); W1_q_b[2]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[2]_clock_1 = X1__clk0; W1_q_b[2]_clock_enable_0 = F1_we_eff; W1_q_b[2]_clear_0 = !G1_NOT_ni_clear; W1_q_b[2]_PORT_B_data_out = MEMORY(W1_q_b[2]_PORT_A_data_in_reg, , W1_q_b[2]_PORT_A_address_reg, W1_q_b[2]_PORT_B_address_reg, W1_q_b[2]_PORT_A_write_enable_reg, W1_q_b[2]_PORT_B_read_enable_reg, , , W1_q_b[2]_clock_0, W1_q_b[2]_clock_1, W1_q_b[2]_clock_enable_0, , W1_q_b[2]_clear_0, ); W1_q_b[2]_PORT_B_data_out_reg = DFFE(W1_q_b[2]_PORT_B_data_out, W1_q_b[2]_clock_1, , , ); W1_q_b[2] = W1_q_b[2]_PORT_B_data_out_reg[0]; --W1_q_b[10] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[10] W1_q_b[2]_PORT_A_data_in = F1_data_2p_2; W1_q_b[2]_PORT_A_data_in_reg = DFFE(W1_q_b[2]_PORT_A_data_in, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[2]_PORT_A_address_reg = DFFE(W1_q_b[2]_PORT_A_address, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[2]_PORT_B_address_reg = DFFE(W1_q_b[2]_PORT_B_address, W1_q_b[2]_clock_1, , , ); W1_q_b[2]_PORT_A_write_enable = VCC; W1_q_b[2]_PORT_A_write_enable_reg = DFFE(W1_q_b[2]_PORT_A_write_enable, W1_q_b[2]_clock_0, W1_q_b[2]_clear_0, , W1_q_b[2]_clock_enable_0); W1_q_b[2]_PORT_B_read_enable = VCC; W1_q_b[2]_PORT_B_read_enable_reg = DFFE(W1_q_b[2]_PORT_B_read_enable, W1_q_b[2]_clock_1, , , ); W1_q_b[2]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[2]_clock_1 = X1__clk0; W1_q_b[2]_clock_enable_0 = F1_we_eff; W1_q_b[2]_clear_0 = !G1_NOT_ni_clear; W1_q_b[2]_PORT_B_data_out = MEMORY(W1_q_b[2]_PORT_A_data_in_reg, , W1_q_b[2]_PORT_A_address_reg, W1_q_b[2]_PORT_B_address_reg, W1_q_b[2]_PORT_A_write_enable_reg, W1_q_b[2]_PORT_B_read_enable_reg, , , W1_q_b[2]_clock_0, W1_q_b[2]_clock_1, W1_q_b[2]_clock_enable_0, , W1_q_b[2]_clear_0, ); W1_q_b[2]_PORT_B_data_out_reg = DFFE(W1_q_b[2]_PORT_B_data_out, W1_q_b[2]_clock_1, , , ); W1_q_b[10] = W1_q_b[2]_PORT_B_data_out_reg[1]; --G1_bus_dout_2 is general_config_notri:nic_notri|bus_dout_2 --operation mode is normal G1_bus_dout_2 = G1_nx499 # !N1_request_44 & G1_nx518 & G1_nx519; --B1_bus_dout_2 is clkpre_counter:cp|bus_dout_2 --operation mode is normal B1_bus_dout_2 = B1_nx777 # B1_nx778 # B1_nx839 # B1_nx840; --E2_bus_dout_2 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_2 --operation mode is normal E2_bus_dout_2_lut_out = S3_dout_2 & (E2_nx219 & E2_nx236 # !E2_nx540) # !S3_dout_2 & E2_nx219 & (E2_nx236); E2_bus_dout_2 = DFFEAS(E2_bus_dout_2_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_2 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_2 --operation mode is normal E1_bus_dout_2_lut_out = S2_dout_2 & (E1_nx219 & E1_nx236 # !E1_nx540) # !S2_dout_2 & E1_nx219 & (E1_nx236); E1_bus_dout_2 = DFFEAS(E1_bus_dout_2_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_2 is jtag_master_1_notri:jtag_dut_notri|bus_dout_2 --operation mode is normal D1_bus_dout_2_lut_out = S1_dout_2 & (D1_nx222 & D1_nx240 # !D1_nx540) # !S1_dout_2 & D1_nx222 & (D1_nx240); D1_bus_dout_2 = DFFEAS(D1_bus_dout_2_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx502 is general_config_notri:nic_notri|nx502 --operation mode is normal G1_nx502 = G1_nx506 & (G1_nx503 # G1_se0_cnt_1 & G1_nx507); --G1_nx515 is general_config_notri:nic_notri|nx515 --operation mode is normal G1_nx515 = N1_request_43 # G1_nx504 # G1_sebd_out_1 & G1_NOT_ix69_ix30_nx10; --G1_nx516 is general_config_notri:nic_notri|nx516 --operation mode is normal G1_nx516 = DUT_P4_D[1] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx781 is clkpre_counter:cp|nx781 --operation mode is normal B1_nx781 = GLOBAL(DUT_CLK[1]) & (B1_nx804 # B1_strb_dout_1 & B1_nx803) # !GLOBAL(DUT_CLK[1]) & B1_strb_dout_1 & B1_nx803; --B1_nx782 is clkpre_counter:cp|nx782 --operation mode is normal B1_nx782 = B1_dout1pcnt_1 & (B1_nx795 # B1_dout3pcnt_1 & B1_nx796) # !B1_dout1pcnt_1 & B1_dout3pcnt_1 & (B1_nx796); --B1_nx841 is clkpre_counter:cp|nx841 --operation mode is normal B1_nx841 = B1_nx783 # B1_nx784 # B1_dout_ccnt_1 & B1_nx794; --B1_nx842 is clkpre_counter:cp|nx842 --operation mode is normal B1_nx842 = B1_dout0pcnt_1 & (B1_nx798 # B1_dout2pcnt_1 & B1_nx797) # !B1_dout0pcnt_1 & B1_dout2pcnt_1 & B1_nx797; --S3_dout_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_1 --operation mode is normal S3_dout_1 = S3_nx279 & (N1_request_47 # S3_nx277 & S3_nx278); --E2_nx237 is jtag_master_2_notri:jtag_ni_up_notri|nx237 --operation mode is normal E2_nx237 = N1_request_43 & (E2_state_jtag_1) # !N1_request_43 & E2_cfr_1; --S2_dout_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_1 --operation mode is normal S2_dout_1 = S2_nx279 & (N1_request_47 # S2_nx277 & S2_nx278); --E1_nx237 is jtag_master_2_notri:jtag_ni_dn_notri|nx237 --operation mode is normal E1_nx237 = N1_request_43 & (E1_state_jtag_1) # !N1_request_43 & E1_cfr_1; --S1_dout_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_1 --operation mode is normal S1_dout_1 = S1_nx279 & (N1_request_47 # S1_nx277 & S1_nx278); --D1_nx241 is jtag_master_1_notri:jtag_dut_notri|nx241 --operation mode is normal D1_nx241 = N1_request_43 & (D1_state_jtag_1) # !N1_request_43 & D1_cfr_1; --scsn_slave_nw_dll_ob1_ob_data_23 is scsn_slave_nw_dll_ob1_ob_data_23 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_23_lut_out = scsn_slave_nw_dll_ob1_ob_data_22; scsn_slave_nw_dll_ob1_ob_data_23 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_23_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_23, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_24 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_24 --operation mode is normal Y2_d_to_dll_24 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_24 # !Y2_current_state_0 & (J1_reply_24)); --D1_jtgsnd_ser_t_29 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_29 --operation mode is normal D1_jtgsnd_ser_t_29_lut_out = D1_jtgsnd_ser_t_28; D1_jtgsnd_ser_t_29 = DFFEAS(D1_jtgsnd_ser_t_29_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx848, N1_request_19, , , D1_jtgsnd_we_g_1); --E1_jtgsnd_ser_t_29 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_29 --operation mode is normal E1_jtgsnd_ser_t_29_lut_out = E1_jtgsnd_ser_t_28; E1_jtgsnd_ser_t_29 = DFFEAS(E1_jtgsnd_ser_t_29_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx868, N1_request_19, , , E1_jtgsnd_we_g_1); --E2_jtgsnd_ser_t_29 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_29 --operation mode is normal E2_jtgsnd_ser_t_29_lut_out = E2_jtgsnd_ser_t_28; E2_jtgsnd_ser_t_29 = DFFEAS(E2_jtgsnd_ser_t_29_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx868, N1_request_19, , , E2_jtgsnd_we_g_1); --scsn_slave_nw_dll_ob0_ob_data_22 is scsn_slave_nw_dll_ob0_ob_data_22 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_22_lut_out = scsn_slave_nw_dll_ob0_ob_data_21; scsn_slave_nw_dll_ob0_ob_data_22 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_22_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_22, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_23 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_23 --operation mode is normal Y1_d_to_dll_23 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_23 # !Y1_current_state_0 & (J1_reply_23)); --J1_reply_24 is mcm_nw_apl:scsn_slave_nw_apl|reply_24 --operation mode is normal J1_reply_24 = N1_request_24 & (J1_a_0_dup_54 # J1_read_data_7 & !J1_ix34_ix30_nx12) # !N1_request_24 & J1_read_data_7 & (!J1_ix34_ix30_nx12); --J1_read_data_6 is mcm_nw_apl:scsn_slave_nw_apl|read_data_6 --operation mode is normal J1_read_data_6_lut_out = C1_bus_dout_6; J1_read_data_6 = DFFEAS(J1_read_data_6_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_5 is gio_devices:gio|bus_dout_5 --operation mode is normal C1_bus_dout_5_lut_out = C1_nx283 # C1_nx284 # C1_nx285; C1_bus_dout_5 = DFFEAS(C1_bus_dout_5_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx286 is gio_devices:gio|nx286 --operation mode is normal C1_nx286 = W1_q_b[4] & (C1_sel_5 # G1_bus_dout_4 & C1_ce_gen) # !W1_q_b[4] & G1_bus_dout_4 & (C1_ce_gen); --C1_nx287 is gio_devices:gio|nx287 --operation mode is normal C1_nx287 = B1_bus_dout_4 & (C1_ce_cp # E2_bus_dout_4 & C1_ce_ni_jtg_up) # !B1_bus_dout_4 & E2_bus_dout_4 & (C1_ce_ni_jtg_up); --C1_nx288 is gio_devices:gio|nx288 --operation mode is normal C1_nx288 = E1_bus_dout_4 & (C1_ce_ni_jtg_dn # D1_bus_dout_4 & C1_ce_dut_jtg) # !E1_bus_dout_4 & D1_bus_dout_4 & (C1_ce_dut_jtg); --W1_q_b[3] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[3] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[3]_PORT_A_data_in = F1_data_2p_3; W1_q_b[3]_PORT_A_data_in_reg = DFFE(W1_q_b[3]_PORT_A_data_in, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[3]_PORT_A_address_reg = DFFE(W1_q_b[3]_PORT_A_address, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[3]_PORT_B_address_reg = DFFE(W1_q_b[3]_PORT_B_address, W1_q_b[3]_clock_1, , , ); W1_q_b[3]_PORT_A_write_enable = VCC; W1_q_b[3]_PORT_A_write_enable_reg = DFFE(W1_q_b[3]_PORT_A_write_enable, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_B_read_enable = VCC; W1_q_b[3]_PORT_B_read_enable_reg = DFFE(W1_q_b[3]_PORT_B_read_enable, W1_q_b[3]_clock_1, , , ); W1_q_b[3]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[3]_clock_1 = X1__clk0; W1_q_b[3]_clock_enable_0 = F1_we_eff; W1_q_b[3]_clear_0 = !G1_NOT_ni_clear; W1_q_b[3]_PORT_B_data_out = MEMORY(W1_q_b[3]_PORT_A_data_in_reg, , W1_q_b[3]_PORT_A_address_reg, W1_q_b[3]_PORT_B_address_reg, W1_q_b[3]_PORT_A_write_enable_reg, W1_q_b[3]_PORT_B_read_enable_reg, , , W1_q_b[3]_clock_0, W1_q_b[3]_clock_1, W1_q_b[3]_clock_enable_0, , W1_q_b[3]_clear_0, ); W1_q_b[3]_PORT_B_data_out_reg = DFFE(W1_q_b[3]_PORT_B_data_out, W1_q_b[3]_clock_1, , , ); W1_q_b[3] = W1_q_b[3]_PORT_B_data_out_reg[0]; --W1_q_b[11] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[11] W1_q_b[3]_PORT_A_data_in = F1_data_2p_3; W1_q_b[3]_PORT_A_data_in_reg = DFFE(W1_q_b[3]_PORT_A_data_in, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[3]_PORT_A_address_reg = DFFE(W1_q_b[3]_PORT_A_address, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[3]_PORT_B_address_reg = DFFE(W1_q_b[3]_PORT_B_address, W1_q_b[3]_clock_1, , , ); W1_q_b[3]_PORT_A_write_enable = VCC; W1_q_b[3]_PORT_A_write_enable_reg = DFFE(W1_q_b[3]_PORT_A_write_enable, W1_q_b[3]_clock_0, W1_q_b[3]_clear_0, , W1_q_b[3]_clock_enable_0); W1_q_b[3]_PORT_B_read_enable = VCC; W1_q_b[3]_PORT_B_read_enable_reg = DFFE(W1_q_b[3]_PORT_B_read_enable, W1_q_b[3]_clock_1, , , ); W1_q_b[3]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[3]_clock_1 = X1__clk0; W1_q_b[3]_clock_enable_0 = F1_we_eff; W1_q_b[3]_clear_0 = !G1_NOT_ni_clear; W1_q_b[3]_PORT_B_data_out = MEMORY(W1_q_b[3]_PORT_A_data_in_reg, , W1_q_b[3]_PORT_A_address_reg, W1_q_b[3]_PORT_B_address_reg, W1_q_b[3]_PORT_A_write_enable_reg, W1_q_b[3]_PORT_B_read_enable_reg, , , W1_q_b[3]_clock_0, W1_q_b[3]_clock_1, W1_q_b[3]_clock_enable_0, , W1_q_b[3]_clear_0, ); W1_q_b[3]_PORT_B_data_out_reg = DFFE(W1_q_b[3]_PORT_B_data_out, W1_q_b[3]_clock_1, , , ); W1_q_b[11] = W1_q_b[3]_PORT_B_data_out_reg[1]; --G1_bus_dout_3 is general_config_notri:nic_notri|bus_dout_3 --operation mode is normal G1_bus_dout_3 = G1_nx496 # N1_request_44 & !N1_request_41 & G1_nx463; --B1_bus_dout_3 is clkpre_counter:cp|bus_dout_3 --operation mode is normal B1_bus_dout_3 = B1_nx773 # B1_nx774 # B1_nx837 # B1_nx838; --E2_bus_dout_3 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_3 --operation mode is normal E2_bus_dout_3_lut_out = S3_dout_3 & (E2_nx219 & E2_nx235 # !E2_nx540) # !S3_dout_3 & E2_nx219 & (E2_nx235); E2_bus_dout_3 = DFFEAS(E2_bus_dout_3_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_3 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_3 --operation mode is normal E1_bus_dout_3_lut_out = S2_dout_3 & (E1_nx219 & E1_nx235 # !E1_nx540) # !S2_dout_3 & E1_nx219 & (E1_nx235); E1_bus_dout_3 = DFFEAS(E1_bus_dout_3_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_3 is jtag_master_1_notri:jtag_dut_notri|bus_dout_3 --operation mode is normal D1_bus_dout_3_lut_out = S1_dout_3 & (D1_nx222 & D1_nx239 # !D1_nx540) # !S1_dout_3 & D1_nx222 & (D1_nx239); D1_bus_dout_3 = DFFEAS(D1_bus_dout_3_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx499 is general_config_notri:nic_notri|nx499 --operation mode is normal G1_nx499 = G1_nx506 & (G1_nx500 # G1_se0_cnt_2 & G1_nx507); --G1_nx518 is general_config_notri:nic_notri|nx518 --operation mode is normal G1_nx518 = N1_request_43 # G1_nx501 # G1_sebd_out_2 & G1_NOT_ix69_ix30_nx10; --G1_nx519 is general_config_notri:nic_notri|nx519 --operation mode is normal G1_nx519 = DUT_P4_D[2] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx777 is clkpre_counter:cp|nx777 --operation mode is normal B1_nx777 = GLOBAL(DUT_CLK[2]) & (B1_nx804 # B1_strb_dout_2 & B1_nx803) # !GLOBAL(DUT_CLK[2]) & B1_strb_dout_2 & B1_nx803; --B1_nx778 is clkpre_counter:cp|nx778 --operation mode is normal B1_nx778 = B1_dout1pcnt_2 & (B1_nx795 # B1_dout3pcnt_2 & B1_nx796) # !B1_dout1pcnt_2 & B1_dout3pcnt_2 & (B1_nx796); --B1_nx839 is clkpre_counter:cp|nx839 --operation mode is normal B1_nx839 = B1_nx779 # B1_nx780 # B1_dout_ccnt_2 & B1_nx794; --B1_nx840 is clkpre_counter:cp|nx840 --operation mode is normal B1_nx840 = B1_dout0pcnt_2 & (B1_nx798 # B1_dout2pcnt_2 & B1_nx797) # !B1_dout0pcnt_2 & B1_dout2pcnt_2 & B1_nx797; --S3_dout_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_2 --operation mode is normal S3_dout_2 = N1_request_46 & S3_NI_P0_CLKout # !N1_request_46 & (S3_nx250 # S3_nx251); --E2_nx236 is jtag_master_2_notri:jtag_ni_up_notri|nx236 --operation mode is normal E2_nx236 = N1_request_43 & E2_state_jtag_2 # !N1_request_43 & (E2_EN1); --S2_dout_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_2 --operation mode is normal S2_dout_2 = N1_request_46 & S2_NI_P0_CLKout # !N1_request_46 & (S2_nx250 # S2_nx251); --E1_nx236 is jtag_master_2_notri:jtag_ni_dn_notri|nx236 --operation mode is normal E1_nx236 = N1_request_43 & E1_state_jtag_2 # !N1_request_43 & (E1_EN1); --S1_dout_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_2 --operation mode is normal S1_dout_2 = N1_request_46 & S1_NI_P0_CLKout # !N1_request_46 & (S1_nx250 # S1_nx251); --D1_nx240 is jtag_master_1_notri:jtag_dut_notri|nx240 --operation mode is normal D1_nx240 = N1_request_43 & D1_state_jtag_2 # !N1_request_43 & (D1_EN1); --G1_nx503 is general_config_notri:nic_notri|nx503 --operation mode is normal G1_nx503 = !N1_request_43 & (N1_request_42 & G1_ni_or_mask_1 # !N1_request_42 & (G1_ni_sel_s_1)); --G1_nx504 is general_config_notri:nic_notri|nx504 --operation mode is normal G1_nx504 = !N1_request_42 & G1_nx514 & (N1_request_41 # G1_sw_sel_1); --B1_strb_dout_1 is clkpre_counter:cp|strb_dout_1 --operation mode is arithmetic B1_strb_dout_1_carry_eqn = B1_ccnt_cnt_s_Q_nx10; B1_strb_dout_1_lut_out = B1_strb_dout_1 $ (B1_strb_dout_1_carry_eqn); B1_strb_dout_1 = DFFEAS(B1_strb_dout_1_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx16 is clkpre_counter:cp|ccnt_cnt_s_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx16 = CARRY(!B1_ccnt_cnt_s_Q_nx10 # !B1_strb_dout_1); --B1_dout1pcnt_1 is clkpre_counter:cp|dout1pcnt_1 --operation mode is arithmetic B1_dout1pcnt_1_carry_eqn = B1_pcnt1_cnt_0_cnt_i_Q_nx10; B1_dout1pcnt_1_lut_out = B1_dout1pcnt_1 $ (B1_dout1pcnt_1_carry_eqn); B1_dout1pcnt_1 = DFFEAS(B1_dout1pcnt_1_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_0_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_0_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_0_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_0_cnt_i_Q_nx10 # !B1_dout1pcnt_1); --B1_dout3pcnt_1 is clkpre_counter:cp|dout3pcnt_1 --operation mode is arithmetic B1_dout3pcnt_1_carry_eqn = B1_pcnt3_cnt_0_cnt_i_Q_nx10; B1_dout3pcnt_1_lut_out = B1_dout3pcnt_1 $ (B1_dout3pcnt_1_carry_eqn); B1_dout3pcnt_1 = DFFEAS(B1_dout3pcnt_1_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_0_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_0_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_0_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_0_cnt_i_Q_nx10 # !B1_dout3pcnt_1); --B1_dout_ccnt_1 is clkpre_counter:cp|dout_ccnt_1 --operation mode is arithmetic B1_dout_ccnt_1_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx10; B1_dout_ccnt_1_lut_out = B1_dout_ccnt_1 $ (B1_dout_ccnt_1_carry_eqn); B1_dout_ccnt_1 = DFFEAS(B1_dout_ccnt_1_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx16 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx16 = CARRY(!B1_ccnt_cnt_0_cnt_i_Q_nx10 # !B1_dout_ccnt_1); --B1_nx783 is clkpre_counter:cp|nx783 --operation mode is normal B1_nx783 = B1_L0time_1 & (B1_nx801 # B1_L2time_1 & B1_nx802) # !B1_L0time_1 & B1_L2time_1 & (B1_nx802); --B1_nx784 is clkpre_counter:cp|nx784 --operation mode is normal B1_nx784 = B1_L1time_1 & (B1_nx799 # B1_c_time_1 & B1_nx800) # !B1_L1time_1 & B1_c_time_1 & (B1_nx800); --B1_dout0pcnt_1 is clkpre_counter:cp|dout0pcnt_1 --operation mode is arithmetic B1_dout0pcnt_1_carry_eqn = B1_pcnt0_cnt_0_cnt_i_Q_nx10; B1_dout0pcnt_1_lut_out = B1_dout0pcnt_1 $ (B1_dout0pcnt_1_carry_eqn); B1_dout0pcnt_1 = DFFEAS(B1_dout0pcnt_1_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_0_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_0_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_0_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_0_cnt_i_Q_nx10 # !B1_dout0pcnt_1); --B1_dout2pcnt_1 is clkpre_counter:cp|dout2pcnt_1 --operation mode is arithmetic B1_dout2pcnt_1_carry_eqn = B1_pcnt2_cnt_0_cnt_i_Q_nx10; B1_dout2pcnt_1_lut_out = B1_dout2pcnt_1 $ (B1_dout2pcnt_1_carry_eqn); B1_dout2pcnt_1 = DFFEAS(B1_dout2pcnt_1_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_0_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_0_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_0_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_0_cnt_i_Q_nx10 # !B1_dout2pcnt_1); --S3_nx277 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx277 --operation mode is normal S3_nx277 = N1_request_48 # N1_request_46 & S3_SER0_DOUT # !N1_request_46 & (S3_NI_P0_D_1); --S3_nx278 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx278 --operation mode is normal S3_nx278 = S3_NI_P2_D_1 # !N1_request_48; --S3_nx279 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx279 --operation mode is normal S3_nx279 = N1_request_48 & S3_ser_out_i_dup0 # !N1_request_48 & (S3_NI_P4_D_1) # !N1_request_47; --S2_nx277 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx277 --operation mode is normal S2_nx277 = N1_request_48 # N1_request_46 & S2_SER0_DOUT # !N1_request_46 & (S2_NI_P0_D_1); --S2_nx278 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx278 --operation mode is normal S2_nx278 = S2_NI_P2_D_1 # !N1_request_48; --S2_nx279 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx279 --operation mode is normal S2_nx279 = N1_request_48 & S2_ser_out_i_dup0 # !N1_request_48 & (S2_NI_P4_D_1) # !N1_request_47; --S1_nx277 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx277 --operation mode is normal S1_nx277 = N1_request_48 # N1_request_46 & S1_SER0_DOUT # !N1_request_46 & (S1_NI_P0_D_1); --S1_nx278 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx278 --operation mode is normal S1_nx278 = S1_NI_P2_D_1 # !N1_request_48; --S1_nx279 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx279 --operation mode is normal S1_nx279 = N1_request_48 & S1_ser_out_i_dup0 # !N1_request_48 & (S1_NI_P4_D_1) # !N1_request_47; --scsn_slave_nw_dll_ob1_ob_data_22 is scsn_slave_nw_dll_ob1_ob_data_22 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_22_lut_out = scsn_slave_nw_dll_ob1_ob_data_21; scsn_slave_nw_dll_ob1_ob_data_22 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_22_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_22, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_23 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_23 --operation mode is normal Y2_d_to_dll_23 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_23 # !Y2_current_state_0 & (J1_reply_23)); --D1_jtgsnd_ser_t_28 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_28 --operation mode is normal D1_jtgsnd_ser_t_28_lut_out = D1_jtgsnd_ser_t_27; D1_jtgsnd_ser_t_28 = DFFEAS(D1_jtgsnd_ser_t_28_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_28, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_28 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_28 --operation mode is normal E1_jtgsnd_ser_t_28_lut_out = E1_jtgsnd_ser_t_27; E1_jtgsnd_ser_t_28 = DFFEAS(E1_jtgsnd_ser_t_28_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_28, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_28 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_28 --operation mode is normal E2_jtgsnd_ser_t_28_lut_out = E2_jtgsnd_ser_t_27; E2_jtgsnd_ser_t_28 = DFFEAS(E2_jtgsnd_ser_t_28_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_28, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_21 is scsn_slave_nw_dll_ob0_ob_data_21 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_21_lut_out = scsn_slave_nw_dll_ob0_ob_data_20; scsn_slave_nw_dll_ob0_ob_data_21 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_21_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_21, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_22 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_22 --operation mode is normal Y1_d_to_dll_22 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_22 # !Y1_current_state_0 & (J1_reply_22)); --J1_reply_23 is mcm_nw_apl:scsn_slave_nw_apl|reply_23 --operation mode is normal J1_reply_23 = N1_request_23 & (J1_a_0_dup_54 # J1_read_data_8 & !J1_ix34_ix30_nx12) # !N1_request_23 & J1_read_data_8 & (!J1_ix34_ix30_nx12); --J1_read_data_7 is mcm_nw_apl:scsn_slave_nw_apl|read_data_7 --operation mode is normal J1_read_data_7_lut_out = C1_bus_dout_7; J1_read_data_7 = DFFEAS(J1_read_data_7_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_6 is gio_devices:gio|bus_dout_6 --operation mode is normal C1_bus_dout_6_lut_out = C1_nx280 # C1_nx281 # C1_nx282; C1_bus_dout_6 = DFFEAS(C1_bus_dout_6_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx283 is gio_devices:gio|nx283 --operation mode is normal C1_nx283 = W1_q_b[5] & (C1_sel_5 # G1_bus_dout_5 & C1_ce_gen) # !W1_q_b[5] & G1_bus_dout_5 & (C1_ce_gen); --C1_nx284 is gio_devices:gio|nx284 --operation mode is normal C1_nx284 = B1_bus_dout_5 & (C1_ce_cp # E2_bus_dout_5 & C1_ce_ni_jtg_up) # !B1_bus_dout_5 & E2_bus_dout_5 & (C1_ce_ni_jtg_up); --C1_nx285 is gio_devices:gio|nx285 --operation mode is normal C1_nx285 = E1_bus_dout_5 & (C1_ce_ni_jtg_dn # D1_bus_dout_5 & C1_ce_dut_jtg) # !E1_bus_dout_5 & D1_bus_dout_5 & (C1_ce_dut_jtg); --W1_q_b[4] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[4] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[4]_PORT_A_data_in = F1_data_2p_4; W1_q_b[4]_PORT_A_data_in_reg = DFFE(W1_q_b[4]_PORT_A_data_in, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[4]_PORT_A_address_reg = DFFE(W1_q_b[4]_PORT_A_address, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[4]_PORT_B_address_reg = DFFE(W1_q_b[4]_PORT_B_address, W1_q_b[4]_clock_1, , , ); W1_q_b[4]_PORT_A_write_enable = VCC; W1_q_b[4]_PORT_A_write_enable_reg = DFFE(W1_q_b[4]_PORT_A_write_enable, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_B_read_enable = VCC; W1_q_b[4]_PORT_B_read_enable_reg = DFFE(W1_q_b[4]_PORT_B_read_enable, W1_q_b[4]_clock_1, , , ); W1_q_b[4]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[4]_clock_1 = X1__clk0; W1_q_b[4]_clock_enable_0 = F1_we_eff; W1_q_b[4]_clear_0 = !G1_NOT_ni_clear; W1_q_b[4]_PORT_B_data_out = MEMORY(W1_q_b[4]_PORT_A_data_in_reg, , W1_q_b[4]_PORT_A_address_reg, W1_q_b[4]_PORT_B_address_reg, W1_q_b[4]_PORT_A_write_enable_reg, W1_q_b[4]_PORT_B_read_enable_reg, , , W1_q_b[4]_clock_0, W1_q_b[4]_clock_1, W1_q_b[4]_clock_enable_0, , W1_q_b[4]_clear_0, ); W1_q_b[4]_PORT_B_data_out_reg = DFFE(W1_q_b[4]_PORT_B_data_out, W1_q_b[4]_clock_1, , , ); W1_q_b[4] = W1_q_b[4]_PORT_B_data_out_reg[0]; --W1_q_b[12] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[12] W1_q_b[4]_PORT_A_data_in = F1_data_2p_4; W1_q_b[4]_PORT_A_data_in_reg = DFFE(W1_q_b[4]_PORT_A_data_in, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[4]_PORT_A_address_reg = DFFE(W1_q_b[4]_PORT_A_address, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[4]_PORT_B_address_reg = DFFE(W1_q_b[4]_PORT_B_address, W1_q_b[4]_clock_1, , , ); W1_q_b[4]_PORT_A_write_enable = VCC; W1_q_b[4]_PORT_A_write_enable_reg = DFFE(W1_q_b[4]_PORT_A_write_enable, W1_q_b[4]_clock_0, W1_q_b[4]_clear_0, , W1_q_b[4]_clock_enable_0); W1_q_b[4]_PORT_B_read_enable = VCC; W1_q_b[4]_PORT_B_read_enable_reg = DFFE(W1_q_b[4]_PORT_B_read_enable, W1_q_b[4]_clock_1, , , ); W1_q_b[4]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[4]_clock_1 = X1__clk0; W1_q_b[4]_clock_enable_0 = F1_we_eff; W1_q_b[4]_clear_0 = !G1_NOT_ni_clear; W1_q_b[4]_PORT_B_data_out = MEMORY(W1_q_b[4]_PORT_A_data_in_reg, , W1_q_b[4]_PORT_A_address_reg, W1_q_b[4]_PORT_B_address_reg, W1_q_b[4]_PORT_A_write_enable_reg, W1_q_b[4]_PORT_B_read_enable_reg, , , W1_q_b[4]_clock_0, W1_q_b[4]_clock_1, W1_q_b[4]_clock_enable_0, , W1_q_b[4]_clear_0, ); W1_q_b[4]_PORT_B_data_out_reg = DFFE(W1_q_b[4]_PORT_B_data_out, W1_q_b[4]_clock_1, , , ); W1_q_b[12] = W1_q_b[4]_PORT_B_data_out_reg[1]; --G1_bus_dout_4 is general_config_notri:nic_notri|bus_dout_4 --operation mode is normal G1_bus_dout_4 = G1_nx493 # !N1_request_44 & G1_nx523 & G1_nx524; --B1_bus_dout_4 is clkpre_counter:cp|bus_dout_4 --operation mode is normal B1_bus_dout_4 = B1_nx769 # B1_nx770 # B1_nx835 # B1_nx836; --E2_bus_dout_4 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_4 --operation mode is normal E2_bus_dout_4_lut_out = S3_dout_4 & (E2_nx219 & E2_nx234 # !E2_nx540) # !S3_dout_4 & E2_nx219 & E2_nx234; E2_bus_dout_4 = DFFEAS(E2_bus_dout_4_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_4 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_4 --operation mode is normal E1_bus_dout_4_lut_out = S2_dout_4 & (E1_nx219 & E1_nx234 # !E1_nx540) # !S2_dout_4 & E1_nx219 & E1_nx234; E1_bus_dout_4 = DFFEAS(E1_bus_dout_4_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_4 is jtag_master_1_notri:jtag_dut_notri|bus_dout_4 --operation mode is normal D1_bus_dout_4_lut_out = S1_dout_4 & (D1_nx222 & D1_nx238 # !D1_nx540) # !S1_dout_4 & D1_nx222 & D1_nx238; D1_bus_dout_4 = DFFEAS(D1_bus_dout_4_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx463 is general_config_notri:nic_notri|nx463 --operation mode is normal G1_nx463 = G1_nx521 & (!N1_request_42 & G1_se0_cnt_3 # !N1_request_43); --G1_nx496 is general_config_notri:nic_notri|nx496 --operation mode is normal G1_nx496 = !N1_request_44 & !N1_request_42 & (G1_nx497 # G1_nx498); --B1_nx773 is clkpre_counter:cp|nx773 --operation mode is normal B1_nx773 = GLOBAL(DUT_CLK[3]) & (B1_nx804 # B1_strb_dout_3 & B1_nx803) # !GLOBAL(DUT_CLK[3]) & B1_strb_dout_3 & B1_nx803; --B1_nx774 is clkpre_counter:cp|nx774 --operation mode is normal B1_nx774 = B1_dout1pcnt_3 & (B1_nx795 # B1_dout3pcnt_3 & B1_nx796) # !B1_dout1pcnt_3 & B1_dout3pcnt_3 & (B1_nx796); --B1_nx837 is clkpre_counter:cp|nx837 --operation mode is normal B1_nx837 = B1_nx775 # B1_nx776 # B1_dout_ccnt_3 & B1_nx794; --B1_nx838 is clkpre_counter:cp|nx838 --operation mode is normal B1_nx838 = B1_dout0pcnt_3 & (B1_nx798 # B1_dout2pcnt_3 & B1_nx797) # !B1_dout0pcnt_3 & B1_dout2pcnt_3 & B1_nx797; --S3_dout_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_3 --operation mode is normal S3_dout_3 = N1_request_46 & S3_NI_P1_PREout # !N1_request_46 & (S3_nx252 # S3_nx253); --E2_nx235 is jtag_master_2_notri:jtag_ni_up_notri|nx235 --operation mode is normal E2_nx235 = N1_request_43 & E2_state_jtag_3 # !N1_request_43 & (E2_EN2); --S2_dout_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_3 --operation mode is normal S2_dout_3 = N1_request_46 & S2_NI_P1_PREout # !N1_request_46 & (S2_nx252 # S2_nx253); --E1_nx235 is jtag_master_2_notri:jtag_ni_dn_notri|nx235 --operation mode is normal E1_nx235 = N1_request_43 & E1_state_jtag_3 # !N1_request_43 & (E1_EN2); --S1_dout_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_3 --operation mode is normal S1_dout_3 = N1_request_46 & S1_NI_P1_PREout # !N1_request_46 & (S1_nx252 # S1_nx253); --D1_nx239 is jtag_master_1_notri:jtag_dut_notri|nx239 --operation mode is normal D1_nx239 = N1_request_43 & (D1_state_jtag_3) # !N1_request_43 & D1_EN2; --G1_nx500 is general_config_notri:nic_notri|nx500 --operation mode is normal G1_nx500 = !N1_request_43 & (N1_request_42 & G1_ni_or_mask_2 # !N1_request_42 & (G1_ni_sel_s_2)); --G1_nx501 is general_config_notri:nic_notri|nx501 --operation mode is normal G1_nx501 = !N1_request_42 & G1_nx517 & (N1_request_41 # G1_sw_sel_2); --B1_strb_dout_2 is clkpre_counter:cp|strb_dout_2 --operation mode is arithmetic B1_strb_dout_2_carry_eqn = B1_ccnt_cnt_s_Q_nx16; B1_strb_dout_2_lut_out = B1_strb_dout_2 $ (!B1_strb_dout_2_carry_eqn); B1_strb_dout_2 = DFFEAS(B1_strb_dout_2_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx22 is clkpre_counter:cp|ccnt_cnt_s_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx22 = CARRY(B1_strb_dout_2 & (!B1_ccnt_cnt_s_Q_nx16)); --B1_dout1pcnt_2 is clkpre_counter:cp|dout1pcnt_2 --operation mode is arithmetic B1_dout1pcnt_2_carry_eqn = B1_pcnt1_cnt_0_cnt_i_Q_nx16; B1_dout1pcnt_2_lut_out = B1_dout1pcnt_2 $ (!B1_dout1pcnt_2_carry_eqn); B1_dout1pcnt_2 = DFFEAS(B1_dout1pcnt_2_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_0_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_0_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_0_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_2 & (!B1_pcnt1_cnt_0_cnt_i_Q_nx16)); --B1_dout3pcnt_2 is clkpre_counter:cp|dout3pcnt_2 --operation mode is arithmetic B1_dout3pcnt_2_carry_eqn = B1_pcnt3_cnt_0_cnt_i_Q_nx16; B1_dout3pcnt_2_lut_out = B1_dout3pcnt_2 $ (!B1_dout3pcnt_2_carry_eqn); B1_dout3pcnt_2 = DFFEAS(B1_dout3pcnt_2_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_0_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_0_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_0_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_2 & (!B1_pcnt3_cnt_0_cnt_i_Q_nx16)); --B1_dout_ccnt_2 is clkpre_counter:cp|dout_ccnt_2 --operation mode is arithmetic B1_dout_ccnt_2_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx16; B1_dout_ccnt_2_lut_out = B1_dout_ccnt_2 $ (!B1_dout_ccnt_2_carry_eqn); B1_dout_ccnt_2 = DFFEAS(B1_dout_ccnt_2_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx22 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx22 = CARRY(B1_dout_ccnt_2 & (!B1_ccnt_cnt_0_cnt_i_Q_nx16)); --B1_nx779 is clkpre_counter:cp|nx779 --operation mode is normal B1_nx779 = B1_L0time_2 & (B1_nx801 # B1_L2time_2 & B1_nx802) # !B1_L0time_2 & B1_L2time_2 & (B1_nx802); --B1_nx780 is clkpre_counter:cp|nx780 --operation mode is normal B1_nx780 = B1_L1time_2 & (B1_nx799 # B1_c_time_2 & B1_nx800) # !B1_L1time_2 & B1_c_time_2 & (B1_nx800); --B1_dout0pcnt_2 is clkpre_counter:cp|dout0pcnt_2 --operation mode is arithmetic B1_dout0pcnt_2_carry_eqn = B1_pcnt0_cnt_0_cnt_i_Q_nx16; B1_dout0pcnt_2_lut_out = B1_dout0pcnt_2 $ (!B1_dout0pcnt_2_carry_eqn); B1_dout0pcnt_2 = DFFEAS(B1_dout0pcnt_2_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_0_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_0_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_0_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_2 & (!B1_pcnt0_cnt_0_cnt_i_Q_nx16)); --B1_dout2pcnt_2 is clkpre_counter:cp|dout2pcnt_2 --operation mode is arithmetic B1_dout2pcnt_2_carry_eqn = B1_pcnt2_cnt_0_cnt_i_Q_nx16; B1_dout2pcnt_2_lut_out = B1_dout2pcnt_2 $ (!B1_dout2pcnt_2_carry_eqn); B1_dout2pcnt_2 = DFFEAS(B1_dout2pcnt_2_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_0_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_0_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_0_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_2 & (!B1_pcnt2_cnt_0_cnt_i_Q_nx16)); --S3_nx250 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx250 --operation mode is normal S3_nx250 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_2; --S3_nx251 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx251 --operation mode is normal S3_nx251 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_2) # !N1_request_48 & S3_NI_P0_D_2); --S2_nx250 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx250 --operation mode is normal S2_nx250 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_2; --S2_nx251 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx251 --operation mode is normal S2_nx251 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_2) # !N1_request_48 & S2_NI_P0_D_2); --S1_nx250 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx250 --operation mode is normal S1_nx250 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_2; --S1_nx251 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx251 --operation mode is normal S1_nx251 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_2) # !N1_request_48 & S1_NI_P0_D_2); --G1_nx514 is general_config_notri:nic_notri|nx514 --operation mode is normal G1_nx514 = N1_request_48 & F1_par_cnt_1 # !N1_request_48 & (F1_naddr_1) # !N1_request_41; --S3_ser_out_i_dup0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|ser_out_i_dup0 --operation mode is normal S3_ser_out_i_dup0_lut_out = S3_seribf_i_0; S3_ser_out_i_dup0 = DFFEAS(S3_ser_out_i_dup0_lut_out, T3_TCK, VCC, , E2_shift_inst, , , , ); --S2_ser_out_i_dup0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|ser_out_i_dup0 --operation mode is normal S2_ser_out_i_dup0_lut_out = S2_seribf_i_0; S2_ser_out_i_dup0 = DFFEAS(S2_ser_out_i_dup0_lut_out, T2_TCK, VCC, , E1_shift_inst, , , , ); --S1_ser_out_i_dup0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|ser_out_i_dup0 --operation mode is normal S1_ser_out_i_dup0_lut_out = S1_seribf_i_0; S1_ser_out_i_dup0 = DFFEAS(S1_ser_out_i_dup0_lut_out, T1_TCK, VCC, , D1_shift_inst, , , , ); --scsn_slave_nw_dll_ob1_ob_data_21 is scsn_slave_nw_dll_ob1_ob_data_21 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_21_lut_out = scsn_slave_nw_dll_ob1_ob_data_20; scsn_slave_nw_dll_ob1_ob_data_21 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_21_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_21, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_22 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_22 --operation mode is normal Y2_d_to_dll_22 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_22 # !Y2_current_state_0 & (J1_reply_22)); --D1_jtgsnd_ser_t_27 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_27 --operation mode is normal D1_jtgsnd_ser_t_27_lut_out = D1_jtgsnd_ser_t_26; D1_jtgsnd_ser_t_27 = DFFEAS(D1_jtgsnd_ser_t_27_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_15, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_27 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_27 --operation mode is normal E1_jtgsnd_ser_t_27_lut_out = E1_jtgsnd_ser_t_26; E1_jtgsnd_ser_t_27 = DFFEAS(E1_jtgsnd_ser_t_27_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_15, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_27 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_27 --operation mode is normal E2_jtgsnd_ser_t_27_lut_out = E2_jtgsnd_ser_t_26; E2_jtgsnd_ser_t_27 = DFFEAS(E2_jtgsnd_ser_t_27_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_15, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_20 is scsn_slave_nw_dll_ob0_ob_data_20 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_20_lut_out = scsn_slave_nw_dll_ob0_ob_data_19; scsn_slave_nw_dll_ob0_ob_data_20 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_20_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_20, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_21 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_21 --operation mode is normal Y1_d_to_dll_21 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_21 # !Y1_current_state_0 & (J1_reply_21)); --J1_reply_22 is mcm_nw_apl:scsn_slave_nw_apl|reply_22 --operation mode is normal J1_reply_22 = N1_request_22 & (J1_a_0_dup_54 # J1_read_data_9 & !J1_ix34_ix30_nx12) # !N1_request_22 & J1_read_data_9 & (!J1_ix34_ix30_nx12); --J1_read_data_8 is mcm_nw_apl:scsn_slave_nw_apl|read_data_8 --operation mode is normal J1_read_data_8_lut_out = C1_bus_dout_8; J1_read_data_8 = DFFEAS(J1_read_data_8_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_7 is gio_devices:gio|bus_dout_7 --operation mode is normal C1_bus_dout_7_lut_out = C1_nx277 # C1_nx278 # C1_nx279; C1_bus_dout_7 = DFFEAS(C1_bus_dout_7_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx280 is gio_devices:gio|nx280 --operation mode is normal C1_nx280 = W1_q_b[6] & (C1_sel_5 # G1_bus_dout_6 & C1_ce_gen) # !W1_q_b[6] & G1_bus_dout_6 & (C1_ce_gen); --C1_nx281 is gio_devices:gio|nx281 --operation mode is normal C1_nx281 = B1_bus_dout_6 & (C1_ce_cp # E2_bus_dout_6 & C1_ce_ni_jtg_up) # !B1_bus_dout_6 & E2_bus_dout_6 & (C1_ce_ni_jtg_up); --C1_nx282 is gio_devices:gio|nx282 --operation mode is normal C1_nx282 = E1_bus_dout_6 & (C1_ce_ni_jtg_dn # D1_bus_dout_6 & C1_ce_dut_jtg) # !E1_bus_dout_6 & D1_bus_dout_6 & (C1_ce_dut_jtg); --W1_q_b[5] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[5] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[5]_PORT_A_data_in = F1_data_2p_5; W1_q_b[5]_PORT_A_data_in_reg = DFFE(W1_q_b[5]_PORT_A_data_in, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[5]_PORT_A_address_reg = DFFE(W1_q_b[5]_PORT_A_address, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[5]_PORT_B_address_reg = DFFE(W1_q_b[5]_PORT_B_address, W1_q_b[5]_clock_1, , , ); W1_q_b[5]_PORT_A_write_enable = VCC; W1_q_b[5]_PORT_A_write_enable_reg = DFFE(W1_q_b[5]_PORT_A_write_enable, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_B_read_enable = VCC; W1_q_b[5]_PORT_B_read_enable_reg = DFFE(W1_q_b[5]_PORT_B_read_enable, W1_q_b[5]_clock_1, , , ); W1_q_b[5]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[5]_clock_1 = X1__clk0; W1_q_b[5]_clock_enable_0 = F1_we_eff; W1_q_b[5]_clear_0 = !G1_NOT_ni_clear; W1_q_b[5]_PORT_B_data_out = MEMORY(W1_q_b[5]_PORT_A_data_in_reg, , W1_q_b[5]_PORT_A_address_reg, W1_q_b[5]_PORT_B_address_reg, W1_q_b[5]_PORT_A_write_enable_reg, W1_q_b[5]_PORT_B_read_enable_reg, , , W1_q_b[5]_clock_0, W1_q_b[5]_clock_1, W1_q_b[5]_clock_enable_0, , W1_q_b[5]_clear_0, ); W1_q_b[5]_PORT_B_data_out_reg = DFFE(W1_q_b[5]_PORT_B_data_out, W1_q_b[5]_clock_1, , , ); W1_q_b[5] = W1_q_b[5]_PORT_B_data_out_reg[0]; --W1_q_b[13] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[13] W1_q_b[5]_PORT_A_data_in = F1_data_2p_5; W1_q_b[5]_PORT_A_data_in_reg = DFFE(W1_q_b[5]_PORT_A_data_in, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[5]_PORT_A_address_reg = DFFE(W1_q_b[5]_PORT_A_address, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[5]_PORT_B_address_reg = DFFE(W1_q_b[5]_PORT_B_address, W1_q_b[5]_clock_1, , , ); W1_q_b[5]_PORT_A_write_enable = VCC; W1_q_b[5]_PORT_A_write_enable_reg = DFFE(W1_q_b[5]_PORT_A_write_enable, W1_q_b[5]_clock_0, W1_q_b[5]_clear_0, , W1_q_b[5]_clock_enable_0); W1_q_b[5]_PORT_B_read_enable = VCC; W1_q_b[5]_PORT_B_read_enable_reg = DFFE(W1_q_b[5]_PORT_B_read_enable, W1_q_b[5]_clock_1, , , ); W1_q_b[5]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[5]_clock_1 = X1__clk0; W1_q_b[5]_clock_enable_0 = F1_we_eff; W1_q_b[5]_clear_0 = !G1_NOT_ni_clear; W1_q_b[5]_PORT_B_data_out = MEMORY(W1_q_b[5]_PORT_A_data_in_reg, , W1_q_b[5]_PORT_A_address_reg, W1_q_b[5]_PORT_B_address_reg, W1_q_b[5]_PORT_A_write_enable_reg, W1_q_b[5]_PORT_B_read_enable_reg, , , W1_q_b[5]_clock_0, W1_q_b[5]_clock_1, W1_q_b[5]_clock_enable_0, , W1_q_b[5]_clear_0, ); W1_q_b[5]_PORT_B_data_out_reg = DFFE(W1_q_b[5]_PORT_B_data_out, W1_q_b[5]_clock_1, , , ); W1_q_b[13] = W1_q_b[5]_PORT_B_data_out_reg[1]; --G1_bus_dout_5 is general_config_notri:nic_notri|bus_dout_5 --operation mode is normal G1_bus_dout_5 = G1_nx490 # !N1_request_44 & G1_nx526 & G1_nx527; --B1_bus_dout_5 is clkpre_counter:cp|bus_dout_5 --operation mode is normal B1_bus_dout_5 = B1_nx765 # B1_nx766 # B1_nx833 # B1_nx834; --E2_bus_dout_5 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_5 --operation mode is normal E2_bus_dout_5_lut_out = S3_dout_5 & (E2_nx219 & E2_nx233 # !E2_nx540) # !S3_dout_5 & E2_nx219 & E2_nx233; E2_bus_dout_5 = DFFEAS(E2_bus_dout_5_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_5 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_5 --operation mode is normal E1_bus_dout_5_lut_out = S2_dout_5 & (E1_nx219 & E1_nx233 # !E1_nx540) # !S2_dout_5 & E1_nx219 & E1_nx233; E1_bus_dout_5 = DFFEAS(E1_bus_dout_5_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_5 is jtag_master_1_notri:jtag_dut_notri|bus_dout_5 --operation mode is normal D1_bus_dout_5_lut_out = S1_dout_5 & (D1_nx222 & D1_nx237 # !D1_nx540) # !S1_dout_5 & D1_nx222 & D1_nx237; D1_bus_dout_5 = DFFEAS(D1_bus_dout_5_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx493 is general_config_notri:nic_notri|nx493 --operation mode is normal G1_nx493 = G1_nx506 & (G1_nx494 # G1_se0_cnt_4 & G1_nx507); --G1_nx523 is general_config_notri:nic_notri|nx523 --operation mode is normal G1_nx523 = N1_request_43 # G1_nx495 # G1_sebd_oe_0 & G1_NOT_ix69_ix30_nx10; --G1_nx524 is general_config_notri:nic_notri|nx524 --operation mode is normal G1_nx524 = DUT_P4_D[4] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx769 is clkpre_counter:cp|nx769 --operation mode is normal B1_nx769 = DUT_PRE[0] & (B1_nx804 # B1_strb_dout_4 & B1_nx803) # !DUT_PRE[0] & B1_strb_dout_4 & B1_nx803; --B1_nx770 is clkpre_counter:cp|nx770 --operation mode is normal B1_nx770 = B1_dout1pcnt_4 & (B1_nx795 # B1_dout3pcnt_4 & B1_nx796) # !B1_dout1pcnt_4 & B1_dout3pcnt_4 & (B1_nx796); --B1_nx835 is clkpre_counter:cp|nx835 --operation mode is normal B1_nx835 = B1_nx771 # B1_nx772 # B1_dout_ccnt_4 & B1_nx794; --B1_nx836 is clkpre_counter:cp|nx836 --operation mode is normal B1_nx836 = B1_dout0pcnt_4 & (B1_nx798 # B1_dout2pcnt_4 & B1_nx797) # !B1_dout0pcnt_4 & B1_dout2pcnt_4 & B1_nx797; --S3_dout_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_4 --operation mode is normal S3_dout_4 = N1_request_46 & S3_NI_P1_STRB # !N1_request_46 & (S3_nx254 # S3_nx255); --E2_nx234 is jtag_master_2_notri:jtag_ni_up_notri|nx234 --operation mode is normal E2_nx234 = N1_request_43 & (NI_TDO_up) # !N1_request_43 & E2_EN3; --S2_dout_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_4 --operation mode is normal S2_dout_4 = N1_request_46 & S2_NI_P1_STRB # !N1_request_46 & (S2_nx254 # S2_nx255); --E1_nx234 is jtag_master_2_notri:jtag_ni_dn_notri|nx234 --operation mode is normal E1_nx234 = N1_request_43 & (NI_TDO_dn) # !N1_request_43 & E1_EN3; --S1_dout_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_4 --operation mode is normal S1_dout_4 = N1_request_46 & S1_NI_P1_STRB # !N1_request_46 & (S1_nx254 # S1_nx255); --D1_nx238 is jtag_master_1_notri:jtag_dut_notri|nx238 --operation mode is normal D1_nx238 = N1_request_43 & (DUT_TDO) # !N1_request_43 & D1_EN3; --G1_nx521 is general_config_notri:nic_notri|nx521 --operation mode is normal G1_nx521 = N1_request_43 # N1_request_42 & (G1_ni_or_mask_3) # !N1_request_42 & !G1_NOT_ni_sel_s_3; --G1_nx497 is general_config_notri:nic_notri|nx497 --operation mode is normal G1_nx497 = DUT_P4_D[3] & N1_request_43 & N1_request_41; --G1_nx498 is general_config_notri:nic_notri|nx498 --operation mode is normal G1_nx498 = !N1_request_43 & G1_nx520 & (N1_request_41 # G1_sw_sel_3); --B1_strb_dout_3 is clkpre_counter:cp|strb_dout_3 --operation mode is arithmetic B1_strb_dout_3_carry_eqn = B1_ccnt_cnt_s_Q_nx22; B1_strb_dout_3_lut_out = B1_strb_dout_3 $ (B1_strb_dout_3_carry_eqn); B1_strb_dout_3 = DFFEAS(B1_strb_dout_3_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx28 is clkpre_counter:cp|ccnt_cnt_s_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx28 = CARRY(!B1_ccnt_cnt_s_Q_nx22 # !B1_strb_dout_3); --B1_dout1pcnt_3 is clkpre_counter:cp|dout1pcnt_3 --operation mode is normal B1_dout1pcnt_3_carry_eqn = B1_pcnt1_cnt_0_cnt_i_Q_nx21; B1_dout1pcnt_3_lut_out = B1_dout1pcnt_3 $ (B1_dout1pcnt_3_carry_eqn); B1_dout1pcnt_3 = DFFEAS(B1_dout1pcnt_3_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_3 is clkpre_counter:cp|dout3pcnt_3 --operation mode is normal B1_dout3pcnt_3_carry_eqn = B1_pcnt3_cnt_0_cnt_i_Q_nx21; B1_dout3pcnt_3_lut_out = B1_dout3pcnt_3 $ (B1_dout3pcnt_3_carry_eqn); B1_dout3pcnt_3 = DFFEAS(B1_dout3pcnt_3_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout_ccnt_3 is clkpre_counter:cp|dout_ccnt_3 --operation mode is arithmetic B1_dout_ccnt_3_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx22; B1_dout_ccnt_3_lut_out = B1_dout_ccnt_3 $ (B1_dout_ccnt_3_carry_eqn); B1_dout_ccnt_3 = DFFEAS(B1_dout_ccnt_3_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx28 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx28 = CARRY(!B1_ccnt_cnt_0_cnt_i_Q_nx22 # !B1_dout_ccnt_3); --B1_nx775 is clkpre_counter:cp|nx775 --operation mode is normal B1_nx775 = B1_L0time_3 & (B1_nx801 # B1_L2time_3 & B1_nx802) # !B1_L0time_3 & B1_L2time_3 & (B1_nx802); --B1_nx776 is clkpre_counter:cp|nx776 --operation mode is normal B1_nx776 = B1_L1time_3 & (B1_nx799 # B1_c_time_3 & B1_nx800) # !B1_L1time_3 & B1_c_time_3 & (B1_nx800); --B1_dout0pcnt_3 is clkpre_counter:cp|dout0pcnt_3 --operation mode is normal B1_dout0pcnt_3_carry_eqn = B1_pcnt0_cnt_0_cnt_i_Q_nx21; B1_dout0pcnt_3_lut_out = B1_dout0pcnt_3 $ (B1_dout0pcnt_3_carry_eqn); B1_dout0pcnt_3 = DFFEAS(B1_dout0pcnt_3_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_3 is clkpre_counter:cp|dout2pcnt_3 --operation mode is normal B1_dout2pcnt_3_carry_eqn = B1_pcnt2_cnt_0_cnt_i_Q_nx21; B1_dout2pcnt_3_lut_out = B1_dout2pcnt_3 $ (B1_dout2pcnt_3_carry_eqn); B1_dout2pcnt_3 = DFFEAS(B1_dout2pcnt_3_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --S3_nx252 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx252 --operation mode is normal S3_nx252 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_3; --S3_nx253 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx253 --operation mode is normal S3_nx253 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_3) # !N1_request_48 & S3_NI_P0_D_3); --S2_nx252 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx252 --operation mode is normal S2_nx252 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_3; --S2_nx253 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx253 --operation mode is normal S2_nx253 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_3) # !N1_request_48 & S2_NI_P0_D_3); --S1_nx252 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx252 --operation mode is normal S1_nx252 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_3; --S1_nx253 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx253 --operation mode is normal S1_nx253 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_3) # !N1_request_48 & S1_NI_P0_D_3); --D1_EN2 is jtag_master_1_notri:jtag_dut_notri|EN2 --operation mode is normal D1_EN2_lut_out = N1_request_28; D1_EN2 = DFFEAS(D1_EN2_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --G1_nx517 is general_config_notri:nic_notri|nx517 --operation mode is normal G1_nx517 = N1_request_48 & F1_par_cnt_2 # !N1_request_48 & (F1_naddr_2) # !N1_request_41; --F1_par_cnt_1 is ni2dpm_12:ni_ni_neg|par_cnt_1 --operation mode is arithmetic F1_par_cnt_1_carry_eqn = F1_parc_Q_nx10; F1_par_cnt_1_lut_out = F1_par_cnt_1 $ (F1_par_cnt_1_carry_eqn); F1_par_cnt_1 = DFFEAS(F1_par_cnt_1_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx16 is ni2dpm_12:ni_ni_neg|parc_Q_nx16 --operation mode is arithmetic F1_parc_Q_nx16 = CARRY(!F1_parc_Q_nx10 # !F1_par_cnt_1); --scsn_slave_nw_dll_ob1_ob_data_20 is scsn_slave_nw_dll_ob1_ob_data_20 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_20_lut_out = scsn_slave_nw_dll_ob1_ob_data_19; scsn_slave_nw_dll_ob1_ob_data_20 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_20_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_20, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_21 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_21 --operation mode is normal Y2_d_to_dll_21 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_21 # !Y2_current_state_0 & (J1_reply_21)); --D1_jtgsnd_ser_t_26 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_26 --operation mode is normal D1_jtgsnd_ser_t_26_lut_out = D1_jtgsnd_ser_t_25; D1_jtgsnd_ser_t_26 = DFFEAS(D1_jtgsnd_ser_t_26_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_14, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_26 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_26 --operation mode is normal E1_jtgsnd_ser_t_26_lut_out = E1_jtgsnd_ser_t_25; E1_jtgsnd_ser_t_26 = DFFEAS(E1_jtgsnd_ser_t_26_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_14, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_26 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_26 --operation mode is normal E2_jtgsnd_ser_t_26_lut_out = E2_jtgsnd_ser_t_25; E2_jtgsnd_ser_t_26 = DFFEAS(E2_jtgsnd_ser_t_26_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_14, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_19 is scsn_slave_nw_dll_ob0_ob_data_19 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_19_lut_out = scsn_slave_nw_dll_ob0_ob_data_18; scsn_slave_nw_dll_ob0_ob_data_19 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_19_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_19, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_20 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_20 --operation mode is normal Y1_d_to_dll_20 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_20 # !Y1_current_state_0 & (J1_reply_20)); --J1_reply_21 is mcm_nw_apl:scsn_slave_nw_apl|reply_21 --operation mode is normal J1_reply_21 = N1_request_21 & (J1_a_0_dup_54 # J1_read_data_10 & !J1_ix34_ix30_nx12) # !N1_request_21 & J1_read_data_10 & (!J1_ix34_ix30_nx12); --J1_read_data_9 is mcm_nw_apl:scsn_slave_nw_apl|read_data_9 --operation mode is normal J1_read_data_9_lut_out = C1_bus_dout_9; J1_read_data_9 = DFFEAS(J1_read_data_9_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_8 is gio_devices:gio|bus_dout_8 --operation mode is normal C1_bus_dout_8_lut_out = C1_nx274 # C1_nx275 # C1_nx276; C1_bus_dout_8 = DFFEAS(C1_bus_dout_8_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx277 is gio_devices:gio|nx277 --operation mode is normal C1_nx277 = W1_q_b[7] & (C1_sel_5 # G1_bus_dout_7 & C1_ce_gen) # !W1_q_b[7] & G1_bus_dout_7 & (C1_ce_gen); --C1_nx278 is gio_devices:gio|nx278 --operation mode is normal C1_nx278 = B1_bus_dout_7 & (C1_ce_cp # E2_bus_dout_7 & C1_ce_ni_jtg_up) # !B1_bus_dout_7 & E2_bus_dout_7 & (C1_ce_ni_jtg_up); --C1_nx279 is gio_devices:gio|nx279 --operation mode is normal C1_nx279 = E1_bus_dout_7 & (C1_ce_ni_jtg_dn # D1_bus_dout_7 & C1_ce_dut_jtg) # !E1_bus_dout_7 & D1_bus_dout_7 & (C1_ce_dut_jtg); --W1_q_b[6] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[6] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[6]_PORT_A_data_in = F1_data_2p_6; W1_q_b[6]_PORT_A_data_in_reg = DFFE(W1_q_b[6]_PORT_A_data_in, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[6]_PORT_A_address_reg = DFFE(W1_q_b[6]_PORT_A_address, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[6]_PORT_B_address_reg = DFFE(W1_q_b[6]_PORT_B_address, W1_q_b[6]_clock_1, , , ); W1_q_b[6]_PORT_A_write_enable = VCC; W1_q_b[6]_PORT_A_write_enable_reg = DFFE(W1_q_b[6]_PORT_A_write_enable, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_B_read_enable = VCC; W1_q_b[6]_PORT_B_read_enable_reg = DFFE(W1_q_b[6]_PORT_B_read_enable, W1_q_b[6]_clock_1, , , ); W1_q_b[6]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[6]_clock_1 = X1__clk0; W1_q_b[6]_clock_enable_0 = F1_we_eff; W1_q_b[6]_clear_0 = !G1_NOT_ni_clear; W1_q_b[6]_PORT_B_data_out = MEMORY(W1_q_b[6]_PORT_A_data_in_reg, , W1_q_b[6]_PORT_A_address_reg, W1_q_b[6]_PORT_B_address_reg, W1_q_b[6]_PORT_A_write_enable_reg, W1_q_b[6]_PORT_B_read_enable_reg, , , W1_q_b[6]_clock_0, W1_q_b[6]_clock_1, W1_q_b[6]_clock_enable_0, , W1_q_b[6]_clear_0, ); W1_q_b[6]_PORT_B_data_out_reg = DFFE(W1_q_b[6]_PORT_B_data_out, W1_q_b[6]_clock_1, , , ); W1_q_b[6] = W1_q_b[6]_PORT_B_data_out_reg[0]; --W1_q_b[14] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[14] W1_q_b[6]_PORT_A_data_in = F1_data_2p_6; W1_q_b[6]_PORT_A_data_in_reg = DFFE(W1_q_b[6]_PORT_A_data_in, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[6]_PORT_A_address_reg = DFFE(W1_q_b[6]_PORT_A_address, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[6]_PORT_B_address_reg = DFFE(W1_q_b[6]_PORT_B_address, W1_q_b[6]_clock_1, , , ); W1_q_b[6]_PORT_A_write_enable = VCC; W1_q_b[6]_PORT_A_write_enable_reg = DFFE(W1_q_b[6]_PORT_A_write_enable, W1_q_b[6]_clock_0, W1_q_b[6]_clear_0, , W1_q_b[6]_clock_enable_0); W1_q_b[6]_PORT_B_read_enable = VCC; W1_q_b[6]_PORT_B_read_enable_reg = DFFE(W1_q_b[6]_PORT_B_read_enable, W1_q_b[6]_clock_1, , , ); W1_q_b[6]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[6]_clock_1 = X1__clk0; W1_q_b[6]_clock_enable_0 = F1_we_eff; W1_q_b[6]_clear_0 = !G1_NOT_ni_clear; W1_q_b[6]_PORT_B_data_out = MEMORY(W1_q_b[6]_PORT_A_data_in_reg, , W1_q_b[6]_PORT_A_address_reg, W1_q_b[6]_PORT_B_address_reg, W1_q_b[6]_PORT_A_write_enable_reg, W1_q_b[6]_PORT_B_read_enable_reg, , , W1_q_b[6]_clock_0, W1_q_b[6]_clock_1, W1_q_b[6]_clock_enable_0, , W1_q_b[6]_clear_0, ); W1_q_b[6]_PORT_B_data_out_reg = DFFE(W1_q_b[6]_PORT_B_data_out, W1_q_b[6]_clock_1, , , ); W1_q_b[14] = W1_q_b[6]_PORT_B_data_out_reg[1]; --G1_bus_dout_6 is general_config_notri:nic_notri|bus_dout_6 --operation mode is normal G1_bus_dout_6 = G1_nx487 # !N1_request_44 & G1_nx528 & G1_nx529; --B1_bus_dout_6 is clkpre_counter:cp|bus_dout_6 --operation mode is normal B1_bus_dout_6 = B1_nx761 # B1_nx762 # B1_nx831 # B1_nx832; --E2_bus_dout_6 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_6 --operation mode is normal E2_bus_dout_6_lut_out = S3_dout_6 & (E2_nx219 & E2_nx232 # !E2_nx540) # !S3_dout_6 & E2_nx219 & E2_nx232; E2_bus_dout_6 = DFFEAS(E2_bus_dout_6_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_6 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_6 --operation mode is normal E1_bus_dout_6_lut_out = S2_dout_6 & (E1_nx219 & E1_nx232 # !E1_nx540) # !S2_dout_6 & E1_nx219 & E1_nx232; E1_bus_dout_6 = DFFEAS(E1_bus_dout_6_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_6 is jtag_master_1_notri:jtag_dut_notri|bus_dout_6 --operation mode is normal D1_bus_dout_6_lut_out = S1_dout_6 & (D1_nx222 & D1_nx236 # !D1_nx540) # !S1_dout_6 & D1_nx222 & D1_nx236; D1_bus_dout_6 = DFFEAS(D1_bus_dout_6_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx490 is general_config_notri:nic_notri|nx490 --operation mode is normal G1_nx490 = G1_nx506 & (G1_nx491 # G1_se0_cnt_5 & G1_nx507); --G1_nx526 is general_config_notri:nic_notri|nx526 --operation mode is normal G1_nx526 = N1_request_43 # G1_nx492 # G1_sebd_oe_1 & G1_NOT_ix69_ix30_nx10; --G1_nx527 is general_config_notri:nic_notri|nx527 --operation mode is normal G1_nx527 = DUT_P4_D[5] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx765 is clkpre_counter:cp|nx765 --operation mode is normal B1_nx765 = DUT_PRE[1] & (B1_nx804 # B1_strb_dout_5 & B1_nx803) # !DUT_PRE[1] & B1_strb_dout_5 & B1_nx803; --B1_nx766 is clkpre_counter:cp|nx766 --operation mode is normal B1_nx766 = B1_dout1pcnt_5 & (B1_nx795 # B1_dout3pcnt_5 & B1_nx796) # !B1_dout1pcnt_5 & B1_dout3pcnt_5 & (B1_nx796); --B1_nx833 is clkpre_counter:cp|nx833 --operation mode is normal B1_nx833 = B1_nx767 # B1_nx768 # B1_dout_ccnt_5 & B1_nx794; --B1_nx834 is clkpre_counter:cp|nx834 --operation mode is normal B1_nx834 = B1_dout0pcnt_5 & (B1_nx798 # B1_dout2pcnt_5 & B1_nx797) # !B1_dout0pcnt_5 & B1_dout2pcnt_5 & B1_nx797; --S3_dout_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_5 --operation mode is normal S3_dout_5 = N1_request_46 & S3_NI_P0_PREout # !N1_request_46 & (S3_nx256 # S3_nx257); --E2_nx233 is jtag_master_2_notri:jtag_ni_up_notri|nx233 --operation mode is normal E2_nx233 = N1_request_43 & (A1L841) # !N1_request_43 & E2_EN4; --S2_dout_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_5 --operation mode is normal S2_dout_5 = N1_request_46 & S2_NI_P0_PREout # !N1_request_46 & (S2_nx256 # S2_nx257); --E1_nx233 is jtag_master_2_notri:jtag_ni_dn_notri|nx233 --operation mode is normal E1_nx233 = N1_request_43 & (A1L641) # !N1_request_43 & E1_EN4; --S1_dout_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_5 --operation mode is normal S1_dout_5 = N1_request_46 & S1_NI_P0_PREout # !N1_request_46 & (S1_nx256 # S1_nx257); --D1_nx237 is jtag_master_1_notri:jtag_dut_notri|nx237 --operation mode is normal D1_nx237 = N1_request_43 & (A1L95) # !N1_request_43 & D1_EN4; --G1_nx494 is general_config_notri:nic_notri|nx494 --operation mode is normal G1_nx494 = !N1_request_43 & (N1_request_42 & (G1_ni_or_mask_4) # !N1_request_42 & !G1_NOT_ni_sel_p_0); --G1_nx495 is general_config_notri:nic_notri|nx495 --operation mode is normal G1_nx495 = !N1_request_42 & G1_nx522 & (N1_request_41 # G1_sw_sel_4); --B1_strb_dout_4 is clkpre_counter:cp|strb_dout_4 --operation mode is arithmetic B1_strb_dout_4_carry_eqn = B1_ccnt_cnt_s_Q_nx28; B1_strb_dout_4_lut_out = B1_strb_dout_4 $ (!B1_strb_dout_4_carry_eqn); B1_strb_dout_4 = DFFEAS(B1_strb_dout_4_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx32 is clkpre_counter:cp|ccnt_cnt_s_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx32 = CARRY(B1_strb_dout_4 & (!B1_ccnt_cnt_s_Q_nx28)); --B1_dout1pcnt_4 is clkpre_counter:cp|dout1pcnt_4 --operation mode is arithmetic B1_dout1pcnt_4_lut_out = B1_dout1pcnt_4 $ P2_PTRGG; B1_dout1pcnt_4 = DFFEAS(B1_dout1pcnt_4_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_1_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_1_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_1_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_4 & P2_PTRGG); --B1_dout3pcnt_4 is clkpre_counter:cp|dout3pcnt_4 --operation mode is arithmetic B1_dout3pcnt_4_lut_out = B1_dout3pcnt_4 $ P4_PTRGG; B1_dout3pcnt_4 = DFFEAS(B1_dout3pcnt_4_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_1_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_1_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_1_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_4 & P4_PTRGG); --B1_dout_ccnt_4 is clkpre_counter:cp|dout_ccnt_4 --operation mode is arithmetic B1_dout_ccnt_4_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx28; B1_dout_ccnt_4_lut_out = B1_dout_ccnt_4 $ (!B1_dout_ccnt_4_carry_eqn); B1_dout_ccnt_4 = DFFEAS(B1_dout_ccnt_4_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx32 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx32 = CARRY(B1_dout_ccnt_4 & (!B1_ccnt_cnt_0_cnt_i_Q_nx28)); --B1_nx771 is clkpre_counter:cp|nx771 --operation mode is normal B1_nx771 = B1_L0time_4 & (B1_nx801 # B1_L2time_4 & B1_nx802) # !B1_L0time_4 & B1_L2time_4 & (B1_nx802); --B1_nx772 is clkpre_counter:cp|nx772 --operation mode is normal B1_nx772 = B1_L1time_4 & (B1_nx799 # B1_c_time_4 & B1_nx800) # !B1_L1time_4 & B1_c_time_4 & (B1_nx800); --B1_dout0pcnt_4 is clkpre_counter:cp|dout0pcnt_4 --operation mode is arithmetic B1_dout0pcnt_4_lut_out = B1_dout0pcnt_4 $ P1_PTRGG; B1_dout0pcnt_4 = DFFEAS(B1_dout0pcnt_4_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_1_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_1_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_1_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_4 & P1_PTRGG); --B1_dout2pcnt_4 is clkpre_counter:cp|dout2pcnt_4 --operation mode is arithmetic B1_dout2pcnt_4_lut_out = B1_dout2pcnt_4 $ P3_PTRGG; B1_dout2pcnt_4 = DFFEAS(B1_dout2pcnt_4_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_1_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_1_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_1_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_4 & P3_PTRGG); --S3_nx254 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx254 --operation mode is normal S3_nx254 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_4; --S3_nx255 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx255 --operation mode is normal S3_nx255 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_4) # !N1_request_48 & S3_NI_P0_D_4); --E2_EN3 is jtag_master_2_notri:jtag_ni_up_notri|EN3 --operation mode is normal E2_EN3_lut_out = N1_request_27; E2_EN3 = DFFEAS(E2_EN3_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --S2_nx254 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx254 --operation mode is normal S2_nx254 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_4; --S2_nx255 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx255 --operation mode is normal S2_nx255 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_4) # !N1_request_48 & S2_NI_P0_D_4); --E1_EN3 is jtag_master_2_notri:jtag_ni_dn_notri|EN3 --operation mode is normal E1_EN3_lut_out = N1_request_27; E1_EN3 = DFFEAS(E1_EN3_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --S1_nx254 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx254 --operation mode is normal S1_nx254 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_4; --S1_nx255 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx255 --operation mode is normal S1_nx255 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_4) # !N1_request_48 & S1_NI_P0_D_4); --D1_EN3 is jtag_master_1_notri:jtag_dut_notri|EN3 --operation mode is normal D1_EN3_lut_out = N1_request_27; D1_EN3 = DFFEAS(D1_EN3_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --G1_nx520 is general_config_notri:nic_notri|nx520 --operation mode is normal G1_nx520 = N1_request_48 & F1_par_cnt_3 # !N1_request_48 & (F1_naddr_3) # !N1_request_41; --F1_par_cnt_2 is ni2dpm_12:ni_ni_neg|par_cnt_2 --operation mode is arithmetic F1_par_cnt_2_carry_eqn = F1_parc_Q_nx16; F1_par_cnt_2_lut_out = F1_par_cnt_2 $ (!F1_par_cnt_2_carry_eqn); F1_par_cnt_2 = DFFEAS(F1_par_cnt_2_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx22 is ni2dpm_12:ni_ni_neg|parc_Q_nx22 --operation mode is arithmetic F1_parc_Q_nx22 = CARRY(F1_par_cnt_2 & (!F1_parc_Q_nx16)); --scsn_slave_nw_dll_ob1_ob_data_19 is scsn_slave_nw_dll_ob1_ob_data_19 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_19_lut_out = scsn_slave_nw_dll_ob1_ob_data_18; scsn_slave_nw_dll_ob1_ob_data_19 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_19_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_19, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_20 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_20 --operation mode is normal Y2_d_to_dll_20 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_20 # !Y2_current_state_0 & (J1_reply_20)); --D1_jtgsnd_ser_t_25 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_25 --operation mode is normal D1_jtgsnd_ser_t_25_lut_out = D1_jtgsnd_ser_t_24; D1_jtgsnd_ser_t_25 = DFFEAS(D1_jtgsnd_ser_t_25_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_27, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_25 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_25 --operation mode is normal E1_jtgsnd_ser_t_25_lut_out = E1_jtgsnd_ser_t_24; E1_jtgsnd_ser_t_25 = DFFEAS(E1_jtgsnd_ser_t_25_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_27, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_25 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_25 --operation mode is normal E2_jtgsnd_ser_t_25_lut_out = E2_jtgsnd_ser_t_24; E2_jtgsnd_ser_t_25 = DFFEAS(E2_jtgsnd_ser_t_25_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_27, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_18 is scsn_slave_nw_dll_ob0_ob_data_18 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_18_lut_out = scsn_slave_nw_dll_ob0_ob_data_17; scsn_slave_nw_dll_ob0_ob_data_18 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_18_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_18, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_19 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_19 --operation mode is normal Y1_d_to_dll_19 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_19 # !Y1_current_state_0 & (J1_reply_19)); --J1_reply_20 is mcm_nw_apl:scsn_slave_nw_apl|reply_20 --operation mode is normal J1_reply_20 = N1_request_20 & (J1_a_0_dup_54 # J1_read_data_11 & !J1_ix34_ix30_nx12) # !N1_request_20 & J1_read_data_11 & (!J1_ix34_ix30_nx12); --J1_read_data_10 is mcm_nw_apl:scsn_slave_nw_apl|read_data_10 --operation mode is normal J1_read_data_10_lut_out = C1_bus_dout_10; J1_read_data_10 = DFFEAS(J1_read_data_10_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_9 is gio_devices:gio|bus_dout_9 --operation mode is normal C1_bus_dout_9_lut_out = C1_nx271 # C1_nx272 # C1_nx273; C1_bus_dout_9 = DFFEAS(C1_bus_dout_9_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx274 is gio_devices:gio|nx274 --operation mode is normal C1_nx274 = W2_q_b[0] & (C1_sel_5 # G1_bus_dout_8 & C1_ce_gen) # !W2_q_b[0] & G1_bus_dout_8 & (C1_ce_gen); --C1_nx275 is gio_devices:gio|nx275 --operation mode is normal C1_nx275 = B1_bus_dout_8 & (C1_ce_cp # E2_bus_dout_8 & C1_ce_ni_jtg_up) # !B1_bus_dout_8 & E2_bus_dout_8 & (C1_ce_ni_jtg_up); --C1_nx276 is gio_devices:gio|nx276 --operation mode is normal C1_nx276 = E1_bus_dout_8 & (C1_ce_ni_jtg_dn # D1_bus_dout_8 & C1_ce_dut_jtg) # !E1_bus_dout_8 & D1_bus_dout_8 & (C1_ce_dut_jtg); --W1_q_b[7] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[7] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W1_q_b[7]_PORT_A_data_in = F1_data_2p_7; W1_q_b[7]_PORT_A_data_in_reg = DFFE(W1_q_b[7]_PORT_A_data_in, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[7]_PORT_A_address_reg = DFFE(W1_q_b[7]_PORT_A_address, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[7]_PORT_B_address_reg = DFFE(W1_q_b[7]_PORT_B_address, W1_q_b[7]_clock_1, , , ); W1_q_b[7]_PORT_A_write_enable = VCC; W1_q_b[7]_PORT_A_write_enable_reg = DFFE(W1_q_b[7]_PORT_A_write_enable, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_B_read_enable = VCC; W1_q_b[7]_PORT_B_read_enable_reg = DFFE(W1_q_b[7]_PORT_B_read_enable, W1_q_b[7]_clock_1, , , ); W1_q_b[7]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[7]_clock_1 = X1__clk0; W1_q_b[7]_clock_enable_0 = F1_we_eff; W1_q_b[7]_clear_0 = !G1_NOT_ni_clear; W1_q_b[7]_PORT_B_data_out = MEMORY(W1_q_b[7]_PORT_A_data_in_reg, , W1_q_b[7]_PORT_A_address_reg, W1_q_b[7]_PORT_B_address_reg, W1_q_b[7]_PORT_A_write_enable_reg, W1_q_b[7]_PORT_B_read_enable_reg, , , W1_q_b[7]_clock_0, W1_q_b[7]_clock_1, W1_q_b[7]_clock_enable_0, , W1_q_b[7]_clear_0, ); W1_q_b[7]_PORT_B_data_out_reg = DFFE(W1_q_b[7]_PORT_B_data_out, W1_q_b[7]_clock_1, , , ); W1_q_b[7] = W1_q_b[7]_PORT_B_data_out_reg[0]; --W1_q_b[15] is ni2dpm_12:ni_ni_neg|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[15] W1_q_b[7]_PORT_A_data_in = F1_data_2p_7; W1_q_b[7]_PORT_A_data_in_reg = DFFE(W1_q_b[7]_PORT_A_data_in, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_A_address = BUS(F1_naddr_0, F1_naddr_1, F1_naddr_2, F1_naddr_3, F1_naddr_4, F1_naddr_5, F1_naddr_6, F1_naddr_7, F1_naddr_8, F1_naddr_9, F1_naddr_10, F1_naddr_11); W1_q_b[7]_PORT_A_address_reg = DFFE(W1_q_b[7]_PORT_A_address, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W1_q_b[7]_PORT_B_address_reg = DFFE(W1_q_b[7]_PORT_B_address, W1_q_b[7]_clock_1, , , ); W1_q_b[7]_PORT_A_write_enable = VCC; W1_q_b[7]_PORT_A_write_enable_reg = DFFE(W1_q_b[7]_PORT_A_write_enable, W1_q_b[7]_clock_0, W1_q_b[7]_clear_0, , W1_q_b[7]_clock_enable_0); W1_q_b[7]_PORT_B_read_enable = VCC; W1_q_b[7]_PORT_B_read_enable_reg = DFFE(W1_q_b[7]_PORT_B_read_enable, W1_q_b[7]_clock_1, , , ); W1_q_b[7]_clock_0 = !GLOBAL(DUT_P4_STR); W1_q_b[7]_clock_1 = X1__clk0; W1_q_b[7]_clock_enable_0 = F1_we_eff; W1_q_b[7]_clear_0 = !G1_NOT_ni_clear; W1_q_b[7]_PORT_B_data_out = MEMORY(W1_q_b[7]_PORT_A_data_in_reg, , W1_q_b[7]_PORT_A_address_reg, W1_q_b[7]_PORT_B_address_reg, W1_q_b[7]_PORT_A_write_enable_reg, W1_q_b[7]_PORT_B_read_enable_reg, , , W1_q_b[7]_clock_0, W1_q_b[7]_clock_1, W1_q_b[7]_clock_enable_0, , W1_q_b[7]_clear_0, ); W1_q_b[7]_PORT_B_data_out_reg = DFFE(W1_q_b[7]_PORT_B_data_out, W1_q_b[7]_clock_1, , , ); W1_q_b[15] = W1_q_b[7]_PORT_B_data_out_reg[1]; --G1_bus_dout_7 is general_config_notri:nic_notri|bus_dout_7 --operation mode is normal G1_bus_dout_7 = G1_nx484 # !N1_request_44 & G1_nx530 & G1_nx531; --B1_bus_dout_7 is clkpre_counter:cp|bus_dout_7 --operation mode is normal B1_bus_dout_7 = B1_nx757 # B1_nx758 # B1_nx829 # B1_nx830; --E2_bus_dout_7 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_7 --operation mode is normal E2_bus_dout_7_lut_out = E2_nx222 # N1_request_43 & A1L441 & E2_nx219; E2_bus_dout_7 = DFFEAS(E2_bus_dout_7_lut_out, X1__clk0, VCC, , , , , , ); --E1_bus_dout_7 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_7 --operation mode is normal E1_bus_dout_7_lut_out = E1_nx222 # N1_request_43 & A1L241 & E1_nx219; E1_bus_dout_7 = DFFEAS(E1_bus_dout_7_lut_out, X1__clk0, VCC, , , , , , ); --D1_bus_dout_7 is jtag_master_1_notri:jtag_dut_notri|bus_dout_7 --operation mode is normal D1_bus_dout_7_lut_out = D1_nx224 # N1_request_43 & A1L75 & D1_nx222; D1_bus_dout_7 = DFFEAS(D1_bus_dout_7_lut_out, X1__clk0, VCC, , , , , , ); --G1_nx487 is general_config_notri:nic_notri|nx487 --operation mode is normal G1_nx487 = G1_nx506 & (G1_nx488 # G1_se0_cnt_6 & G1_nx507); --G1_nx528 is general_config_notri:nic_notri|nx528 --operation mode is normal G1_nx528 = N1_request_43 # G1_nx489 # !N1_request_42 & G1_nx443; --G1_nx529 is general_config_notri:nic_notri|nx529 --operation mode is normal G1_nx529 = DUT_P4_D[6] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx761 is clkpre_counter:cp|nx761 --operation mode is normal B1_nx761 = DUT_PRE[2] & (B1_nx804 # B1_strb_dout_6 & B1_nx803) # !DUT_PRE[2] & B1_strb_dout_6 & B1_nx803; --B1_nx762 is clkpre_counter:cp|nx762 --operation mode is normal B1_nx762 = B1_dout1pcnt_6 & (B1_nx795 # B1_dout3pcnt_6 & B1_nx796) # !B1_dout1pcnt_6 & B1_dout3pcnt_6 & (B1_nx796); --B1_nx831 is clkpre_counter:cp|nx831 --operation mode is normal B1_nx831 = B1_nx763 # B1_nx764 # B1_dout_ccnt_6 & B1_nx794; --B1_nx832 is clkpre_counter:cp|nx832 --operation mode is normal B1_nx832 = B1_dout0pcnt_6 & (B1_nx798 # B1_dout2pcnt_6 & B1_nx797) # !B1_dout0pcnt_6 & B1_dout2pcnt_6 & B1_nx797; --S3_dout_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_6 --operation mode is normal S3_dout_6 = N1_request_46 & S3_NI_P1_CTRL # !N1_request_46 & (S3_nx258 # S3_nx259); --E2_nx232 is jtag_master_2_notri:jtag_ni_up_notri|nx232 --operation mode is normal E2_nx232 = N1_request_43 & A1L451 # !N1_request_43 & (E2_EN5); --S2_dout_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_6 --operation mode is normal S2_dout_6 = N1_request_46 & S2_NI_P1_CTRL # !N1_request_46 & (S2_nx258 # S2_nx259); --E1_nx232 is jtag_master_2_notri:jtag_ni_dn_notri|nx232 --operation mode is normal E1_nx232 = N1_request_43 & A1L251 # !N1_request_43 & (E1_EN5); --S1_dout_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_6 --operation mode is normal S1_dout_6 = N1_request_46 & S1_NI_P1_CTRL # !N1_request_46 & (S1_nx258 # S1_nx259); --D1_nx236 is jtag_master_1_notri:jtag_dut_notri|nx236 --operation mode is normal D1_nx236 = N1_request_43 & A1L26 # !N1_request_43 & (D1_EN5); --G1_nx491 is general_config_notri:nic_notri|nx491 --operation mode is normal G1_nx491 = !N1_request_43 & (N1_request_42 & G1_ni_or_mask_5 # !N1_request_42 & (G1_ni_sel_p_1)); --G1_nx492 is general_config_notri:nic_notri|nx492 --operation mode is normal G1_nx492 = !N1_request_42 & G1_nx525 & (N1_request_41 # G1_sw_sel_5); --B1_strb_dout_5 is clkpre_counter:cp|strb_dout_5 --operation mode is arithmetic B1_strb_dout_5_carry_eqn = B1_ccnt_cnt_s_Q_nx32; B1_strb_dout_5_lut_out = B1_strb_dout_5 $ (B1_strb_dout_5_carry_eqn); B1_strb_dout_5 = DFFEAS(B1_strb_dout_5_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx36 is clkpre_counter:cp|ccnt_cnt_s_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx36 = CARRY(!B1_ccnt_cnt_s_Q_nx32 # !B1_strb_dout_5); --B1_dout1pcnt_5 is clkpre_counter:cp|dout1pcnt_5 --operation mode is arithmetic B1_dout1pcnt_5_carry_eqn = B1_pcnt1_cnt_1_cnt_i_Q_nx10; B1_dout1pcnt_5_lut_out = B1_dout1pcnt_5 $ (B1_dout1pcnt_5_carry_eqn); B1_dout1pcnt_5 = DFFEAS(B1_dout1pcnt_5_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_1_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_1_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_1_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_1_cnt_i_Q_nx10 # !B1_dout1pcnt_5); --B1_dout3pcnt_5 is clkpre_counter:cp|dout3pcnt_5 --operation mode is arithmetic B1_dout3pcnt_5_carry_eqn = B1_pcnt3_cnt_1_cnt_i_Q_nx10; B1_dout3pcnt_5_lut_out = B1_dout3pcnt_5 $ (B1_dout3pcnt_5_carry_eqn); B1_dout3pcnt_5 = DFFEAS(B1_dout3pcnt_5_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_1_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_1_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_1_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_1_cnt_i_Q_nx10 # !B1_dout3pcnt_5); --B1_dout_ccnt_5 is clkpre_counter:cp|dout_ccnt_5 --operation mode is arithmetic B1_dout_ccnt_5_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx32; B1_dout_ccnt_5_lut_out = B1_dout_ccnt_5 $ (B1_dout_ccnt_5_carry_eqn); B1_dout_ccnt_5 = DFFEAS(B1_dout_ccnt_5_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx36 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx36 = CARRY(!B1_ccnt_cnt_0_cnt_i_Q_nx32 # !B1_dout_ccnt_5); --B1_nx767 is clkpre_counter:cp|nx767 --operation mode is normal B1_nx767 = B1_L0time_5 & (B1_nx801 # B1_L2time_5 & B1_nx802) # !B1_L0time_5 & B1_L2time_5 & (B1_nx802); --B1_nx768 is clkpre_counter:cp|nx768 --operation mode is normal B1_nx768 = B1_L1time_5 & (B1_nx799 # B1_c_time_5 & B1_nx800) # !B1_L1time_5 & B1_c_time_5 & (B1_nx800); --B1_dout0pcnt_5 is clkpre_counter:cp|dout0pcnt_5 --operation mode is arithmetic B1_dout0pcnt_5_carry_eqn = B1_pcnt0_cnt_1_cnt_i_Q_nx10; B1_dout0pcnt_5_lut_out = B1_dout0pcnt_5 $ (B1_dout0pcnt_5_carry_eqn); B1_dout0pcnt_5 = DFFEAS(B1_dout0pcnt_5_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_1_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_1_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_1_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_1_cnt_i_Q_nx10 # !B1_dout0pcnt_5); --B1_dout2pcnt_5 is clkpre_counter:cp|dout2pcnt_5 --operation mode is arithmetic B1_dout2pcnt_5_carry_eqn = B1_pcnt2_cnt_1_cnt_i_Q_nx10; B1_dout2pcnt_5_lut_out = B1_dout2pcnt_5 $ (B1_dout2pcnt_5_carry_eqn); B1_dout2pcnt_5 = DFFEAS(B1_dout2pcnt_5_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_1_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_1_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_1_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_1_cnt_i_Q_nx10 # !B1_dout2pcnt_5); --S3_nx256 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx256 --operation mode is normal S3_nx256 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_5; --S3_nx257 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx257 --operation mode is normal S3_nx257 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_5) # !N1_request_48 & S3_NI_P0_D_5); --E2_EN4 is jtag_master_2_notri:jtag_ni_up_notri|EN4 --operation mode is normal E2_EN4_lut_out = N1_request_26; E2_EN4 = DFFEAS(E2_EN4_lut_out, X1__clk0, J1_chipRST_n, , E2_we_cfr, , , , ); --S2_nx256 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx256 --operation mode is normal S2_nx256 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_5; --S2_nx257 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx257 --operation mode is normal S2_nx257 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_5) # !N1_request_48 & S2_NI_P0_D_5); --E1_EN4 is jtag_master_2_notri:jtag_ni_dn_notri|EN4 --operation mode is normal E1_EN4_lut_out = N1_request_26; E1_EN4 = DFFEAS(E1_EN4_lut_out, X1__clk0, J1_chipRST_n, , E1_we_cfr, , , , ); --S1_nx256 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx256 --operation mode is normal S1_nx256 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_5; --S1_nx257 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx257 --operation mode is normal S1_nx257 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_5) # !N1_request_48 & S1_NI_P0_D_5); --D1_EN4 is jtag_master_1_notri:jtag_dut_notri|EN4 --operation mode is normal D1_EN4_lut_out = N1_request_26; D1_EN4 = DFFEAS(D1_EN4_lut_out, X1__clk0, J1_chipRST_n, , D1_we_cfr, , , , ); --G1_nx522 is general_config_notri:nic_notri|nx522 --operation mode is normal G1_nx522 = N1_request_48 & F1_par_cnt_4 # !N1_request_48 & (F1_naddr_4) # !N1_request_41; --S3_NI_P4_D_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_4 --operation mode is normal S3_NI_P4_D_4_lut_out = S3_seribd_t_51; S3_NI_P4_D_4 = DFFEAS(S3_NI_P4_D_4_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_4 --operation mode is normal S2_NI_P4_D_4_lut_out = S2_seribd_t_51; S2_NI_P4_D_4 = DFFEAS(S2_NI_P4_D_4_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_4 --operation mode is normal S1_NI_P4_D_4_lut_out = S1_seribd_t_51; S1_NI_P4_D_4 = DFFEAS(S1_NI_P4_D_4_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F1_par_cnt_3 is ni2dpm_12:ni_ni_neg|par_cnt_3 --operation mode is arithmetic F1_par_cnt_3_carry_eqn = F1_parc_Q_nx22; F1_par_cnt_3_lut_out = F1_par_cnt_3 $ (F1_par_cnt_3_carry_eqn); F1_par_cnt_3 = DFFEAS(F1_par_cnt_3_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx28 is ni2dpm_12:ni_ni_neg|parc_Q_nx28 --operation mode is arithmetic F1_parc_Q_nx28 = CARRY(!F1_parc_Q_nx22 # !F1_par_cnt_3); --scsn_slave_nw_dll_ob1_ob_data_18 is scsn_slave_nw_dll_ob1_ob_data_18 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_18_lut_out = scsn_slave_nw_dll_ob1_ob_data_17; scsn_slave_nw_dll_ob1_ob_data_18 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_18_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_18, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_19 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_19 --operation mode is normal Y2_d_to_dll_19 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_19 # !Y2_current_state_0 & (J1_reply_19)); --D1_jtgsnd_ser_t_24 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_24 --operation mode is normal D1_jtgsnd_ser_t_24_lut_out = D1_jtgsnd_ser_t_23; D1_jtgsnd_ser_t_24 = DFFEAS(D1_jtgsnd_ser_t_24_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_13, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_24 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_24 --operation mode is normal E1_jtgsnd_ser_t_24_lut_out = E1_jtgsnd_ser_t_23; E1_jtgsnd_ser_t_24 = DFFEAS(E1_jtgsnd_ser_t_24_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_13, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_24 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_24 --operation mode is normal E2_jtgsnd_ser_t_24_lut_out = E2_jtgsnd_ser_t_23; E2_jtgsnd_ser_t_24 = DFFEAS(E2_jtgsnd_ser_t_24_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_13, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_17 is scsn_slave_nw_dll_ob0_ob_data_17 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_17_lut_out = scsn_slave_nw_dll_ob0_ob_data_16; scsn_slave_nw_dll_ob0_ob_data_17 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_17_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_17, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_18 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_18 --operation mode is normal Y1_d_to_dll_18 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_18 # !Y1_current_state_0 & (J1_reply_18)); --J1_reply_19 is mcm_nw_apl:scsn_slave_nw_apl|reply_19 --operation mode is normal J1_reply_19 = N1_request_19 & (J1_a_0_dup_54 # J1_read_data_12 & !J1_ix34_ix30_nx12) # !N1_request_19 & J1_read_data_12 & (!J1_ix34_ix30_nx12); --J1_read_data_11 is mcm_nw_apl:scsn_slave_nw_apl|read_data_11 --operation mode is normal J1_read_data_11_lut_out = C1_bus_dout_11; J1_read_data_11 = DFFEAS(J1_read_data_11_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_10 is gio_devices:gio|bus_dout_10 --operation mode is normal C1_bus_dout_10_lut_out = C1_nx268 # C1_nx269 # C1_nx270; C1_bus_dout_10 = DFFEAS(C1_bus_dout_10_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx271 is gio_devices:gio|nx271 --operation mode is normal C1_nx271 = W2_q_b[1] & (C1_sel_5 # G1_bus_dout_9 & C1_ce_gen) # !W2_q_b[1] & G1_bus_dout_9 & (C1_ce_gen); --C1_nx272 is gio_devices:gio|nx272 --operation mode is normal C1_nx272 = B1_bus_dout_9 & (C1_ce_cp # E2_bus_dout_9 & C1_ce_ni_jtg_up) # !B1_bus_dout_9 & E2_bus_dout_9 & (C1_ce_ni_jtg_up); --C1_nx273 is gio_devices:gio|nx273 --operation mode is normal C1_nx273 = E1_bus_dout_9 & (C1_ce_ni_jtg_dn # D1_bus_dout_9 & C1_ce_dut_jtg) # !E1_bus_dout_9 & D1_bus_dout_9 & (C1_ce_dut_jtg); --W2_q_b[0] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[0] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[0]_PORT_A_data_in = F2_data_2p_0; W2_q_b[0]_PORT_A_data_in_reg = DFFE(W2_q_b[0]_PORT_A_data_in, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[0]_PORT_A_address_reg = DFFE(W2_q_b[0]_PORT_A_address, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[0]_PORT_B_address_reg = DFFE(W2_q_b[0]_PORT_B_address, W2_q_b[0]_clock_1, , , ); W2_q_b[0]_PORT_A_write_enable = VCC; W2_q_b[0]_PORT_A_write_enable_reg = DFFE(W2_q_b[0]_PORT_A_write_enable, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_B_read_enable = VCC; W2_q_b[0]_PORT_B_read_enable_reg = DFFE(W2_q_b[0]_PORT_B_read_enable, W2_q_b[0]_clock_1, , , ); W2_q_b[0]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[0]_clock_1 = X1__clk0; W2_q_b[0]_clock_enable_0 = F2_we_eff; W2_q_b[0]_clear_0 = !G1_NOT_ni_clear; W2_q_b[0]_PORT_B_data_out = MEMORY(W2_q_b[0]_PORT_A_data_in_reg, , W2_q_b[0]_PORT_A_address_reg, W2_q_b[0]_PORT_B_address_reg, W2_q_b[0]_PORT_A_write_enable_reg, W2_q_b[0]_PORT_B_read_enable_reg, , , W2_q_b[0]_clock_0, W2_q_b[0]_clock_1, W2_q_b[0]_clock_enable_0, , W2_q_b[0]_clear_0, ); W2_q_b[0]_PORT_B_data_out_reg = DFFE(W2_q_b[0]_PORT_B_data_out, W2_q_b[0]_clock_1, , , ); W2_q_b[0] = W2_q_b[0]_PORT_B_data_out_reg[0]; --W2_q_b[8] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[8] W2_q_b[0]_PORT_A_data_in = F2_data_2p_0; W2_q_b[0]_PORT_A_data_in_reg = DFFE(W2_q_b[0]_PORT_A_data_in, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[0]_PORT_A_address_reg = DFFE(W2_q_b[0]_PORT_A_address, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[0]_PORT_B_address_reg = DFFE(W2_q_b[0]_PORT_B_address, W2_q_b[0]_clock_1, , , ); W2_q_b[0]_PORT_A_write_enable = VCC; W2_q_b[0]_PORT_A_write_enable_reg = DFFE(W2_q_b[0]_PORT_A_write_enable, W2_q_b[0]_clock_0, W2_q_b[0]_clear_0, , W2_q_b[0]_clock_enable_0); W2_q_b[0]_PORT_B_read_enable = VCC; W2_q_b[0]_PORT_B_read_enable_reg = DFFE(W2_q_b[0]_PORT_B_read_enable, W2_q_b[0]_clock_1, , , ); W2_q_b[0]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[0]_clock_1 = X1__clk0; W2_q_b[0]_clock_enable_0 = F2_we_eff; W2_q_b[0]_clear_0 = !G1_NOT_ni_clear; W2_q_b[0]_PORT_B_data_out = MEMORY(W2_q_b[0]_PORT_A_data_in_reg, , W2_q_b[0]_PORT_A_address_reg, W2_q_b[0]_PORT_B_address_reg, W2_q_b[0]_PORT_A_write_enable_reg, W2_q_b[0]_PORT_B_read_enable_reg, , , W2_q_b[0]_clock_0, W2_q_b[0]_clock_1, W2_q_b[0]_clock_enable_0, , W2_q_b[0]_clear_0, ); W2_q_b[0]_PORT_B_data_out_reg = DFFE(W2_q_b[0]_PORT_B_data_out, W2_q_b[0]_clock_1, , , ); W2_q_b[8] = W2_q_b[0]_PORT_B_data_out_reg[1]; --G1_bus_dout_8 is general_config_notri:nic_notri|bus_dout_8 --operation mode is normal G1_bus_dout_8 = G1_nx481 # !N1_request_44 & G1_nx532 & G1_nx533; --B1_bus_dout_8 is clkpre_counter:cp|bus_dout_8 --operation mode is normal B1_bus_dout_8 = B1_nx754 # B1_nx755 # B1_nx828 # B1_nx881; --E2_bus_dout_8 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_8 --operation mode is normal E2_bus_dout_8_lut_out = S3_dout_8; E2_bus_dout_8 = DFFEAS(E2_bus_dout_8_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_8 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_8 --operation mode is normal E1_bus_dout_8_lut_out = S2_dout_8; E1_bus_dout_8 = DFFEAS(E1_bus_dout_8_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_8 is jtag_master_1_notri:jtag_dut_notri|bus_dout_8 --operation mode is normal D1_bus_dout_8_lut_out = S1_dout_8; D1_bus_dout_8 = DFFEAS(D1_bus_dout_8_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx484 is general_config_notri:nic_notri|nx484 --operation mode is normal G1_nx484 = G1_nx506 & (G1_nx485 # G1_se0_cnt_7 & G1_nx507); --G1_nx530 is general_config_notri:nic_notri|nx530 --operation mode is normal G1_nx530 = N1_request_43 # G1_nx486 # !N1_request_42 & G1_nx444; --G1_nx531 is general_config_notri:nic_notri|nx531 --operation mode is normal G1_nx531 = DUT_P4_D[7] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx757 is clkpre_counter:cp|nx757 --operation mode is normal B1_nx757 = DUT_PRE[3] & (B1_nx804 # B1_strb_dout_7 & B1_nx803) # !DUT_PRE[3] & B1_strb_dout_7 & B1_nx803; --B1_nx758 is clkpre_counter:cp|nx758 --operation mode is normal B1_nx758 = B1_dout1pcnt_7 & (B1_nx795 # B1_dout3pcnt_7 & B1_nx796) # !B1_dout1pcnt_7 & B1_dout3pcnt_7 & (B1_nx796); --B1_nx829 is clkpre_counter:cp|nx829 --operation mode is normal B1_nx829 = B1_nx759 # B1_nx760 # B1_dout_ccnt_7 & B1_nx794; --B1_nx830 is clkpre_counter:cp|nx830 --operation mode is normal B1_nx830 = B1_dout0pcnt_7 & (B1_nx798 # B1_dout2pcnt_7 & B1_nx797) # !B1_dout0pcnt_7 & B1_dout2pcnt_7 & B1_nx797; --E2_nx222 is jtag_master_2_notri:jtag_ni_up_notri|nx222 --operation mode is normal E2_nx222 = S3_dout_7 & (!N1_request_43 & !N1_request_42 # !N1_request_41); --E1_nx222 is jtag_master_2_notri:jtag_ni_dn_notri|nx222 --operation mode is normal E1_nx222 = S2_dout_7 & (!N1_request_43 & !N1_request_42 # !N1_request_41); --D1_nx224 is jtag_master_1_notri:jtag_dut_notri|nx224 --operation mode is normal D1_nx224 = S1_dout_7 & (!N1_request_43 & !N1_request_42 # !N1_request_41); --G1_nx488 is general_config_notri:nic_notri|nx488 --operation mode is normal G1_nx488 = !N1_request_43 & (N1_request_42 & G1_ni_or_mask_6 # !N1_request_42 & (G1_ni_sel_p_2)); --G1_nx443 is general_config_notri:nic_notri|nx443 --operation mode is normal G1_nx443 = N1_request_41 & (N1_request_48 & F1_par_cnt_6 # !N1_request_48 & (F1_naddr_6)); --G1_nx489 is general_config_notri:nic_notri|nx489 --operation mode is normal G1_nx489 = N1_request_42 & !N1_request_41 & G1_sebd_oe_2; --B1_strb_dout_6 is clkpre_counter:cp|strb_dout_6 --operation mode is arithmetic B1_strb_dout_6_carry_eqn = B1_ccnt_cnt_s_Q_nx36; B1_strb_dout_6_lut_out = B1_strb_dout_6 $ (!B1_strb_dout_6_carry_eqn); B1_strb_dout_6 = DFFEAS(B1_strb_dout_6_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_s_Q_nx41 is clkpre_counter:cp|ccnt_cnt_s_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_s_Q_nx41 = CARRY(B1_strb_dout_6 & (!B1_ccnt_cnt_s_Q_nx36)); --B1_dout1pcnt_6 is clkpre_counter:cp|dout1pcnt_6 --operation mode is arithmetic B1_dout1pcnt_6_carry_eqn = B1_pcnt1_cnt_1_cnt_i_Q_nx16; B1_dout1pcnt_6_lut_out = B1_dout1pcnt_6 $ (!B1_dout1pcnt_6_carry_eqn); B1_dout1pcnt_6 = DFFEAS(B1_dout1pcnt_6_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_1_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_1_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_1_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_6 & (!B1_pcnt1_cnt_1_cnt_i_Q_nx16)); --B1_dout3pcnt_6 is clkpre_counter:cp|dout3pcnt_6 --operation mode is arithmetic B1_dout3pcnt_6_carry_eqn = B1_pcnt3_cnt_1_cnt_i_Q_nx16; B1_dout3pcnt_6_lut_out = B1_dout3pcnt_6 $ (!B1_dout3pcnt_6_carry_eqn); B1_dout3pcnt_6 = DFFEAS(B1_dout3pcnt_6_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_1_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_1_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_1_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_6 & (!B1_pcnt3_cnt_1_cnt_i_Q_nx16)); --B1_dout_ccnt_6 is clkpre_counter:cp|dout_ccnt_6 --operation mode is arithmetic B1_dout_ccnt_6_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx36; B1_dout_ccnt_6_lut_out = B1_dout_ccnt_6 $ (!B1_dout_ccnt_6_carry_eqn); B1_dout_ccnt_6 = DFFEAS(B1_dout_ccnt_6_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_0_cnt_i_Q_nx41 is clkpre_counter:cp|ccnt_cnt_0_cnt_i_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_0_cnt_i_Q_nx41 = CARRY(B1_dout_ccnt_6 & (!B1_ccnt_cnt_0_cnt_i_Q_nx36)); --B1_nx763 is clkpre_counter:cp|nx763 --operation mode is normal B1_nx763 = B1_L0time_6 & (B1_nx801 # B1_L2time_6 & B1_nx802) # !B1_L0time_6 & B1_L2time_6 & (B1_nx802); --B1_nx764 is clkpre_counter:cp|nx764 --operation mode is normal B1_nx764 = B1_L1time_6 & (B1_nx799 # B1_c_time_6 & B1_nx800) # !B1_L1time_6 & B1_c_time_6 & (B1_nx800); --B1_dout0pcnt_6 is clkpre_counter:cp|dout0pcnt_6 --operation mode is arithmetic B1_dout0pcnt_6_carry_eqn = B1_pcnt0_cnt_1_cnt_i_Q_nx16; B1_dout0pcnt_6_lut_out = B1_dout0pcnt_6 $ (!B1_dout0pcnt_6_carry_eqn); B1_dout0pcnt_6 = DFFEAS(B1_dout0pcnt_6_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_1_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_1_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_1_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_6 & (!B1_pcnt0_cnt_1_cnt_i_Q_nx16)); --B1_dout2pcnt_6 is clkpre_counter:cp|dout2pcnt_6 --operation mode is arithmetic B1_dout2pcnt_6_carry_eqn = B1_pcnt2_cnt_1_cnt_i_Q_nx16; B1_dout2pcnt_6_lut_out = B1_dout2pcnt_6 $ (!B1_dout2pcnt_6_carry_eqn); B1_dout2pcnt_6 = DFFEAS(B1_dout2pcnt_6_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_1_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_1_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_1_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_6 & (!B1_pcnt2_cnt_1_cnt_i_Q_nx16)); --S3_nx258 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx258 --operation mode is normal S3_nx258 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_6; --S3_nx259 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx259 --operation mode is normal S3_nx259 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_6) # !N1_request_48 & S3_NI_P0_D_6); --S2_nx258 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx258 --operation mode is normal S2_nx258 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_6; --S2_nx259 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx259 --operation mode is normal S2_nx259 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_6) # !N1_request_48 & S2_NI_P0_D_6); --S1_nx258 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx258 --operation mode is normal S1_nx258 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_6; --S1_nx259 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx259 --operation mode is normal S1_nx259 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_6) # !N1_request_48 & S1_NI_P0_D_6); --G1_nx525 is general_config_notri:nic_notri|nx525 --operation mode is normal G1_nx525 = N1_request_48 & F1_par_cnt_5 # !N1_request_48 & (F1_naddr_5) # !N1_request_41; --S3_NI_P4_D_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_5 --operation mode is normal S3_NI_P4_D_5_lut_out = S3_NI_P4_D_4; S3_NI_P4_D_5 = DFFEAS(S3_NI_P4_D_5_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_5 --operation mode is normal S2_NI_P4_D_5_lut_out = S2_NI_P4_D_4; S2_NI_P4_D_5 = DFFEAS(S2_NI_P4_D_5_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_5 --operation mode is normal S1_NI_P4_D_5_lut_out = S1_NI_P4_D_4; S1_NI_P4_D_5 = DFFEAS(S1_NI_P4_D_5_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F1_par_cnt_4 is ni2dpm_12:ni_ni_neg|par_cnt_4 --operation mode is arithmetic F1_par_cnt_4_carry_eqn = F1_parc_Q_nx28; F1_par_cnt_4_lut_out = F1_par_cnt_4 $ (!F1_par_cnt_4_carry_eqn); F1_par_cnt_4 = DFFEAS(F1_par_cnt_4_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx34 is ni2dpm_12:ni_ni_neg|parc_Q_nx34 --operation mode is arithmetic F1_parc_Q_nx34 = CARRY(F1_par_cnt_4 & (!F1_parc_Q_nx28)); --S3_seribd_t_51 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|seribd_t_51 --operation mode is normal S3_seribd_t_51_lut_out = S3_NI_P3_D_0; S3_seribd_t_51 = DFFEAS(S3_seribd_t_51_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_seribd_t_51 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|seribd_t_51 --operation mode is normal S2_seribd_t_51_lut_out = S2_NI_P3_D_0; S2_seribd_t_51 = DFFEAS(S2_seribd_t_51_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_seribd_t_51 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|seribd_t_51 --operation mode is normal S1_seribd_t_51_lut_out = S1_NI_P3_D_0; S1_seribd_t_51 = DFFEAS(S1_seribd_t_51_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_17 is scsn_slave_nw_dll_ob1_ob_data_17 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_17_lut_out = scsn_slave_nw_dll_ob1_ob_data_16; scsn_slave_nw_dll_ob1_ob_data_17 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_17_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_17, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_18 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_18 --operation mode is normal Y2_d_to_dll_18 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_18 # !Y2_current_state_0 & (J1_reply_18)); --D1_jtgsnd_ser_t_23 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_23 --operation mode is normal D1_jtgsnd_ser_t_23_lut_out = D1_jtgsnd_ser_t_22; D1_jtgsnd_ser_t_23 = DFFEAS(D1_jtgsnd_ser_t_23_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_12, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_23 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_23 --operation mode is normal E1_jtgsnd_ser_t_23_lut_out = E1_jtgsnd_ser_t_22; E1_jtgsnd_ser_t_23 = DFFEAS(E1_jtgsnd_ser_t_23_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_12, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_23 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_23 --operation mode is normal E2_jtgsnd_ser_t_23_lut_out = E2_jtgsnd_ser_t_22; E2_jtgsnd_ser_t_23 = DFFEAS(E2_jtgsnd_ser_t_23_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_12, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_16 is scsn_slave_nw_dll_ob0_ob_data_16 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_16_lut_out = scsn_slave_nw_dll_ob0_ob_data_15; scsn_slave_nw_dll_ob0_ob_data_16 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_16_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_16, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_17 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_17 --operation mode is normal Y1_d_to_dll_17 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_17 # !Y1_current_state_0 & (J1_reply_17)); --J1_reply_18 is mcm_nw_apl:scsn_slave_nw_apl|reply_18 --operation mode is normal J1_reply_18 = N1_request_18 & (J1_a_0_dup_54 # J1_read_data_13 & !J1_ix34_ix30_nx12) # !N1_request_18 & J1_read_data_13 & (!J1_ix34_ix30_nx12); --J1_read_data_12 is mcm_nw_apl:scsn_slave_nw_apl|read_data_12 --operation mode is normal J1_read_data_12_lut_out = C1_bus_dout_12; J1_read_data_12 = DFFEAS(J1_read_data_12_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_11 is gio_devices:gio|bus_dout_11 --operation mode is normal C1_bus_dout_11_lut_out = C1_nx265 # C1_nx266 # C1_nx267; C1_bus_dout_11 = DFFEAS(C1_bus_dout_11_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx268 is gio_devices:gio|nx268 --operation mode is normal C1_nx268 = W2_q_b[2] & (C1_sel_5 # G1_bus_dout_10 & C1_ce_gen) # !W2_q_b[2] & G1_bus_dout_10 & (C1_ce_gen); --C1_nx269 is gio_devices:gio|nx269 --operation mode is normal C1_nx269 = B1_bus_dout_10 & (C1_ce_cp # E2_bus_dout_10 & C1_ce_ni_jtg_up) # !B1_bus_dout_10 & E2_bus_dout_10 & (C1_ce_ni_jtg_up); --C1_nx270 is gio_devices:gio|nx270 --operation mode is normal C1_nx270 = E1_bus_dout_10 & (C1_ce_ni_jtg_dn # D1_bus_dout_10 & C1_ce_dut_jtg) # !E1_bus_dout_10 & D1_bus_dout_10 & (C1_ce_dut_jtg); --W2_q_b[1] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[1] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[1]_PORT_A_data_in = F2_data_2p_1; W2_q_b[1]_PORT_A_data_in_reg = DFFE(W2_q_b[1]_PORT_A_data_in, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[1]_PORT_A_address_reg = DFFE(W2_q_b[1]_PORT_A_address, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[1]_PORT_B_address_reg = DFFE(W2_q_b[1]_PORT_B_address, W2_q_b[1]_clock_1, , , ); W2_q_b[1]_PORT_A_write_enable = VCC; W2_q_b[1]_PORT_A_write_enable_reg = DFFE(W2_q_b[1]_PORT_A_write_enable, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_B_read_enable = VCC; W2_q_b[1]_PORT_B_read_enable_reg = DFFE(W2_q_b[1]_PORT_B_read_enable, W2_q_b[1]_clock_1, , , ); W2_q_b[1]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[1]_clock_1 = X1__clk0; W2_q_b[1]_clock_enable_0 = F2_we_eff; W2_q_b[1]_clear_0 = !G1_NOT_ni_clear; W2_q_b[1]_PORT_B_data_out = MEMORY(W2_q_b[1]_PORT_A_data_in_reg, , W2_q_b[1]_PORT_A_address_reg, W2_q_b[1]_PORT_B_address_reg, W2_q_b[1]_PORT_A_write_enable_reg, W2_q_b[1]_PORT_B_read_enable_reg, , , W2_q_b[1]_clock_0, W2_q_b[1]_clock_1, W2_q_b[1]_clock_enable_0, , W2_q_b[1]_clear_0, ); W2_q_b[1]_PORT_B_data_out_reg = DFFE(W2_q_b[1]_PORT_B_data_out, W2_q_b[1]_clock_1, , , ); W2_q_b[1] = W2_q_b[1]_PORT_B_data_out_reg[0]; --W2_q_b[9] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[9] W2_q_b[1]_PORT_A_data_in = F2_data_2p_1; W2_q_b[1]_PORT_A_data_in_reg = DFFE(W2_q_b[1]_PORT_A_data_in, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[1]_PORT_A_address_reg = DFFE(W2_q_b[1]_PORT_A_address, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[1]_PORT_B_address_reg = DFFE(W2_q_b[1]_PORT_B_address, W2_q_b[1]_clock_1, , , ); W2_q_b[1]_PORT_A_write_enable = VCC; W2_q_b[1]_PORT_A_write_enable_reg = DFFE(W2_q_b[1]_PORT_A_write_enable, W2_q_b[1]_clock_0, W2_q_b[1]_clear_0, , W2_q_b[1]_clock_enable_0); W2_q_b[1]_PORT_B_read_enable = VCC; W2_q_b[1]_PORT_B_read_enable_reg = DFFE(W2_q_b[1]_PORT_B_read_enable, W2_q_b[1]_clock_1, , , ); W2_q_b[1]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[1]_clock_1 = X1__clk0; W2_q_b[1]_clock_enable_0 = F2_we_eff; W2_q_b[1]_clear_0 = !G1_NOT_ni_clear; W2_q_b[1]_PORT_B_data_out = MEMORY(W2_q_b[1]_PORT_A_data_in_reg, , W2_q_b[1]_PORT_A_address_reg, W2_q_b[1]_PORT_B_address_reg, W2_q_b[1]_PORT_A_write_enable_reg, W2_q_b[1]_PORT_B_read_enable_reg, , , W2_q_b[1]_clock_0, W2_q_b[1]_clock_1, W2_q_b[1]_clock_enable_0, , W2_q_b[1]_clear_0, ); W2_q_b[1]_PORT_B_data_out_reg = DFFE(W2_q_b[1]_PORT_B_data_out, W2_q_b[1]_clock_1, , , ); W2_q_b[9] = W2_q_b[1]_PORT_B_data_out_reg[1]; --G1_bus_dout_9 is general_config_notri:nic_notri|bus_dout_9 --operation mode is normal G1_bus_dout_9 = G1_nx478 # !N1_request_44 & G1_nx534 & G1_nx535; --B1_bus_dout_9 is clkpre_counter:cp|bus_dout_9 --operation mode is normal B1_bus_dout_9 = B1_nx751 # B1_nx752 # B1_nx827 # B1_nx882; --E2_bus_dout_9 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_9 --operation mode is normal E2_bus_dout_9_lut_out = S3_dout_9; E2_bus_dout_9 = DFFEAS(E2_bus_dout_9_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_9 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_9 --operation mode is normal E1_bus_dout_9_lut_out = S2_dout_9; E1_bus_dout_9 = DFFEAS(E1_bus_dout_9_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_9 is jtag_master_1_notri:jtag_dut_notri|bus_dout_9 --operation mode is normal D1_bus_dout_9_lut_out = S1_dout_9; D1_bus_dout_9 = DFFEAS(D1_bus_dout_9_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_we_eff is ni2dpm_12:ni_ni_pos|we_eff --operation mode is normal F2_we_eff = F2_we_p & (!F2_oa_ctrl_s # !G1_ni_oase_mode); --F2_data_2p_0 is ni2dpm_12:ni_ni_pos|data_2p_0 --operation mode is normal F2_data_2p_0 = F2_ex_p_modgen_gt_612_nx56 & (F2_ex_p_q1pass_0) # !F2_ex_p_modgen_gt_612_nx56 & F2_ex_p_q1pass_1; --F2_naddr_0 is ni2dpm_12:ni_ni_pos|naddr_0 --operation mode is arithmetic F2_naddr_0_lut_out = F2_naddr_0 $ F2_we_eff; F2_naddr_0 = DFFEAS(F2_naddr_0_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx10 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx10 --operation mode is arithmetic F2_wa_p_Q_nx10 = CARRY(F2_naddr_0 & F2_we_eff); --F2_naddr_1 is ni2dpm_12:ni_ni_pos|naddr_1 --operation mode is arithmetic F2_naddr_1_carry_eqn = F2_wa_p_Q_nx10; F2_naddr_1_lut_out = F2_naddr_1 $ (F2_naddr_1_carry_eqn); F2_naddr_1 = DFFEAS(F2_naddr_1_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx16 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx16 --operation mode is arithmetic F2_wa_p_Q_nx16 = CARRY(!F2_wa_p_Q_nx10 # !F2_naddr_1); --F2_naddr_2 is ni2dpm_12:ni_ni_pos|naddr_2 --operation mode is arithmetic F2_naddr_2_carry_eqn = F2_wa_p_Q_nx16; F2_naddr_2_lut_out = F2_naddr_2 $ (!F2_naddr_2_carry_eqn); F2_naddr_2 = DFFEAS(F2_naddr_2_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx22 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx22 --operation mode is arithmetic F2_wa_p_Q_nx22 = CARRY(F2_naddr_2 & (!F2_wa_p_Q_nx16)); --F2_naddr_3 is ni2dpm_12:ni_ni_pos|naddr_3 --operation mode is arithmetic F2_naddr_3_carry_eqn = F2_wa_p_Q_nx22; F2_naddr_3_lut_out = F2_naddr_3 $ (F2_naddr_3_carry_eqn); F2_naddr_3 = DFFEAS(F2_naddr_3_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx28 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx28 --operation mode is arithmetic F2_wa_p_Q_nx28 = CARRY(!F2_wa_p_Q_nx22 # !F2_naddr_3); --F2_naddr_4 is ni2dpm_12:ni_ni_pos|naddr_4 --operation mode is arithmetic F2_naddr_4_carry_eqn = F2_wa_p_Q_nx28; F2_naddr_4_lut_out = F2_naddr_4 $ (!F2_naddr_4_carry_eqn); F2_naddr_4 = DFFEAS(F2_naddr_4_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx34 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx34 --operation mode is arithmetic F2_wa_p_Q_nx34 = CARRY(F2_naddr_4 & (!F2_wa_p_Q_nx28)); --F2_naddr_5 is ni2dpm_12:ni_ni_pos|naddr_5 --operation mode is arithmetic F2_naddr_5_carry_eqn = F2_wa_p_Q_nx34; F2_naddr_5_lut_out = F2_naddr_5 $ (F2_naddr_5_carry_eqn); F2_naddr_5 = DFFEAS(F2_naddr_5_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx40 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx40 --operation mode is arithmetic F2_wa_p_Q_nx40 = CARRY(!F2_wa_p_Q_nx34 # !F2_naddr_5); --F2_naddr_6 is ni2dpm_12:ni_ni_pos|naddr_6 --operation mode is arithmetic F2_naddr_6_carry_eqn = F2_wa_p_Q_nx40; F2_naddr_6_lut_out = F2_naddr_6 $ (!F2_naddr_6_carry_eqn); F2_naddr_6 = DFFEAS(F2_naddr_6_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx44 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx44 --operation mode is arithmetic F2_wa_p_Q_nx44 = CARRY(F2_naddr_6 & (!F2_wa_p_Q_nx40)); --F2_naddr_7 is ni2dpm_12:ni_ni_pos|naddr_7 --operation mode is arithmetic F2_naddr_7_carry_eqn = F2_wa_p_Q_nx44; F2_naddr_7_lut_out = F2_naddr_7 $ (F2_naddr_7_carry_eqn); F2_naddr_7 = DFFEAS(F2_naddr_7_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx48 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx48 --operation mode is arithmetic F2_wa_p_Q_nx48 = CARRY(!F2_wa_p_Q_nx44 # !F2_naddr_7); --F2_naddr_8 is ni2dpm_12:ni_ni_pos|naddr_8 --operation mode is arithmetic F2_naddr_8_carry_eqn = F2_wa_p_Q_nx48; F2_naddr_8_lut_out = F2_naddr_8 $ (!F2_naddr_8_carry_eqn); F2_naddr_8 = DFFEAS(F2_naddr_8_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx52 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx52 --operation mode is arithmetic F2_wa_p_Q_nx52 = CARRY(F2_naddr_8 & (!F2_wa_p_Q_nx48)); --F2_naddr_9 is ni2dpm_12:ni_ni_pos|naddr_9 --operation mode is arithmetic F2_naddr_9_carry_eqn = F2_wa_p_Q_nx52; F2_naddr_9_lut_out = F2_naddr_9 $ (F2_naddr_9_carry_eqn); F2_naddr_9 = DFFEAS(F2_naddr_9_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx57 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx57 --operation mode is arithmetic F2_wa_p_Q_nx57 = CARRY(!F2_wa_p_Q_nx52 # !F2_naddr_9); --F2_naddr_10 is ni2dpm_12:ni_ni_pos|naddr_10 --operation mode is arithmetic F2_naddr_10_carry_eqn = F2_wa_p_Q_nx57; F2_naddr_10_lut_out = F2_naddr_10 $ (!F2_naddr_10_carry_eqn); F2_naddr_10 = DFFEAS(F2_naddr_10_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_wa_p_Q_nx61 is ni2dpm_12:ni_ni_pos|wa_p_Q_nx61 --operation mode is arithmetic F2_wa_p_Q_nx61 = CARRY(F2_naddr_10 & (!F2_wa_p_Q_nx57)); --F2_naddr_11 is ni2dpm_12:ni_ni_pos|naddr_11 --operation mode is normal F2_naddr_11_carry_eqn = F2_wa_p_Q_nx61; F2_naddr_11_lut_out = F2_naddr_11 $ (F2_naddr_11_carry_eqn); F2_naddr_11 = DFFEAS(F2_naddr_11_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_nx481 is general_config_notri:nic_notri|nx481 --operation mode is normal G1_nx481 = G1_nx506 & (G1_nx482 # G1_se1_cnt_0 & G1_nx507); --G1_nx532 is general_config_notri:nic_notri|nx532 --operation mode is normal G1_nx532 = N1_request_43 # G1_nx483 # !N1_request_42 & G1_nx445; --G1_nx533 is general_config_notri:nic_notri|nx533 --operation mode is normal G1_nx533 = DUT_P4_D[8] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx754 is clkpre_counter:cp|nx754 --operation mode is normal B1_nx754 = B1_dout0pcnt_8 & (B1_nx798 # B1_dout2pcnt_8 & B1_nx797) # !B1_dout0pcnt_8 & B1_dout2pcnt_8 & B1_nx797; --B1_nx755 is clkpre_counter:cp|nx755 --operation mode is normal B1_nx755 = B1_L0time_8 & (B1_nx801 # B1_L2time_8 & B1_nx802) # !B1_L0time_8 & B1_L2time_8 & (B1_nx802); --B1_nx828 is clkpre_counter:cp|nx828 --operation mode is normal B1_nx828 = B1_dout1pcnt_8 & (B1_nx795 # B1_dout3pcnt_8 & B1_nx796) # !B1_dout1pcnt_8 & B1_dout3pcnt_8 & (B1_nx796); --B1_nx881 is clkpre_counter:cp|nx881 --operation mode is normal B1_nx881 = B1_nx756 # B1_dout_ccnt_8 & B1_nx794; --S3_dout_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_8 --operation mode is normal S3_dout_8 = N1_request_46 & S3_NI_P0_STRB # !N1_request_46 & (S3_nx262 # S3_nx263); --S2_dout_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_8 --operation mode is normal S2_dout_8 = N1_request_46 & S2_NI_P0_STRB # !N1_request_46 & (S2_nx262 # S2_nx263); --S1_dout_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_8 --operation mode is normal S1_dout_8 = N1_request_46 & S1_NI_P0_STRB # !N1_request_46 & (S1_nx262 # S1_nx263); --G1_nx485 is general_config_notri:nic_notri|nx485 --operation mode is normal G1_nx485 = !N1_request_43 & (N1_request_42 & (G1_ni_or_mask_7) # !N1_request_42 & !G1_NOT_ni_sel_p_3); --G1_nx444 is general_config_notri:nic_notri|nx444 --operation mode is normal G1_nx444 = N1_request_41 & (N1_request_48 & F1_par_cnt_7 # !N1_request_48 & (F1_naddr_7)); --G1_nx486 is general_config_notri:nic_notri|nx486 --operation mode is normal G1_nx486 = N1_request_42 & !N1_request_41 & G1_sebd_oe_i_3; --B1_strb_dout_7 is clkpre_counter:cp|strb_dout_7 --operation mode is normal B1_strb_dout_7_carry_eqn = B1_ccnt_cnt_s_Q_nx41; B1_strb_dout_7_lut_out = B1_strb_dout_7 $ (B1_strb_dout_7_carry_eqn); B1_strb_dout_7 = DFFEAS(B1_strb_dout_7_lut_out, GLOBAL(DUT_P4_STR), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_dout1pcnt_7 is clkpre_counter:cp|dout1pcnt_7 --operation mode is normal B1_dout1pcnt_7_carry_eqn = B1_pcnt1_cnt_1_cnt_i_Q_nx21; B1_dout1pcnt_7_lut_out = B1_dout1pcnt_7 $ (B1_dout1pcnt_7_carry_eqn); B1_dout1pcnt_7 = DFFEAS(B1_dout1pcnt_7_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_7 is clkpre_counter:cp|dout3pcnt_7 --operation mode is normal B1_dout3pcnt_7_carry_eqn = B1_pcnt3_cnt_1_cnt_i_Q_nx21; B1_dout3pcnt_7_lut_out = B1_dout3pcnt_7 $ (B1_dout3pcnt_7_carry_eqn); B1_dout3pcnt_7 = DFFEAS(B1_dout3pcnt_7_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout_ccnt_7 is clkpre_counter:cp|dout_ccnt_7 --operation mode is normal B1_dout_ccnt_7_carry_eqn = B1_ccnt_cnt_0_cnt_i_Q_nx41; B1_dout_ccnt_7_lut_out = B1_dout_ccnt_7 $ (B1_dout_ccnt_7_carry_eqn); B1_dout_ccnt_7 = DFFEAS(B1_dout_ccnt_7_lut_out, GLOBAL(DUT_CLK[0]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_nx759 is clkpre_counter:cp|nx759 --operation mode is normal B1_nx759 = B1_L0time_7 & (B1_nx801 # B1_L2time_7 & B1_nx802) # !B1_L0time_7 & B1_L2time_7 & (B1_nx802); --B1_nx760 is clkpre_counter:cp|nx760 --operation mode is normal B1_nx760 = B1_L1time_7 & (B1_nx799 # B1_c_time_7 & B1_nx800) # !B1_L1time_7 & B1_c_time_7 & (B1_nx800); --B1_dout0pcnt_7 is clkpre_counter:cp|dout0pcnt_7 --operation mode is normal B1_dout0pcnt_7_carry_eqn = B1_pcnt0_cnt_1_cnt_i_Q_nx21; B1_dout0pcnt_7_lut_out = B1_dout0pcnt_7 $ (B1_dout0pcnt_7_carry_eqn); B1_dout0pcnt_7 = DFFEAS(B1_dout0pcnt_7_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_7 is clkpre_counter:cp|dout2pcnt_7 --operation mode is normal B1_dout2pcnt_7_carry_eqn = B1_pcnt2_cnt_1_cnt_i_Q_nx21; B1_dout2pcnt_7_lut_out = B1_dout2pcnt_7 $ (B1_dout2pcnt_7_carry_eqn); B1_dout2pcnt_7 = DFFEAS(B1_dout2pcnt_7_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --S3_dout_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_7 --operation mode is normal S3_dout_7 = N1_request_46 & S3_NI_P1_D_9 # !N1_request_46 & (S3_nx260 # S3_nx261); --S2_dout_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_7 --operation mode is normal S2_dout_7 = N1_request_46 & S2_NI_P1_D_9 # !N1_request_46 & (S2_nx260 # S2_nx261); --S1_dout_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_7 --operation mode is normal S1_dout_7 = N1_request_46 & S1_NI_P1_D_9 # !N1_request_46 & (S1_nx260 # S1_nx261); --F1_par_cnt_6 is ni2dpm_12:ni_ni_neg|par_cnt_6 --operation mode is arithmetic F1_par_cnt_6_carry_eqn = F1_parc_Q_nx40; F1_par_cnt_6_lut_out = F1_par_cnt_6 $ (!F1_par_cnt_6_carry_eqn); F1_par_cnt_6 = DFFEAS(F1_par_cnt_6_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx44 is ni2dpm_12:ni_ni_neg|parc_Q_nx44 --operation mode is arithmetic F1_parc_Q_nx44 = CARRY(F1_par_cnt_6 & (!F1_parc_Q_nx40)); --S3_NI_P4_D_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_6 --operation mode is normal S3_NI_P4_D_6_lut_out = S3_NI_P3_D_2; S3_NI_P4_D_6 = DFFEAS(S3_NI_P4_D_6_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_6 --operation mode is normal S2_NI_P4_D_6_lut_out = S2_NI_P3_D_2; S2_NI_P4_D_6 = DFFEAS(S2_NI_P4_D_6_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_6 --operation mode is normal S1_NI_P4_D_6_lut_out = S1_NI_P3_D_2; S1_NI_P4_D_6 = DFFEAS(S1_NI_P4_D_6_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F1_par_cnt_5 is ni2dpm_12:ni_ni_neg|par_cnt_5 --operation mode is arithmetic F1_par_cnt_5_carry_eqn = F1_parc_Q_nx34; F1_par_cnt_5_lut_out = F1_par_cnt_5 $ (F1_par_cnt_5_carry_eqn); F1_par_cnt_5 = DFFEAS(F1_par_cnt_5_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx40 is ni2dpm_12:ni_ni_neg|parc_Q_nx40 --operation mode is arithmetic F1_parc_Q_nx40 = CARRY(!F1_parc_Q_nx34 # !F1_par_cnt_5); --S3_NI_P3_D_0 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_0 --operation mode is normal S3_NI_P3_D_0_lut_out = S3_NI_P2_D_0; S3_NI_P3_D_0 = DFFEAS(S3_NI_P3_D_0_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_0 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_0 --operation mode is normal S2_NI_P3_D_0_lut_out = S2_NI_P2_D_0; S2_NI_P3_D_0 = DFFEAS(S2_NI_P3_D_0_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_0 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_0 --operation mode is normal S1_NI_P3_D_0_lut_out = S1_NI_P2_D_0; S1_NI_P3_D_0 = DFFEAS(S1_NI_P3_D_0_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_16 is scsn_slave_nw_dll_ob1_ob_data_16 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_16_lut_out = scsn_slave_nw_dll_ob1_ob_data_15; scsn_slave_nw_dll_ob1_ob_data_16 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_16_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_16, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_17 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_17 --operation mode is normal Y2_d_to_dll_17 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_17 # !Y2_current_state_0 & (J1_reply_17)); --D1_jtgsnd_ser_t_22 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_22 --operation mode is normal D1_jtgsnd_ser_t_22_lut_out = D1_jtgsnd_ser_t_21; D1_jtgsnd_ser_t_22 = DFFEAS(D1_jtgsnd_ser_t_22_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_26, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_22 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_22 --operation mode is normal E1_jtgsnd_ser_t_22_lut_out = E1_jtgsnd_ser_t_21; E1_jtgsnd_ser_t_22 = DFFEAS(E1_jtgsnd_ser_t_22_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_26, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_22 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_22 --operation mode is normal E2_jtgsnd_ser_t_22_lut_out = E2_jtgsnd_ser_t_21; E2_jtgsnd_ser_t_22 = DFFEAS(E2_jtgsnd_ser_t_22_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_26, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_15 is scsn_slave_nw_dll_ob0_ob_data_15 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_15_lut_out = scsn_slave_nw_dll_ob0_ob_data_14; scsn_slave_nw_dll_ob0_ob_data_15 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_15_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_15, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_16 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_16 --operation mode is normal Y1_d_to_dll_16 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_16 # !Y1_current_state_0 & (J1_reply_16)); --J1_reply_17 is mcm_nw_apl:scsn_slave_nw_apl|reply_17 --operation mode is normal J1_reply_17 = N1_request_17 & (J1_a_0_dup_54 # J1_read_data_14 & !J1_ix34_ix30_nx12) # !N1_request_17 & J1_read_data_14 & (!J1_ix34_ix30_nx12); --J1_read_data_13 is mcm_nw_apl:scsn_slave_nw_apl|read_data_13 --operation mode is normal J1_read_data_13_lut_out = C1_bus_dout_13; J1_read_data_13 = DFFEAS(J1_read_data_13_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_12 is gio_devices:gio|bus_dout_12 --operation mode is normal C1_bus_dout_12_lut_out = C1_nx262 # C1_nx263 # C1_nx264; C1_bus_dout_12 = DFFEAS(C1_bus_dout_12_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx265 is gio_devices:gio|nx265 --operation mode is normal C1_nx265 = W2_q_b[3] & (C1_sel_5 # G1_bus_dout_11 & C1_ce_gen) # !W2_q_b[3] & G1_bus_dout_11 & (C1_ce_gen); --C1_nx266 is gio_devices:gio|nx266 --operation mode is normal C1_nx266 = B1_bus_dout_11 & (C1_ce_cp # E2_bus_dout_11 & C1_ce_ni_jtg_up) # !B1_bus_dout_11 & E2_bus_dout_11 & (C1_ce_ni_jtg_up); --C1_nx267 is gio_devices:gio|nx267 --operation mode is normal C1_nx267 = E1_bus_dout_11 & (C1_ce_ni_jtg_dn # D1_bus_dout_11 & C1_ce_dut_jtg) # !E1_bus_dout_11 & D1_bus_dout_11 & (C1_ce_dut_jtg); --W2_q_b[2] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[2] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[2]_PORT_A_data_in = F2_data_2p_2; W2_q_b[2]_PORT_A_data_in_reg = DFFE(W2_q_b[2]_PORT_A_data_in, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[2]_PORT_A_address_reg = DFFE(W2_q_b[2]_PORT_A_address, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[2]_PORT_B_address_reg = DFFE(W2_q_b[2]_PORT_B_address, W2_q_b[2]_clock_1, , , ); W2_q_b[2]_PORT_A_write_enable = VCC; W2_q_b[2]_PORT_A_write_enable_reg = DFFE(W2_q_b[2]_PORT_A_write_enable, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_B_read_enable = VCC; W2_q_b[2]_PORT_B_read_enable_reg = DFFE(W2_q_b[2]_PORT_B_read_enable, W2_q_b[2]_clock_1, , , ); W2_q_b[2]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[2]_clock_1 = X1__clk0; W2_q_b[2]_clock_enable_0 = F2_we_eff; W2_q_b[2]_clear_0 = !G1_NOT_ni_clear; W2_q_b[2]_PORT_B_data_out = MEMORY(W2_q_b[2]_PORT_A_data_in_reg, , W2_q_b[2]_PORT_A_address_reg, W2_q_b[2]_PORT_B_address_reg, W2_q_b[2]_PORT_A_write_enable_reg, W2_q_b[2]_PORT_B_read_enable_reg, , , W2_q_b[2]_clock_0, W2_q_b[2]_clock_1, W2_q_b[2]_clock_enable_0, , W2_q_b[2]_clear_0, ); W2_q_b[2]_PORT_B_data_out_reg = DFFE(W2_q_b[2]_PORT_B_data_out, W2_q_b[2]_clock_1, , , ); W2_q_b[2] = W2_q_b[2]_PORT_B_data_out_reg[0]; --W2_q_b[10] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[10] W2_q_b[2]_PORT_A_data_in = F2_data_2p_2; W2_q_b[2]_PORT_A_data_in_reg = DFFE(W2_q_b[2]_PORT_A_data_in, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[2]_PORT_A_address_reg = DFFE(W2_q_b[2]_PORT_A_address, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[2]_PORT_B_address_reg = DFFE(W2_q_b[2]_PORT_B_address, W2_q_b[2]_clock_1, , , ); W2_q_b[2]_PORT_A_write_enable = VCC; W2_q_b[2]_PORT_A_write_enable_reg = DFFE(W2_q_b[2]_PORT_A_write_enable, W2_q_b[2]_clock_0, W2_q_b[2]_clear_0, , W2_q_b[2]_clock_enable_0); W2_q_b[2]_PORT_B_read_enable = VCC; W2_q_b[2]_PORT_B_read_enable_reg = DFFE(W2_q_b[2]_PORT_B_read_enable, W2_q_b[2]_clock_1, , , ); W2_q_b[2]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[2]_clock_1 = X1__clk0; W2_q_b[2]_clock_enable_0 = F2_we_eff; W2_q_b[2]_clear_0 = !G1_NOT_ni_clear; W2_q_b[2]_PORT_B_data_out = MEMORY(W2_q_b[2]_PORT_A_data_in_reg, , W2_q_b[2]_PORT_A_address_reg, W2_q_b[2]_PORT_B_address_reg, W2_q_b[2]_PORT_A_write_enable_reg, W2_q_b[2]_PORT_B_read_enable_reg, , , W2_q_b[2]_clock_0, W2_q_b[2]_clock_1, W2_q_b[2]_clock_enable_0, , W2_q_b[2]_clear_0, ); W2_q_b[2]_PORT_B_data_out_reg = DFFE(W2_q_b[2]_PORT_B_data_out, W2_q_b[2]_clock_1, , , ); W2_q_b[10] = W2_q_b[2]_PORT_B_data_out_reg[1]; --G1_bus_dout_10 is general_config_notri:nic_notri|bus_dout_10 --operation mode is normal G1_bus_dout_10 = G1_nx475 # !N1_request_44 & G1_nx536 & G1_nx537; --B1_bus_dout_10 is clkpre_counter:cp|bus_dout_10 --operation mode is normal B1_bus_dout_10 = B1_nx748 # B1_nx749 # B1_nx826 # B1_nx883; --E2_bus_dout_10 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_10 --operation mode is normal E2_bus_dout_10_lut_out = S3_dout_10; E2_bus_dout_10 = DFFEAS(E2_bus_dout_10_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_10 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_10 --operation mode is normal E1_bus_dout_10_lut_out = S2_dout_10; E1_bus_dout_10 = DFFEAS(E1_bus_dout_10_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_10 is jtag_master_1_notri:jtag_dut_notri|bus_dout_10 --operation mode is normal D1_bus_dout_10_lut_out = S1_dout_10; D1_bus_dout_10 = DFFEAS(D1_bus_dout_10_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_1 is ni2dpm_12:ni_ni_pos|data_2p_1 --operation mode is normal F2_data_2p_1 = G1_ni_sel_p_1 & (F2_ex_p_q1pass_1) # !G1_ni_sel_p_1 & (F2_nx370 & (F2_ex_p_q1pass_1) # !F2_nx370 & F2_ex_p_q1pass_2); --G1_nx478 is general_config_notri:nic_notri|nx478 --operation mode is normal G1_nx478 = G1_nx506 & (G1_nx479 # G1_se1_cnt_1 & G1_nx507); --G1_nx534 is general_config_notri:nic_notri|nx534 --operation mode is normal G1_nx534 = N1_request_43 # G1_nx480 # !N1_request_42 & G1_nx446; --G1_nx535 is general_config_notri:nic_notri|nx535 --operation mode is normal G1_nx535 = DUT_P4_D[9] & !N1_request_42 & N1_request_41 # !N1_request_43; --B1_nx751 is clkpre_counter:cp|nx751 --operation mode is normal B1_nx751 = B1_dout0pcnt_9 & (B1_nx798 # B1_dout2pcnt_9 & B1_nx797) # !B1_dout0pcnt_9 & B1_dout2pcnt_9 & B1_nx797; --B1_nx752 is clkpre_counter:cp|nx752 --operation mode is normal B1_nx752 = B1_L0time_9 & (B1_nx801 # B1_L2time_9 & B1_nx802) # !B1_L0time_9 & B1_L2time_9 & (B1_nx802); --B1_nx827 is clkpre_counter:cp|nx827 --operation mode is normal B1_nx827 = B1_dout1pcnt_9 & (B1_nx795 # B1_dout3pcnt_9 & B1_nx796) # !B1_dout1pcnt_9 & B1_dout3pcnt_9 & (B1_nx796); --B1_nx882 is clkpre_counter:cp|nx882 --operation mode is normal B1_nx882 = B1_nx753 # B1_dout_ccnt_9 & B1_nx794; --S3_dout_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_9 --operation mode is normal S3_dout_9 = N1_request_46 & S3_NI_P1_D_8 # !N1_request_46 & (S3_nx264 # S3_nx265); --S2_dout_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_9 --operation mode is normal S2_dout_9 = N1_request_46 & S2_NI_P1_D_8 # !N1_request_46 & (S2_nx264 # S2_nx265); --S1_dout_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_9 --operation mode is normal S1_dout_9 = N1_request_46 & S1_NI_P1_D_8 # !N1_request_46 & (S1_nx264 # S1_nx265); --F2_oa_ctrl_s is ni2dpm_12:ni_ni_pos|oa_ctrl_s --operation mode is normal F2_oa_ctrl_s_lut_out = DUT_OA_CTR; F2_oa_ctrl_s = DFFEAS(F2_oa_ctrl_s_lut_out, GLOBAL(DUT_P4_STR), VCC, , , , , , ); --F2_we_p is ni2dpm_12:ni_ni_pos|we_p --operation mode is normal F2_we_p_lut_out = !F2_NOT_we_p_r & (F2_nx364 # F2_nx365 # F2_nx366); F2_we_p = DFFEAS(F2_we_p_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_ex_p_q1pass_1 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_1 --operation mode is normal F2_ex_p_q1pass_1 = G1_ni_sel_s_1 & (F2_data_1p_m_1) # !G1_ni_sel_s_1 & (F2_nx371 & (F2_data_1p_m_1) # !F2_nx371 & F2_data_1p_m_2); --F2_ex_p_q1pass_0 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_0 --operation mode is normal F2_ex_p_q1pass_0 = F2_ex_p_modgen_gt_597_nx56 & (G1_ni_or_mask_0 # F2_nx369) # !F2_ex_p_modgen_gt_597_nx56 & (F2_data_1p_m_1); --F2_ex_p_modgen_gt_612_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_612_nx56 --operation mode is normal F2_ex_p_modgen_gt_612_nx56 = G1_ni_sel_p_2 # G1_ni_sel_p_1 # !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --G1_se1_cnt_0 is general_config_notri:nic_notri|se1_cnt_0 --operation mode is arithmetic G1_se1_cnt_0_lut_out = G1_se1_cnt_0 $ G1_NOT_nx2073; G1_se1_cnt_0 = DFFEAS(G1_se1_cnt_0_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx9 is general_config_notri:nic_notri|se1_cnt_nx9 --operation mode is arithmetic G1_se1_cnt_nx9 = CARRY(G1_se1_cnt_0 & G1_NOT_nx2073); --G1_nx482 is general_config_notri:nic_notri|nx482 --operation mode is normal G1_nx482 = !N1_request_43 & (N1_request_42 & (G1_ni_or_mask_8) # !N1_request_42 & G1_ni_oase_mode); --G1_nx445 is general_config_notri:nic_notri|nx445 --operation mode is normal G1_nx445 = N1_request_41 & (N1_request_48 & F1_par_cnt_8 # !N1_request_48 & (F1_naddr_8)); --G1_nx483 is general_config_notri:nic_notri|nx483 --operation mode is normal G1_nx483 = N1_request_42 & !N1_request_41 & DUT_SEBD_0; --B1_dout0pcnt_8 is clkpre_counter:cp|dout0pcnt_8 --operation mode is arithmetic B1_dout0pcnt_8_lut_out = B1_dout0pcnt_8 $ P1_CLEAR; B1_dout0pcnt_8 = DFFEAS(B1_dout0pcnt_8_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_2_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_2_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_2_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_8 & P1_CLEAR); --B1_dout2pcnt_8 is clkpre_counter:cp|dout2pcnt_8 --operation mode is arithmetic B1_dout2pcnt_8_lut_out = B1_dout2pcnt_8 $ P3_CLEAR; B1_dout2pcnt_8 = DFFEAS(B1_dout2pcnt_8_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_2_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_2_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_2_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_8 & P3_CLEAR); --B1_dout1pcnt_8 is clkpre_counter:cp|dout1pcnt_8 --operation mode is arithmetic B1_dout1pcnt_8_lut_out = B1_dout1pcnt_8 $ P2_CLEAR; B1_dout1pcnt_8 = DFFEAS(B1_dout1pcnt_8_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_2_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_2_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_2_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_8 & P2_CLEAR); --B1_dout3pcnt_8 is clkpre_counter:cp|dout3pcnt_8 --operation mode is arithmetic B1_dout3pcnt_8_lut_out = B1_dout3pcnt_8 $ P4_CLEAR; B1_dout3pcnt_8 = DFFEAS(B1_dout3pcnt_8_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_2_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_2_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_2_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_8 & P4_CLEAR); --B1_dout_ccnt_8 is clkpre_counter:cp|dout_ccnt_8 --operation mode is arithmetic B1_dout_ccnt_8_lut_out = B1_dout_ccnt_8 $ B1_ccnt_count_en_1; B1_dout_ccnt_8 = DFFEAS(B1_dout_ccnt_8_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx10 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx10 = CARRY(B1_dout_ccnt_8 & B1_ccnt_count_en_1); --B1_nx756 is clkpre_counter:cp|nx756 --operation mode is normal B1_nx756 = B1_L1time_8 & (B1_nx799 # B1_c_time_8 & B1_nx800) # !B1_L1time_8 & B1_c_time_8 & (B1_nx800); --S3_nx262 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx262 --operation mode is normal S3_nx262 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_8; --S3_nx263 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx263 --operation mode is normal S3_nx263 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_8) # !N1_request_48 & S3_NI_P0_D_8); --S2_nx262 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx262 --operation mode is normal S2_nx262 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_8; --S2_nx263 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx263 --operation mode is normal S2_nx263 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_8) # !N1_request_48 & S2_NI_P0_D_8); --S1_nx262 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx262 --operation mode is normal S1_nx262 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_8; --S1_nx263 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx263 --operation mode is normal S1_nx263 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_8) # !N1_request_48 & S1_NI_P0_D_8); --F1_par_cnt_7 is ni2dpm_12:ni_ni_neg|par_cnt_7 --operation mode is arithmetic F1_par_cnt_7_carry_eqn = F1_parc_Q_nx44; F1_par_cnt_7_lut_out = F1_par_cnt_7 $ (F1_par_cnt_7_carry_eqn); F1_par_cnt_7 = DFFEAS(F1_par_cnt_7_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx48 is ni2dpm_12:ni_ni_neg|parc_Q_nx48 --operation mode is arithmetic F1_parc_Q_nx48 = CARRY(!F1_parc_Q_nx44 # !F1_par_cnt_7); --S3_nx260 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx260 --operation mode is normal S3_nx260 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_7; --S3_nx261 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx261 --operation mode is normal S3_nx261 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_7) # !N1_request_48 & S3_NI_P0_D_7); --S2_nx260 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx260 --operation mode is normal S2_nx260 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_7; --S2_nx261 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx261 --operation mode is normal S2_nx261 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_7) # !N1_request_48 & S2_NI_P0_D_7); --S1_nx260 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx260 --operation mode is normal S1_nx260 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_7; --S1_nx261 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx261 --operation mode is normal S1_nx261 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_7) # !N1_request_48 & S1_NI_P0_D_7); --S3_NI_P3_D_2 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_2 --operation mode is normal S3_NI_P3_D_2_lut_out = S3_NI_P3_D_1; S3_NI_P3_D_2 = DFFEAS(S3_NI_P3_D_2_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_2 --operation mode is normal S2_NI_P3_D_2_lut_out = S2_NI_P3_D_1; S2_NI_P3_D_2 = DFFEAS(S2_NI_P3_D_2_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_2 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_2 --operation mode is normal S1_NI_P3_D_2_lut_out = S1_NI_P3_D_1; S1_NI_P3_D_2 = DFFEAS(S1_NI_P3_D_2_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_15 is scsn_slave_nw_dll_ob1_ob_data_15 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_15_lut_out = scsn_slave_nw_dll_ob1_ob_data_14; scsn_slave_nw_dll_ob1_ob_data_15 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_15_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_15, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_16 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_16 --operation mode is normal Y2_d_to_dll_16 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_16 # !Y2_current_state_0 & (J1_reply_16)); --D1_jtgsnd_ser_t_21 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_21 --operation mode is normal D1_jtgsnd_ser_t_21_lut_out = D1_jtgsnd_ser_t_20; D1_jtgsnd_ser_t_21 = DFFEAS(D1_jtgsnd_ser_t_21_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_11, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_21 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_21 --operation mode is normal E1_jtgsnd_ser_t_21_lut_out = E1_jtgsnd_ser_t_20; E1_jtgsnd_ser_t_21 = DFFEAS(E1_jtgsnd_ser_t_21_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_11, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_21 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_21 --operation mode is normal E2_jtgsnd_ser_t_21_lut_out = E2_jtgsnd_ser_t_20; E2_jtgsnd_ser_t_21 = DFFEAS(E2_jtgsnd_ser_t_21_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_11, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_14 is scsn_slave_nw_dll_ob0_ob_data_14 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_14_lut_out = scsn_slave_nw_dll_ob0_ob_data_13; scsn_slave_nw_dll_ob0_ob_data_14 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_14_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_14, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_15 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_15 --operation mode is normal Y1_d_to_dll_15 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_15 # !Y1_current_state_0 & (J1_reply_15)); --J1_reply_16 is mcm_nw_apl:scsn_slave_nw_apl|reply_16 --operation mode is normal J1_reply_16 = N1_request_16 & (J1_a_0_dup_54 # J1_read_data_15 & !J1_ix34_ix30_nx12) # !N1_request_16 & J1_read_data_15 & (!J1_ix34_ix30_nx12); --J1_read_data_14 is mcm_nw_apl:scsn_slave_nw_apl|read_data_14 --operation mode is normal J1_read_data_14_lut_out = C1_bus_dout_14; J1_read_data_14 = DFFEAS(J1_read_data_14_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_13 is gio_devices:gio|bus_dout_13 --operation mode is normal C1_bus_dout_13_lut_out = C1_nx259 # C1_nx260 # C1_nx261; C1_bus_dout_13 = DFFEAS(C1_bus_dout_13_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx262 is gio_devices:gio|nx262 --operation mode is normal C1_nx262 = W2_q_b[4] & (C1_sel_5 # G1_bus_dout_12 & C1_ce_gen) # !W2_q_b[4] & G1_bus_dout_12 & (C1_ce_gen); --C1_nx263 is gio_devices:gio|nx263 --operation mode is normal C1_nx263 = B1_bus_dout_12 & (C1_ce_cp # E2_bus_dout_12 & C1_ce_ni_jtg_up) # !B1_bus_dout_12 & E2_bus_dout_12 & (C1_ce_ni_jtg_up); --C1_nx264 is gio_devices:gio|nx264 --operation mode is normal C1_nx264 = E1_bus_dout_12 & (C1_ce_ni_jtg_dn # D1_bus_dout_12 & C1_ce_dut_jtg) # !E1_bus_dout_12 & D1_bus_dout_12 & (C1_ce_dut_jtg); --W2_q_b[3] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[3] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[3]_PORT_A_data_in = F2_data_2p_3; W2_q_b[3]_PORT_A_data_in_reg = DFFE(W2_q_b[3]_PORT_A_data_in, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[3]_PORT_A_address_reg = DFFE(W2_q_b[3]_PORT_A_address, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[3]_PORT_B_address_reg = DFFE(W2_q_b[3]_PORT_B_address, W2_q_b[3]_clock_1, , , ); W2_q_b[3]_PORT_A_write_enable = VCC; W2_q_b[3]_PORT_A_write_enable_reg = DFFE(W2_q_b[3]_PORT_A_write_enable, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_B_read_enable = VCC; W2_q_b[3]_PORT_B_read_enable_reg = DFFE(W2_q_b[3]_PORT_B_read_enable, W2_q_b[3]_clock_1, , , ); W2_q_b[3]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[3]_clock_1 = X1__clk0; W2_q_b[3]_clock_enable_0 = F2_we_eff; W2_q_b[3]_clear_0 = !G1_NOT_ni_clear; W2_q_b[3]_PORT_B_data_out = MEMORY(W2_q_b[3]_PORT_A_data_in_reg, , W2_q_b[3]_PORT_A_address_reg, W2_q_b[3]_PORT_B_address_reg, W2_q_b[3]_PORT_A_write_enable_reg, W2_q_b[3]_PORT_B_read_enable_reg, , , W2_q_b[3]_clock_0, W2_q_b[3]_clock_1, W2_q_b[3]_clock_enable_0, , W2_q_b[3]_clear_0, ); W2_q_b[3]_PORT_B_data_out_reg = DFFE(W2_q_b[3]_PORT_B_data_out, W2_q_b[3]_clock_1, , , ); W2_q_b[3] = W2_q_b[3]_PORT_B_data_out_reg[0]; --W2_q_b[11] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[11] W2_q_b[3]_PORT_A_data_in = F2_data_2p_3; W2_q_b[3]_PORT_A_data_in_reg = DFFE(W2_q_b[3]_PORT_A_data_in, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[3]_PORT_A_address_reg = DFFE(W2_q_b[3]_PORT_A_address, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[3]_PORT_B_address_reg = DFFE(W2_q_b[3]_PORT_B_address, W2_q_b[3]_clock_1, , , ); W2_q_b[3]_PORT_A_write_enable = VCC; W2_q_b[3]_PORT_A_write_enable_reg = DFFE(W2_q_b[3]_PORT_A_write_enable, W2_q_b[3]_clock_0, W2_q_b[3]_clear_0, , W2_q_b[3]_clock_enable_0); W2_q_b[3]_PORT_B_read_enable = VCC; W2_q_b[3]_PORT_B_read_enable_reg = DFFE(W2_q_b[3]_PORT_B_read_enable, W2_q_b[3]_clock_1, , , ); W2_q_b[3]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[3]_clock_1 = X1__clk0; W2_q_b[3]_clock_enable_0 = F2_we_eff; W2_q_b[3]_clear_0 = !G1_NOT_ni_clear; W2_q_b[3]_PORT_B_data_out = MEMORY(W2_q_b[3]_PORT_A_data_in_reg, , W2_q_b[3]_PORT_A_address_reg, W2_q_b[3]_PORT_B_address_reg, W2_q_b[3]_PORT_A_write_enable_reg, W2_q_b[3]_PORT_B_read_enable_reg, , , W2_q_b[3]_clock_0, W2_q_b[3]_clock_1, W2_q_b[3]_clock_enable_0, , W2_q_b[3]_clear_0, ); W2_q_b[3]_PORT_B_data_out_reg = DFFE(W2_q_b[3]_PORT_B_data_out, W2_q_b[3]_clock_1, , , ); W2_q_b[11] = W2_q_b[3]_PORT_B_data_out_reg[1]; --G1_bus_dout_11 is general_config_notri:nic_notri|bus_dout_11 --operation mode is normal G1_bus_dout_11 = G1_nx448 # G1_nx449 # DUT_OA_CTR & !G1_ix69_ix18_nx12; --B1_bus_dout_11 is clkpre_counter:cp|bus_dout_11 --operation mode is normal B1_bus_dout_11 = B1_nx745 # B1_nx746 # B1_nx825 # B1_nx884; --E2_bus_dout_11 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_11 --operation mode is normal E2_bus_dout_11_lut_out = S3_dout_11; E2_bus_dout_11 = DFFEAS(E2_bus_dout_11_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_11 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_11 --operation mode is normal E1_bus_dout_11_lut_out = S2_dout_11; E1_bus_dout_11 = DFFEAS(E1_bus_dout_11_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_11 is jtag_master_1_notri:jtag_dut_notri|bus_dout_11 --operation mode is normal D1_bus_dout_11_lut_out = S1_dout_11; D1_bus_dout_11 = DFFEAS(D1_bus_dout_11_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_2 is ni2dpm_12:ni_ni_pos|data_2p_2 --operation mode is normal F2_data_2p_2 = F2_ex_p_modgen_gt_608_nx56 & (F2_ex_p_q1pass_2) # !F2_ex_p_modgen_gt_608_nx56 & F2_ex_p_q1pass_3; --G1_nx475 is general_config_notri:nic_notri|nx475 --operation mode is normal G1_nx475 = G1_nx506 & (G1_nx476 # G1_se1_cnt_2 & G1_nx507); --G1_nx536 is general_config_notri:nic_notri|nx536 --operation mode is normal G1_nx536 = N1_request_43 # G1_nx477 # !N1_request_42 & G1_nx447; --G1_nx537 is general_config_notri:nic_notri|nx537 --operation mode is normal G1_nx537 = !N1_request_42 & N1_request_41 & GLOBAL(DUT_P4_STR) # !N1_request_43; --B1_nx748 is clkpre_counter:cp|nx748 --operation mode is normal B1_nx748 = B1_dout0pcnt_10 & (B1_nx798 # B1_dout2pcnt_10 & B1_nx797) # !B1_dout0pcnt_10 & B1_dout2pcnt_10 & B1_nx797; --B1_nx749 is clkpre_counter:cp|nx749 --operation mode is normal B1_nx749 = B1_L0time_10 & (B1_nx801 # B1_L2time_10 & B1_nx802) # !B1_L0time_10 & B1_L2time_10 & (B1_nx802); --B1_nx826 is clkpre_counter:cp|nx826 --operation mode is normal B1_nx826 = B1_dout1pcnt_10 & (B1_nx795 # B1_dout3pcnt_10 & B1_nx796) # !B1_dout1pcnt_10 & B1_dout3pcnt_10 & (B1_nx796); --B1_nx883 is clkpre_counter:cp|nx883 --operation mode is normal B1_nx883 = B1_nx750 # B1_dout_ccnt_10 & B1_nx794; --S3_dout_10 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_10 --operation mode is normal S3_dout_10 = N1_request_46 & S3_NI_P1_D_7 # !N1_request_46 & (S3_nx266 # S3_nx267); --S2_dout_10 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_10 --operation mode is normal S2_dout_10 = N1_request_46 & S2_NI_P1_D_7 # !N1_request_46 & (S2_nx266 # S2_nx267); --S1_dout_10 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_10 --operation mode is normal S1_dout_10 = N1_request_46 & S1_NI_P1_D_7 # !N1_request_46 & (S1_nx266 # S1_nx267); --F2_ex_p_q1pass_2 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_2 --operation mode is normal F2_ex_p_q1pass_2 = F2_ex_p_modgen_gt_595_nx56 & (F2_data_1p_m_2) # !F2_ex_p_modgen_gt_595_nx56 & F2_data_1p_m_3; --F2_nx370 is ni2dpm_12:ni_ni_pos|nx370 --operation mode is normal F2_nx370 = G1_ni_sel_p_2 # !G1_NOT_ni_sel_p_3; --G1_se1_cnt_1 is general_config_notri:nic_notri|se1_cnt_1 --operation mode is arithmetic G1_se1_cnt_1_carry_eqn = G1_se1_cnt_nx9; G1_se1_cnt_1_lut_out = G1_se1_cnt_1 $ (G1_se1_cnt_1_carry_eqn); G1_se1_cnt_1 = DFFEAS(G1_se1_cnt_1_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx15 is general_config_notri:nic_notri|se1_cnt_nx15 --operation mode is arithmetic G1_se1_cnt_nx15 = CARRY(!G1_se1_cnt_nx9 # !G1_se1_cnt_1); --G1_nx479 is general_config_notri:nic_notri|nx479 --operation mode is normal G1_nx479 = !N1_request_43 & (N1_request_42 & (G1_ni_or_mask_9) # !N1_request_42 & G1_ni_ctrl_jtag); --G1_nx446 is general_config_notri:nic_notri|nx446 --operation mode is normal G1_nx446 = N1_request_41 & (N1_request_48 & F1_par_cnt_9 # !N1_request_48 & (F1_naddr_9)); --G1_nx480 is general_config_notri:nic_notri|nx480 --operation mode is normal G1_nx480 = N1_request_42 & !N1_request_41 & DUT_SEBD_1; --B1_dout0pcnt_9 is clkpre_counter:cp|dout0pcnt_9 --operation mode is arithmetic B1_dout0pcnt_9_carry_eqn = B1_pcnt0_cnt_2_cnt_i_Q_nx10; B1_dout0pcnt_9_lut_out = B1_dout0pcnt_9 $ (B1_dout0pcnt_9_carry_eqn); B1_dout0pcnt_9 = DFFEAS(B1_dout0pcnt_9_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_2_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_2_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_2_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_2_cnt_i_Q_nx10 # !B1_dout0pcnt_9); --B1_dout2pcnt_9 is clkpre_counter:cp|dout2pcnt_9 --operation mode is arithmetic B1_dout2pcnt_9_carry_eqn = B1_pcnt2_cnt_2_cnt_i_Q_nx10; B1_dout2pcnt_9_lut_out = B1_dout2pcnt_9 $ (B1_dout2pcnt_9_carry_eqn); B1_dout2pcnt_9 = DFFEAS(B1_dout2pcnt_9_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_2_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_2_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_2_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_2_cnt_i_Q_nx10 # !B1_dout2pcnt_9); --B1_dout1pcnt_9 is clkpre_counter:cp|dout1pcnt_9 --operation mode is arithmetic B1_dout1pcnt_9_carry_eqn = B1_pcnt1_cnt_2_cnt_i_Q_nx10; B1_dout1pcnt_9_lut_out = B1_dout1pcnt_9 $ (B1_dout1pcnt_9_carry_eqn); B1_dout1pcnt_9 = DFFEAS(B1_dout1pcnt_9_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_2_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_2_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_2_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_2_cnt_i_Q_nx10 # !B1_dout1pcnt_9); --B1_dout3pcnt_9 is clkpre_counter:cp|dout3pcnt_9 --operation mode is arithmetic B1_dout3pcnt_9_carry_eqn = B1_pcnt3_cnt_2_cnt_i_Q_nx10; B1_dout3pcnt_9_lut_out = B1_dout3pcnt_9 $ (B1_dout3pcnt_9_carry_eqn); B1_dout3pcnt_9 = DFFEAS(B1_dout3pcnt_9_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_2_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_2_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_2_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_2_cnt_i_Q_nx10 # !B1_dout3pcnt_9); --B1_dout_ccnt_9 is clkpre_counter:cp|dout_ccnt_9 --operation mode is arithmetic B1_dout_ccnt_9_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx10; B1_dout_ccnt_9_lut_out = B1_dout_ccnt_9 $ (B1_dout_ccnt_9_carry_eqn); B1_dout_ccnt_9 = DFFEAS(B1_dout_ccnt_9_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx16 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx16 = CARRY(!B1_ccnt_cnt_1_cnt_i_Q_nx10 # !B1_dout_ccnt_9); --B1_nx753 is clkpre_counter:cp|nx753 --operation mode is normal B1_nx753 = B1_L1time_9 & (B1_nx799 # B1_c_time_9 & B1_nx800) # !B1_L1time_9 & B1_c_time_9 & (B1_nx800); --S3_nx264 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx264 --operation mode is normal S3_nx264 = N1_request_47 & !N1_request_48 & S3_NI_P4_D_9; --S3_nx265 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx265 --operation mode is normal S3_nx265 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_D_9) # !N1_request_48 & S3_NI_P0_D_9); --S2_nx264 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx264 --operation mode is normal S2_nx264 = N1_request_47 & !N1_request_48 & S2_NI_P4_D_9; --S2_nx265 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx265 --operation mode is normal S2_nx265 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_D_9) # !N1_request_48 & S2_NI_P0_D_9); --S1_nx264 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx264 --operation mode is normal S1_nx264 = N1_request_47 & !N1_request_48 & S1_NI_P4_D_9; --S1_nx265 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx265 --operation mode is normal S1_nx265 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_D_9) # !N1_request_48 & S1_NI_P0_D_9); --F2_NOT_we_p_r is ni2dpm_12:ni_ni_pos|NOT_we_p_r --operation mode is normal F2_NOT_we_p_r_lut_out = VCC; F2_NOT_we_p_r = DFFEAS(F2_NOT_we_p_r_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , F2_NOT_modgen_eq_588_nx44, , , , ); --F2_nx364 is ni2dpm_12:ni_ni_pos|nx364 --operation mode is normal F2_nx364 = F2_naddr_11 # !F2_naddr_8 # !F2_naddr_9 # !F2_naddr_10; --F2_nx365 is ni2dpm_12:ni_ni_pos|nx365 --operation mode is normal F2_nx365 = !F2_naddr_4 # !F2_naddr_5 # !F2_naddr_6 # !F2_naddr_7; --F2_nx366 is ni2dpm_12:ni_ni_pos|nx366 --operation mode is normal F2_nx366 = !F2_naddr_0 # !F2_naddr_1 # !F2_naddr_2 # !F2_naddr_3; --F2_data_1p_m_2 is ni2dpm_12:ni_ni_pos|data_1p_m_2 --operation mode is normal F2_data_1p_m_2 = G1_ni_or_mask_2 # !G1_NOT_ni_and_mask_2 & (G1_ni_xor_mask_2 $ F2_data_1p_2); --F2_data_1p_m_1 is ni2dpm_12:ni_ni_pos|data_1p_m_1 --operation mode is normal F2_data_1p_m_1 = G1_ni_or_mask_1 # !G1_NOT_ni_and_mask_1 & (G1_ni_xor_mask_1 $ F2_data_1p_1); --F2_nx371 is ni2dpm_12:ni_ni_pos|nx371 --operation mode is normal F2_nx371 = G1_ni_sel_s_2 # !G1_NOT_ni_sel_s_3; --F2_ex_p_modgen_gt_597_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_597_nx56 --operation mode is normal F2_ex_p_modgen_gt_597_nx56 = G1_ni_sel_s_2 # G1_ni_sel_s_1 # G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --F2_nx369 is ni2dpm_12:ni_ni_pos|nx369 --operation mode is normal F2_nx369 = !G1_NOT_ni_and_mask_0 & (G1_ni_xor_mask_0 $ F2_data_1p_0); --G1_NOT_nx2073 is general_config_notri:nic_notri|NOT_nx2073 --operation mode is normal G1_NOT_nx2073 = !DUT_SEBD_1 & !G1_modgen_eq_785_nx12 & (G1_nx435 # G1_nx436); --F1_par_cnt_8 is ni2dpm_12:ni_ni_neg|par_cnt_8 --operation mode is arithmetic F1_par_cnt_8_carry_eqn = F1_parc_Q_nx48; F1_par_cnt_8_lut_out = F1_par_cnt_8 $ (!F1_par_cnt_8_carry_eqn); F1_par_cnt_8 = DFFEAS(F1_par_cnt_8_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx52 is ni2dpm_12:ni_ni_neg|parc_Q_nx52 --operation mode is arithmetic F1_parc_Q_nx52 = CARRY(F1_par_cnt_8 & (!F1_parc_Q_nx48)); --B1_ccnt_count_en_1 is clkpre_counter:cp|ccnt_count_en_1 --operation mode is normal B1_ccnt_count_en_1_lut_out = B1_ccnt_count_en_c; B1_ccnt_count_en_1 = DFFEAS(B1_ccnt_count_en_1_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --S3_NI_P4_D_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_8 --operation mode is normal S3_NI_P4_D_8_lut_out = S3_NI_P3_D_5; S3_NI_P4_D_8 = DFFEAS(S3_NI_P4_D_8_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_8 --operation mode is normal S2_NI_P4_D_8_lut_out = S2_NI_P3_D_5; S2_NI_P4_D_8 = DFFEAS(S2_NI_P4_D_8_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_8 --operation mode is normal S1_NI_P4_D_8_lut_out = S1_NI_P3_D_5; S1_NI_P4_D_8 = DFFEAS(S1_NI_P4_D_8_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S3_NI_P4_D_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_7 --operation mode is normal S3_NI_P4_D_7_lut_out = S3_NI_P3_D_3; S3_NI_P4_D_7 = DFFEAS(S3_NI_P4_D_7_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_7 --operation mode is normal S2_NI_P4_D_7_lut_out = S2_NI_P3_D_3; S2_NI_P4_D_7 = DFFEAS(S2_NI_P4_D_7_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_7 --operation mode is normal S1_NI_P4_D_7_lut_out = S1_NI_P3_D_3; S1_NI_P4_D_7 = DFFEAS(S1_NI_P4_D_7_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S3_NI_P3_D_1 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_1 --operation mode is normal S3_NI_P3_D_1_lut_out = S3_NI_P4_D_5; S3_NI_P3_D_1 = DFFEAS(S3_NI_P3_D_1_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_1 --operation mode is normal S2_NI_P3_D_1_lut_out = S2_NI_P4_D_5; S2_NI_P3_D_1 = DFFEAS(S2_NI_P3_D_1_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_1 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_1 --operation mode is normal S1_NI_P3_D_1_lut_out = S1_NI_P4_D_5; S1_NI_P3_D_1 = DFFEAS(S1_NI_P3_D_1_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_14 is scsn_slave_nw_dll_ob1_ob_data_14 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_14_lut_out = scsn_slave_nw_dll_ob1_ob_data_13; scsn_slave_nw_dll_ob1_ob_data_14 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_14_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_14, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_15 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_15 --operation mode is normal Y2_d_to_dll_15 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_15 # !Y2_current_state_0 & (J1_reply_15)); --D1_jtgsnd_ser_t_20 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_20 --operation mode is normal D1_jtgsnd_ser_t_20_lut_out = D1_jtgsnd_ser_t_19; D1_jtgsnd_ser_t_20 = DFFEAS(D1_jtgsnd_ser_t_20_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_25, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_20 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_20 --operation mode is normal E1_jtgsnd_ser_t_20_lut_out = E1_jtgsnd_ser_t_19; E1_jtgsnd_ser_t_20 = DFFEAS(E1_jtgsnd_ser_t_20_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_25, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_20 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_20 --operation mode is normal E2_jtgsnd_ser_t_20_lut_out = E2_jtgsnd_ser_t_19; E2_jtgsnd_ser_t_20 = DFFEAS(E2_jtgsnd_ser_t_20_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_25, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_13 is scsn_slave_nw_dll_ob0_ob_data_13 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_13_lut_out = scsn_slave_nw_dll_ob0_ob_data_12; scsn_slave_nw_dll_ob0_ob_data_13 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_13_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_13, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_14 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_14 --operation mode is normal Y1_d_to_dll_14 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_14 # !Y1_current_state_0 & (J1_reply_14)); --J1_reply_15 is mcm_nw_apl:scsn_slave_nw_apl|reply_15 --operation mode is normal J1_reply_15 = N1_request_15 & (J1_a_0_dup_54 # J1_read_data_16 & !J1_ix34_ix30_nx12) # !N1_request_15 & J1_read_data_16 & (!J1_ix34_ix30_nx12); --J1_read_data_15 is mcm_nw_apl:scsn_slave_nw_apl|read_data_15 --operation mode is normal J1_read_data_15_lut_out = C1_bus_dout_15; J1_read_data_15 = DFFEAS(J1_read_data_15_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_14 is gio_devices:gio|bus_dout_14 --operation mode is normal C1_bus_dout_14_lut_out = C1_nx256 # C1_nx257 # C1_nx258; C1_bus_dout_14 = DFFEAS(C1_bus_dout_14_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx259 is gio_devices:gio|nx259 --operation mode is normal C1_nx259 = W2_q_b[5] & (C1_sel_5 # G1_bus_dout_13 & C1_ce_gen) # !W2_q_b[5] & G1_bus_dout_13 & (C1_ce_gen); --C1_nx260 is gio_devices:gio|nx260 --operation mode is normal C1_nx260 = B1_bus_dout_13 & (C1_ce_cp # E2_bus_dout_13 & C1_ce_ni_jtg_up) # !B1_bus_dout_13 & E2_bus_dout_13 & (C1_ce_ni_jtg_up); --C1_nx261 is gio_devices:gio|nx261 --operation mode is normal C1_nx261 = E1_bus_dout_13 & (C1_ce_ni_jtg_dn # D1_bus_dout_13 & C1_ce_dut_jtg) # !E1_bus_dout_13 & D1_bus_dout_13 & (C1_ce_dut_jtg); --W2_q_b[4] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[4] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[4]_PORT_A_data_in = F2_data_2p_4; W2_q_b[4]_PORT_A_data_in_reg = DFFE(W2_q_b[4]_PORT_A_data_in, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[4]_PORT_A_address_reg = DFFE(W2_q_b[4]_PORT_A_address, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[4]_PORT_B_address_reg = DFFE(W2_q_b[4]_PORT_B_address, W2_q_b[4]_clock_1, , , ); W2_q_b[4]_PORT_A_write_enable = VCC; W2_q_b[4]_PORT_A_write_enable_reg = DFFE(W2_q_b[4]_PORT_A_write_enable, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_B_read_enable = VCC; W2_q_b[4]_PORT_B_read_enable_reg = DFFE(W2_q_b[4]_PORT_B_read_enable, W2_q_b[4]_clock_1, , , ); W2_q_b[4]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[4]_clock_1 = X1__clk0; W2_q_b[4]_clock_enable_0 = F2_we_eff; W2_q_b[4]_clear_0 = !G1_NOT_ni_clear; W2_q_b[4]_PORT_B_data_out = MEMORY(W2_q_b[4]_PORT_A_data_in_reg, , W2_q_b[4]_PORT_A_address_reg, W2_q_b[4]_PORT_B_address_reg, W2_q_b[4]_PORT_A_write_enable_reg, W2_q_b[4]_PORT_B_read_enable_reg, , , W2_q_b[4]_clock_0, W2_q_b[4]_clock_1, W2_q_b[4]_clock_enable_0, , W2_q_b[4]_clear_0, ); W2_q_b[4]_PORT_B_data_out_reg = DFFE(W2_q_b[4]_PORT_B_data_out, W2_q_b[4]_clock_1, , , ); W2_q_b[4] = W2_q_b[4]_PORT_B_data_out_reg[0]; --W2_q_b[12] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[12] W2_q_b[4]_PORT_A_data_in = F2_data_2p_4; W2_q_b[4]_PORT_A_data_in_reg = DFFE(W2_q_b[4]_PORT_A_data_in, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[4]_PORT_A_address_reg = DFFE(W2_q_b[4]_PORT_A_address, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[4]_PORT_B_address_reg = DFFE(W2_q_b[4]_PORT_B_address, W2_q_b[4]_clock_1, , , ); W2_q_b[4]_PORT_A_write_enable = VCC; W2_q_b[4]_PORT_A_write_enable_reg = DFFE(W2_q_b[4]_PORT_A_write_enable, W2_q_b[4]_clock_0, W2_q_b[4]_clear_0, , W2_q_b[4]_clock_enable_0); W2_q_b[4]_PORT_B_read_enable = VCC; W2_q_b[4]_PORT_B_read_enable_reg = DFFE(W2_q_b[4]_PORT_B_read_enable, W2_q_b[4]_clock_1, , , ); W2_q_b[4]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[4]_clock_1 = X1__clk0; W2_q_b[4]_clock_enable_0 = F2_we_eff; W2_q_b[4]_clear_0 = !G1_NOT_ni_clear; W2_q_b[4]_PORT_B_data_out = MEMORY(W2_q_b[4]_PORT_A_data_in_reg, , W2_q_b[4]_PORT_A_address_reg, W2_q_b[4]_PORT_B_address_reg, W2_q_b[4]_PORT_A_write_enable_reg, W2_q_b[4]_PORT_B_read_enable_reg, , , W2_q_b[4]_clock_0, W2_q_b[4]_clock_1, W2_q_b[4]_clock_enable_0, , W2_q_b[4]_clear_0, ); W2_q_b[4]_PORT_B_data_out_reg = DFFE(W2_q_b[4]_PORT_B_data_out, W2_q_b[4]_clock_1, , , ); W2_q_b[12] = W2_q_b[4]_PORT_B_data_out_reg[1]; --G1_bus_dout_12 is general_config_notri:nic_notri|bus_dout_12 --operation mode is normal G1_bus_dout_12 = G1_nx450 # G1_nx474 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_2; --B1_bus_dout_12 is clkpre_counter:cp|bus_dout_12 --operation mode is normal B1_bus_dout_12 = B1_nx742 # B1_nx743 # B1_nx824 # B1_nx885; --E2_bus_dout_12 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_12 --operation mode is normal E2_bus_dout_12_lut_out = S3_dout_12; E2_bus_dout_12 = DFFEAS(E2_bus_dout_12_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_12 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_12 --operation mode is normal E1_bus_dout_12_lut_out = S2_dout_12; E1_bus_dout_12 = DFFEAS(E1_bus_dout_12_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_12 is jtag_master_1_notri:jtag_dut_notri|bus_dout_12 --operation mode is normal D1_bus_dout_12_lut_out = S1_dout_12; D1_bus_dout_12 = DFFEAS(D1_bus_dout_12_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_3 is ni2dpm_12:ni_ni_pos|data_2p_3 --operation mode is normal F2_data_2p_3 = G1_NOT_ni_sel_p_3 & (G1_ni_sel_p_2 & (F2_ex_p_q1pass_3) # !G1_ni_sel_p_2 & F2_ex_p_q1pass_4) # !G1_NOT_ni_sel_p_3 & (F2_ex_p_q1pass_3); --G1_ix69_ix18_nx12 is general_config_notri:nic_notri|ix69_ix18_nx12 --operation mode is normal G1_ix69_ix18_nx12 = N1_request_44 # N1_request_42 # !N1_request_41 # !N1_request_43; --G1_nx448 is general_config_notri:nic_notri|nx448 --operation mode is normal G1_nx448 = !G1_ix69_ix22_nx12 & (N1_request_48 & F1_par_cnt_11 # !N1_request_48 & (F1_naddr_11)); --G1_nx449 is general_config_notri:nic_notri|nx449 --operation mode is normal G1_nx449 = G1_se1_cnt_3 & (G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_1 # !G1_ix69_ix32_nx12) # !G1_se1_cnt_3 & G1_NOT_ix69_ix28_nx12 & (!G1_NOT_ni_and_mask_1); --B1_nx745 is clkpre_counter:cp|nx745 --operation mode is normal B1_nx745 = B1_dout0pcnt_11 & (B1_nx798 # B1_dout2pcnt_11 & B1_nx797) # !B1_dout0pcnt_11 & B1_dout2pcnt_11 & B1_nx797; --B1_nx746 is clkpre_counter:cp|nx746 --operation mode is normal B1_nx746 = B1_L0time_11 & (B1_nx801 # B1_L2time_11 & B1_nx802) # !B1_L0time_11 & B1_L2time_11 & (B1_nx802); --B1_nx825 is clkpre_counter:cp|nx825 --operation mode is normal B1_nx825 = B1_dout1pcnt_11 & (B1_nx795 # B1_dout3pcnt_11 & B1_nx796) # !B1_dout1pcnt_11 & B1_dout3pcnt_11 & (B1_nx796); --B1_nx884 is clkpre_counter:cp|nx884 --operation mode is normal B1_nx884 = B1_nx747 # B1_dout_ccnt_11 & B1_nx794; --S3_dout_11 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_11 --operation mode is normal S3_dout_11 = S3_nx237 # N1_request_46 & S3_NI_P0_CTRL; --S2_dout_11 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_11 --operation mode is normal S2_dout_11 = S2_nx237 # N1_request_46 & S2_NI_P0_CTRL; --S1_dout_11 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_11 --operation mode is normal S1_dout_11 = S1_nx237 # N1_request_46 & S1_NI_P0_CTRL; --F2_ex_p_q1pass_3 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_3 --operation mode is normal F2_ex_p_q1pass_3 = G1_NOT_ni_sel_s_3 & (G1_ni_sel_s_2 & (F2_data_1p_m_3) # !G1_ni_sel_s_2 & F2_data_1p_m_4) # !G1_NOT_ni_sel_s_3 & (F2_data_1p_m_3); --F2_ex_p_modgen_gt_608_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_608_nx56 --operation mode is normal F2_ex_p_modgen_gt_608_nx56 = G1_ni_sel_p_2 # G1_ni_sel_p_1 & !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --G1_se1_cnt_2 is general_config_notri:nic_notri|se1_cnt_2 --operation mode is arithmetic G1_se1_cnt_2_carry_eqn = G1_se1_cnt_nx15; G1_se1_cnt_2_lut_out = G1_se1_cnt_2 $ (!G1_se1_cnt_2_carry_eqn); G1_se1_cnt_2 = DFFEAS(G1_se1_cnt_2_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx21 is general_config_notri:nic_notri|se1_cnt_nx21 --operation mode is arithmetic G1_se1_cnt_nx21 = CARRY(G1_se1_cnt_2 & (!G1_se1_cnt_nx15)); --G1_nx476 is general_config_notri:nic_notri|nx476 --operation mode is normal G1_nx476 = !N1_request_43 & (N1_request_42 & (!G1_NOT_ni_and_mask_0) # !N1_request_42 & G1_ni_jtag_mode); --G1_nx447 is general_config_notri:nic_notri|nx447 --operation mode is normal G1_nx447 = N1_request_41 & (N1_request_48 & F1_par_cnt_10 # !N1_request_48 & (F1_naddr_10)); --G1_nx477 is general_config_notri:nic_notri|nx477 --operation mode is normal G1_nx477 = N1_request_42 & !N1_request_41 & DUT_SEBD_2; --B1_dout0pcnt_10 is clkpre_counter:cp|dout0pcnt_10 --operation mode is arithmetic B1_dout0pcnt_10_carry_eqn = B1_pcnt0_cnt_2_cnt_i_Q_nx16; B1_dout0pcnt_10_lut_out = B1_dout0pcnt_10 $ (!B1_dout0pcnt_10_carry_eqn); B1_dout0pcnt_10 = DFFEAS(B1_dout0pcnt_10_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_2_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_2_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_2_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_10 & (!B1_pcnt0_cnt_2_cnt_i_Q_nx16)); --B1_dout2pcnt_10 is clkpre_counter:cp|dout2pcnt_10 --operation mode is arithmetic B1_dout2pcnt_10_carry_eqn = B1_pcnt2_cnt_2_cnt_i_Q_nx16; B1_dout2pcnt_10_lut_out = B1_dout2pcnt_10 $ (!B1_dout2pcnt_10_carry_eqn); B1_dout2pcnt_10 = DFFEAS(B1_dout2pcnt_10_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_2_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_2_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_2_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_10 & (!B1_pcnt2_cnt_2_cnt_i_Q_nx16)); --B1_dout1pcnt_10 is clkpre_counter:cp|dout1pcnt_10 --operation mode is arithmetic B1_dout1pcnt_10_carry_eqn = B1_pcnt1_cnt_2_cnt_i_Q_nx16; B1_dout1pcnt_10_lut_out = B1_dout1pcnt_10 $ (!B1_dout1pcnt_10_carry_eqn); B1_dout1pcnt_10 = DFFEAS(B1_dout1pcnt_10_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_2_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_2_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_2_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_10 & (!B1_pcnt1_cnt_2_cnt_i_Q_nx16)); --B1_dout3pcnt_10 is clkpre_counter:cp|dout3pcnt_10 --operation mode is arithmetic B1_dout3pcnt_10_carry_eqn = B1_pcnt3_cnt_2_cnt_i_Q_nx16; B1_dout3pcnt_10_lut_out = B1_dout3pcnt_10 $ (!B1_dout3pcnt_10_carry_eqn); B1_dout3pcnt_10 = DFFEAS(B1_dout3pcnt_10_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_2_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_2_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_2_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_10 & (!B1_pcnt3_cnt_2_cnt_i_Q_nx16)); --B1_dout_ccnt_10 is clkpre_counter:cp|dout_ccnt_10 --operation mode is arithmetic B1_dout_ccnt_10_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx16; B1_dout_ccnt_10_lut_out = B1_dout_ccnt_10 $ (!B1_dout_ccnt_10_carry_eqn); B1_dout_ccnt_10 = DFFEAS(B1_dout_ccnt_10_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx22 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx22 = CARRY(B1_dout_ccnt_10 & (!B1_ccnt_cnt_1_cnt_i_Q_nx16)); --B1_nx750 is clkpre_counter:cp|nx750 --operation mode is normal B1_nx750 = B1_L1time_10 & (B1_nx799 # B1_c_time_10 & B1_nx800) # !B1_L1time_10 & B1_c_time_10 & (B1_nx800); --S3_nx266 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx266 --operation mode is normal S3_nx266 = N1_request_47 & !N1_request_48 & S3_NI_P4_STRB; --S3_nx267 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx267 --operation mode is normal S3_nx267 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_STRB) # !N1_request_48 & S3_NI_P0_STRB); --S2_nx266 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx266 --operation mode is normal S2_nx266 = N1_request_47 & !N1_request_48 & S2_NI_P4_STRB; --S2_nx267 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx267 --operation mode is normal S2_nx267 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_STRB) # !N1_request_48 & S2_NI_P0_STRB); --S1_nx266 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx266 --operation mode is normal S1_nx266 = N1_request_47 & !N1_request_48 & S1_NI_P4_STRB; --S1_nx267 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx267 --operation mode is normal S1_nx267 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_STRB) # !N1_request_48 & S1_NI_P0_STRB); --F2_data_1p_m_3 is ni2dpm_12:ni_ni_pos|data_1p_m_3 --operation mode is normal F2_data_1p_m_3 = G1_ni_or_mask_3 # !G1_NOT_ni_and_mask_3 & (G1_ni_xor_mask_3 $ F2_data_1p_3); --F2_ex_p_modgen_gt_595_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_595_nx56 --operation mode is normal F2_ex_p_modgen_gt_595_nx56 = G1_ni_sel_s_2 # G1_ni_sel_s_1 & G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --F1_par_cnt_9 is ni2dpm_12:ni_ni_neg|par_cnt_9 --operation mode is arithmetic F1_par_cnt_9_carry_eqn = F1_parc_Q_nx52; F1_par_cnt_9_lut_out = F1_par_cnt_9 $ (F1_par_cnt_9_carry_eqn); F1_par_cnt_9 = DFFEAS(F1_par_cnt_9_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx57 is ni2dpm_12:ni_ni_neg|parc_Q_nx57 --operation mode is arithmetic F1_parc_Q_nx57 = CARRY(!F1_parc_Q_nx52 # !F1_par_cnt_9); --S3_NI_P4_D_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_D_9 --operation mode is normal S3_NI_P4_D_9_lut_out = S3_NI_P3_D_8; S3_NI_P4_D_9 = DFFEAS(S3_NI_P4_D_9_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_D_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_D_9 --operation mode is normal S2_NI_P4_D_9_lut_out = S2_NI_P3_D_8; S2_NI_P4_D_9 = DFFEAS(S2_NI_P4_D_9_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_D_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_D_9 --operation mode is normal S1_NI_P4_D_9_lut_out = S1_NI_P3_D_8; S1_NI_P4_D_9 = DFFEAS(S1_NI_P4_D_9_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_NOT_modgen_eq_588_nx44 is ni2dpm_12:ni_ni_pos|NOT_modgen_eq_588_nx44 --operation mode is normal F2_NOT_modgen_eq_588_nx44 = !F2_nx364 & !F2_nx365 & !F2_nx366; --F2_data_1p_2 is ni2dpm_12:ni_ni_pos|data_1p_2 --operation mode is normal F2_data_1p_2_lut_out = DUT_P4_D[2]; F2_data_1p_2 = DFFEAS(F2_data_1p_2_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_data_1p_1 is ni2dpm_12:ni_ni_pos|data_1p_1 --operation mode is normal F2_data_1p_1_lut_out = DUT_P4_D[1]; F2_data_1p_1 = DFFEAS(F2_data_1p_1_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_data_1p_0 is ni2dpm_12:ni_ni_pos|data_1p_0 --operation mode is normal F2_data_1p_0_lut_out = DUT_P4_D[0]; F2_data_1p_0 = DFFEAS(F2_data_1p_0_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_nx435 is general_config_notri:nic_notri|nx435 --operation mode is normal G1_nx435 = !G1_se1_cnt_3 # !G1_se1_cnt_2 # !G1_se1_cnt_1 # !G1_se1_cnt_0; --G1_nx436 is general_config_notri:nic_notri|nx436 --operation mode is normal G1_nx436 = !G1_se1_cnt_7 # !G1_se1_cnt_6 # !G1_se1_cnt_5 # !G1_se1_cnt_4; --S3_NI_P3_D_5 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_5 --operation mode is normal S3_NI_P3_D_5_lut_out = S3_NI_P3_D_4; S3_NI_P3_D_5 = DFFEAS(S3_NI_P3_D_5_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_5 --operation mode is normal S2_NI_P3_D_5_lut_out = S2_NI_P3_D_4; S2_NI_P3_D_5 = DFFEAS(S2_NI_P3_D_5_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_5 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_5 --operation mode is normal S1_NI_P3_D_5_lut_out = S1_NI_P3_D_4; S1_NI_P3_D_5 = DFFEAS(S1_NI_P3_D_5_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S3_NI_P3_D_3 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_3 --operation mode is normal S3_NI_P3_D_3_lut_out = S3_NI_P4_D_6; S3_NI_P3_D_3 = DFFEAS(S3_NI_P3_D_3_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_3 --operation mode is normal S2_NI_P3_D_3_lut_out = S2_NI_P4_D_6; S2_NI_P3_D_3 = DFFEAS(S2_NI_P3_D_3_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_3 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_3 --operation mode is normal S1_NI_P3_D_3_lut_out = S1_NI_P4_D_6; S1_NI_P3_D_3 = DFFEAS(S1_NI_P3_D_3_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_13 is scsn_slave_nw_dll_ob1_ob_data_13 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_13_lut_out = scsn_slave_nw_dll_ob1_ob_data_12; scsn_slave_nw_dll_ob1_ob_data_13 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_13_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_13, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_14 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_14 --operation mode is normal Y2_d_to_dll_14 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_14 # !Y2_current_state_0 & (J1_reply_14)); --D1_jtgsnd_ser_t_19 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_19 --operation mode is normal D1_jtgsnd_ser_t_19_lut_out = D1_jtgsnd_ser_t_18; D1_jtgsnd_ser_t_19 = DFFEAS(D1_jtgsnd_ser_t_19_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_24, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_19 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_19 --operation mode is normal E1_jtgsnd_ser_t_19_lut_out = E1_jtgsnd_ser_t_18; E1_jtgsnd_ser_t_19 = DFFEAS(E1_jtgsnd_ser_t_19_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_24, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_19 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_19 --operation mode is normal E2_jtgsnd_ser_t_19_lut_out = E2_jtgsnd_ser_t_18; E2_jtgsnd_ser_t_19 = DFFEAS(E2_jtgsnd_ser_t_19_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_24, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_12 is scsn_slave_nw_dll_ob0_ob_data_12 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_12_lut_out = scsn_slave_nw_dll_ob0_ob_data_11; scsn_slave_nw_dll_ob0_ob_data_12 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_12_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_12, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_13 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_13 --operation mode is normal Y1_d_to_dll_13 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_13 # !Y1_current_state_0 & (J1_reply_13)); --J1_reply_14 is mcm_nw_apl:scsn_slave_nw_apl|reply_14 --operation mode is normal J1_reply_14 = N1_request_14 & (J1_a_0_dup_54 # J1_read_data_17 & !J1_ix34_ix30_nx12) # !N1_request_14 & J1_read_data_17 & (!J1_ix34_ix30_nx12); --J1_read_data_16 is mcm_nw_apl:scsn_slave_nw_apl|read_data_16 --operation mode is normal J1_read_data_16_lut_out = C1_bus_dout_16; J1_read_data_16 = DFFEAS(J1_read_data_16_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_15 is gio_devices:gio|bus_dout_15 --operation mode is normal C1_bus_dout_15_lut_out = C1_nx253 # C1_nx254 # C1_nx255; C1_bus_dout_15 = DFFEAS(C1_bus_dout_15_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx256 is gio_devices:gio|nx256 --operation mode is normal C1_nx256 = W2_q_b[6] & (C1_sel_5 # G1_bus_dout_14 & C1_ce_gen) # !W2_q_b[6] & G1_bus_dout_14 & (C1_ce_gen); --C1_nx257 is gio_devices:gio|nx257 --operation mode is normal C1_nx257 = B1_bus_dout_14 & (C1_ce_cp # E2_bus_dout_14 & C1_ce_ni_jtg_up) # !B1_bus_dout_14 & E2_bus_dout_14 & (C1_ce_ni_jtg_up); --C1_nx258 is gio_devices:gio|nx258 --operation mode is normal C1_nx258 = E1_bus_dout_14 & (C1_ce_ni_jtg_dn # D1_bus_dout_14 & C1_ce_dut_jtg) # !E1_bus_dout_14 & D1_bus_dout_14 & (C1_ce_dut_jtg); --W2_q_b[5] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[5] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[5]_PORT_A_data_in = F2_data_2p_5; W2_q_b[5]_PORT_A_data_in_reg = DFFE(W2_q_b[5]_PORT_A_data_in, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[5]_PORT_A_address_reg = DFFE(W2_q_b[5]_PORT_A_address, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[5]_PORT_B_address_reg = DFFE(W2_q_b[5]_PORT_B_address, W2_q_b[5]_clock_1, , , ); W2_q_b[5]_PORT_A_write_enable = VCC; W2_q_b[5]_PORT_A_write_enable_reg = DFFE(W2_q_b[5]_PORT_A_write_enable, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_B_read_enable = VCC; W2_q_b[5]_PORT_B_read_enable_reg = DFFE(W2_q_b[5]_PORT_B_read_enable, W2_q_b[5]_clock_1, , , ); W2_q_b[5]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[5]_clock_1 = X1__clk0; W2_q_b[5]_clock_enable_0 = F2_we_eff; W2_q_b[5]_clear_0 = !G1_NOT_ni_clear; W2_q_b[5]_PORT_B_data_out = MEMORY(W2_q_b[5]_PORT_A_data_in_reg, , W2_q_b[5]_PORT_A_address_reg, W2_q_b[5]_PORT_B_address_reg, W2_q_b[5]_PORT_A_write_enable_reg, W2_q_b[5]_PORT_B_read_enable_reg, , , W2_q_b[5]_clock_0, W2_q_b[5]_clock_1, W2_q_b[5]_clock_enable_0, , W2_q_b[5]_clear_0, ); W2_q_b[5]_PORT_B_data_out_reg = DFFE(W2_q_b[5]_PORT_B_data_out, W2_q_b[5]_clock_1, , , ); W2_q_b[5] = W2_q_b[5]_PORT_B_data_out_reg[0]; --W2_q_b[13] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[13] W2_q_b[5]_PORT_A_data_in = F2_data_2p_5; W2_q_b[5]_PORT_A_data_in_reg = DFFE(W2_q_b[5]_PORT_A_data_in, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[5]_PORT_A_address_reg = DFFE(W2_q_b[5]_PORT_A_address, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[5]_PORT_B_address_reg = DFFE(W2_q_b[5]_PORT_B_address, W2_q_b[5]_clock_1, , , ); W2_q_b[5]_PORT_A_write_enable = VCC; W2_q_b[5]_PORT_A_write_enable_reg = DFFE(W2_q_b[5]_PORT_A_write_enable, W2_q_b[5]_clock_0, W2_q_b[5]_clear_0, , W2_q_b[5]_clock_enable_0); W2_q_b[5]_PORT_B_read_enable = VCC; W2_q_b[5]_PORT_B_read_enable_reg = DFFE(W2_q_b[5]_PORT_B_read_enable, W2_q_b[5]_clock_1, , , ); W2_q_b[5]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[5]_clock_1 = X1__clk0; W2_q_b[5]_clock_enable_0 = F2_we_eff; W2_q_b[5]_clear_0 = !G1_NOT_ni_clear; W2_q_b[5]_PORT_B_data_out = MEMORY(W2_q_b[5]_PORT_A_data_in_reg, , W2_q_b[5]_PORT_A_address_reg, W2_q_b[5]_PORT_B_address_reg, W2_q_b[5]_PORT_A_write_enable_reg, W2_q_b[5]_PORT_B_read_enable_reg, , , W2_q_b[5]_clock_0, W2_q_b[5]_clock_1, W2_q_b[5]_clock_enable_0, , W2_q_b[5]_clear_0, ); W2_q_b[5]_PORT_B_data_out_reg = DFFE(W2_q_b[5]_PORT_B_data_out, W2_q_b[5]_clock_1, , , ); W2_q_b[13] = W2_q_b[5]_PORT_B_data_out_reg[1]; --G1_bus_dout_13 is general_config_notri:nic_notri|bus_dout_13 --operation mode is normal G1_bus_dout_13 = G1_nx451 # G1_nx473 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_3; --B1_bus_dout_13 is clkpre_counter:cp|bus_dout_13 --operation mode is normal B1_bus_dout_13 = B1_nx739 # B1_nx740 # B1_nx823 # B1_nx886; --E2_bus_dout_13 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_13 --operation mode is normal E2_bus_dout_13_lut_out = S3_dout_13; E2_bus_dout_13 = DFFEAS(E2_bus_dout_13_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_13 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_13 --operation mode is normal E1_bus_dout_13_lut_out = S2_dout_13; E1_bus_dout_13 = DFFEAS(E1_bus_dout_13_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_13 is jtag_master_1_notri:jtag_dut_notri|bus_dout_13 --operation mode is normal D1_bus_dout_13_lut_out = S1_dout_13; D1_bus_dout_13 = DFFEAS(D1_bus_dout_13_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_4 is ni2dpm_12:ni_ni_pos|data_2p_4 --operation mode is normal F2_data_2p_4 = F2_ex_p_modgen_gt_604_nx56 & (F2_ex_p_q1pass_4) # !F2_ex_p_modgen_gt_604_nx56 & F2_ex_p_q1pass_5; --G1_nx450 is general_config_notri:nic_notri|nx450 --operation mode is normal G1_nx450 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_0 # !N1_request_48 & (F2_naddr_0)); --G1_nx474 is general_config_notri:nic_notri|nx474 --operation mode is normal G1_nx474 = N1_request_44 & N1_request_43 & G1_se1_cnt_4 & !G1_ix69_ix38_nx10; --B1_nx742 is clkpre_counter:cp|nx742 --operation mode is normal B1_nx742 = B1_dout0pcnt_12 & (B1_nx798 # B1_dout2pcnt_12 & B1_nx797) # !B1_dout0pcnt_12 & B1_dout2pcnt_12 & B1_nx797; --B1_nx743 is clkpre_counter:cp|nx743 --operation mode is normal B1_nx743 = B1_L0time_12 & (B1_nx801 # B1_L2time_12 & B1_nx802) # !B1_L0time_12 & B1_L2time_12 & (B1_nx802); --B1_nx824 is clkpre_counter:cp|nx824 --operation mode is normal B1_nx824 = B1_dout1pcnt_12 & (B1_nx795 # B1_dout3pcnt_12 & B1_nx796) # !B1_dout1pcnt_12 & B1_dout3pcnt_12 & (B1_nx796); --B1_nx885 is clkpre_counter:cp|nx885 --operation mode is normal B1_nx885 = B1_nx744 # B1_dout_ccnt_12 & B1_nx794; --S3_dout_12 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_12 --operation mode is normal S3_dout_12 = N1_request_46 & S3_NI_P1_D_6 # !N1_request_46 & (S3_nx254 # S3_nx268); --S2_dout_12 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_12 --operation mode is normal S2_dout_12 = N1_request_46 & S2_NI_P1_D_6 # !N1_request_46 & (S2_nx254 # S2_nx268); --S1_dout_12 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_12 --operation mode is normal S1_dout_12 = N1_request_46 & S1_NI_P1_D_6 # !N1_request_46 & (S1_nx254 # S1_nx268); --F2_ex_p_q1pass_4 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_4 --operation mode is normal F2_ex_p_q1pass_4 = F2_ex_p_modgen_gt_593_nx56 & (F2_data_1p_m_4) # !F2_ex_p_modgen_gt_593_nx56 & F2_data_1p_m_5; --F1_par_cnt_11 is ni2dpm_12:ni_ni_neg|par_cnt_11 --operation mode is normal F1_par_cnt_11_carry_eqn = F1_parc_Q_nx61; F1_par_cnt_11_lut_out = F1_par_cnt_11 $ (F1_par_cnt_11_carry_eqn); F1_par_cnt_11 = DFFEAS(F1_par_cnt_11_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --G1_se1_cnt_3 is general_config_notri:nic_notri|se1_cnt_3 --operation mode is arithmetic G1_se1_cnt_3_carry_eqn = G1_se1_cnt_nx21; G1_se1_cnt_3_lut_out = G1_se1_cnt_3 $ (G1_se1_cnt_3_carry_eqn); G1_se1_cnt_3 = DFFEAS(G1_se1_cnt_3_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx27 is general_config_notri:nic_notri|se1_cnt_nx27 --operation mode is arithmetic G1_se1_cnt_nx27 = CARRY(!G1_se1_cnt_nx21 # !G1_se1_cnt_3); --G1_ix69_ix32_nx12 is general_config_notri:nic_notri|ix69_ix32_nx12 --operation mode is normal G1_ix69_ix32_nx12 = N1_request_42 # N1_request_41 # !N1_request_43 # !N1_request_44; --B1_dout0pcnt_11 is clkpre_counter:cp|dout0pcnt_11 --operation mode is normal B1_dout0pcnt_11_carry_eqn = B1_pcnt0_cnt_2_cnt_i_Q_nx21; B1_dout0pcnt_11_lut_out = B1_dout0pcnt_11 $ (B1_dout0pcnt_11_carry_eqn); B1_dout0pcnt_11 = DFFEAS(B1_dout0pcnt_11_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_11 is clkpre_counter:cp|dout2pcnt_11 --operation mode is normal B1_dout2pcnt_11_carry_eqn = B1_pcnt2_cnt_2_cnt_i_Q_nx21; B1_dout2pcnt_11_lut_out = B1_dout2pcnt_11 $ (B1_dout2pcnt_11_carry_eqn); B1_dout2pcnt_11 = DFFEAS(B1_dout2pcnt_11_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout1pcnt_11 is clkpre_counter:cp|dout1pcnt_11 --operation mode is normal B1_dout1pcnt_11_carry_eqn = B1_pcnt1_cnt_2_cnt_i_Q_nx21; B1_dout1pcnt_11_lut_out = B1_dout1pcnt_11 $ (B1_dout1pcnt_11_carry_eqn); B1_dout1pcnt_11 = DFFEAS(B1_dout1pcnt_11_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_11 is clkpre_counter:cp|dout3pcnt_11 --operation mode is normal B1_dout3pcnt_11_carry_eqn = B1_pcnt3_cnt_2_cnt_i_Q_nx21; B1_dout3pcnt_11_lut_out = B1_dout3pcnt_11 $ (B1_dout3pcnt_11_carry_eqn); B1_dout3pcnt_11 = DFFEAS(B1_dout3pcnt_11_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout_ccnt_11 is clkpre_counter:cp|dout_ccnt_11 --operation mode is arithmetic B1_dout_ccnt_11_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx22; B1_dout_ccnt_11_lut_out = B1_dout_ccnt_11 $ (B1_dout_ccnt_11_carry_eqn); B1_dout_ccnt_11 = DFFEAS(B1_dout_ccnt_11_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx28 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx28 = CARRY(!B1_ccnt_cnt_1_cnt_i_Q_nx22 # !B1_dout_ccnt_11); --B1_nx747 is clkpre_counter:cp|nx747 --operation mode is normal B1_nx747 = B1_L1time_11 & (B1_nx799 # B1_c_time_11 & B1_nx800) # !B1_L1time_11 & B1_c_time_11 & (B1_nx800); --S3_nx237 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx237 --operation mode is normal S3_nx237 = !N1_request_46 & N1_request_47 & !N1_request_48 & S3_NI_P_CTRL; --S2_nx237 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx237 --operation mode is normal S2_nx237 = !N1_request_46 & N1_request_47 & !N1_request_48 & S2_NI_P_CTRL; --S1_nx237 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx237 --operation mode is normal S1_nx237 = !N1_request_46 & N1_request_47 & !N1_request_48 & S1_NI_P_CTRL; --F2_data_1p_m_4 is ni2dpm_12:ni_ni_pos|data_1p_m_4 --operation mode is normal F2_data_1p_m_4 = G1_ni_or_mask_4 # !G1_NOT_ni_and_mask_4 & (G1_ni_xor_mask_4 $ F2_data_1p_4); --F1_par_cnt_10 is ni2dpm_12:ni_ni_neg|par_cnt_10 --operation mode is arithmetic F1_par_cnt_10_carry_eqn = F1_parc_Q_nx57; F1_par_cnt_10_lut_out = F1_par_cnt_10 $ (!F1_par_cnt_10_carry_eqn); F1_par_cnt_10 = DFFEAS(F1_par_cnt_10_lut_out, !GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F1_parc_Q_nx61 is ni2dpm_12:ni_ni_neg|parc_Q_nx61 --operation mode is arithmetic F1_parc_Q_nx61 = CARRY(F1_par_cnt_10 & (!F1_parc_Q_nx57)); --S3_NI_P4_STRB is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_STRB --operation mode is normal S3_NI_P4_STRB_lut_out = S3_NI_P3_CTRL; S3_NI_P4_STRB = DFFEAS(S3_NI_P4_STRB_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_STRB is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_STRB --operation mode is normal S2_NI_P4_STRB_lut_out = S2_NI_P3_CTRL; S2_NI_P4_STRB = DFFEAS(S2_NI_P4_STRB_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_STRB is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_STRB --operation mode is normal S1_NI_P4_STRB_lut_out = S1_NI_P3_CTRL; S1_NI_P4_STRB = DFFEAS(S1_NI_P4_STRB_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_data_1p_3 is ni2dpm_12:ni_ni_pos|data_1p_3 --operation mode is normal F2_data_1p_3_lut_out = DUT_P4_D[3]; F2_data_1p_3 = DFFEAS(F2_data_1p_3_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P3_D_8 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_8 --operation mode is normal S3_NI_P3_D_8_lut_out = S3_NI_P3_D_7; S3_NI_P3_D_8 = DFFEAS(S3_NI_P3_D_8_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_8 --operation mode is normal S2_NI_P3_D_8_lut_out = S2_NI_P3_D_7; S2_NI_P3_D_8 = DFFEAS(S2_NI_P3_D_8_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_8 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_8 --operation mode is normal S1_NI_P3_D_8_lut_out = S1_NI_P3_D_7; S1_NI_P3_D_8 = DFFEAS(S1_NI_P3_D_8_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --G1_se1_cnt_4 is general_config_notri:nic_notri|se1_cnt_4 --operation mode is arithmetic G1_se1_cnt_4_carry_eqn = G1_se1_cnt_nx27; G1_se1_cnt_4_lut_out = G1_se1_cnt_4 $ (!G1_se1_cnt_4_carry_eqn); G1_se1_cnt_4 = DFFEAS(G1_se1_cnt_4_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx34 is general_config_notri:nic_notri|se1_cnt_nx34 --operation mode is arithmetic G1_se1_cnt_nx34 = CARRY(G1_se1_cnt_4 & (!G1_se1_cnt_nx27)); --G1_se1_cnt_5 is general_config_notri:nic_notri|se1_cnt_5 --operation mode is arithmetic G1_se1_cnt_5_carry_eqn = G1_se1_cnt_nx34; G1_se1_cnt_5_lut_out = G1_se1_cnt_5 $ (G1_se1_cnt_5_carry_eqn); G1_se1_cnt_5 = DFFEAS(G1_se1_cnt_5_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx38 is general_config_notri:nic_notri|se1_cnt_nx38 --operation mode is arithmetic G1_se1_cnt_nx38 = CARRY(!G1_se1_cnt_nx34 # !G1_se1_cnt_5); --G1_se1_cnt_6 is general_config_notri:nic_notri|se1_cnt_6 --operation mode is arithmetic G1_se1_cnt_6_carry_eqn = G1_se1_cnt_nx38; G1_se1_cnt_6_lut_out = G1_se1_cnt_6 $ (!G1_se1_cnt_6_carry_eqn); G1_se1_cnt_6 = DFFEAS(G1_se1_cnt_6_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se1_cnt_nx43 is general_config_notri:nic_notri|se1_cnt_nx43 --operation mode is arithmetic G1_se1_cnt_nx43 = CARRY(G1_se1_cnt_6 & (!G1_se1_cnt_nx38)); --G1_se1_cnt_7 is general_config_notri:nic_notri|se1_cnt_7 --operation mode is normal G1_se1_cnt_7_carry_eqn = G1_se1_cnt_nx43; G1_se1_cnt_7_lut_out = G1_se1_cnt_7 $ (G1_se1_cnt_7_carry_eqn); G1_se1_cnt_7 = DFFEAS(G1_se1_cnt_7_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --S3_NI_P3_D_4 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_4 --operation mode is normal S3_NI_P3_D_4_lut_out = S3_NI_P4_D_7; S3_NI_P3_D_4 = DFFEAS(S3_NI_P3_D_4_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_4 --operation mode is normal S2_NI_P3_D_4_lut_out = S2_NI_P4_D_7; S2_NI_P3_D_4 = DFFEAS(S2_NI_P3_D_4_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_4 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_4 --operation mode is normal S1_NI_P3_D_4_lut_out = S1_NI_P4_D_7; S1_NI_P3_D_4 = DFFEAS(S1_NI_P3_D_4_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_12 is scsn_slave_nw_dll_ob1_ob_data_12 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_12_lut_out = scsn_slave_nw_dll_ob1_ob_data_11; scsn_slave_nw_dll_ob1_ob_data_12 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_12_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_12, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_13 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_13 --operation mode is normal Y2_d_to_dll_13 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_13 # !Y2_current_state_0 & (J1_reply_13)); --D1_jtgsnd_ser_t_18 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_18 --operation mode is normal D1_jtgsnd_ser_t_18_lut_out = D1_jtgsnd_ser_t_17; D1_jtgsnd_ser_t_18 = DFFEAS(D1_jtgsnd_ser_t_18_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_23, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_18 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_18 --operation mode is normal E1_jtgsnd_ser_t_18_lut_out = E1_jtgsnd_ser_t_17; E1_jtgsnd_ser_t_18 = DFFEAS(E1_jtgsnd_ser_t_18_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_23, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_18 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_18 --operation mode is normal E2_jtgsnd_ser_t_18_lut_out = E2_jtgsnd_ser_t_17; E2_jtgsnd_ser_t_18 = DFFEAS(E2_jtgsnd_ser_t_18_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_23, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_11 is scsn_slave_nw_dll_ob0_ob_data_11 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_11_lut_out = scsn_slave_nw_dll_ob0_ob_data_10; scsn_slave_nw_dll_ob0_ob_data_11 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_11_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_11, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_12 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_12 --operation mode is normal Y1_d_to_dll_12 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_12 # !Y1_current_state_0 & (J1_reply_12)); --J1_reply_13 is mcm_nw_apl:scsn_slave_nw_apl|reply_13 --operation mode is normal J1_reply_13 = N1_request_13 & (J1_a_0_dup_54 # J1_read_data_18 & !J1_ix34_ix30_nx12) # !N1_request_13 & J1_read_data_18 & (!J1_ix34_ix30_nx12); --J1_read_data_17 is mcm_nw_apl:scsn_slave_nw_apl|read_data_17 --operation mode is normal J1_read_data_17_lut_out = C1_bus_dout_17; J1_read_data_17 = DFFEAS(J1_read_data_17_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_16 is gio_devices:gio|bus_dout_16 --operation mode is normal C1_bus_dout_16_lut_out = C1_nx250 # C1_nx251 # C1_nx252; C1_bus_dout_16 = DFFEAS(C1_bus_dout_16_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx253 is gio_devices:gio|nx253 --operation mode is normal C1_nx253 = W2_q_b[7] & (C1_sel_5 # G1_bus_dout_15 & C1_ce_gen) # !W2_q_b[7] & G1_bus_dout_15 & (C1_ce_gen); --C1_nx254 is gio_devices:gio|nx254 --operation mode is normal C1_nx254 = B1_bus_dout_15 & (C1_ce_cp # E2_bus_dout_15 & C1_ce_ni_jtg_up) # !B1_bus_dout_15 & E2_bus_dout_15 & (C1_ce_ni_jtg_up); --C1_nx255 is gio_devices:gio|nx255 --operation mode is normal C1_nx255 = E1_bus_dout_15 & (C1_ce_ni_jtg_dn # D1_bus_dout_15 & C1_ce_dut_jtg) # !E1_bus_dout_15 & D1_bus_dout_15 & (C1_ce_dut_jtg); --W2_q_b[6] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[6] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[6]_PORT_A_data_in = F2_data_2p_6; W2_q_b[6]_PORT_A_data_in_reg = DFFE(W2_q_b[6]_PORT_A_data_in, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[6]_PORT_A_address_reg = DFFE(W2_q_b[6]_PORT_A_address, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[6]_PORT_B_address_reg = DFFE(W2_q_b[6]_PORT_B_address, W2_q_b[6]_clock_1, , , ); W2_q_b[6]_PORT_A_write_enable = VCC; W2_q_b[6]_PORT_A_write_enable_reg = DFFE(W2_q_b[6]_PORT_A_write_enable, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_B_read_enable = VCC; W2_q_b[6]_PORT_B_read_enable_reg = DFFE(W2_q_b[6]_PORT_B_read_enable, W2_q_b[6]_clock_1, , , ); W2_q_b[6]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[6]_clock_1 = X1__clk0; W2_q_b[6]_clock_enable_0 = F2_we_eff; W2_q_b[6]_clear_0 = !G1_NOT_ni_clear; W2_q_b[6]_PORT_B_data_out = MEMORY(W2_q_b[6]_PORT_A_data_in_reg, , W2_q_b[6]_PORT_A_address_reg, W2_q_b[6]_PORT_B_address_reg, W2_q_b[6]_PORT_A_write_enable_reg, W2_q_b[6]_PORT_B_read_enable_reg, , , W2_q_b[6]_clock_0, W2_q_b[6]_clock_1, W2_q_b[6]_clock_enable_0, , W2_q_b[6]_clear_0, ); W2_q_b[6]_PORT_B_data_out_reg = DFFE(W2_q_b[6]_PORT_B_data_out, W2_q_b[6]_clock_1, , , ); W2_q_b[6] = W2_q_b[6]_PORT_B_data_out_reg[0]; --W2_q_b[14] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[14] W2_q_b[6]_PORT_A_data_in = F2_data_2p_6; W2_q_b[6]_PORT_A_data_in_reg = DFFE(W2_q_b[6]_PORT_A_data_in, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[6]_PORT_A_address_reg = DFFE(W2_q_b[6]_PORT_A_address, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[6]_PORT_B_address_reg = DFFE(W2_q_b[6]_PORT_B_address, W2_q_b[6]_clock_1, , , ); W2_q_b[6]_PORT_A_write_enable = VCC; W2_q_b[6]_PORT_A_write_enable_reg = DFFE(W2_q_b[6]_PORT_A_write_enable, W2_q_b[6]_clock_0, W2_q_b[6]_clear_0, , W2_q_b[6]_clock_enable_0); W2_q_b[6]_PORT_B_read_enable = VCC; W2_q_b[6]_PORT_B_read_enable_reg = DFFE(W2_q_b[6]_PORT_B_read_enable, W2_q_b[6]_clock_1, , , ); W2_q_b[6]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[6]_clock_1 = X1__clk0; W2_q_b[6]_clock_enable_0 = F2_we_eff; W2_q_b[6]_clear_0 = !G1_NOT_ni_clear; W2_q_b[6]_PORT_B_data_out = MEMORY(W2_q_b[6]_PORT_A_data_in_reg, , W2_q_b[6]_PORT_A_address_reg, W2_q_b[6]_PORT_B_address_reg, W2_q_b[6]_PORT_A_write_enable_reg, W2_q_b[6]_PORT_B_read_enable_reg, , , W2_q_b[6]_clock_0, W2_q_b[6]_clock_1, W2_q_b[6]_clock_enable_0, , W2_q_b[6]_clear_0, ); W2_q_b[6]_PORT_B_data_out_reg = DFFE(W2_q_b[6]_PORT_B_data_out, W2_q_b[6]_clock_1, , , ); W2_q_b[14] = W2_q_b[6]_PORT_B_data_out_reg[1]; --G1_bus_dout_14 is general_config_notri:nic_notri|bus_dout_14 --operation mode is normal G1_bus_dout_14 = G1_nx452 # G1_nx472 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_4; --B1_bus_dout_14 is clkpre_counter:cp|bus_dout_14 --operation mode is normal B1_bus_dout_14 = B1_nx738 # B1_nx822 # B1_dout_ccnt_14 & B1_nx794; --E2_bus_dout_14 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_14 --operation mode is normal E2_bus_dout_14_lut_out = S3_dout_14; E2_bus_dout_14 = DFFEAS(E2_bus_dout_14_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_14 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_14 --operation mode is normal E1_bus_dout_14_lut_out = S2_dout_14; E1_bus_dout_14 = DFFEAS(E1_bus_dout_14_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_14 is jtag_master_1_notri:jtag_dut_notri|bus_dout_14 --operation mode is normal D1_bus_dout_14_lut_out = S1_dout_14; D1_bus_dout_14 = DFFEAS(D1_bus_dout_14_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_5 is ni2dpm_12:ni_ni_pos|data_2p_5 --operation mode is normal F2_data_2p_5 = G1_NOT_ni_sel_p_3 & (F2_nx372 & (F2_ex_p_q1pass_5) # !F2_nx372 & F2_ex_p_q1pass_6) # !G1_NOT_ni_sel_p_3 & (F2_ex_p_q1pass_5); --G1_nx451 is general_config_notri:nic_notri|nx451 --operation mode is normal G1_nx451 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_1 # !N1_request_48 & (F2_naddr_1)); --G1_nx473 is general_config_notri:nic_notri|nx473 --operation mode is normal G1_nx473 = N1_request_44 & N1_request_43 & G1_se1_cnt_5 & !G1_ix69_ix38_nx10; --B1_nx739 is clkpre_counter:cp|nx739 --operation mode is normal B1_nx739 = B1_dout0pcnt_13 & (B1_nx798 # B1_dout2pcnt_13 & B1_nx797) # !B1_dout0pcnt_13 & B1_dout2pcnt_13 & B1_nx797; --B1_nx740 is clkpre_counter:cp|nx740 --operation mode is normal B1_nx740 = B1_L0time_13 & (B1_nx801 # B1_L2time_13 & B1_nx802) # !B1_L0time_13 & B1_L2time_13 & (B1_nx802); --B1_nx823 is clkpre_counter:cp|nx823 --operation mode is normal B1_nx823 = B1_dout1pcnt_13 & (B1_nx795 # B1_dout3pcnt_13 & B1_nx796) # !B1_dout1pcnt_13 & B1_dout3pcnt_13 & (B1_nx796); --B1_nx886 is clkpre_counter:cp|nx886 --operation mode is normal B1_nx886 = B1_nx741 # B1_dout_ccnt_13 & B1_nx794; --S3_dout_13 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_13 --operation mode is normal S3_dout_13 = N1_request_46 & S3_NI_P0_D_9 # !N1_request_46 & (S3_nx269 # S3_nx270); --S2_dout_13 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_13 --operation mode is normal S2_dout_13 = N1_request_46 & S2_NI_P0_D_9 # !N1_request_46 & (S2_nx269 # S2_nx270); --S1_dout_13 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_13 --operation mode is normal S1_dout_13 = N1_request_46 & S1_NI_P0_D_9 # !N1_request_46 & (S1_nx269 # S1_nx270); --F2_ex_p_q1pass_5 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_5 --operation mode is normal F2_ex_p_q1pass_5 = G1_NOT_ni_sel_s_3 & (F2_nx373 & (F2_data_1p_m_5) # !F2_nx373 & F2_data_1p_m_6) # !G1_NOT_ni_sel_s_3 & (F2_data_1p_m_5); --F2_ex_p_modgen_gt_604_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_604_nx56 --operation mode is normal F2_ex_p_modgen_gt_604_nx56 = G1_ni_sel_p_2 & (G1_ni_sel_p_1 # !G1_NOT_ni_sel_p_0) # !G1_NOT_ni_sel_p_3; --F2_par_cnt_0 is ni2dpm_12:ni_ni_pos|par_cnt_0 --operation mode is arithmetic F2_par_cnt_0_lut_out = F2_par_cnt_0 $ F2_par_en; F2_par_cnt_0 = DFFEAS(F2_par_cnt_0_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx10 is ni2dpm_12:ni_ni_pos|parc_Q_nx10 --operation mode is arithmetic F2_parc_Q_nx10 = CARRY(F2_par_cnt_0 & F2_par_en); --B1_dout0pcnt_12 is clkpre_counter:cp|dout0pcnt_12 --operation mode is arithmetic B1_dout0pcnt_12_lut_out = B1_dout0pcnt_12 $ P1_RESRV; B1_dout0pcnt_12 = DFFEAS(B1_dout0pcnt_12_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_3_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_3_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_3_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_12 & P1_RESRV); --B1_dout2pcnt_12 is clkpre_counter:cp|dout2pcnt_12 --operation mode is arithmetic B1_dout2pcnt_12_lut_out = B1_dout2pcnt_12 $ P3_RESRV; B1_dout2pcnt_12 = DFFEAS(B1_dout2pcnt_12_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_3_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_3_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_3_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_12 & P3_RESRV); --B1_dout1pcnt_12 is clkpre_counter:cp|dout1pcnt_12 --operation mode is arithmetic B1_dout1pcnt_12_lut_out = B1_dout1pcnt_12 $ P2_RESRV; B1_dout1pcnt_12 = DFFEAS(B1_dout1pcnt_12_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_3_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_3_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_3_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_12 & P2_RESRV); --B1_dout3pcnt_12 is clkpre_counter:cp|dout3pcnt_12 --operation mode is arithmetic B1_dout3pcnt_12_lut_out = B1_dout3pcnt_12 $ P4_RESRV; B1_dout3pcnt_12 = DFFEAS(B1_dout3pcnt_12_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_3_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_3_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_3_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_12 & P4_RESRV); --B1_dout_ccnt_12 is clkpre_counter:cp|dout_ccnt_12 --operation mode is arithmetic B1_dout_ccnt_12_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx28; B1_dout_ccnt_12_lut_out = B1_dout_ccnt_12 $ (!B1_dout_ccnt_12_carry_eqn); B1_dout_ccnt_12 = DFFEAS(B1_dout_ccnt_12_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx32 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx32 = CARRY(B1_dout_ccnt_12 & (!B1_ccnt_cnt_1_cnt_i_Q_nx28)); --B1_nx744 is clkpre_counter:cp|nx744 --operation mode is normal B1_nx744 = B1_L1time_12 & (B1_nx799 # B1_c_time_12 & B1_nx800) # !B1_L1time_12 & B1_c_time_12 & (B1_nx800); --S3_nx268 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx268 --operation mode is normal S3_nx268 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_CLKout) # !N1_request_48 & S3_NI_P0_CLKout); --S2_nx268 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx268 --operation mode is normal S2_nx268 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_CLKout) # !N1_request_48 & S2_NI_P0_CLKout); --S1_nx268 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx268 --operation mode is normal S1_nx268 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_CLKout) # !N1_request_48 & S1_NI_P0_CLKout); --F2_data_1p_m_5 is ni2dpm_12:ni_ni_pos|data_1p_m_5 --operation mode is normal F2_data_1p_m_5 = G1_ni_or_mask_5 # !G1_NOT_ni_and_mask_5 & (G1_ni_xor_mask_5 $ F2_data_1p_5); --F2_ex_p_modgen_gt_593_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_593_nx56 --operation mode is normal F2_ex_p_modgen_gt_593_nx56 = G1_ni_sel_s_2 & (G1_ni_sel_s_1 # G1_ni_sel_s_0) # !G1_NOT_ni_sel_s_3; --F2_data_1p_4 is ni2dpm_12:ni_ni_pos|data_1p_4 --operation mode is normal F2_data_1p_4_lut_out = DUT_P4_D[4]; F2_data_1p_4 = DFFEAS(F2_data_1p_4_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P3_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_CTRL --operation mode is normal S3_NI_P3_CTRL_lut_out = S3_NI_P3_D_9; S3_NI_P3_CTRL = DFFEAS(S3_NI_P3_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_CTRL --operation mode is normal S2_NI_P3_CTRL_lut_out = S2_NI_P3_D_9; S2_NI_P3_CTRL = DFFEAS(S2_NI_P3_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_CTRL --operation mode is normal S1_NI_P3_CTRL_lut_out = S1_NI_P3_D_9; S1_NI_P3_CTRL = DFFEAS(S1_NI_P3_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S3_NI_P3_D_7 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_7 --operation mode is normal S3_NI_P3_D_7_lut_out = S3_NI_P3_D_6; S3_NI_P3_D_7 = DFFEAS(S3_NI_P3_D_7_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_7 --operation mode is normal S2_NI_P3_D_7_lut_out = S2_NI_P3_D_6; S2_NI_P3_D_7 = DFFEAS(S2_NI_P3_D_7_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_7 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_7 --operation mode is normal S1_NI_P3_D_7_lut_out = S1_NI_P3_D_6; S1_NI_P3_D_7 = DFFEAS(S1_NI_P3_D_7_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_11 is scsn_slave_nw_dll_ob1_ob_data_11 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_11_lut_out = scsn_slave_nw_dll_ob1_ob_data_10; scsn_slave_nw_dll_ob1_ob_data_11 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_11_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_11, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_12 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_12 --operation mode is normal Y2_d_to_dll_12 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_12 # !Y2_current_state_0 & (J1_reply_12)); --D1_jtgsnd_ser_t_17 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_17 --operation mode is normal D1_jtgsnd_ser_t_17_lut_out = D1_jtgsnd_ser_t_16; D1_jtgsnd_ser_t_17 = DFFEAS(D1_jtgsnd_ser_t_17_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_20, , , D1_jtgsnd_we_g_2); --E1_jtgsnd_ser_t_17 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_17 --operation mode is normal E1_jtgsnd_ser_t_17_lut_out = E1_jtgsnd_ser_t_16; E1_jtgsnd_ser_t_17 = DFFEAS(E1_jtgsnd_ser_t_17_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_20, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_17 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_17 --operation mode is normal E2_jtgsnd_ser_t_17_lut_out = E2_jtgsnd_ser_t_16; E2_jtgsnd_ser_t_17 = DFFEAS(E2_jtgsnd_ser_t_17_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_20, , , E2_jtgsnd_we_g_2); --scsn_slave_nw_dll_ob0_ob_data_10 is scsn_slave_nw_dll_ob0_ob_data_10 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_10_lut_out = scsn_slave_nw_dll_ob0_ob_data_9; scsn_slave_nw_dll_ob0_ob_data_10 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_10_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_10, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_11 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_11 --operation mode is normal Y1_d_to_dll_11 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_11 # !Y1_current_state_0 & (J1_reply_11)); --J1_reply_12 is mcm_nw_apl:scsn_slave_nw_apl|reply_12 --operation mode is normal J1_reply_12 = N1_request_12 & (J1_a_0_dup_54 # J1_read_data_19 & !J1_ix34_ix30_nx12) # !N1_request_12 & J1_read_data_19 & (!J1_ix34_ix30_nx12); --J1_read_data_18 is mcm_nw_apl:scsn_slave_nw_apl|read_data_18 --operation mode is normal J1_read_data_18_lut_out = C1_bus_dout_18; J1_read_data_18 = DFFEAS(J1_read_data_18_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_17 is gio_devices:gio|bus_dout_17 --operation mode is normal C1_bus_dout_17_lut_out = C1_nx247 # C1_nx248 # C1_nx249; C1_bus_dout_17 = DFFEAS(C1_bus_dout_17_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx250 is gio_devices:gio|nx250 --operation mode is normal C1_nx250 = W1_q_b[8] & (C1_sel_5 # G1_bus_dout_16 & C1_ce_gen) # !W1_q_b[8] & G1_bus_dout_16 & (C1_ce_gen); --C1_nx251 is gio_devices:gio|nx251 --operation mode is normal C1_nx251 = B1_bus_dout_16 & (C1_ce_cp # E2_bus_dout_16 & C1_ce_ni_jtg_up) # !B1_bus_dout_16 & E2_bus_dout_16 & (C1_ce_ni_jtg_up); --C1_nx252 is gio_devices:gio|nx252 --operation mode is normal C1_nx252 = E1_bus_dout_16 & (C1_ce_ni_jtg_dn # D1_bus_dout_16 & C1_ce_dut_jtg) # !E1_bus_dout_16 & D1_bus_dout_16 & (C1_ce_dut_jtg); --W2_q_b[7] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[7] --RAM Block Operation Mode: Simple Dual-Port --Port A Depth: 4096, Port A Width: 1, Port B Depth: 2048, Port B Width: 2 --Port A Logical Depth: 4096, Port A Logical Width: 8, Port B Logical Depth: 2048, Port B Logical Width: 16 --Port A Input: Registered, Port B Input: Registered, Port B Output: Registered W2_q_b[7]_PORT_A_data_in = F2_data_2p_7; W2_q_b[7]_PORT_A_data_in_reg = DFFE(W2_q_b[7]_PORT_A_data_in, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[7]_PORT_A_address_reg = DFFE(W2_q_b[7]_PORT_A_address, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[7]_PORT_B_address_reg = DFFE(W2_q_b[7]_PORT_B_address, W2_q_b[7]_clock_1, , , ); W2_q_b[7]_PORT_A_write_enable = VCC; W2_q_b[7]_PORT_A_write_enable_reg = DFFE(W2_q_b[7]_PORT_A_write_enable, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_B_read_enable = VCC; W2_q_b[7]_PORT_B_read_enable_reg = DFFE(W2_q_b[7]_PORT_B_read_enable, W2_q_b[7]_clock_1, , , ); W2_q_b[7]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[7]_clock_1 = X1__clk0; W2_q_b[7]_clock_enable_0 = F2_we_eff; W2_q_b[7]_clear_0 = !G1_NOT_ni_clear; W2_q_b[7]_PORT_B_data_out = MEMORY(W2_q_b[7]_PORT_A_data_in_reg, , W2_q_b[7]_PORT_A_address_reg, W2_q_b[7]_PORT_B_address_reg, W2_q_b[7]_PORT_A_write_enable_reg, W2_q_b[7]_PORT_B_read_enable_reg, , , W2_q_b[7]_clock_0, W2_q_b[7]_clock_1, W2_q_b[7]_clock_enable_0, , W2_q_b[7]_clear_0, ); W2_q_b[7]_PORT_B_data_out_reg = DFFE(W2_q_b[7]_PORT_B_data_out, W2_q_b[7]_clock_1, , , ); W2_q_b[7] = W2_q_b[7]_PORT_B_data_out_reg[0]; --W2_q_b[15] is ni2dpm_12:ni_ni_pos|ni_dpram:dpram|altsyncram:altsyncram_component|altsyncram_oj71:auto_generated|q_b[15] W2_q_b[7]_PORT_A_data_in = F2_data_2p_7; W2_q_b[7]_PORT_A_data_in_reg = DFFE(W2_q_b[7]_PORT_A_data_in, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_A_address = BUS(F2_naddr_0, F2_naddr_1, F2_naddr_2, F2_naddr_3, F2_naddr_4, F2_naddr_5, F2_naddr_6, F2_naddr_7, F2_naddr_8, F2_naddr_9, F2_naddr_10, F2_naddr_11); W2_q_b[7]_PORT_A_address_reg = DFFE(W2_q_b[7]_PORT_A_address, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_B_address = BUS(N1_request_48, N1_request_47, N1_request_46, N1_request_45, N1_request_44, N1_request_43, N1_request_42, N1_request_41, N1_request_40, N1_request_39, N1_request_38); W2_q_b[7]_PORT_B_address_reg = DFFE(W2_q_b[7]_PORT_B_address, W2_q_b[7]_clock_1, , , ); W2_q_b[7]_PORT_A_write_enable = VCC; W2_q_b[7]_PORT_A_write_enable_reg = DFFE(W2_q_b[7]_PORT_A_write_enable, W2_q_b[7]_clock_0, W2_q_b[7]_clear_0, , W2_q_b[7]_clock_enable_0); W2_q_b[7]_PORT_B_read_enable = VCC; W2_q_b[7]_PORT_B_read_enable_reg = DFFE(W2_q_b[7]_PORT_B_read_enable, W2_q_b[7]_clock_1, , , ); W2_q_b[7]_clock_0 = GLOBAL(DUT_P4_STR); W2_q_b[7]_clock_1 = X1__clk0; W2_q_b[7]_clock_enable_0 = F2_we_eff; W2_q_b[7]_clear_0 = !G1_NOT_ni_clear; W2_q_b[7]_PORT_B_data_out = MEMORY(W2_q_b[7]_PORT_A_data_in_reg, , W2_q_b[7]_PORT_A_address_reg, W2_q_b[7]_PORT_B_address_reg, W2_q_b[7]_PORT_A_write_enable_reg, W2_q_b[7]_PORT_B_read_enable_reg, , , W2_q_b[7]_clock_0, W2_q_b[7]_clock_1, W2_q_b[7]_clock_enable_0, , W2_q_b[7]_clear_0, ); W2_q_b[7]_PORT_B_data_out_reg = DFFE(W2_q_b[7]_PORT_B_data_out, W2_q_b[7]_clock_1, , , ); W2_q_b[15] = W2_q_b[7]_PORT_B_data_out_reg[1]; --G1_bus_dout_15 is general_config_notri:nic_notri|bus_dout_15 --operation mode is normal G1_bus_dout_15 = G1_nx453 # G1_nx471 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_5; --B1_bus_dout_15 is clkpre_counter:cp|bus_dout_15 --operation mode is normal B1_bus_dout_15 = B1_nx737 # B1_nx821 # B1_dout_ccnt_15 & B1_nx794; --E2_bus_dout_15 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_15 --operation mode is normal E2_bus_dout_15_lut_out = S3_dout_15; E2_bus_dout_15 = DFFEAS(E2_bus_dout_15_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_15 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_15 --operation mode is normal E1_bus_dout_15_lut_out = S2_dout_15; E1_bus_dout_15 = DFFEAS(E1_bus_dout_15_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_15 is jtag_master_1_notri:jtag_dut_notri|bus_dout_15 --operation mode is normal D1_bus_dout_15_lut_out = S1_dout_15; D1_bus_dout_15 = DFFEAS(D1_bus_dout_15_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_6 is ni2dpm_12:ni_ni_pos|data_2p_6 --operation mode is normal F2_data_2p_6 = F2_ex_p_modgen_gt_600_nx56 & (F2_ex_p_q1pass_6) # !F2_ex_p_modgen_gt_600_nx56 & F2_ex_p_q1pass_7; --G1_nx452 is general_config_notri:nic_notri|nx452 --operation mode is normal G1_nx452 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_2 # !N1_request_48 & (F2_naddr_2)); --G1_nx472 is general_config_notri:nic_notri|nx472 --operation mode is normal G1_nx472 = N1_request_44 & N1_request_43 & G1_se1_cnt_6 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_14 is clkpre_counter:cp|dout_ccnt_14 --operation mode is arithmetic B1_dout_ccnt_14_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx36; B1_dout_ccnt_14_lut_out = B1_dout_ccnt_14 $ (!B1_dout_ccnt_14_carry_eqn); B1_dout_ccnt_14 = DFFEAS(B1_dout_ccnt_14_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx41 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx41 = CARRY(B1_dout_ccnt_14 & (!B1_ccnt_cnt_1_cnt_i_Q_nx36)); --B1_nx738 is clkpre_counter:cp|nx738 --operation mode is normal B1_nx738 = B1_dout1pcnt_14 & (B1_nx795 # B1_dout3pcnt_14 & B1_nx796) # !B1_dout1pcnt_14 & B1_dout3pcnt_14 & (B1_nx796); --B1_nx822 is clkpre_counter:cp|nx822 --operation mode is normal B1_nx822 = B1_dout0pcnt_14 & (B1_nx798 # B1_dout2pcnt_14 & B1_nx797) # !B1_dout0pcnt_14 & B1_dout2pcnt_14 & B1_nx797; --S3_dout_14 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_14 --operation mode is normal S3_dout_14 = N1_request_46 & S3_NI_P1_D_5 # !N1_request_46 & (S3_nx271 # S3_nx272); --S2_dout_14 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_14 --operation mode is normal S2_dout_14 = N1_request_46 & S2_NI_P1_D_5 # !N1_request_46 & (S2_nx271 # S2_nx272); --S1_dout_14 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_14 --operation mode is normal S1_dout_14 = N1_request_46 & S1_NI_P1_D_5 # !N1_request_46 & (S1_nx271 # S1_nx272); --F2_ex_p_q1pass_6 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_6 --operation mode is normal F2_ex_p_q1pass_6 = F2_ex_p_modgen_gt_591_nx56 & (F2_data_1p_m_6) # !F2_ex_p_modgen_gt_591_nx56 & F2_data_1p_m_7; --F2_nx372 is ni2dpm_12:ni_ni_pos|nx372 --operation mode is normal F2_nx372 = G1_ni_sel_p_2 & G1_ni_sel_p_1; --F2_par_cnt_1 is ni2dpm_12:ni_ni_pos|par_cnt_1 --operation mode is arithmetic F2_par_cnt_1_carry_eqn = F2_parc_Q_nx10; F2_par_cnt_1_lut_out = F2_par_cnt_1 $ (F2_par_cnt_1_carry_eqn); F2_par_cnt_1 = DFFEAS(F2_par_cnt_1_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx16 is ni2dpm_12:ni_ni_pos|parc_Q_nx16 --operation mode is arithmetic F2_parc_Q_nx16 = CARRY(!F2_parc_Q_nx10 # !F2_par_cnt_1); --B1_dout0pcnt_13 is clkpre_counter:cp|dout0pcnt_13 --operation mode is arithmetic B1_dout0pcnt_13_carry_eqn = B1_pcnt0_cnt_3_cnt_i_Q_nx10; B1_dout0pcnt_13_lut_out = B1_dout0pcnt_13 $ (B1_dout0pcnt_13_carry_eqn); B1_dout0pcnt_13 = DFFEAS(B1_dout0pcnt_13_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_3_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_3_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_3_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_3_cnt_i_Q_nx10 # !B1_dout0pcnt_13); --B1_dout2pcnt_13 is clkpre_counter:cp|dout2pcnt_13 --operation mode is arithmetic B1_dout2pcnt_13_carry_eqn = B1_pcnt2_cnt_3_cnt_i_Q_nx10; B1_dout2pcnt_13_lut_out = B1_dout2pcnt_13 $ (B1_dout2pcnt_13_carry_eqn); B1_dout2pcnt_13 = DFFEAS(B1_dout2pcnt_13_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_3_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_3_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_3_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_3_cnt_i_Q_nx10 # !B1_dout2pcnt_13); --B1_dout1pcnt_13 is clkpre_counter:cp|dout1pcnt_13 --operation mode is arithmetic B1_dout1pcnt_13_carry_eqn = B1_pcnt1_cnt_3_cnt_i_Q_nx10; B1_dout1pcnt_13_lut_out = B1_dout1pcnt_13 $ (B1_dout1pcnt_13_carry_eqn); B1_dout1pcnt_13 = DFFEAS(B1_dout1pcnt_13_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_3_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_3_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_3_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_3_cnt_i_Q_nx10 # !B1_dout1pcnt_13); --B1_dout3pcnt_13 is clkpre_counter:cp|dout3pcnt_13 --operation mode is arithmetic B1_dout3pcnt_13_carry_eqn = B1_pcnt3_cnt_3_cnt_i_Q_nx10; B1_dout3pcnt_13_lut_out = B1_dout3pcnt_13 $ (B1_dout3pcnt_13_carry_eqn); B1_dout3pcnt_13 = DFFEAS(B1_dout3pcnt_13_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_3_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_3_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_3_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_3_cnt_i_Q_nx10 # !B1_dout3pcnt_13); --B1_dout_ccnt_13 is clkpre_counter:cp|dout_ccnt_13 --operation mode is arithmetic B1_dout_ccnt_13_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx32; B1_dout_ccnt_13_lut_out = B1_dout_ccnt_13 $ (B1_dout_ccnt_13_carry_eqn); B1_dout_ccnt_13 = DFFEAS(B1_dout_ccnt_13_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_1_cnt_i_Q_nx36 is clkpre_counter:cp|ccnt_cnt_1_cnt_i_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_1_cnt_i_Q_nx36 = CARRY(!B1_ccnt_cnt_1_cnt_i_Q_nx32 # !B1_dout_ccnt_13); --B1_nx741 is clkpre_counter:cp|nx741 --operation mode is normal B1_nx741 = B1_L1time_13 & (B1_nx799 # B1_c_time_13 & B1_nx800) # !B1_L1time_13 & B1_c_time_13 & (B1_nx800); --S3_nx269 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx269 --operation mode is normal S3_nx269 = N1_request_47 & !N1_request_48 & S3_NI_P3_CLKout; --S3_nx270 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx270 --operation mode is normal S3_nx270 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_PREout) # !N1_request_48 & S3_NI_P0_PREout); --S2_nx269 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx269 --operation mode is normal S2_nx269 = N1_request_47 & !N1_request_48 & S2_NI_P3_CLKout; --S2_nx270 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx270 --operation mode is normal S2_nx270 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_PREout) # !N1_request_48 & S2_NI_P0_PREout); --S1_nx269 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx269 --operation mode is normal S1_nx269 = N1_request_47 & !N1_request_48 & S1_NI_P3_CLKout; --S1_nx270 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx270 --operation mode is normal S1_nx270 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_PREout) # !N1_request_48 & S1_NI_P0_PREout); --F2_data_1p_m_6 is ni2dpm_12:ni_ni_pos|data_1p_m_6 --operation mode is normal F2_data_1p_m_6 = G1_ni_or_mask_6 # !G1_NOT_ni_and_mask_6 & (G1_ni_xor_mask_6 $ F2_data_1p_6); --F2_nx373 is ni2dpm_12:ni_ni_pos|nx373 --operation mode is normal F2_nx373 = G1_ni_sel_s_2 & G1_ni_sel_s_1; --F2_par_en is ni2dpm_12:ni_ni_pos|par_en --operation mode is normal F2_par_en = F2_we_p & F2_nx152 & (!F2_oa_ctrl_s # !G1_ni_oase_mode); --P1_RESRV is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|RESRV --operation mode is normal P1_RESRV_lut_out = !P1_ptrf_1 & !P1_ptrf_0 & P1_nx38 & P1_modgen_eq_659_nx12; P1_RESRV = DFFEAS(P1_RESRV_lut_out, X1__clk0, J1_chipRST_n, , , , , P1_modgen_eq_658_nx12, ); --P3_RESRV is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|RESRV --operation mode is normal P3_RESRV_lut_out = !P3_ptrf_1 & !P3_ptrf_0 & P3_nx38 & P3_modgen_eq_659_nx12; P3_RESRV = DFFEAS(P3_RESRV_lut_out, X1__clk0, J1_chipRST_n, , , , , P3_modgen_eq_658_nx12, ); --P2_RESRV is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|RESRV --operation mode is normal P2_RESRV_lut_out = !P2_ptrf_1 & !P2_ptrf_0 & P2_nx38 & P2_modgen_eq_659_nx12; P2_RESRV = DFFEAS(P2_RESRV_lut_out, X1__clk0, J1_chipRST_n, , , , , P2_modgen_eq_658_nx12, ); --P4_RESRV is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|RESRV --operation mode is normal P4_RESRV_lut_out = !P4_ptrf_1 & !P4_ptrf_0 & P4_nx38 & P4_modgen_eq_659_nx12; P4_RESRV = DFFEAS(P4_RESRV_lut_out, X1__clk0, J1_chipRST_n, , , , , P4_modgen_eq_658_nx12, ); --F2_data_1p_5 is ni2dpm_12:ni_ni_pos|data_1p_5 --operation mode is normal F2_data_1p_5_lut_out = DUT_P4_D[5]; F2_data_1p_5 = DFFEAS(F2_data_1p_5_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P3_D_9 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_9 --operation mode is normal S3_NI_P3_D_9_lut_out = S3_NI_P4_CTRL; S3_NI_P3_D_9 = DFFEAS(S3_NI_P3_D_9_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_9 --operation mode is normal S2_NI_P3_D_9_lut_out = S2_NI_P4_CTRL; S2_NI_P3_D_9 = DFFEAS(S2_NI_P3_D_9_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_9 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_9 --operation mode is normal S1_NI_P3_D_9_lut_out = S1_NI_P4_CTRL; S1_NI_P3_D_9 = DFFEAS(S1_NI_P3_D_9_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --S3_NI_P3_D_6 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_D_6 --operation mode is normal S3_NI_P3_D_6_lut_out = S3_NI_P4_D_8; S3_NI_P3_D_6 = DFFEAS(S3_NI_P3_D_6_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_D_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_D_6 --operation mode is normal S2_NI_P3_D_6_lut_out = S2_NI_P4_D_8; S2_NI_P3_D_6 = DFFEAS(S2_NI_P3_D_6_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_D_6 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_D_6 --operation mode is normal S1_NI_P3_D_6_lut_out = S1_NI_P4_D_8; S1_NI_P3_D_6 = DFFEAS(S1_NI_P3_D_6_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_10 is scsn_slave_nw_dll_ob1_ob_data_10 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_10_lut_out = scsn_slave_nw_dll_ob1_ob_data_9; scsn_slave_nw_dll_ob1_ob_data_10 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_10_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_10, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_11 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_11 --operation mode is normal Y2_d_to_dll_11 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_11 # !Y2_current_state_0 & (J1_reply_11)); --D1_jtgsnd_ser_t_16 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_16 --operation mode is normal D1_jtgsnd_ser_t_16_lut_out = D1_jtgsnd_ser_t_15; D1_jtgsnd_ser_t_16 = DFFEAS(D1_jtgsnd_ser_t_16_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_10, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_16 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_16 --operation mode is normal E1_jtgsnd_ser_t_16_lut_out = E1_jtgsnd_ser_t_15; E1_jtgsnd_ser_t_16 = DFFEAS(E1_jtgsnd_ser_t_16_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_10, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_16 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_16 --operation mode is normal E2_jtgsnd_ser_t_16_lut_out = E2_jtgsnd_ser_t_15; E2_jtgsnd_ser_t_16 = DFFEAS(E2_jtgsnd_ser_t_16_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_10, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_9 is scsn_slave_nw_dll_ob0_ob_data_9 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_9_lut_out = scsn_slave_nw_dll_ob0_ob_data_8; scsn_slave_nw_dll_ob0_ob_data_9 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_9_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_9, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_10 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_10 --operation mode is normal Y1_d_to_dll_10 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_10 # !Y1_current_state_0 & (J1_reply_10)); --J1_reply_11 is mcm_nw_apl:scsn_slave_nw_apl|reply_11 --operation mode is normal J1_reply_11 = N1_request_11 & (J1_a_0_dup_54 # J1_read_data_20 & !J1_ix34_ix30_nx12) # !N1_request_11 & J1_read_data_20 & (!J1_ix34_ix30_nx12); --J1_read_data_19 is mcm_nw_apl:scsn_slave_nw_apl|read_data_19 --operation mode is normal J1_read_data_19_lut_out = C1_bus_dout_19; J1_read_data_19 = DFFEAS(J1_read_data_19_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_18 is gio_devices:gio|bus_dout_18 --operation mode is normal C1_bus_dout_18_lut_out = C1_nx244 # C1_nx245 # C1_nx246; C1_bus_dout_18 = DFFEAS(C1_bus_dout_18_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx247 is gio_devices:gio|nx247 --operation mode is normal C1_nx247 = W1_q_b[9] & (C1_sel_5 # G1_bus_dout_17 & C1_ce_gen) # !W1_q_b[9] & G1_bus_dout_17 & (C1_ce_gen); --C1_nx248 is gio_devices:gio|nx248 --operation mode is normal C1_nx248 = B1_bus_dout_17 & (C1_ce_cp # E2_bus_dout_17 & C1_ce_ni_jtg_up) # !B1_bus_dout_17 & E2_bus_dout_17 & (C1_ce_ni_jtg_up); --C1_nx249 is gio_devices:gio|nx249 --operation mode is normal C1_nx249 = E1_bus_dout_17 & (C1_ce_ni_jtg_dn # D1_bus_dout_17 & C1_ce_dut_jtg) # !E1_bus_dout_17 & D1_bus_dout_17 & (C1_ce_dut_jtg); --G1_bus_dout_16 is general_config_notri:nic_notri|bus_dout_16 --operation mode is normal G1_bus_dout_16 = G1_nx454 # G1_nx455 # DUT_SER0_IN & !G1_ix69_ix18_nx12; --B1_bus_dout_16 is clkpre_counter:cp|bus_dout_16 --operation mode is normal B1_bus_dout_16 = B1_nx736 # B1_nx820 # B1_dout_ccnt_16 & B1_nx794; --E2_bus_dout_16 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_16 --operation mode is normal E2_bus_dout_16_lut_out = S3_dout_16; E2_bus_dout_16 = DFFEAS(E2_bus_dout_16_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_16 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_16 --operation mode is normal E1_bus_dout_16_lut_out = S2_dout_16; E1_bus_dout_16 = DFFEAS(E1_bus_dout_16_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_16 is jtag_master_1_notri:jtag_dut_notri|bus_dout_16 --operation mode is normal D1_bus_dout_16_lut_out = S1_dout_16; D1_bus_dout_16 = DFFEAS(D1_bus_dout_16_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --F2_data_2p_7 is ni2dpm_12:ni_ni_pos|data_2p_7 --operation mode is normal F2_data_2p_7 = G1_NOT_ni_sel_p_3 & F2_ex_p_q1pass_8 # !G1_NOT_ni_sel_p_3 & (F2_ex_p_q1pass_7); --G1_nx453 is general_config_notri:nic_notri|nx453 --operation mode is normal G1_nx453 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_3 # !N1_request_48 & (F2_naddr_3)); --G1_nx471 is general_config_notri:nic_notri|nx471 --operation mode is normal G1_nx471 = N1_request_44 & N1_request_43 & G1_se1_cnt_7 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_15 is clkpre_counter:cp|dout_ccnt_15 --operation mode is normal B1_dout_ccnt_15_carry_eqn = B1_ccnt_cnt_1_cnt_i_Q_nx41; B1_dout_ccnt_15_lut_out = B1_dout_ccnt_15 $ (B1_dout_ccnt_15_carry_eqn); B1_dout_ccnt_15 = DFFEAS(B1_dout_ccnt_15_lut_out, GLOBAL(DUT_CLK[1]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_nx737 is clkpre_counter:cp|nx737 --operation mode is normal B1_nx737 = B1_dout1pcnt_15 & (B1_nx795 # B1_dout3pcnt_15 & B1_nx796) # !B1_dout1pcnt_15 & B1_dout3pcnt_15 & (B1_nx796); --B1_nx821 is clkpre_counter:cp|nx821 --operation mode is normal B1_nx821 = B1_dout0pcnt_15 & (B1_nx798 # B1_dout2pcnt_15 & B1_nx797) # !B1_dout0pcnt_15 & B1_dout2pcnt_15 & B1_nx797; --S3_dout_15 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_15 --operation mode is normal S3_dout_15 = N1_request_46 & S3_NI_P_CTRL; --S2_dout_15 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_15 --operation mode is normal S2_dout_15 = N1_request_46 & S2_NI_P_CTRL; --S1_dout_15 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_15 --operation mode is normal S1_dout_15 = N1_request_46 & S1_NI_P_CTRL; --F2_ex_p_q1pass_7 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_7 --operation mode is normal F2_ex_p_q1pass_7 = G1_NOT_ni_sel_s_3 & F2_data_1p_m_8 # !G1_NOT_ni_sel_s_3 & (F2_data_1p_m_7); --F2_ex_p_modgen_gt_600_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_600_nx56 --operation mode is normal F2_ex_p_modgen_gt_600_nx56 = G1_ni_sel_p_2 & G1_ni_sel_p_1 & !G1_NOT_ni_sel_p_0 # !G1_NOT_ni_sel_p_3; --F2_par_cnt_2 is ni2dpm_12:ni_ni_pos|par_cnt_2 --operation mode is arithmetic F2_par_cnt_2_carry_eqn = F2_parc_Q_nx16; F2_par_cnt_2_lut_out = F2_par_cnt_2 $ (!F2_par_cnt_2_carry_eqn); F2_par_cnt_2 = DFFEAS(F2_par_cnt_2_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx22 is ni2dpm_12:ni_ni_pos|parc_Q_nx22 --operation mode is arithmetic F2_parc_Q_nx22 = CARRY(F2_par_cnt_2 & (!F2_parc_Q_nx16)); --B1_dout1pcnt_14 is clkpre_counter:cp|dout1pcnt_14 --operation mode is arithmetic B1_dout1pcnt_14_carry_eqn = B1_pcnt1_cnt_3_cnt_i_Q_nx16; B1_dout1pcnt_14_lut_out = B1_dout1pcnt_14 $ (!B1_dout1pcnt_14_carry_eqn); B1_dout1pcnt_14 = DFFEAS(B1_dout1pcnt_14_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_3_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_3_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_3_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_14 & (!B1_pcnt1_cnt_3_cnt_i_Q_nx16)); --B1_dout3pcnt_14 is clkpre_counter:cp|dout3pcnt_14 --operation mode is arithmetic B1_dout3pcnt_14_carry_eqn = B1_pcnt3_cnt_3_cnt_i_Q_nx16; B1_dout3pcnt_14_lut_out = B1_dout3pcnt_14 $ (!B1_dout3pcnt_14_carry_eqn); B1_dout3pcnt_14 = DFFEAS(B1_dout3pcnt_14_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_3_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_3_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_3_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_14 & (!B1_pcnt3_cnt_3_cnt_i_Q_nx16)); --B1_dout0pcnt_14 is clkpre_counter:cp|dout0pcnt_14 --operation mode is arithmetic B1_dout0pcnt_14_carry_eqn = B1_pcnt0_cnt_3_cnt_i_Q_nx16; B1_dout0pcnt_14_lut_out = B1_dout0pcnt_14 $ (!B1_dout0pcnt_14_carry_eqn); B1_dout0pcnt_14 = DFFEAS(B1_dout0pcnt_14_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_3_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_3_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_3_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_14 & (!B1_pcnt0_cnt_3_cnt_i_Q_nx16)); --B1_dout2pcnt_14 is clkpre_counter:cp|dout2pcnt_14 --operation mode is arithmetic B1_dout2pcnt_14_carry_eqn = B1_pcnt2_cnt_3_cnt_i_Q_nx16; B1_dout2pcnt_14_lut_out = B1_dout2pcnt_14 $ (!B1_dout2pcnt_14_carry_eqn); B1_dout2pcnt_14 = DFFEAS(B1_dout2pcnt_14_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_3_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_3_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_3_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_14 & (!B1_pcnt2_cnt_3_cnt_i_Q_nx16)); --S3_nx271 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx271 --operation mode is normal S3_nx271 = N1_request_47 & !N1_request_48 & S3_NI_P4_CTRL; --S3_nx272 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx272 --operation mode is normal S3_nx272 = !N1_request_47 & (N1_request_48 & (S3_NI_P2_CTRL) # !N1_request_48 & S3_NI_P0_CTRL); --S2_nx271 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx271 --operation mode is normal S2_nx271 = N1_request_47 & !N1_request_48 & S2_NI_P4_CTRL; --S2_nx272 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx272 --operation mode is normal S2_nx272 = !N1_request_47 & (N1_request_48 & (S2_NI_P2_CTRL) # !N1_request_48 & S2_NI_P0_CTRL); --S1_nx271 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx271 --operation mode is normal S1_nx271 = N1_request_47 & !N1_request_48 & S1_NI_P4_CTRL; --S1_nx272 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx272 --operation mode is normal S1_nx272 = !N1_request_47 & (N1_request_48 & (S1_NI_P2_CTRL) # !N1_request_48 & S1_NI_P0_CTRL); --F2_data_1p_m_7 is ni2dpm_12:ni_ni_pos|data_1p_m_7 --operation mode is normal F2_data_1p_m_7 = G1_ni_or_mask_7 # !G1_NOT_ni_and_mask_7 & (G1_ni_xor_mask_7 $ F2_data_1p_7); --F2_ex_p_modgen_gt_591_nx56 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_591_nx56 --operation mode is normal F2_ex_p_modgen_gt_591_nx56 = G1_ni_sel_s_2 & G1_ni_sel_s_1 & G1_ni_sel_s_0 # !G1_NOT_ni_sel_s_3; --S3_NI_P3_CLKout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_CLKout --operation mode is normal S3_NI_P3_CLKout_lut_out = S3_seribd_t_72; S3_NI_P3_CLKout = DFFEAS(S3_NI_P3_CLKout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_CLKout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_CLKout --operation mode is normal S2_NI_P3_CLKout_lut_out = S2_seribd_t_72; S2_NI_P3_CLKout = DFFEAS(S2_NI_P3_CLKout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_CLKout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_CLKout --operation mode is normal S1_NI_P3_CLKout_lut_out = S1_seribd_t_72; S1_NI_P3_CLKout = DFFEAS(S1_NI_P3_CLKout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_data_1p_6 is ni2dpm_12:ni_ni_pos|data_1p_6 --operation mode is normal F2_data_1p_6_lut_out = DUT_P4_D[6]; F2_data_1p_6 = DFFEAS(F2_data_1p_6_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_nx152 is ni2dpm_12:ni_ni_pos|nx152 --operation mode is normal F2_nx152 = F2_modgen_xor_1057_nx14 $ F2_modgen_xor_1057_nx18 $ F2_data_2p_7 $ F2_prty_bit; --S3_NI_P4_CTRL is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P4_CTRL --operation mode is normal S3_NI_P4_CTRL_lut_out = S3_NI_P4_D_9; S3_NI_P4_CTRL = DFFEAS(S3_NI_P4_CTRL_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P4_CTRL is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P4_CTRL --operation mode is normal S2_NI_P4_CTRL_lut_out = S2_NI_P4_D_9; S2_NI_P4_CTRL = DFFEAS(S2_NI_P4_CTRL_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P4_CTRL is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P4_CTRL --operation mode is normal S1_NI_P4_CTRL_lut_out = S1_NI_P4_D_9; S1_NI_P4_CTRL = DFFEAS(S1_NI_P4_CTRL_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --scsn_slave_nw_dll_ob1_ob_data_9 is scsn_slave_nw_dll_ob1_ob_data_9 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_9_lut_out = scsn_slave_nw_dll_ob1_ob_data_8; scsn_slave_nw_dll_ob1_ob_data_9 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_9_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_9, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_10 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_10 --operation mode is normal Y2_d_to_dll_10 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_10 # !Y2_current_state_0 & (J1_reply_10)); --D1_jtgsnd_ser_t_15 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_15 --operation mode is normal D1_jtgsnd_ser_t_15_lut_out = D1_jtgsnd_ser_t_14; D1_jtgsnd_ser_t_15 = DFFEAS(D1_jtgsnd_ser_t_15_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_22, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_15 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_15 --operation mode is normal E1_jtgsnd_ser_t_15_lut_out = E1_jtgsnd_ser_t_14; E1_jtgsnd_ser_t_15 = DFFEAS(E1_jtgsnd_ser_t_15_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_22, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_15 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_15 --operation mode is normal E2_jtgsnd_ser_t_15_lut_out = E2_jtgsnd_ser_t_14; E2_jtgsnd_ser_t_15 = DFFEAS(E2_jtgsnd_ser_t_15_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_22, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_8 is scsn_slave_nw_dll_ob0_ob_data_8 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_8_lut_out = scsn_slave_nw_dll_ob0_ob_data_7; scsn_slave_nw_dll_ob0_ob_data_8 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_8_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_8, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_9 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_9 --operation mode is normal Y1_d_to_dll_9 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_9 # !Y1_current_state_0 & (J1_reply_9)); --J1_reply_10 is mcm_nw_apl:scsn_slave_nw_apl|reply_10 --operation mode is normal J1_reply_10 = N1_request_10 & (J1_a_0_dup_54 # J1_read_data_21 & !J1_ix34_ix30_nx12) # !N1_request_10 & J1_read_data_21 & (!J1_ix34_ix30_nx12); --J1_read_data_20 is mcm_nw_apl:scsn_slave_nw_apl|read_data_20 --operation mode is normal J1_read_data_20_lut_out = C1_bus_dout_20; J1_read_data_20 = DFFEAS(J1_read_data_20_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_19 is gio_devices:gio|bus_dout_19 --operation mode is normal C1_bus_dout_19_lut_out = C1_nx241 # C1_nx242 # C1_nx243; C1_bus_dout_19 = DFFEAS(C1_bus_dout_19_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx244 is gio_devices:gio|nx244 --operation mode is normal C1_nx244 = W1_q_b[10] & (C1_sel_5 # G1_bus_dout_18 & C1_ce_gen) # !W1_q_b[10] & G1_bus_dout_18 & (C1_ce_gen); --C1_nx245 is gio_devices:gio|nx245 --operation mode is normal C1_nx245 = B1_bus_dout_18 & (C1_ce_cp # E2_bus_dout_18 & C1_ce_ni_jtg_up) # !B1_bus_dout_18 & E2_bus_dout_18 & (C1_ce_ni_jtg_up); --C1_nx246 is gio_devices:gio|nx246 --operation mode is normal C1_nx246 = E1_bus_dout_18 & (C1_ce_ni_jtg_dn # D1_bus_dout_18 & C1_ce_dut_jtg) # !E1_bus_dout_18 & D1_bus_dout_18 & (C1_ce_dut_jtg); --G1_bus_dout_17 is general_config_notri:nic_notri|bus_dout_17 --operation mode is normal G1_bus_dout_17 = G1_nx456 # G1_nx470 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_7; --B1_bus_dout_17 is clkpre_counter:cp|bus_dout_17 --operation mode is normal B1_bus_dout_17 = B1_nx735 # B1_nx819 # B1_dout_ccnt_17 & B1_nx794; --E2_bus_dout_17 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_17 --operation mode is normal E2_bus_dout_17_lut_out = S3_dout_17; E2_bus_dout_17 = DFFEAS(E2_bus_dout_17_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_17 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_17 --operation mode is normal E1_bus_dout_17_lut_out = S2_dout_17; E1_bus_dout_17 = DFFEAS(E1_bus_dout_17_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_17 is jtag_master_1_notri:jtag_dut_notri|bus_dout_17 --operation mode is normal D1_bus_dout_17_lut_out = S1_dout_17; D1_bus_dout_17 = DFFEAS(D1_bus_dout_17_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx454 is general_config_notri:nic_notri|nx454 --operation mode is normal G1_nx454 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_4 # !N1_request_48 & (F2_naddr_4)); --G1_nx455 is general_config_notri:nic_notri|nx455 --operation mode is normal G1_nx455 = G1_se2_cnt_0 & (G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_6 # !G1_ix69_ix32_nx12) # !G1_se2_cnt_0 & G1_NOT_ix69_ix28_nx12 & (!G1_NOT_ni_and_mask_6); --B1_dout_ccnt_16 is clkpre_counter:cp|dout_ccnt_16 --operation mode is arithmetic B1_dout_ccnt_16_lut_out = B1_dout_ccnt_16 $ B1_ccnt_count_en_2; B1_dout_ccnt_16 = DFFEAS(B1_dout_ccnt_16_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx10 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx10 = CARRY(B1_dout_ccnt_16 & B1_ccnt_count_en_2); --B1_nx736 is clkpre_counter:cp|nx736 --operation mode is normal B1_nx736 = B1_dout1pcnt_16 & (B1_nx795 # B1_dout3pcnt_16 & B1_nx796) # !B1_dout1pcnt_16 & B1_dout3pcnt_16 & (B1_nx796); --B1_nx820 is clkpre_counter:cp|nx820 --operation mode is normal B1_nx820 = B1_dout0pcnt_16 & (B1_nx798 # B1_dout2pcnt_16 & B1_nx797) # !B1_dout0pcnt_16 & B1_dout2pcnt_16 & B1_nx797; --S3_dout_16 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_16 --operation mode is normal S3_dout_16 = N1_request_46 & S3_NI_P0_D_8 # !N1_request_46 & (S3_nx273 # S3_nx274); --S2_dout_16 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_16 --operation mode is normal S2_dout_16 = N1_request_46 & S2_NI_P0_D_8 # !N1_request_46 & (S2_nx273 # S2_nx274); --S1_dout_16 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_16 --operation mode is normal S1_dout_16 = N1_request_46 & S1_NI_P0_D_8 # !N1_request_46 & (S1_nx273 # S1_nx274); --F2_ex_p_q1pass_8 is ni2dpm_12:ni_ni_pos|ex_p_q1pass_8 --operation mode is normal F2_ex_p_q1pass_8 = F2_ex_p_modgen_gt_589_nx54 & F2_data_1p_m_8 # !F2_ex_p_modgen_gt_589_nx54 & (F2_nx368); --F2_par_cnt_3 is ni2dpm_12:ni_ni_pos|par_cnt_3 --operation mode is arithmetic F2_par_cnt_3_carry_eqn = F2_parc_Q_nx22; F2_par_cnt_3_lut_out = F2_par_cnt_3 $ (F2_par_cnt_3_carry_eqn); F2_par_cnt_3 = DFFEAS(F2_par_cnt_3_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx28 is ni2dpm_12:ni_ni_pos|parc_Q_nx28 --operation mode is arithmetic F2_parc_Q_nx28 = CARRY(!F2_parc_Q_nx22 # !F2_par_cnt_3); --B1_dout1pcnt_15 is clkpre_counter:cp|dout1pcnt_15 --operation mode is normal B1_dout1pcnt_15_carry_eqn = B1_pcnt1_cnt_3_cnt_i_Q_nx21; B1_dout1pcnt_15_lut_out = B1_dout1pcnt_15 $ (B1_dout1pcnt_15_carry_eqn); B1_dout1pcnt_15 = DFFEAS(B1_dout1pcnt_15_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_15 is clkpre_counter:cp|dout3pcnt_15 --operation mode is normal B1_dout3pcnt_15_carry_eqn = B1_pcnt3_cnt_3_cnt_i_Q_nx21; B1_dout3pcnt_15_lut_out = B1_dout3pcnt_15 $ (B1_dout3pcnt_15_carry_eqn); B1_dout3pcnt_15 = DFFEAS(B1_dout3pcnt_15_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout0pcnt_15 is clkpre_counter:cp|dout0pcnt_15 --operation mode is normal B1_dout0pcnt_15_carry_eqn = B1_pcnt0_cnt_3_cnt_i_Q_nx21; B1_dout0pcnt_15_lut_out = B1_dout0pcnt_15 $ (B1_dout0pcnt_15_carry_eqn); B1_dout0pcnt_15 = DFFEAS(B1_dout0pcnt_15_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_15 is clkpre_counter:cp|dout2pcnt_15 --operation mode is normal B1_dout2pcnt_15_carry_eqn = B1_pcnt2_cnt_3_cnt_i_Q_nx21; B1_dout2pcnt_15_lut_out = B1_dout2pcnt_15 $ (B1_dout2pcnt_15_carry_eqn); B1_dout2pcnt_15 = DFFEAS(B1_dout2pcnt_15_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --F2_data_1p_m_8 is ni2dpm_12:ni_ni_pos|data_1p_m_8 --operation mode is normal F2_data_1p_m_8 = G1_ni_or_mask_8 # !G1_NOT_ni_and_mask_8 & (G1_ni_xor_mask_8 $ F2_data_1p_8); --F2_data_1p_7 is ni2dpm_12:ni_ni_pos|data_1p_7 --operation mode is normal F2_data_1p_7_lut_out = DUT_P4_D[7]; F2_data_1p_7 = DFFEAS(F2_data_1p_7_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_seribd_t_72 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|seribd_t_72 --operation mode is normal S3_seribd_t_72_lut_out = S3_NI_P3_PREout; S3_seribd_t_72 = DFFEAS(S3_seribd_t_72_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_seribd_t_72 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|seribd_t_72 --operation mode is normal S2_seribd_t_72_lut_out = S2_NI_P3_PREout; S2_seribd_t_72 = DFFEAS(S2_seribd_t_72_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_seribd_t_72 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|seribd_t_72 --operation mode is normal S1_seribd_t_72_lut_out = S1_NI_P3_PREout; S1_seribd_t_72 = DFFEAS(S1_seribd_t_72_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_modgen_xor_1057_nx14 is ni2dpm_12:ni_ni_pos|modgen_xor_1057_nx14 --operation mode is normal F2_modgen_xor_1057_nx14 = F2_data_2p_0 $ F2_data_2p_1 $ F2_data_2p_2 $ F2_data_2p_3; --F2_modgen_xor_1057_nx18 is ni2dpm_12:ni_ni_pos|modgen_xor_1057_nx18 --operation mode is normal F2_modgen_xor_1057_nx18 = F2_data_2p_6 $ F2_data_2p_5 $ F2_data_2p_4; --F2_prty_bit is ni2dpm_12:ni_ni_pos|prty_bit --operation mode is normal F2_prty_bit = G1_NOT_ni_sel_p_3 & (F2_nx376 & F2_nx377) # !G1_NOT_ni_sel_p_3 & F2_ex_p_q1pass_8; --scsn_slave_nw_dll_ob1_ob_data_8 is scsn_slave_nw_dll_ob1_ob_data_8 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_8_lut_out = scsn_slave_nw_dll_ob1_ob_data_7; scsn_slave_nw_dll_ob1_ob_data_8 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_8_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_8, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_9 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_9 --operation mode is normal Y2_d_to_dll_9 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_9 # !Y2_current_state_0 & (J1_reply_9)); --D1_jtgsnd_ser_t_14 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_14 --operation mode is normal D1_jtgsnd_ser_t_14_lut_out = D1_jtgsnd_ser_t_13; D1_jtgsnd_ser_t_14 = DFFEAS(D1_jtgsnd_ser_t_14_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_9, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_14 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_14 --operation mode is normal E1_jtgsnd_ser_t_14_lut_out = E1_jtgsnd_ser_t_13; E1_jtgsnd_ser_t_14 = DFFEAS(E1_jtgsnd_ser_t_14_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_9, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_14 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_14 --operation mode is normal E2_jtgsnd_ser_t_14_lut_out = E2_jtgsnd_ser_t_13; E2_jtgsnd_ser_t_14 = DFFEAS(E2_jtgsnd_ser_t_14_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_9, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_7 is scsn_slave_nw_dll_ob0_ob_data_7 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_7_lut_out = scsn_slave_nw_dll_ob0_ob_data_6; scsn_slave_nw_dll_ob0_ob_data_7 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_7_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_7, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_8 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_8 --operation mode is normal Y1_d_to_dll_8 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_8 # !Y1_current_state_0 & (J1_reply_8)); --J1_reply_9 is mcm_nw_apl:scsn_slave_nw_apl|reply_9 --operation mode is normal J1_reply_9 = N1_request_9 & (J1_a_0_dup_54 # J1_read_data_22 & !J1_ix34_ix30_nx12) # !N1_request_9 & J1_read_data_22 & (!J1_ix34_ix30_nx12); --J1_read_data_21 is mcm_nw_apl:scsn_slave_nw_apl|read_data_21 --operation mode is normal J1_read_data_21_lut_out = C1_bus_dout_21; J1_read_data_21 = DFFEAS(J1_read_data_21_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_20 is gio_devices:gio|bus_dout_20 --operation mode is normal C1_bus_dout_20_lut_out = C1_nx238 # C1_nx239 # C1_nx240; C1_bus_dout_20 = DFFEAS(C1_bus_dout_20_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx241 is gio_devices:gio|nx241 --operation mode is normal C1_nx241 = W1_q_b[11] & (C1_sel_5 # G1_bus_dout_19 & C1_ce_gen) # !W1_q_b[11] & G1_bus_dout_19 & (C1_ce_gen); --C1_nx242 is gio_devices:gio|nx242 --operation mode is normal C1_nx242 = B1_bus_dout_19 & (C1_ce_cp # E2_bus_dout_19 & C1_ce_ni_jtg_up) # !B1_bus_dout_19 & E2_bus_dout_19 & (C1_ce_ni_jtg_up); --C1_nx243 is gio_devices:gio|nx243 --operation mode is normal C1_nx243 = E1_bus_dout_19 & (C1_ce_ni_jtg_dn # D1_bus_dout_19 & C1_ce_dut_jtg) # !E1_bus_dout_19 & D1_bus_dout_19 & (C1_ce_dut_jtg); --G1_bus_dout_18 is general_config_notri:nic_notri|bus_dout_18 --operation mode is normal G1_bus_dout_18 = G1_nx457 # G1_nx469 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_8; --B1_bus_dout_18 is clkpre_counter:cp|bus_dout_18 --operation mode is normal B1_bus_dout_18 = B1_nx734 # B1_nx818 # B1_dout_ccnt_18 & B1_nx794; --E2_bus_dout_18 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_18 --operation mode is normal E2_bus_dout_18_lut_out = S3_dout_18; E2_bus_dout_18 = DFFEAS(E2_bus_dout_18_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_18 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_18 --operation mode is normal E1_bus_dout_18_lut_out = S2_dout_18; E1_bus_dout_18 = DFFEAS(E1_bus_dout_18_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_18 is jtag_master_1_notri:jtag_dut_notri|bus_dout_18 --operation mode is normal D1_bus_dout_18_lut_out = S1_dout_18; D1_bus_dout_18 = DFFEAS(D1_bus_dout_18_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx456 is general_config_notri:nic_notri|nx456 --operation mode is normal G1_nx456 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_5 # !N1_request_48 & (F2_naddr_5)); --G1_nx470 is general_config_notri:nic_notri|nx470 --operation mode is normal G1_nx470 = N1_request_44 & N1_request_43 & G1_se2_cnt_1 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_17 is clkpre_counter:cp|dout_ccnt_17 --operation mode is arithmetic B1_dout_ccnt_17_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx10; B1_dout_ccnt_17_lut_out = B1_dout_ccnt_17 $ (B1_dout_ccnt_17_carry_eqn); B1_dout_ccnt_17 = DFFEAS(B1_dout_ccnt_17_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx16 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx16 = CARRY(!B1_ccnt_cnt_2_cnt_i_Q_nx10 # !B1_dout_ccnt_17); --B1_nx735 is clkpre_counter:cp|nx735 --operation mode is normal B1_nx735 = B1_dout1pcnt_17 & (B1_nx795 # B1_dout3pcnt_17 & B1_nx796) # !B1_dout1pcnt_17 & B1_dout3pcnt_17 & (B1_nx796); --B1_nx819 is clkpre_counter:cp|nx819 --operation mode is normal B1_nx819 = B1_dout0pcnt_17 & (B1_nx798 # B1_dout2pcnt_17 & B1_nx797) # !B1_dout0pcnt_17 & B1_dout2pcnt_17 & B1_nx797; --S3_dout_17 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_17 --operation mode is normal S3_dout_17 = N1_request_46 & S3_NI_P0_D_7 # !N1_request_46 & (S3_nx275 # S3_nx276); --S2_dout_17 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_17 --operation mode is normal S2_dout_17 = N1_request_46 & S2_NI_P0_D_7 # !N1_request_46 & (S2_nx275 # S2_nx276); --S1_dout_17 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_17 --operation mode is normal S1_dout_17 = N1_request_46 & S1_NI_P0_D_7 # !N1_request_46 & (S1_nx275 # S1_nx276); --F2_par_cnt_4 is ni2dpm_12:ni_ni_pos|par_cnt_4 --operation mode is arithmetic F2_par_cnt_4_carry_eqn = F2_parc_Q_nx28; F2_par_cnt_4_lut_out = F2_par_cnt_4 $ (!F2_par_cnt_4_carry_eqn); F2_par_cnt_4 = DFFEAS(F2_par_cnt_4_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx34 is ni2dpm_12:ni_ni_pos|parc_Q_nx34 --operation mode is arithmetic F2_parc_Q_nx34 = CARRY(F2_par_cnt_4 & (!F2_parc_Q_nx28)); --G1_se2_cnt_0 is general_config_notri:nic_notri|se2_cnt_0 --operation mode is arithmetic G1_se2_cnt_0_lut_out = G1_se2_cnt_0 $ G1_NOT_nx2025; G1_se2_cnt_0 = DFFEAS(G1_se2_cnt_0_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx9 is general_config_notri:nic_notri|se2_cnt_nx9 --operation mode is arithmetic G1_se2_cnt_nx9 = CARRY(G1_se2_cnt_0 & G1_NOT_nx2025); --B1_ccnt_count_en_2 is clkpre_counter:cp|ccnt_count_en_2 --operation mode is normal B1_ccnt_count_en_2_lut_out = B1_ccnt_count_en_c; B1_ccnt_count_en_2 = DFFEAS(B1_ccnt_count_en_2_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_dout1pcnt_16 is clkpre_counter:cp|dout1pcnt_16 --operation mode is arithmetic B1_dout1pcnt_16_lut_out = B1_dout1pcnt_16 $ P2_FUNC_0; B1_dout1pcnt_16 = DFFEAS(B1_dout1pcnt_16_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_4_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_4_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_4_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_16 & P2_FUNC_0); --B1_dout3pcnt_16 is clkpre_counter:cp|dout3pcnt_16 --operation mode is arithmetic B1_dout3pcnt_16_lut_out = B1_dout3pcnt_16 $ P4_FUNC_0; B1_dout3pcnt_16 = DFFEAS(B1_dout3pcnt_16_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_4_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_4_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_4_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_16 & P4_FUNC_0); --B1_dout0pcnt_16 is clkpre_counter:cp|dout0pcnt_16 --operation mode is arithmetic B1_dout0pcnt_16_lut_out = B1_dout0pcnt_16 $ P1_FUNC_0; B1_dout0pcnt_16 = DFFEAS(B1_dout0pcnt_16_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_4_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_4_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_4_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_16 & P1_FUNC_0); --B1_dout2pcnt_16 is clkpre_counter:cp|dout2pcnt_16 --operation mode is arithmetic B1_dout2pcnt_16_lut_out = B1_dout2pcnt_16 $ P3_FUNC_0; B1_dout2pcnt_16 = DFFEAS(B1_dout2pcnt_16_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_4_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_4_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_4_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_16 & P3_FUNC_0); --S3_nx273 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx273 --operation mode is normal S3_nx273 = N1_request_47 & !N1_request_48 & S3_SER0_DIN; --S3_nx274 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx274 --operation mode is normal S3_nx274 = !N1_request_47 & (N1_request_48 & (S3_NI_P3_D_0) # !N1_request_48 & S3_NI_P1_D_0); --S2_nx273 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx273 --operation mode is normal S2_nx273 = N1_request_47 & !N1_request_48 & S2_SER0_DIN; --S2_nx274 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx274 --operation mode is normal S2_nx274 = !N1_request_47 & (N1_request_48 & (S2_NI_P3_D_0) # !N1_request_48 & S2_NI_P1_D_0); --S1_nx273 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx273 --operation mode is normal S1_nx273 = N1_request_47 & !N1_request_48 & S1_SER0_DIN; --S1_nx274 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx274 --operation mode is normal S1_nx274 = !N1_request_47 & (N1_request_48 & (S1_NI_P3_D_0) # !N1_request_48 & S1_NI_P1_D_0); --F2_ex_p_modgen_gt_589_nx54 is ni2dpm_12:ni_ni_pos|ex_p_modgen_gt_589_nx54 --operation mode is normal F2_ex_p_modgen_gt_589_nx54 = !G1_NOT_ni_sel_s_3 & (G1_ni_sel_s_2 # G1_ni_sel_s_1 # G1_ni_sel_s_0); --F2_nx368 is ni2dpm_12:ni_ni_pos|nx368 --operation mode is normal F2_nx368 = G1_ni_or_mask_9 # !G1_NOT_ni_and_mask_9 & (G1_ni_xor_mask_9 $ F2_data_1p_9); --F2_data_1p_8 is ni2dpm_12:ni_ni_pos|data_1p_8 --operation mode is normal F2_data_1p_8_lut_out = DUT_P4_D[8]; F2_data_1p_8 = DFFEAS(F2_data_1p_8_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P3_PREout is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_PREout --operation mode is normal S3_NI_P3_PREout_lut_out = S3_NI_P3_STRB; S3_NI_P3_PREout = DFFEAS(S3_NI_P3_PREout_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_PREout is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_PREout --operation mode is normal S2_NI_P3_PREout_lut_out = S2_NI_P3_STRB; S2_NI_P3_PREout = DFFEAS(S2_NI_P3_PREout_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_PREout is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_PREout --operation mode is normal S1_NI_P3_PREout_lut_out = S1_NI_P3_STRB; S1_NI_P3_PREout = DFFEAS(S1_NI_P3_PREout_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_nx376 is ni2dpm_12:ni_ni_pos|nx376 --operation mode is normal F2_nx376 = G1_ni_sel_p_2 # F2_nx374 & (F2_nx362 # !G1_ni_sel_p_1); --F2_nx377 is ni2dpm_12:ni_ni_pos|nx377 --operation mode is normal F2_nx377 = F2_nx375 & (F2_nx363 # !G1_ni_sel_p_1) # !G1_ni_sel_p_2; --scsn_slave_nw_dll_ob1_ob_data_7 is scsn_slave_nw_dll_ob1_ob_data_7 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_7_lut_out = scsn_slave_nw_dll_ob1_ob_data_6; scsn_slave_nw_dll_ob1_ob_data_7 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_7_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_7, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_8 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_8 --operation mode is normal Y2_d_to_dll_8 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_8 # !Y2_current_state_0 & (J1_reply_8)); --D1_jtgsnd_ser_t_13 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_13 --operation mode is normal D1_jtgsnd_ser_t_13_lut_out = D1_jtgsnd_ser_t_12; D1_jtgsnd_ser_t_13 = DFFEAS(D1_jtgsnd_ser_t_13_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_17, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_13 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_13 --operation mode is normal E1_jtgsnd_ser_t_13_lut_out = E1_jtgsnd_ser_t_12; E1_jtgsnd_ser_t_13 = DFFEAS(E1_jtgsnd_ser_t_13_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_17, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_13 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_13 --operation mode is normal E2_jtgsnd_ser_t_13_lut_out = E2_jtgsnd_ser_t_12; E2_jtgsnd_ser_t_13 = DFFEAS(E2_jtgsnd_ser_t_13_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_17, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_6 is scsn_slave_nw_dll_ob0_ob_data_6 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_6_lut_out = scsn_slave_nw_dll_ob0_ob_data_5; scsn_slave_nw_dll_ob0_ob_data_6 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_6_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_6, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_7 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_7 --operation mode is normal Y1_d_to_dll_7 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_7 # !Y1_current_state_0 & (J1_reply_7)); --J1_reply_8 is mcm_nw_apl:scsn_slave_nw_apl|reply_8 --operation mode is normal J1_reply_8 = N1_request_8 & (J1_a_0_dup_54 # J1_read_data_23 & !J1_ix34_ix30_nx12) # !N1_request_8 & J1_read_data_23 & (!J1_ix34_ix30_nx12); --J1_read_data_22 is mcm_nw_apl:scsn_slave_nw_apl|read_data_22 --operation mode is normal J1_read_data_22_lut_out = C1_bus_dout_22; J1_read_data_22 = DFFEAS(J1_read_data_22_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_21 is gio_devices:gio|bus_dout_21 --operation mode is normal C1_bus_dout_21_lut_out = C1_nx235 # C1_nx236 # C1_nx237; C1_bus_dout_21 = DFFEAS(C1_bus_dout_21_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx238 is gio_devices:gio|nx238 --operation mode is normal C1_nx238 = W1_q_b[12] & (C1_sel_5 # G1_bus_dout_20 & C1_ce_gen) # !W1_q_b[12] & G1_bus_dout_20 & (C1_ce_gen); --C1_nx239 is gio_devices:gio|nx239 --operation mode is normal C1_nx239 = B1_bus_dout_20 & (C1_ce_cp # E2_bus_dout_20 & C1_ce_ni_jtg_up) # !B1_bus_dout_20 & E2_bus_dout_20 & (C1_ce_ni_jtg_up); --C1_nx240 is gio_devices:gio|nx240 --operation mode is normal C1_nx240 = E1_bus_dout_20 & (C1_ce_ni_jtg_dn # D1_bus_dout_20 & C1_ce_dut_jtg) # !E1_bus_dout_20 & D1_bus_dout_20 & (C1_ce_dut_jtg); --G1_bus_dout_19 is general_config_notri:nic_notri|bus_dout_19 --operation mode is normal G1_bus_dout_19 = G1_nx458 # G1_nx468 # G1_NOT_ix69_ix28_nx12 & !G1_NOT_ni_and_mask_9; --B1_bus_dout_19 is clkpre_counter:cp|bus_dout_19 --operation mode is normal B1_bus_dout_19 = B1_nx733 # B1_nx817 # B1_dout_ccnt_19 & B1_nx794; --E2_bus_dout_19 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_19 --operation mode is normal E2_bus_dout_19_lut_out = S3_dout_19; E2_bus_dout_19 = DFFEAS(E2_bus_dout_19_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_19 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_19 --operation mode is normal E1_bus_dout_19_lut_out = S2_dout_19; E1_bus_dout_19 = DFFEAS(E1_bus_dout_19_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_19 is jtag_master_1_notri:jtag_dut_notri|bus_dout_19 --operation mode is normal D1_bus_dout_19_lut_out = S1_dout_19; D1_bus_dout_19 = DFFEAS(D1_bus_dout_19_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx457 is general_config_notri:nic_notri|nx457 --operation mode is normal G1_nx457 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_6 # !N1_request_48 & (F2_naddr_6)); --G1_nx469 is general_config_notri:nic_notri|nx469 --operation mode is normal G1_nx469 = N1_request_44 & N1_request_43 & G1_se2_cnt_2 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_18 is clkpre_counter:cp|dout_ccnt_18 --operation mode is arithmetic B1_dout_ccnt_18_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx16; B1_dout_ccnt_18_lut_out = B1_dout_ccnt_18 $ (!B1_dout_ccnt_18_carry_eqn); B1_dout_ccnt_18 = DFFEAS(B1_dout_ccnt_18_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx22 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx22 = CARRY(B1_dout_ccnt_18 & (!B1_ccnt_cnt_2_cnt_i_Q_nx16)); --B1_nx734 is clkpre_counter:cp|nx734 --operation mode is normal B1_nx734 = B1_dout1pcnt_18 & (B1_nx795 # B1_dout3pcnt_18 & B1_nx796) # !B1_dout1pcnt_18 & B1_dout3pcnt_18 & (B1_nx796); --B1_nx818 is clkpre_counter:cp|nx818 --operation mode is normal B1_nx818 = B1_dout0pcnt_18 & (B1_nx798 # B1_dout2pcnt_18 & B1_nx797) # !B1_dout0pcnt_18 & B1_dout2pcnt_18 & B1_nx797; --S3_dout_18 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_18 --operation mode is normal S3_dout_18 = N1_request_46 & (S3_NI_P0_D_6) # !N1_request_46 & !N1_request_47 & (S3_nx249); --S2_dout_18 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_18 --operation mode is normal S2_dout_18 = N1_request_46 & (S2_NI_P0_D_6) # !N1_request_46 & !N1_request_47 & (S2_nx249); --S1_dout_18 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_18 --operation mode is normal S1_dout_18 = N1_request_46 & (S1_NI_P0_D_6) # !N1_request_46 & !N1_request_47 & (S1_nx249); --F2_par_cnt_5 is ni2dpm_12:ni_ni_pos|par_cnt_5 --operation mode is arithmetic F2_par_cnt_5_carry_eqn = F2_parc_Q_nx34; F2_par_cnt_5_lut_out = F2_par_cnt_5 $ (F2_par_cnt_5_carry_eqn); F2_par_cnt_5 = DFFEAS(F2_par_cnt_5_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx40 is ni2dpm_12:ni_ni_pos|parc_Q_nx40 --operation mode is arithmetic F2_parc_Q_nx40 = CARRY(!F2_parc_Q_nx34 # !F2_par_cnt_5); --G1_se2_cnt_1 is general_config_notri:nic_notri|se2_cnt_1 --operation mode is arithmetic G1_se2_cnt_1_carry_eqn = G1_se2_cnt_nx9; G1_se2_cnt_1_lut_out = G1_se2_cnt_1 $ (G1_se2_cnt_1_carry_eqn); G1_se2_cnt_1 = DFFEAS(G1_se2_cnt_1_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx15 is general_config_notri:nic_notri|se2_cnt_nx15 --operation mode is arithmetic G1_se2_cnt_nx15 = CARRY(!G1_se2_cnt_nx9 # !G1_se2_cnt_1); --B1_dout1pcnt_17 is clkpre_counter:cp|dout1pcnt_17 --operation mode is arithmetic B1_dout1pcnt_17_carry_eqn = B1_pcnt1_cnt_4_cnt_i_Q_nx10; B1_dout1pcnt_17_lut_out = B1_dout1pcnt_17 $ (B1_dout1pcnt_17_carry_eqn); B1_dout1pcnt_17 = DFFEAS(B1_dout1pcnt_17_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_4_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_4_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_4_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_4_cnt_i_Q_nx10 # !B1_dout1pcnt_17); --B1_dout3pcnt_17 is clkpre_counter:cp|dout3pcnt_17 --operation mode is arithmetic B1_dout3pcnt_17_carry_eqn = B1_pcnt3_cnt_4_cnt_i_Q_nx10; B1_dout3pcnt_17_lut_out = B1_dout3pcnt_17 $ (B1_dout3pcnt_17_carry_eqn); B1_dout3pcnt_17 = DFFEAS(B1_dout3pcnt_17_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_4_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_4_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_4_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_4_cnt_i_Q_nx10 # !B1_dout3pcnt_17); --B1_dout0pcnt_17 is clkpre_counter:cp|dout0pcnt_17 --operation mode is arithmetic B1_dout0pcnt_17_carry_eqn = B1_pcnt0_cnt_4_cnt_i_Q_nx10; B1_dout0pcnt_17_lut_out = B1_dout0pcnt_17 $ (B1_dout0pcnt_17_carry_eqn); B1_dout0pcnt_17 = DFFEAS(B1_dout0pcnt_17_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_4_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_4_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_4_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_4_cnt_i_Q_nx10 # !B1_dout0pcnt_17); --B1_dout2pcnt_17 is clkpre_counter:cp|dout2pcnt_17 --operation mode is arithmetic B1_dout2pcnt_17_carry_eqn = B1_pcnt2_cnt_4_cnt_i_Q_nx10; B1_dout2pcnt_17_lut_out = B1_dout2pcnt_17 $ (B1_dout2pcnt_17_carry_eqn); B1_dout2pcnt_17 = DFFEAS(B1_dout2pcnt_17_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_4_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_4_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_4_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_4_cnt_i_Q_nx10 # !B1_dout2pcnt_17); --S3_nx275 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx275 --operation mode is normal S3_nx275 = N1_request_47 & !N1_request_48 & S3_SER0_DOUT; --S3_nx276 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx276 --operation mode is normal S3_nx276 = !N1_request_47 & (N1_request_48 & (S3_NI_P3_D_1) # !N1_request_48 & S3_NI_P1_D_1); --S2_nx275 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx275 --operation mode is normal S2_nx275 = N1_request_47 & !N1_request_48 & S2_SER0_DOUT; --S2_nx276 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx276 --operation mode is normal S2_nx276 = !N1_request_47 & (N1_request_48 & (S2_NI_P3_D_1) # !N1_request_48 & S2_NI_P1_D_1); --S1_nx275 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx275 --operation mode is normal S1_nx275 = N1_request_47 & !N1_request_48 & S1_SER0_DOUT; --S1_nx276 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx276 --operation mode is normal S1_nx276 = !N1_request_47 & (N1_request_48 & (S1_NI_P3_D_1) # !N1_request_48 & S1_NI_P1_D_1); --G1_NOT_nx2025 is general_config_notri:nic_notri|NOT_nx2025 --operation mode is normal G1_NOT_nx2025 = !DUT_SEBD_2 & !G1_modgen_eq_785_nx12 & (G1_nx437 # G1_nx438); --P2_FUNC_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|FUNC_0 --operation mode is normal P2_FUNC_0_lut_out = !P2_fc_1 & !P2_fc_0 & !P2_ix694_ix7_nx8; P2_FUNC_0 = DFFEAS(P2_FUNC_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_FUNC_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|FUNC_0 --operation mode is normal P4_FUNC_0_lut_out = !P4_fc_1 & !P4_fc_0 & !P4_ix694_ix7_nx8; P4_FUNC_0 = DFFEAS(P4_FUNC_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_FUNC_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|FUNC_0 --operation mode is normal P1_FUNC_0_lut_out = !P1_fc_1 & !P1_fc_0 & !P1_ix694_ix7_nx8; P1_FUNC_0 = DFFEAS(P1_FUNC_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_FUNC_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|FUNC_0 --operation mode is normal P3_FUNC_0_lut_out = !P3_fc_1 & !P3_fc_0 & !P3_ix694_ix7_nx8; P3_FUNC_0 = DFFEAS(P3_FUNC_0_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --F2_data_1p_9 is ni2dpm_12:ni_ni_pos|data_1p_9 --operation mode is normal F2_data_1p_9_lut_out = DUT_P4_D[9]; F2_data_1p_9 = DFFEAS(F2_data_1p_9_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --S3_NI_P3_STRB is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|NI_P3_STRB --operation mode is normal S3_NI_P3_STRB_lut_out = S3_NI_P4_STRB; S3_NI_P3_STRB = DFFEAS(S3_NI_P3_STRB_lut_out, T3_TCK, VCC, , E2_shift_trap, , , , ); --S2_NI_P3_STRB is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|NI_P3_STRB --operation mode is normal S2_NI_P3_STRB_lut_out = S2_NI_P4_STRB; S2_NI_P3_STRB = DFFEAS(S2_NI_P3_STRB_lut_out, T2_TCK, VCC, , E1_shift_trap, , , , ); --S1_NI_P3_STRB is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|NI_P3_STRB --operation mode is normal S1_NI_P3_STRB_lut_out = S1_NI_P4_STRB; S1_NI_P3_STRB = DFFEAS(S1_NI_P3_STRB_lut_out, T1_TCK, VCC, , D1_shift_trap, , , , ); --F2_nx362 is ni2dpm_12:ni_ni_pos|nx362 --operation mode is normal F2_nx362 = G1_NOT_ni_sel_p_0 & (F2_ex_p_q1pass_2) # !G1_NOT_ni_sel_p_0 & F2_ex_p_q1pass_3; --F2_nx374 is ni2dpm_12:ni_ni_pos|nx374 --operation mode is normal F2_nx374 = G1_ni_sel_p_1 # G1_NOT_ni_sel_p_0 & (F2_ex_p_q1pass_0) # !G1_NOT_ni_sel_p_0 & F2_ex_p_q1pass_1; --F2_nx363 is ni2dpm_12:ni_ni_pos|nx363 --operation mode is normal F2_nx363 = G1_NOT_ni_sel_p_0 & (F2_ex_p_q1pass_6) # !G1_NOT_ni_sel_p_0 & F2_ex_p_q1pass_7; --F2_nx375 is ni2dpm_12:ni_ni_pos|nx375 --operation mode is normal F2_nx375 = G1_ni_sel_p_1 # G1_NOT_ni_sel_p_0 & (F2_ex_p_q1pass_4) # !G1_NOT_ni_sel_p_0 & F2_ex_p_q1pass_5; --scsn_slave_nw_dll_ob1_ob_data_6 is scsn_slave_nw_dll_ob1_ob_data_6 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_6_lut_out = scsn_slave_nw_dll_ob1_ob_data_5; scsn_slave_nw_dll_ob1_ob_data_6 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_6_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_6, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_7 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_7 --operation mode is normal Y2_d_to_dll_7 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_7 # !Y2_current_state_0 & (J1_reply_7)); --D1_jtgsnd_ser_t_12 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_12 --operation mode is normal D1_jtgsnd_ser_t_12_lut_out = D1_jtgsnd_ser_t_11; D1_jtgsnd_ser_t_12 = DFFEAS(D1_jtgsnd_ser_t_12_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_8, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_12 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_12 --operation mode is normal E1_jtgsnd_ser_t_12_lut_out = E1_jtgsnd_ser_t_11; E1_jtgsnd_ser_t_12 = DFFEAS(E1_jtgsnd_ser_t_12_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_8, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_12 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_12 --operation mode is normal E2_jtgsnd_ser_t_12_lut_out = E2_jtgsnd_ser_t_11; E2_jtgsnd_ser_t_12 = DFFEAS(E2_jtgsnd_ser_t_12_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_8, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_5 is scsn_slave_nw_dll_ob0_ob_data_5 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_5_lut_out = scsn_slave_nw_dll_ob0_ob_data_4; scsn_slave_nw_dll_ob0_ob_data_5 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_5_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_5, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_6 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_6 --operation mode is normal Y1_d_to_dll_6 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_6 # !Y1_current_state_0 & (J1_reply_6)); --J1_reply_7 is mcm_nw_apl:scsn_slave_nw_apl|reply_7 --operation mode is normal J1_reply_7 = N1_request_7 & (J1_a_0_dup_54 # J1_read_data_24 & !J1_ix34_ix30_nx12) # !N1_request_7 & J1_read_data_24 & (!J1_ix34_ix30_nx12); --J1_read_data_23 is mcm_nw_apl:scsn_slave_nw_apl|read_data_23 --operation mode is normal J1_read_data_23_lut_out = C1_bus_dout_23; J1_read_data_23 = DFFEAS(J1_read_data_23_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_22 is gio_devices:gio|bus_dout_22 --operation mode is normal C1_bus_dout_22_lut_out = C1_nx232 # C1_nx233 # C1_nx234; C1_bus_dout_22 = DFFEAS(C1_bus_dout_22_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx235 is gio_devices:gio|nx235 --operation mode is normal C1_nx235 = W1_q_b[13] & (C1_sel_5 # G1_bus_dout_21 & C1_ce_gen) # !W1_q_b[13] & G1_bus_dout_21 & (C1_ce_gen); --C1_nx236 is gio_devices:gio|nx236 --operation mode is normal C1_nx236 = B1_bus_dout_21 & (C1_ce_cp # E2_bus_dout_21 & C1_ce_ni_jtg_up) # !B1_bus_dout_21 & E2_bus_dout_21 & (C1_ce_ni_jtg_up); --C1_nx237 is gio_devices:gio|nx237 --operation mode is normal C1_nx237 = E1_bus_dout_21 & (C1_ce_ni_jtg_dn # D1_bus_dout_21 & C1_ce_dut_jtg) # !E1_bus_dout_21 & D1_bus_dout_21 & (C1_ce_dut_jtg); --G1_bus_dout_20 is general_config_notri:nic_notri|bus_dout_20 --operation mode is normal G1_bus_dout_20 = G1_nx459 # G1_nx467 # G1_NOT_ix69_ix28_nx12 & G1_ni_xor_mask_0; --B1_bus_dout_20 is clkpre_counter:cp|bus_dout_20 --operation mode is normal B1_bus_dout_20 = B1_nx732 # B1_nx816 # B1_dout_ccnt_20 & B1_nx794; --E2_bus_dout_20 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_20 --operation mode is normal E2_bus_dout_20_lut_out = S3_dout_20; E2_bus_dout_20 = DFFEAS(E2_bus_dout_20_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_20 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_20 --operation mode is normal E1_bus_dout_20_lut_out = S2_dout_20; E1_bus_dout_20 = DFFEAS(E1_bus_dout_20_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_20 is jtag_master_1_notri:jtag_dut_notri|bus_dout_20 --operation mode is normal D1_bus_dout_20_lut_out = S1_dout_20; D1_bus_dout_20 = DFFEAS(D1_bus_dout_20_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx458 is general_config_notri:nic_notri|nx458 --operation mode is normal G1_nx458 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_7 # !N1_request_48 & (F2_naddr_7)); --G1_nx468 is general_config_notri:nic_notri|nx468 --operation mode is normal G1_nx468 = N1_request_44 & N1_request_43 & G1_se2_cnt_3 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_19 is clkpre_counter:cp|dout_ccnt_19 --operation mode is arithmetic B1_dout_ccnt_19_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx22; B1_dout_ccnt_19_lut_out = B1_dout_ccnt_19 $ (B1_dout_ccnt_19_carry_eqn); B1_dout_ccnt_19 = DFFEAS(B1_dout_ccnt_19_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx28 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx28 = CARRY(!B1_ccnt_cnt_2_cnt_i_Q_nx22 # !B1_dout_ccnt_19); --B1_nx733 is clkpre_counter:cp|nx733 --operation mode is normal B1_nx733 = B1_dout1pcnt_19 & (B1_nx795 # B1_dout3pcnt_19 & B1_nx796) # !B1_dout1pcnt_19 & B1_dout3pcnt_19 & (B1_nx796); --B1_nx817 is clkpre_counter:cp|nx817 --operation mode is normal B1_nx817 = B1_dout0pcnt_19 & (B1_nx798 # B1_dout2pcnt_19 & B1_nx797) # !B1_dout0pcnt_19 & B1_dout2pcnt_19 & B1_nx797; --S3_dout_19 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_19 --operation mode is normal S3_dout_19 = N1_request_46 & (S3_NI_P1_D_4) # !N1_request_46 & !N1_request_47 & (S3_nx248); --S2_dout_19 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_19 --operation mode is normal S2_dout_19 = N1_request_46 & (S2_NI_P1_D_4) # !N1_request_46 & !N1_request_47 & (S2_nx248); --S1_dout_19 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_19 --operation mode is normal S1_dout_19 = N1_request_46 & (S1_NI_P1_D_4) # !N1_request_46 & !N1_request_47 & (S1_nx248); --F2_par_cnt_6 is ni2dpm_12:ni_ni_pos|par_cnt_6 --operation mode is arithmetic F2_par_cnt_6_carry_eqn = F2_parc_Q_nx40; F2_par_cnt_6_lut_out = F2_par_cnt_6 $ (!F2_par_cnt_6_carry_eqn); F2_par_cnt_6 = DFFEAS(F2_par_cnt_6_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx44 is ni2dpm_12:ni_ni_pos|parc_Q_nx44 --operation mode is arithmetic F2_parc_Q_nx44 = CARRY(F2_par_cnt_6 & (!F2_parc_Q_nx40)); --G1_se2_cnt_2 is general_config_notri:nic_notri|se2_cnt_2 --operation mode is arithmetic G1_se2_cnt_2_carry_eqn = G1_se2_cnt_nx15; G1_se2_cnt_2_lut_out = G1_se2_cnt_2 $ (!G1_se2_cnt_2_carry_eqn); G1_se2_cnt_2 = DFFEAS(G1_se2_cnt_2_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx21 is general_config_notri:nic_notri|se2_cnt_nx21 --operation mode is arithmetic G1_se2_cnt_nx21 = CARRY(G1_se2_cnt_2 & (!G1_se2_cnt_nx15)); --B1_dout1pcnt_18 is clkpre_counter:cp|dout1pcnt_18 --operation mode is arithmetic B1_dout1pcnt_18_carry_eqn = B1_pcnt1_cnt_4_cnt_i_Q_nx16; B1_dout1pcnt_18_lut_out = B1_dout1pcnt_18 $ (!B1_dout1pcnt_18_carry_eqn); B1_dout1pcnt_18 = DFFEAS(B1_dout1pcnt_18_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_4_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_4_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_4_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_18 & (!B1_pcnt1_cnt_4_cnt_i_Q_nx16)); --B1_dout3pcnt_18 is clkpre_counter:cp|dout3pcnt_18 --operation mode is arithmetic B1_dout3pcnt_18_carry_eqn = B1_pcnt3_cnt_4_cnt_i_Q_nx16; B1_dout3pcnt_18_lut_out = B1_dout3pcnt_18 $ (!B1_dout3pcnt_18_carry_eqn); B1_dout3pcnt_18 = DFFEAS(B1_dout3pcnt_18_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_4_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_4_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_4_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_18 & (!B1_pcnt3_cnt_4_cnt_i_Q_nx16)); --B1_dout0pcnt_18 is clkpre_counter:cp|dout0pcnt_18 --operation mode is arithmetic B1_dout0pcnt_18_carry_eqn = B1_pcnt0_cnt_4_cnt_i_Q_nx16; B1_dout0pcnt_18_lut_out = B1_dout0pcnt_18 $ (!B1_dout0pcnt_18_carry_eqn); B1_dout0pcnt_18 = DFFEAS(B1_dout0pcnt_18_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_4_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_4_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_4_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_18 & (!B1_pcnt0_cnt_4_cnt_i_Q_nx16)); --B1_dout2pcnt_18 is clkpre_counter:cp|dout2pcnt_18 --operation mode is arithmetic B1_dout2pcnt_18_carry_eqn = B1_pcnt2_cnt_4_cnt_i_Q_nx16; B1_dout2pcnt_18_lut_out = B1_dout2pcnt_18 $ (!B1_dout2pcnt_18_carry_eqn); B1_dout2pcnt_18 = DFFEAS(B1_dout2pcnt_18_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_4_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_4_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_4_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_18 & (!B1_pcnt2_cnt_4_cnt_i_Q_nx16)); --S3_nx249 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx249 --operation mode is normal S3_nx249 = N1_request_48 & (S3_NI_P3_D_2) # !N1_request_48 & S3_NI_P1_D_2; --S2_nx249 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx249 --operation mode is normal S2_nx249 = N1_request_48 & (S2_NI_P3_D_2) # !N1_request_48 & S2_NI_P1_D_2; --S1_nx249 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx249 --operation mode is normal S1_nx249 = N1_request_48 & (S1_NI_P3_D_2) # !N1_request_48 & S1_NI_P1_D_2; --G1_nx437 is general_config_notri:nic_notri|nx437 --operation mode is normal G1_nx437 = !G1_se2_cnt_3 # !G1_se2_cnt_2 # !G1_se2_cnt_1 # !G1_se2_cnt_0; --G1_nx438 is general_config_notri:nic_notri|nx438 --operation mode is normal G1_nx438 = !G1_se2_cnt_7 # !G1_se2_cnt_6 # !G1_se2_cnt_5 # !G1_se2_cnt_4; --P2_fc_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|fc_1 --operation mode is normal P2_fc_1_lut_out = P2_ptrf_0; P2_fc_1 = DFFEAS(P2_fc_1_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx285, , , , ); --P2_fc_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|fc_0 --operation mode is normal P2_fc_0_lut_out = P2_ptrf_0; P2_fc_0 = DFFEAS(P2_fc_0_lut_out, X1__clk0, J1_chipRST_n, , P2_NOT_nx295, , , , ); --P2_ix694_ix7_nx8 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|ix694_ix7_nx8 --operation mode is normal P2_ix694_ix7_nx8 = !P2_rec_sm_0 # !P2_rec_sm_1 # !P2_rec_sm_2; --P4_fc_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|fc_1 --operation mode is normal P4_fc_1_lut_out = P4_ptrf_0; P4_fc_1 = DFFEAS(P4_fc_1_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx285, , , , ); --P4_fc_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|fc_0 --operation mode is normal P4_fc_0_lut_out = P4_ptrf_0; P4_fc_0 = DFFEAS(P4_fc_0_lut_out, X1__clk0, J1_chipRST_n, , P4_NOT_nx295, , , , ); --P4_ix694_ix7_nx8 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|ix694_ix7_nx8 --operation mode is normal P4_ix694_ix7_nx8 = !P4_rec_sm_0 # !P4_rec_sm_1 # !P4_rec_sm_2; --P1_fc_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|fc_1 --operation mode is normal P1_fc_1_lut_out = P1_ptrf_0; P1_fc_1 = DFFEAS(P1_fc_1_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx285, , , , ); --P1_fc_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|fc_0 --operation mode is normal P1_fc_0_lut_out = P1_ptrf_0; P1_fc_0 = DFFEAS(P1_fc_0_lut_out, X1__clk0, J1_chipRST_n, , P1_NOT_nx295, , , , ); --P1_ix694_ix7_nx8 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|ix694_ix7_nx8 --operation mode is normal P1_ix694_ix7_nx8 = !P1_rec_sm_0 # !P1_rec_sm_1 # !P1_rec_sm_2; --P3_fc_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|fc_1 --operation mode is normal P3_fc_1_lut_out = P3_ptrf_0; P3_fc_1 = DFFEAS(P3_fc_1_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx285, , , , ); --P3_fc_0 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|fc_0 --operation mode is normal P3_fc_0_lut_out = P3_ptrf_0; P3_fc_0 = DFFEAS(P3_fc_0_lut_out, X1__clk0, J1_chipRST_n, , P3_NOT_nx295, , , , ); --P3_ix694_ix7_nx8 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|ix694_ix7_nx8 --operation mode is normal P3_ix694_ix7_nx8 = !P3_rec_sm_0 # !P3_rec_sm_1 # !P3_rec_sm_2; --scsn_slave_nw_dll_ob1_ob_data_5 is scsn_slave_nw_dll_ob1_ob_data_5 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_5_lut_out = scsn_slave_nw_dll_ob1_ob_data_4; scsn_slave_nw_dll_ob1_ob_data_5 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_5_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_5, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_6 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_6 --operation mode is normal Y2_d_to_dll_6 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_6 # !Y2_current_state_0 & (J1_reply_6)); --D1_jtgsnd_ser_t_11 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_11 --operation mode is normal D1_jtgsnd_ser_t_11_lut_out = D1_jtgsnd_ser_t_10; D1_jtgsnd_ser_t_11 = DFFEAS(D1_jtgsnd_ser_t_11_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_7, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_11 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_11 --operation mode is normal E1_jtgsnd_ser_t_11_lut_out = E1_jtgsnd_ser_t_10; E1_jtgsnd_ser_t_11 = DFFEAS(E1_jtgsnd_ser_t_11_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_7, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_11 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_11 --operation mode is normal E2_jtgsnd_ser_t_11_lut_out = E2_jtgsnd_ser_t_10; E2_jtgsnd_ser_t_11 = DFFEAS(E2_jtgsnd_ser_t_11_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_7, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_4 is scsn_slave_nw_dll_ob0_ob_data_4 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_4_lut_out = scsn_slave_nw_dll_ob0_ob_data_3; scsn_slave_nw_dll_ob0_ob_data_4 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_4_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_4, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_5 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_5 --operation mode is normal Y1_d_to_dll_5 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_5 # !Y1_current_state_0 & (J1_reply_5)); --J1_reply_6 is mcm_nw_apl:scsn_slave_nw_apl|reply_6 --operation mode is normal J1_reply_6 = N1_request_6 & (J1_a_0_dup_54 # J1_read_data_25 & !J1_ix34_ix30_nx12) # !N1_request_6 & J1_read_data_25 & (!J1_ix34_ix30_nx12); --J1_read_data_24 is mcm_nw_apl:scsn_slave_nw_apl|read_data_24 --operation mode is normal J1_read_data_24_lut_out = C1_bus_dout_24; J1_read_data_24 = DFFEAS(J1_read_data_24_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_23 is gio_devices:gio|bus_dout_23 --operation mode is normal C1_bus_dout_23_lut_out = C1_nx229 # C1_nx230 # C1_nx231; C1_bus_dout_23 = DFFEAS(C1_bus_dout_23_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx232 is gio_devices:gio|nx232 --operation mode is normal C1_nx232 = W1_q_b[14] & (C1_sel_5 # G1_bus_dout_22 & C1_ce_gen) # !W1_q_b[14] & G1_bus_dout_22 & (C1_ce_gen); --C1_nx233 is gio_devices:gio|nx233 --operation mode is normal C1_nx233 = B1_bus_dout_22 & (C1_ce_cp # E2_bus_dout_22 & C1_ce_ni_jtg_up) # !B1_bus_dout_22 & E2_bus_dout_22 & (C1_ce_ni_jtg_up); --C1_nx234 is gio_devices:gio|nx234 --operation mode is normal C1_nx234 = E1_bus_dout_22 & (C1_ce_ni_jtg_dn # D1_bus_dout_22 & C1_ce_dut_jtg) # !E1_bus_dout_22 & D1_bus_dout_22 & (C1_ce_dut_jtg); --G1_bus_dout_21 is general_config_notri:nic_notri|bus_dout_21 --operation mode is normal G1_bus_dout_21 = G1_nx460 # G1_nx466 # G1_NOT_ix69_ix28_nx12 & G1_ni_xor_mask_1; --B1_bus_dout_21 is clkpre_counter:cp|bus_dout_21 --operation mode is normal B1_bus_dout_21 = B1_nx731 # B1_nx815 # B1_dout_ccnt_21 & B1_nx794; --E2_bus_dout_21 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_21 --operation mode is normal E2_bus_dout_21_lut_out = S3_dout_21; E2_bus_dout_21 = DFFEAS(E2_bus_dout_21_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_21 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_21 --operation mode is normal E1_bus_dout_21_lut_out = S2_dout_21; E1_bus_dout_21 = DFFEAS(E1_bus_dout_21_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_21 is jtag_master_1_notri:jtag_dut_notri|bus_dout_21 --operation mode is normal D1_bus_dout_21_lut_out = S1_dout_21; D1_bus_dout_21 = DFFEAS(D1_bus_dout_21_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx459 is general_config_notri:nic_notri|nx459 --operation mode is normal G1_nx459 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_8 # !N1_request_48 & (F2_naddr_8)); --G1_nx467 is general_config_notri:nic_notri|nx467 --operation mode is normal G1_nx467 = N1_request_44 & N1_request_43 & G1_se2_cnt_4 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_20 is clkpre_counter:cp|dout_ccnt_20 --operation mode is arithmetic B1_dout_ccnt_20_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx28; B1_dout_ccnt_20_lut_out = B1_dout_ccnt_20 $ (!B1_dout_ccnt_20_carry_eqn); B1_dout_ccnt_20 = DFFEAS(B1_dout_ccnt_20_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx32 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx32 = CARRY(B1_dout_ccnt_20 & (!B1_ccnt_cnt_2_cnt_i_Q_nx28)); --B1_nx732 is clkpre_counter:cp|nx732 --operation mode is normal B1_nx732 = B1_dout1pcnt_20 & (B1_nx795 # B1_dout3pcnt_20 & B1_nx796) # !B1_dout1pcnt_20 & B1_dout3pcnt_20 & (B1_nx796); --B1_nx816 is clkpre_counter:cp|nx816 --operation mode is normal B1_nx816 = B1_dout0pcnt_20 & (B1_nx798 # B1_dout2pcnt_20 & B1_nx797) # !B1_dout0pcnt_20 & B1_dout2pcnt_20 & B1_nx797; --S3_dout_20 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_20 --operation mode is normal S3_dout_20 = N1_request_46 & (S3_NI_P0_D_5) # !N1_request_46 & !N1_request_47 & (S3_nx247); --S2_dout_20 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_20 --operation mode is normal S2_dout_20 = N1_request_46 & (S2_NI_P0_D_5) # !N1_request_46 & !N1_request_47 & (S2_nx247); --S1_dout_20 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_20 --operation mode is normal S1_dout_20 = N1_request_46 & (S1_NI_P0_D_5) # !N1_request_46 & !N1_request_47 & (S1_nx247); --F2_par_cnt_7 is ni2dpm_12:ni_ni_pos|par_cnt_7 --operation mode is arithmetic F2_par_cnt_7_carry_eqn = F2_parc_Q_nx44; F2_par_cnt_7_lut_out = F2_par_cnt_7 $ (F2_par_cnt_7_carry_eqn); F2_par_cnt_7 = DFFEAS(F2_par_cnt_7_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx48 is ni2dpm_12:ni_ni_pos|parc_Q_nx48 --operation mode is arithmetic F2_parc_Q_nx48 = CARRY(!F2_parc_Q_nx44 # !F2_par_cnt_7); --G1_se2_cnt_3 is general_config_notri:nic_notri|se2_cnt_3 --operation mode is arithmetic G1_se2_cnt_3_carry_eqn = G1_se2_cnt_nx21; G1_se2_cnt_3_lut_out = G1_se2_cnt_3 $ (G1_se2_cnt_3_carry_eqn); G1_se2_cnt_3 = DFFEAS(G1_se2_cnt_3_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx27 is general_config_notri:nic_notri|se2_cnt_nx27 --operation mode is arithmetic G1_se2_cnt_nx27 = CARRY(!G1_se2_cnt_nx21 # !G1_se2_cnt_3); --B1_dout1pcnt_19 is clkpre_counter:cp|dout1pcnt_19 --operation mode is normal B1_dout1pcnt_19_carry_eqn = B1_pcnt1_cnt_4_cnt_i_Q_nx21; B1_dout1pcnt_19_lut_out = B1_dout1pcnt_19 $ (B1_dout1pcnt_19_carry_eqn); B1_dout1pcnt_19 = DFFEAS(B1_dout1pcnt_19_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_19 is clkpre_counter:cp|dout3pcnt_19 --operation mode is normal B1_dout3pcnt_19_carry_eqn = B1_pcnt3_cnt_4_cnt_i_Q_nx21; B1_dout3pcnt_19_lut_out = B1_dout3pcnt_19 $ (B1_dout3pcnt_19_carry_eqn); B1_dout3pcnt_19 = DFFEAS(B1_dout3pcnt_19_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout0pcnt_19 is clkpre_counter:cp|dout0pcnt_19 --operation mode is normal B1_dout0pcnt_19_carry_eqn = B1_pcnt0_cnt_4_cnt_i_Q_nx21; B1_dout0pcnt_19_lut_out = B1_dout0pcnt_19 $ (B1_dout0pcnt_19_carry_eqn); B1_dout0pcnt_19 = DFFEAS(B1_dout0pcnt_19_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_19 is clkpre_counter:cp|dout2pcnt_19 --operation mode is normal B1_dout2pcnt_19_carry_eqn = B1_pcnt2_cnt_4_cnt_i_Q_nx21; B1_dout2pcnt_19_lut_out = B1_dout2pcnt_19 $ (B1_dout2pcnt_19_carry_eqn); B1_dout2pcnt_19 = DFFEAS(B1_dout2pcnt_19_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --S3_nx248 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx248 --operation mode is normal S3_nx248 = N1_request_48 & (S3_NI_P3_D_3) # !N1_request_48 & S3_NI_P1_D_3; --S2_nx248 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx248 --operation mode is normal S2_nx248 = N1_request_48 & (S2_NI_P3_D_3) # !N1_request_48 & S2_NI_P1_D_3; --S1_nx248 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx248 --operation mode is normal S1_nx248 = N1_request_48 & (S1_NI_P3_D_3) # !N1_request_48 & S1_NI_P1_D_3; --G1_se2_cnt_4 is general_config_notri:nic_notri|se2_cnt_4 --operation mode is arithmetic G1_se2_cnt_4_carry_eqn = G1_se2_cnt_nx27; G1_se2_cnt_4_lut_out = G1_se2_cnt_4 $ (!G1_se2_cnt_4_carry_eqn); G1_se2_cnt_4 = DFFEAS(G1_se2_cnt_4_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx34 is general_config_notri:nic_notri|se2_cnt_nx34 --operation mode is arithmetic G1_se2_cnt_nx34 = CARRY(G1_se2_cnt_4 & (!G1_se2_cnt_nx27)); --G1_se2_cnt_5 is general_config_notri:nic_notri|se2_cnt_5 --operation mode is arithmetic G1_se2_cnt_5_carry_eqn = G1_se2_cnt_nx34; G1_se2_cnt_5_lut_out = G1_se2_cnt_5 $ (G1_se2_cnt_5_carry_eqn); G1_se2_cnt_5 = DFFEAS(G1_se2_cnt_5_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx38 is general_config_notri:nic_notri|se2_cnt_nx38 --operation mode is arithmetic G1_se2_cnt_nx38 = CARRY(!G1_se2_cnt_nx34 # !G1_se2_cnt_5); --G1_se2_cnt_6 is general_config_notri:nic_notri|se2_cnt_6 --operation mode is arithmetic G1_se2_cnt_6_carry_eqn = G1_se2_cnt_nx38; G1_se2_cnt_6_lut_out = G1_se2_cnt_6 $ (!G1_se2_cnt_6_carry_eqn); G1_se2_cnt_6 = DFFEAS(G1_se2_cnt_6_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --G1_se2_cnt_nx43 is general_config_notri:nic_notri|se2_cnt_nx43 --operation mode is arithmetic G1_se2_cnt_nx43 = CARRY(G1_se2_cnt_6 & (!G1_se2_cnt_nx38)); --G1_se2_cnt_7 is general_config_notri:nic_notri|se2_cnt_7 --operation mode is normal G1_se2_cnt_7_carry_eqn = G1_se2_cnt_nx43; G1_se2_cnt_7_lut_out = G1_se2_cnt_7 $ (G1_se2_cnt_7_carry_eqn); G1_se2_cnt_7 = DFFEAS(G1_se2_cnt_7_lut_out, X1__clk0, VCC, , , , , !G1_nx608, ); --P2_NOT_nx285 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|NOT_nx285 --operation mode is normal P2_NOT_nx285 = P2_rec_sm_2 & !P2_rec_sm_1 & P2_rec_sm_0 & !P2_modgen_eq_674_nx12; --P2_NOT_nx295 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|NOT_nx295 --operation mode is normal P2_NOT_nx295 = P2_rec_sm_2 & P2_rec_sm_1 & !P2_rec_sm_0 & !P2_modgen_eq_677_nx12; --P4_NOT_nx285 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|NOT_nx285 --operation mode is normal P4_NOT_nx285 = P4_rec_sm_2 & !P4_rec_sm_1 & P4_rec_sm_0 & !P4_modgen_eq_674_nx12; --P4_NOT_nx295 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|NOT_nx295 --operation mode is normal P4_NOT_nx295 = P4_rec_sm_2 & P4_rec_sm_1 & !P4_rec_sm_0 & !P4_modgen_eq_677_nx12; --P1_NOT_nx285 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|NOT_nx285 --operation mode is normal P1_NOT_nx285 = P1_rec_sm_2 & !P1_rec_sm_1 & P1_rec_sm_0 & !P1_modgen_eq_674_nx12; --P1_NOT_nx295 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|NOT_nx295 --operation mode is normal P1_NOT_nx295 = P1_rec_sm_2 & P1_rec_sm_1 & !P1_rec_sm_0 & !P1_modgen_eq_677_nx12; --P3_NOT_nx285 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|NOT_nx285 --operation mode is normal P3_NOT_nx285 = P3_rec_sm_2 & !P3_rec_sm_1 & P3_rec_sm_0 & !P3_modgen_eq_674_nx12; --P3_NOT_nx295 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|NOT_nx295 --operation mode is normal P3_NOT_nx295 = P3_rec_sm_2 & P3_rec_sm_1 & !P3_rec_sm_0 & !P3_modgen_eq_677_nx12; --scsn_slave_nw_dll_ob1_ob_data_4 is scsn_slave_nw_dll_ob1_ob_data_4 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_4_lut_out = scsn_slave_nw_dll_ob1_ob_data_3; scsn_slave_nw_dll_ob1_ob_data_4 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_4_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_4, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_5 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_5 --operation mode is normal Y2_d_to_dll_5 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_5 # !Y2_current_state_0 & (J1_reply_5)); --D1_jtgsnd_ser_t_10 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_10 --operation mode is normal D1_jtgsnd_ser_t_10_lut_out = D1_jtgsnd_ser_t_9; D1_jtgsnd_ser_t_10 = DFFEAS(D1_jtgsnd_ser_t_10_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_21, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_10 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_10 --operation mode is normal E1_jtgsnd_ser_t_10_lut_out = E1_jtgsnd_ser_t_9; E1_jtgsnd_ser_t_10 = DFFEAS(E1_jtgsnd_ser_t_10_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_21, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_10 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_10 --operation mode is normal E2_jtgsnd_ser_t_10_lut_out = E2_jtgsnd_ser_t_9; E2_jtgsnd_ser_t_10 = DFFEAS(E2_jtgsnd_ser_t_10_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_21, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_3 is scsn_slave_nw_dll_ob0_ob_data_3 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_3_lut_out = scsn_slave_nw_dll_ob0_ob_data_2; scsn_slave_nw_dll_ob0_ob_data_3 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_3_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_3, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_4 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_4 --operation mode is normal Y1_d_to_dll_4 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_4 # !Y1_current_state_0 & (J1_reply_4)); --J1_reply_5 is mcm_nw_apl:scsn_slave_nw_apl|reply_5 --operation mode is normal J1_reply_5 = N1_request_5 & (J1_a_0_dup_54 # J1_read_data_26 & !J1_ix34_ix30_nx12) # !N1_request_5 & J1_read_data_26 & (!J1_ix34_ix30_nx12); --J1_read_data_25 is mcm_nw_apl:scsn_slave_nw_apl|read_data_25 --operation mode is normal J1_read_data_25_lut_out = C1_bus_dout_25; J1_read_data_25 = DFFEAS(J1_read_data_25_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_24 is gio_devices:gio|bus_dout_24 --operation mode is normal C1_bus_dout_24_lut_out = C1_nx226 # C1_nx227 # C1_nx228; C1_bus_dout_24 = DFFEAS(C1_bus_dout_24_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx229 is gio_devices:gio|nx229 --operation mode is normal C1_nx229 = W1_q_b[15] & (C1_sel_5 # G1_bus_dout_23 & C1_ce_gen) # !W1_q_b[15] & G1_bus_dout_23 & (C1_ce_gen); --C1_nx230 is gio_devices:gio|nx230 --operation mode is normal C1_nx230 = B1_bus_dout_23 & (C1_ce_cp # E2_bus_dout_23 & C1_ce_ni_jtg_up) # !B1_bus_dout_23 & E2_bus_dout_23 & (C1_ce_ni_jtg_up); --C1_nx231 is gio_devices:gio|nx231 --operation mode is normal C1_nx231 = E1_bus_dout_23 & (C1_ce_ni_jtg_dn # D1_bus_dout_23 & C1_ce_dut_jtg) # !E1_bus_dout_23 & D1_bus_dout_23 & (C1_ce_dut_jtg); --G1_bus_dout_22 is general_config_notri:nic_notri|bus_dout_22 --operation mode is normal G1_bus_dout_22 = G1_nx461 # G1_nx465 # G1_NOT_ix69_ix28_nx12 & G1_ni_xor_mask_2; --B1_bus_dout_22 is clkpre_counter:cp|bus_dout_22 --operation mode is normal B1_bus_dout_22 = B1_nx730 # B1_nx814 # B1_dout_ccnt_22 & B1_nx794; --E2_bus_dout_22 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_22 --operation mode is normal E2_bus_dout_22_lut_out = S3_dout_22; E2_bus_dout_22 = DFFEAS(E2_bus_dout_22_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_22 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_22 --operation mode is normal E1_bus_dout_22_lut_out = S2_dout_22; E1_bus_dout_22 = DFFEAS(E1_bus_dout_22_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_22 is jtag_master_1_notri:jtag_dut_notri|bus_dout_22 --operation mode is normal D1_bus_dout_22_lut_out = S1_dout_22; D1_bus_dout_22 = DFFEAS(D1_bus_dout_22_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx460 is general_config_notri:nic_notri|nx460 --operation mode is normal G1_nx460 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_9 # !N1_request_48 & (F2_naddr_9)); --G1_nx466 is general_config_notri:nic_notri|nx466 --operation mode is normal G1_nx466 = N1_request_44 & N1_request_43 & G1_se2_cnt_5 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_21 is clkpre_counter:cp|dout_ccnt_21 --operation mode is arithmetic B1_dout_ccnt_21_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx32; B1_dout_ccnt_21_lut_out = B1_dout_ccnt_21 $ (B1_dout_ccnt_21_carry_eqn); B1_dout_ccnt_21 = DFFEAS(B1_dout_ccnt_21_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx36 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx36 = CARRY(!B1_ccnt_cnt_2_cnt_i_Q_nx32 # !B1_dout_ccnt_21); --B1_nx731 is clkpre_counter:cp|nx731 --operation mode is normal B1_nx731 = B1_dout1pcnt_21 & (B1_nx795 # B1_dout3pcnt_21 & B1_nx796) # !B1_dout1pcnt_21 & B1_dout3pcnt_21 & (B1_nx796); --B1_nx815 is clkpre_counter:cp|nx815 --operation mode is normal B1_nx815 = B1_dout0pcnt_21 & (B1_nx798 # B1_dout2pcnt_21 & B1_nx797) # !B1_dout0pcnt_21 & B1_dout2pcnt_21 & B1_nx797; --S3_dout_21 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_21 --operation mode is normal S3_dout_21 = N1_request_46 & (S3_NI_P1_D_3) # !N1_request_46 & !N1_request_47 & (S3_nx246); --S2_dout_21 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_21 --operation mode is normal S2_dout_21 = N1_request_46 & (S2_NI_P1_D_3) # !N1_request_46 & !N1_request_47 & (S2_nx246); --S1_dout_21 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_21 --operation mode is normal S1_dout_21 = N1_request_46 & (S1_NI_P1_D_3) # !N1_request_46 & !N1_request_47 & (S1_nx246); --F2_par_cnt_8 is ni2dpm_12:ni_ni_pos|par_cnt_8 --operation mode is arithmetic F2_par_cnt_8_carry_eqn = F2_parc_Q_nx48; F2_par_cnt_8_lut_out = F2_par_cnt_8 $ (!F2_par_cnt_8_carry_eqn); F2_par_cnt_8 = DFFEAS(F2_par_cnt_8_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx52 is ni2dpm_12:ni_ni_pos|parc_Q_nx52 --operation mode is arithmetic F2_parc_Q_nx52 = CARRY(F2_par_cnt_8 & (!F2_parc_Q_nx48)); --B1_dout1pcnt_20 is clkpre_counter:cp|dout1pcnt_20 --operation mode is arithmetic B1_dout1pcnt_20_lut_out = B1_dout1pcnt_20 $ P2_FUNC_1; B1_dout1pcnt_20 = DFFEAS(B1_dout1pcnt_20_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_5_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_5_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_5_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_20 & P2_FUNC_1); --B1_dout3pcnt_20 is clkpre_counter:cp|dout3pcnt_20 --operation mode is arithmetic B1_dout3pcnt_20_lut_out = B1_dout3pcnt_20 $ P4_FUNC_1; B1_dout3pcnt_20 = DFFEAS(B1_dout3pcnt_20_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_5_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_5_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_5_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_20 & P4_FUNC_1); --B1_dout0pcnt_20 is clkpre_counter:cp|dout0pcnt_20 --operation mode is arithmetic B1_dout0pcnt_20_lut_out = B1_dout0pcnt_20 $ P1_FUNC_1; B1_dout0pcnt_20 = DFFEAS(B1_dout0pcnt_20_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_5_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_5_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_5_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_20 & P1_FUNC_1); --B1_dout2pcnt_20 is clkpre_counter:cp|dout2pcnt_20 --operation mode is arithmetic B1_dout2pcnt_20_lut_out = B1_dout2pcnt_20 $ P3_FUNC_1; B1_dout2pcnt_20 = DFFEAS(B1_dout2pcnt_20_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_5_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_5_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_5_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_20 & P3_FUNC_1); --S3_nx247 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx247 --operation mode is normal S3_nx247 = N1_request_48 & (S3_NI_P3_D_4) # !N1_request_48 & S3_NI_P1_D_4; --S2_nx247 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx247 --operation mode is normal S2_nx247 = N1_request_48 & (S2_NI_P3_D_4) # !N1_request_48 & S2_NI_P1_D_4; --S1_nx247 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx247 --operation mode is normal S1_nx247 = N1_request_48 & (S1_NI_P3_D_4) # !N1_request_48 & S1_NI_P1_D_4; --scsn_slave_nw_dll_ob1_ob_data_3 is scsn_slave_nw_dll_ob1_ob_data_3 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_3_lut_out = scsn_slave_nw_dll_ob1_ob_data_2; scsn_slave_nw_dll_ob1_ob_data_3 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_3_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_3, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_4 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_4 --operation mode is normal Y2_d_to_dll_4 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_4 # !Y2_current_state_0 & (J1_reply_4)); --D1_jtgsnd_ser_t_9 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_9 --operation mode is normal D1_jtgsnd_ser_t_9_lut_out = D1_jtgsnd_ser_t_8; D1_jtgsnd_ser_t_9 = DFFEAS(D1_jtgsnd_ser_t_9_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_6, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_9 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_9 --operation mode is normal E1_jtgsnd_ser_t_9_lut_out = E1_jtgsnd_ser_t_8; E1_jtgsnd_ser_t_9 = DFFEAS(E1_jtgsnd_ser_t_9_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_6, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_9 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_9 --operation mode is normal E2_jtgsnd_ser_t_9_lut_out = E2_jtgsnd_ser_t_8; E2_jtgsnd_ser_t_9 = DFFEAS(E2_jtgsnd_ser_t_9_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_6, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_2 is scsn_slave_nw_dll_ob0_ob_data_2 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_2_lut_out = scsn_slave_nw_dll_ob0_ob_data_1; scsn_slave_nw_dll_ob0_ob_data_2 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_2_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_2, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_3 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_3 --operation mode is normal Y1_d_to_dll_3 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_3 # !Y1_current_state_0 & (J1_reply_3)); --J1_reply_4 is mcm_nw_apl:scsn_slave_nw_apl|reply_4 --operation mode is normal J1_reply_4 = N1_request_4 & (J1_a_0_dup_54 # J1_read_data_27 & !J1_ix34_ix30_nx12) # !N1_request_4 & J1_read_data_27 & (!J1_ix34_ix30_nx12); --J1_read_data_26 is mcm_nw_apl:scsn_slave_nw_apl|read_data_26 --operation mode is normal J1_read_data_26_lut_out = C1_bus_dout_26; J1_read_data_26 = DFFEAS(J1_read_data_26_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_25 is gio_devices:gio|bus_dout_25 --operation mode is normal C1_bus_dout_25_lut_out = C1_nx223 # C1_nx224 # C1_nx225; C1_bus_dout_25 = DFFEAS(C1_bus_dout_25_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx226 is gio_devices:gio|nx226 --operation mode is normal C1_nx226 = W2_q_b[8] & (C1_sel_5 # G1_bus_dout_24 & C1_ce_gen) # !W2_q_b[8] & G1_bus_dout_24 & (C1_ce_gen); --C1_nx227 is gio_devices:gio|nx227 --operation mode is normal C1_nx227 = B1_bus_dout_24 & (C1_ce_cp # E2_bus_dout_24 & C1_ce_ni_jtg_up) # !B1_bus_dout_24 & E2_bus_dout_24 & (C1_ce_ni_jtg_up); --C1_nx228 is gio_devices:gio|nx228 --operation mode is normal C1_nx228 = E1_bus_dout_24 & (C1_ce_ni_jtg_dn # D1_bus_dout_24 & C1_ce_dut_jtg) # !E1_bus_dout_24 & D1_bus_dout_24 & (C1_ce_dut_jtg); --G1_bus_dout_23 is general_config_notri:nic_notri|bus_dout_23 --operation mode is normal G1_bus_dout_23 = G1_nx462 # G1_nx464 # G1_NOT_ix69_ix28_nx12 & G1_ni_xor_mask_3; --B1_bus_dout_23 is clkpre_counter:cp|bus_dout_23 --operation mode is normal B1_bus_dout_23 = B1_nx729 # B1_nx813 # B1_dout_ccnt_23 & B1_nx794; --E2_bus_dout_23 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_23 --operation mode is normal E2_bus_dout_23_lut_out = S3_dout_23; E2_bus_dout_23 = DFFEAS(E2_bus_dout_23_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_23 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_23 --operation mode is normal E1_bus_dout_23_lut_out = S2_dout_23; E1_bus_dout_23 = DFFEAS(E1_bus_dout_23_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_23 is jtag_master_1_notri:jtag_dut_notri|bus_dout_23 --operation mode is normal D1_bus_dout_23_lut_out = S1_dout_23; D1_bus_dout_23 = DFFEAS(D1_bus_dout_23_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx461 is general_config_notri:nic_notri|nx461 --operation mode is normal G1_nx461 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_10 # !N1_request_48 & (F2_naddr_10)); --G1_nx465 is general_config_notri:nic_notri|nx465 --operation mode is normal G1_nx465 = N1_request_44 & N1_request_43 & G1_se2_cnt_6 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_22 is clkpre_counter:cp|dout_ccnt_22 --operation mode is arithmetic B1_dout_ccnt_22_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx36; B1_dout_ccnt_22_lut_out = B1_dout_ccnt_22 $ (!B1_dout_ccnt_22_carry_eqn); B1_dout_ccnt_22 = DFFEAS(B1_dout_ccnt_22_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_2_cnt_i_Q_nx41 is clkpre_counter:cp|ccnt_cnt_2_cnt_i_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_2_cnt_i_Q_nx41 = CARRY(B1_dout_ccnt_22 & (!B1_ccnt_cnt_2_cnt_i_Q_nx36)); --B1_nx730 is clkpre_counter:cp|nx730 --operation mode is normal B1_nx730 = B1_dout1pcnt_22 & (B1_nx795 # B1_dout3pcnt_22 & B1_nx796) # !B1_dout1pcnt_22 & B1_dout3pcnt_22 & (B1_nx796); --B1_nx814 is clkpre_counter:cp|nx814 --operation mode is normal B1_nx814 = B1_dout0pcnt_22 & (B1_nx798 # B1_dout2pcnt_22 & B1_nx797) # !B1_dout0pcnt_22 & B1_dout2pcnt_22 & B1_nx797; --S3_dout_22 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_22 --operation mode is normal S3_dout_22 = N1_request_46 & (S3_NI_P1_D_2) # !N1_request_46 & !N1_request_47 & (S3_nx245); --S2_dout_22 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_22 --operation mode is normal S2_dout_22 = N1_request_46 & (S2_NI_P1_D_2) # !N1_request_46 & !N1_request_47 & (S2_nx245); --S1_dout_22 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_22 --operation mode is normal S1_dout_22 = N1_request_46 & (S1_NI_P1_D_2) # !N1_request_46 & !N1_request_47 & (S1_nx245); --F2_par_cnt_9 is ni2dpm_12:ni_ni_pos|par_cnt_9 --operation mode is arithmetic F2_par_cnt_9_carry_eqn = F2_parc_Q_nx52; F2_par_cnt_9_lut_out = F2_par_cnt_9 $ (F2_par_cnt_9_carry_eqn); F2_par_cnt_9 = DFFEAS(F2_par_cnt_9_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx57 is ni2dpm_12:ni_ni_pos|parc_Q_nx57 --operation mode is arithmetic F2_parc_Q_nx57 = CARRY(!F2_parc_Q_nx52 # !F2_par_cnt_9); --B1_dout1pcnt_21 is clkpre_counter:cp|dout1pcnt_21 --operation mode is arithmetic B1_dout1pcnt_21_carry_eqn = B1_pcnt1_cnt_5_cnt_i_Q_nx10; B1_dout1pcnt_21_lut_out = B1_dout1pcnt_21 $ (B1_dout1pcnt_21_carry_eqn); B1_dout1pcnt_21 = DFFEAS(B1_dout1pcnt_21_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_5_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_5_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_5_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_5_cnt_i_Q_nx10 # !B1_dout1pcnt_21); --B1_dout3pcnt_21 is clkpre_counter:cp|dout3pcnt_21 --operation mode is arithmetic B1_dout3pcnt_21_carry_eqn = B1_pcnt3_cnt_5_cnt_i_Q_nx10; B1_dout3pcnt_21_lut_out = B1_dout3pcnt_21 $ (B1_dout3pcnt_21_carry_eqn); B1_dout3pcnt_21 = DFFEAS(B1_dout3pcnt_21_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_5_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_5_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_5_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_5_cnt_i_Q_nx10 # !B1_dout3pcnt_21); --B1_dout0pcnt_21 is clkpre_counter:cp|dout0pcnt_21 --operation mode is arithmetic B1_dout0pcnt_21_carry_eqn = B1_pcnt0_cnt_5_cnt_i_Q_nx10; B1_dout0pcnt_21_lut_out = B1_dout0pcnt_21 $ (B1_dout0pcnt_21_carry_eqn); B1_dout0pcnt_21 = DFFEAS(B1_dout0pcnt_21_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_5_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_5_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_5_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_5_cnt_i_Q_nx10 # !B1_dout0pcnt_21); --B1_dout2pcnt_21 is clkpre_counter:cp|dout2pcnt_21 --operation mode is arithmetic B1_dout2pcnt_21_carry_eqn = B1_pcnt2_cnt_5_cnt_i_Q_nx10; B1_dout2pcnt_21_lut_out = B1_dout2pcnt_21 $ (B1_dout2pcnt_21_carry_eqn); B1_dout2pcnt_21 = DFFEAS(B1_dout2pcnt_21_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_5_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_5_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_5_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_5_cnt_i_Q_nx10 # !B1_dout2pcnt_21); --S3_nx246 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx246 --operation mode is normal S3_nx246 = N1_request_48 & (S3_NI_P3_D_5) # !N1_request_48 & S3_NI_P1_D_5; --S2_nx246 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx246 --operation mode is normal S2_nx246 = N1_request_48 & (S2_NI_P3_D_5) # !N1_request_48 & S2_NI_P1_D_5; --S1_nx246 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx246 --operation mode is normal S1_nx246 = N1_request_48 & (S1_NI_P3_D_5) # !N1_request_48 & S1_NI_P1_D_5; --P2_FUNC_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|FUNC_1 --operation mode is normal P2_FUNC_1_lut_out = !P2_fc_1 & P2_fc_0 & !P2_ix694_ix7_nx8; P2_FUNC_1 = DFFEAS(P2_FUNC_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_FUNC_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|FUNC_1 --operation mode is normal P4_FUNC_1_lut_out = !P4_fc_1 & P4_fc_0 & !P4_ix694_ix7_nx8; P4_FUNC_1 = DFFEAS(P4_FUNC_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_FUNC_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|FUNC_1 --operation mode is normal P1_FUNC_1_lut_out = !P1_fc_1 & P1_fc_0 & !P1_ix694_ix7_nx8; P1_FUNC_1 = DFFEAS(P1_FUNC_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_FUNC_1 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|FUNC_1 --operation mode is normal P3_FUNC_1_lut_out = !P3_fc_1 & P3_fc_0 & !P3_ix694_ix7_nx8; P3_FUNC_1 = DFFEAS(P3_FUNC_1_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --scsn_slave_nw_dll_ob1_ob_data_2 is scsn_slave_nw_dll_ob1_ob_data_2 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_2_lut_out = scsn_slave_nw_dll_ob1_ob_data_1; scsn_slave_nw_dll_ob1_ob_data_2 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_2_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_2, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_3 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_3 --operation mode is normal Y2_d_to_dll_3 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_3 # !Y2_current_state_0 & (J1_reply_3)); --D1_jtgsnd_ser_t_8 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_8 --operation mode is normal D1_jtgsnd_ser_t_8_lut_out = D1_jtgsnd_ser_t_7; D1_jtgsnd_ser_t_8 = DFFEAS(D1_jtgsnd_ser_t_8_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_1, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_8 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_8 --operation mode is normal E1_jtgsnd_ser_t_8_lut_out = E1_jtgsnd_ser_t_7; E1_jtgsnd_ser_t_8 = DFFEAS(E1_jtgsnd_ser_t_8_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_1, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_8 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_8 --operation mode is normal E2_jtgsnd_ser_t_8_lut_out = E2_jtgsnd_ser_t_7; E2_jtgsnd_ser_t_8 = DFFEAS(E2_jtgsnd_ser_t_8_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_1, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_1 is scsn_slave_nw_dll_ob0_ob_data_1 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_1_lut_out = scsn_slave_nw_dll_ob0_ob_data_0; scsn_slave_nw_dll_ob0_ob_data_1 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_1_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, Y1_d_to_dll_1, , , scsn_slave_nw_dll_ob0_a_2); --Y1_d_to_dll_2 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_2 --operation mode is normal Y1_d_to_dll_2 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_2 # !Y1_current_state_0 & (J1_reply_2)); --J1_reply_3 is mcm_nw_apl:scsn_slave_nw_apl|reply_3 --operation mode is normal J1_reply_3 = N1_request_3 & (J1_a_0_dup_54 # J1_read_data_28 & !J1_ix34_ix30_nx12) # !N1_request_3 & J1_read_data_28 & (!J1_ix34_ix30_nx12); --J1_read_data_27 is mcm_nw_apl:scsn_slave_nw_apl|read_data_27 --operation mode is normal J1_read_data_27_lut_out = C1_bus_dout_27; J1_read_data_27 = DFFEAS(J1_read_data_27_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_26 is gio_devices:gio|bus_dout_26 --operation mode is normal C1_bus_dout_26_lut_out = C1_nx220 # C1_nx221 # C1_nx222; C1_bus_dout_26 = DFFEAS(C1_bus_dout_26_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx223 is gio_devices:gio|nx223 --operation mode is normal C1_nx223 = W2_q_b[9] & (C1_sel_5 # G1_bus_dout_25 & C1_ce_gen) # !W2_q_b[9] & G1_bus_dout_25 & (C1_ce_gen); --C1_nx224 is gio_devices:gio|nx224 --operation mode is normal C1_nx224 = B1_bus_dout_25 & (C1_ce_cp # E2_bus_dout_25 & C1_ce_ni_jtg_up) # !B1_bus_dout_25 & E2_bus_dout_25 & (C1_ce_ni_jtg_up); --C1_nx225 is gio_devices:gio|nx225 --operation mode is normal C1_nx225 = E1_bus_dout_25 & (C1_ce_ni_jtg_dn # D1_bus_dout_25 & C1_ce_dut_jtg) # !E1_bus_dout_25 & D1_bus_dout_25 & (C1_ce_dut_jtg); --G1_bus_dout_24 is general_config_notri:nic_notri|bus_dout_24 --operation mode is normal G1_bus_dout_24 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_4 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_24 is clkpre_counter:cp|bus_dout_24 --operation mode is normal B1_bus_dout_24 = B1_nx728 # B1_nx812 # B1_dout_ccnt_24 & B1_nx794; --E2_bus_dout_24 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_24 --operation mode is normal E2_bus_dout_24_lut_out = S3_dout_24; E2_bus_dout_24 = DFFEAS(E2_bus_dout_24_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_24 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_24 --operation mode is normal E1_bus_dout_24_lut_out = S2_dout_24; E1_bus_dout_24 = DFFEAS(E1_bus_dout_24_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_24 is jtag_master_1_notri:jtag_dut_notri|bus_dout_24 --operation mode is normal D1_bus_dout_24_lut_out = S1_dout_24; D1_bus_dout_24 = DFFEAS(D1_bus_dout_24_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --G1_nx462 is general_config_notri:nic_notri|nx462 --operation mode is normal G1_nx462 = !G1_ix69_ix22_nx12 & (N1_request_48 & F2_par_cnt_11 # !N1_request_48 & (F2_naddr_11)); --G1_nx464 is general_config_notri:nic_notri|nx464 --operation mode is normal G1_nx464 = N1_request_44 & N1_request_43 & G1_se2_cnt_7 & !G1_ix69_ix38_nx10; --B1_dout_ccnt_23 is clkpre_counter:cp|dout_ccnt_23 --operation mode is normal B1_dout_ccnt_23_carry_eqn = B1_ccnt_cnt_2_cnt_i_Q_nx41; B1_dout_ccnt_23_lut_out = B1_dout_ccnt_23 $ (B1_dout_ccnt_23_carry_eqn); B1_dout_ccnt_23 = DFFEAS(B1_dout_ccnt_23_lut_out, GLOBAL(DUT_CLK[2]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_nx729 is clkpre_counter:cp|nx729 --operation mode is normal B1_nx729 = B1_dout1pcnt_23 & (B1_nx795 # B1_dout3pcnt_23 & B1_nx796) # !B1_dout1pcnt_23 & B1_dout3pcnt_23 & (B1_nx796); --B1_nx813 is clkpre_counter:cp|nx813 --operation mode is normal B1_nx813 = B1_dout0pcnt_23 & (B1_nx798 # B1_dout2pcnt_23 & B1_nx797) # !B1_dout0pcnt_23 & B1_dout2pcnt_23 & B1_nx797; --S3_dout_23 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_23 --operation mode is normal S3_dout_23 = N1_request_46 & (S3_NI_P0_D_4) # !N1_request_46 & !N1_request_47 & (S3_nx244); --S2_dout_23 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_23 --operation mode is normal S2_dout_23 = N1_request_46 & (S2_NI_P0_D_4) # !N1_request_46 & !N1_request_47 & (S2_nx244); --S1_dout_23 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_23 --operation mode is normal S1_dout_23 = N1_request_46 & (S1_NI_P0_D_4) # !N1_request_46 & !N1_request_47 & (S1_nx244); --F2_par_cnt_10 is ni2dpm_12:ni_ni_pos|par_cnt_10 --operation mode is arithmetic F2_par_cnt_10_carry_eqn = F2_parc_Q_nx57; F2_par_cnt_10_lut_out = F2_par_cnt_10 $ (!F2_par_cnt_10_carry_eqn); F2_par_cnt_10 = DFFEAS(F2_par_cnt_10_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --F2_parc_Q_nx61 is ni2dpm_12:ni_ni_pos|parc_Q_nx61 --operation mode is arithmetic F2_parc_Q_nx61 = CARRY(F2_par_cnt_10 & (!F2_parc_Q_nx57)); --B1_dout1pcnt_22 is clkpre_counter:cp|dout1pcnt_22 --operation mode is arithmetic B1_dout1pcnt_22_carry_eqn = B1_pcnt1_cnt_5_cnt_i_Q_nx16; B1_dout1pcnt_22_lut_out = B1_dout1pcnt_22 $ (!B1_dout1pcnt_22_carry_eqn); B1_dout1pcnt_22 = DFFEAS(B1_dout1pcnt_22_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_5_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_5_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_5_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_22 & (!B1_pcnt1_cnt_5_cnt_i_Q_nx16)); --B1_dout3pcnt_22 is clkpre_counter:cp|dout3pcnt_22 --operation mode is arithmetic B1_dout3pcnt_22_carry_eqn = B1_pcnt3_cnt_5_cnt_i_Q_nx16; B1_dout3pcnt_22_lut_out = B1_dout3pcnt_22 $ (!B1_dout3pcnt_22_carry_eqn); B1_dout3pcnt_22 = DFFEAS(B1_dout3pcnt_22_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_5_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_5_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_5_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_22 & (!B1_pcnt3_cnt_5_cnt_i_Q_nx16)); --B1_dout0pcnt_22 is clkpre_counter:cp|dout0pcnt_22 --operation mode is arithmetic B1_dout0pcnt_22_carry_eqn = B1_pcnt0_cnt_5_cnt_i_Q_nx16; B1_dout0pcnt_22_lut_out = B1_dout0pcnt_22 $ (!B1_dout0pcnt_22_carry_eqn); B1_dout0pcnt_22 = DFFEAS(B1_dout0pcnt_22_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_5_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_5_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_5_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_22 & (!B1_pcnt0_cnt_5_cnt_i_Q_nx16)); --B1_dout2pcnt_22 is clkpre_counter:cp|dout2pcnt_22 --operation mode is arithmetic B1_dout2pcnt_22_carry_eqn = B1_pcnt2_cnt_5_cnt_i_Q_nx16; B1_dout2pcnt_22_lut_out = B1_dout2pcnt_22 $ (!B1_dout2pcnt_22_carry_eqn); B1_dout2pcnt_22 = DFFEAS(B1_dout2pcnt_22_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_5_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_5_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_5_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_22 & (!B1_pcnt2_cnt_5_cnt_i_Q_nx16)); --S3_nx245 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx245 --operation mode is normal S3_nx245 = N1_request_48 & (S3_NI_P3_D_6) # !N1_request_48 & S3_NI_P1_D_6; --S2_nx245 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx245 --operation mode is normal S2_nx245 = N1_request_48 & (S2_NI_P3_D_6) # !N1_request_48 & S2_NI_P1_D_6; --S1_nx245 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx245 --operation mode is normal S1_nx245 = N1_request_48 & (S1_NI_P3_D_6) # !N1_request_48 & S1_NI_P1_D_6; --scsn_slave_nw_dll_ob1_ob_data_1 is scsn_slave_nw_dll_ob1_ob_data_1 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_1_lut_out = scsn_slave_nw_dll_ob1_ob_data_0; scsn_slave_nw_dll_ob1_ob_data_1 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_1_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, Y2_d_to_dll_1, , , scsn_slave_nw_dll_ob1_a_2); --Y2_d_to_dll_2 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_2 --operation mode is normal Y2_d_to_dll_2 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_2 # !Y2_current_state_0 & (J1_reply_2)); --D1_jtgsnd_ser_t_7 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_7 --operation mode is normal D1_jtgsnd_ser_t_7_lut_out = D1_jtgsnd_ser_t_6; D1_jtgsnd_ser_t_7 = DFFEAS(D1_jtgsnd_ser_t_7_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_18, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_7 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_7 --operation mode is normal E1_jtgsnd_ser_t_7_lut_out = E1_jtgsnd_ser_t_6; E1_jtgsnd_ser_t_7 = DFFEAS(E1_jtgsnd_ser_t_7_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_18, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_7 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_7 --operation mode is normal E2_jtgsnd_ser_t_7_lut_out = E2_jtgsnd_ser_t_6; E2_jtgsnd_ser_t_7 = DFFEAS(E2_jtgsnd_ser_t_7_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_18, , , E2_jtgsnd_we_g_0); --scsn_slave_nw_dll_ob0_ob_data_0 is scsn_slave_nw_dll_ob0_ob_data_0 --operation mode is normal scsn_slave_nw_dll_ob0_ob_data_0_lut_out = Y1_d_to_dll_0 & Y1_d_we & !M1_freeze_buffer; scsn_slave_nw_dll_ob0_ob_data_0 = DFFEAS(scsn_slave_nw_dll_ob0_ob_data_0_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob0_NOT_nx714, , , , ); --Y1_d_to_dll_1 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_1 --operation mode is normal Y1_d_to_dll_1 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_1 # !Y1_current_state_0 & (J1_reply_1)); --J1_reply_2 is mcm_nw_apl:scsn_slave_nw_apl|reply_2 --operation mode is normal J1_reply_2 = N1_request_2 & (J1_a_0_dup_54 # J1_read_data_29 & !J1_ix34_ix30_nx12) # !N1_request_2 & J1_read_data_29 & (!J1_ix34_ix30_nx12); --J1_read_data_28 is mcm_nw_apl:scsn_slave_nw_apl|read_data_28 --operation mode is normal J1_read_data_28_lut_out = C1_bus_dout_28; J1_read_data_28 = DFFEAS(J1_read_data_28_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_27 is gio_devices:gio|bus_dout_27 --operation mode is normal C1_bus_dout_27_lut_out = C1_nx217 # C1_nx218 # C1_nx219; C1_bus_dout_27 = DFFEAS(C1_bus_dout_27_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx220 is gio_devices:gio|nx220 --operation mode is normal C1_nx220 = W2_q_b[10] & (C1_sel_5 # G1_bus_dout_26 & C1_ce_gen) # !W2_q_b[10] & G1_bus_dout_26 & (C1_ce_gen); --C1_nx221 is gio_devices:gio|nx221 --operation mode is normal C1_nx221 = B1_bus_dout_26 & (C1_ce_cp # E2_bus_dout_26 & C1_ce_ni_jtg_up) # !B1_bus_dout_26 & E2_bus_dout_26 & (C1_ce_ni_jtg_up); --C1_nx222 is gio_devices:gio|nx222 --operation mode is normal C1_nx222 = E1_bus_dout_26 & (C1_ce_ni_jtg_dn # D1_bus_dout_26 & C1_ce_dut_jtg) # !E1_bus_dout_26 & D1_bus_dout_26 & (C1_ce_dut_jtg); --G1_bus_dout_25 is general_config_notri:nic_notri|bus_dout_25 --operation mode is normal G1_bus_dout_25 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_5 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_25 is clkpre_counter:cp|bus_dout_25 --operation mode is normal B1_bus_dout_25 = B1_nx727 # B1_nx811 # B1_dout_ccnt_25 & B1_nx794; --E2_bus_dout_25 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_25 --operation mode is normal E2_bus_dout_25_lut_out = S3_dout_25; E2_bus_dout_25 = DFFEAS(E2_bus_dout_25_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_25 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_25 --operation mode is normal E1_bus_dout_25_lut_out = S2_dout_25; E1_bus_dout_25 = DFFEAS(E1_bus_dout_25_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_25 is jtag_master_1_notri:jtag_dut_notri|bus_dout_25 --operation mode is normal D1_bus_dout_25_lut_out = S1_dout_25; D1_bus_dout_25 = DFFEAS(D1_bus_dout_25_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_24 is clkpre_counter:cp|dout_ccnt_24 --operation mode is arithmetic B1_dout_ccnt_24_lut_out = B1_dout_ccnt_24 $ B1_ccnt_count_en_3; B1_dout_ccnt_24 = DFFEAS(B1_dout_ccnt_24_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx10 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx10 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx10 = CARRY(B1_dout_ccnt_24 & B1_ccnt_count_en_3); --B1_nx728 is clkpre_counter:cp|nx728 --operation mode is normal B1_nx728 = B1_dout1pcnt_24 & (B1_nx795 # B1_dout3pcnt_24 & B1_nx796) # !B1_dout1pcnt_24 & B1_dout3pcnt_24 & (B1_nx796); --B1_nx812 is clkpre_counter:cp|nx812 --operation mode is normal B1_nx812 = B1_dout0pcnt_24 & (B1_nx798 # B1_dout2pcnt_24 & B1_nx797) # !B1_dout0pcnt_24 & B1_dout2pcnt_24 & B1_nx797; --S3_dout_24 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_24 --operation mode is normal S3_dout_24 = N1_request_46 & (S3_NI_P1_D_1) # !N1_request_46 & !N1_request_47 & (S3_nx243); --S2_dout_24 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_24 --operation mode is normal S2_dout_24 = N1_request_46 & (S2_NI_P1_D_1) # !N1_request_46 & !N1_request_47 & (S2_nx243); --S1_dout_24 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_24 --operation mode is normal S1_dout_24 = N1_request_46 & (S1_NI_P1_D_1) # !N1_request_46 & !N1_request_47 & (S1_nx243); --F2_par_cnt_11 is ni2dpm_12:ni_ni_pos|par_cnt_11 --operation mode is normal F2_par_cnt_11_carry_eqn = F2_parc_Q_nx61; F2_par_cnt_11_lut_out = F2_par_cnt_11 $ (F2_par_cnt_11_carry_eqn); F2_par_cnt_11 = DFFEAS(F2_par_cnt_11_lut_out, GLOBAL(DUT_P4_STR), G1_NOT_ni_clear, , , , , , ); --B1_dout1pcnt_23 is clkpre_counter:cp|dout1pcnt_23 --operation mode is normal B1_dout1pcnt_23_carry_eqn = B1_pcnt1_cnt_5_cnt_i_Q_nx21; B1_dout1pcnt_23_lut_out = B1_dout1pcnt_23 $ (B1_dout1pcnt_23_carry_eqn); B1_dout1pcnt_23 = DFFEAS(B1_dout1pcnt_23_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_23 is clkpre_counter:cp|dout3pcnt_23 --operation mode is normal B1_dout3pcnt_23_carry_eqn = B1_pcnt3_cnt_5_cnt_i_Q_nx21; B1_dout3pcnt_23_lut_out = B1_dout3pcnt_23 $ (B1_dout3pcnt_23_carry_eqn); B1_dout3pcnt_23 = DFFEAS(B1_dout3pcnt_23_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout0pcnt_23 is clkpre_counter:cp|dout0pcnt_23 --operation mode is normal B1_dout0pcnt_23_carry_eqn = B1_pcnt0_cnt_5_cnt_i_Q_nx21; B1_dout0pcnt_23_lut_out = B1_dout0pcnt_23 $ (B1_dout0pcnt_23_carry_eqn); B1_dout0pcnt_23 = DFFEAS(B1_dout0pcnt_23_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_23 is clkpre_counter:cp|dout2pcnt_23 --operation mode is normal B1_dout2pcnt_23_carry_eqn = B1_pcnt2_cnt_5_cnt_i_Q_nx21; B1_dout2pcnt_23_lut_out = B1_dout2pcnt_23 $ (B1_dout2pcnt_23_carry_eqn); B1_dout2pcnt_23 = DFFEAS(B1_dout2pcnt_23_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --S3_nx244 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx244 --operation mode is normal S3_nx244 = N1_request_48 & (S3_NI_P3_D_7) # !N1_request_48 & S3_NI_P1_D_7; --S2_nx244 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx244 --operation mode is normal S2_nx244 = N1_request_48 & (S2_NI_P3_D_7) # !N1_request_48 & S2_NI_P1_D_7; --S1_nx244 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx244 --operation mode is normal S1_nx244 = N1_request_48 & (S1_NI_P3_D_7) # !N1_request_48 & S1_NI_P1_D_7; --scsn_slave_nw_dll_ob1_ob_data_0 is scsn_slave_nw_dll_ob1_ob_data_0 --operation mode is normal scsn_slave_nw_dll_ob1_ob_data_0_lut_out = Y2_d_to_dll_0 & Y2_d_we & !M2_freeze_buffer; scsn_slave_nw_dll_ob1_ob_data_0 = DFFEAS(scsn_slave_nw_dll_ob1_ob_data_0_lut_out, X1__clk0, VCC, , scsn_slave_nw_dll_ob1_NOT_nx714, , , , ); --Y2_d_to_dll_1 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_1 --operation mode is normal Y2_d_to_dll_1 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_1 # !Y2_current_state_0 & (J1_reply_1)); --D1_jtgsnd_ser_t_6 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_6 --operation mode is normal D1_jtgsnd_ser_t_6_lut_out = D1_jtgsnd_ser_t_5; D1_jtgsnd_ser_t_6 = DFFEAS(D1_jtgsnd_ser_t_6_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_5, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_6 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_6 --operation mode is normal E1_jtgsnd_ser_t_6_lut_out = E1_jtgsnd_ser_t_5; E1_jtgsnd_ser_t_6 = DFFEAS(E1_jtgsnd_ser_t_6_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_5, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_6 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_6 --operation mode is normal E2_jtgsnd_ser_t_6_lut_out = E2_jtgsnd_ser_t_5; E2_jtgsnd_ser_t_6 = DFFEAS(E2_jtgsnd_ser_t_6_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_5, , , E2_jtgsnd_we_g_0); --Y1_d_to_dll_0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl0|d_to_dll_0 --operation mode is normal Y1_d_to_dll_0 = !Y1_current_state_2 & (Y1_current_state_0 & L1_data_out_0 # !Y1_current_state_0 & (J1_reply_0)); --J1_reply_1 is mcm_nw_apl:scsn_slave_nw_apl|reply_1 --operation mode is normal J1_reply_1 = N1_request_1 & (J1_a_0_dup_54 # J1_read_data_30 & !J1_ix34_ix30_nx12) # !N1_request_1 & J1_read_data_30 & (!J1_ix34_ix30_nx12); --J1_read_data_29 is mcm_nw_apl:scsn_slave_nw_apl|read_data_29 --operation mode is normal J1_read_data_29_lut_out = C1_bus_dout_29; J1_read_data_29 = DFFEAS(J1_read_data_29_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_28 is gio_devices:gio|bus_dout_28 --operation mode is normal C1_bus_dout_28_lut_out = C1_nx214 # C1_nx215 # C1_nx216; C1_bus_dout_28 = DFFEAS(C1_bus_dout_28_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx217 is gio_devices:gio|nx217 --operation mode is normal C1_nx217 = W2_q_b[11] & (C1_sel_5 # G1_bus_dout_27 & C1_ce_gen) # !W2_q_b[11] & G1_bus_dout_27 & (C1_ce_gen); --C1_nx218 is gio_devices:gio|nx218 --operation mode is normal C1_nx218 = B1_bus_dout_27 & (C1_ce_cp # E2_bus_dout_27 & C1_ce_ni_jtg_up) # !B1_bus_dout_27 & E2_bus_dout_27 & (C1_ce_ni_jtg_up); --C1_nx219 is gio_devices:gio|nx219 --operation mode is normal C1_nx219 = E1_bus_dout_27 & (C1_ce_ni_jtg_dn # D1_bus_dout_27 & C1_ce_dut_jtg) # !E1_bus_dout_27 & D1_bus_dout_27 & (C1_ce_dut_jtg); --G1_bus_dout_26 is general_config_notri:nic_notri|bus_dout_26 --operation mode is normal G1_bus_dout_26 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_6 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_26 is clkpre_counter:cp|bus_dout_26 --operation mode is normal B1_bus_dout_26 = B1_nx726 # B1_nx810 # B1_dout_ccnt_26 & B1_nx794; --E2_bus_dout_26 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_26 --operation mode is normal E2_bus_dout_26_lut_out = S3_dout_26; E2_bus_dout_26 = DFFEAS(E2_bus_dout_26_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_26 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_26 --operation mode is normal E1_bus_dout_26_lut_out = S2_dout_26; E1_bus_dout_26 = DFFEAS(E1_bus_dout_26_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_26 is jtag_master_1_notri:jtag_dut_notri|bus_dout_26 --operation mode is normal D1_bus_dout_26_lut_out = S1_dout_26; D1_bus_dout_26 = DFFEAS(D1_bus_dout_26_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_25 is clkpre_counter:cp|dout_ccnt_25 --operation mode is arithmetic B1_dout_ccnt_25_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx10; B1_dout_ccnt_25_lut_out = B1_dout_ccnt_25 $ (B1_dout_ccnt_25_carry_eqn); B1_dout_ccnt_25 = DFFEAS(B1_dout_ccnt_25_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx16 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx16 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx16 = CARRY(!B1_ccnt_cnt_3_cnt_i_Q_nx10 # !B1_dout_ccnt_25); --B1_nx727 is clkpre_counter:cp|nx727 --operation mode is normal B1_nx727 = B1_dout1pcnt_25 & (B1_nx795 # B1_dout3pcnt_25 & B1_nx796) # !B1_dout1pcnt_25 & B1_dout3pcnt_25 & (B1_nx796); --B1_nx811 is clkpre_counter:cp|nx811 --operation mode is normal B1_nx811 = B1_dout0pcnt_25 & (B1_nx798 # B1_dout2pcnt_25 & B1_nx797) # !B1_dout0pcnt_25 & B1_dout2pcnt_25 & B1_nx797; --S3_dout_25 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_25 --operation mode is normal S3_dout_25 = N1_request_46 & (S3_NI_P1_D_0) # !N1_request_46 & !N1_request_47 & (S3_nx242); --S2_dout_25 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_25 --operation mode is normal S2_dout_25 = N1_request_46 & (S2_NI_P1_D_0) # !N1_request_46 & !N1_request_47 & (S2_nx242); --S1_dout_25 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_25 --operation mode is normal S1_dout_25 = N1_request_46 & (S1_NI_P1_D_0) # !N1_request_46 & !N1_request_47 & (S1_nx242); --B1_ccnt_count_en_3 is clkpre_counter:cp|ccnt_count_en_3 --operation mode is normal B1_ccnt_count_en_3_lut_out = B1_ccnt_count_en_c; B1_ccnt_count_en_3 = DFFEAS(B1_ccnt_count_en_3_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_dout1pcnt_24 is clkpre_counter:cp|dout1pcnt_24 --operation mode is arithmetic B1_dout1pcnt_24_lut_out = B1_dout1pcnt_24 $ P2_FUNC_2; B1_dout1pcnt_24 = DFFEAS(B1_dout1pcnt_24_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_6_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_6_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_6_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_24 & P2_FUNC_2); --B1_dout3pcnt_24 is clkpre_counter:cp|dout3pcnt_24 --operation mode is arithmetic B1_dout3pcnt_24_lut_out = B1_dout3pcnt_24 $ P4_FUNC_2; B1_dout3pcnt_24 = DFFEAS(B1_dout3pcnt_24_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_6_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_6_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_6_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_24 & P4_FUNC_2); --B1_dout0pcnt_24 is clkpre_counter:cp|dout0pcnt_24 --operation mode is arithmetic B1_dout0pcnt_24_lut_out = B1_dout0pcnt_24 $ P1_FUNC_2; B1_dout0pcnt_24 = DFFEAS(B1_dout0pcnt_24_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_6_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_6_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_6_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_24 & P1_FUNC_2); --B1_dout2pcnt_24 is clkpre_counter:cp|dout2pcnt_24 --operation mode is arithmetic B1_dout2pcnt_24_lut_out = B1_dout2pcnt_24 $ P3_FUNC_2; B1_dout2pcnt_24 = DFFEAS(B1_dout2pcnt_24_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_6_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_6_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_6_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_24 & P3_FUNC_2); --S3_nx243 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx243 --operation mode is normal S3_nx243 = N1_request_48 & (S3_NI_P3_D_8) # !N1_request_48 & S3_NI_P1_D_8; --S2_nx243 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx243 --operation mode is normal S2_nx243 = N1_request_48 & (S2_NI_P3_D_8) # !N1_request_48 & S2_NI_P1_D_8; --S1_nx243 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx243 --operation mode is normal S1_nx243 = N1_request_48 & (S1_NI_P3_D_8) # !N1_request_48 & S1_NI_P1_D_8; --Y2_d_to_dll_0 is mcm_nw_nwl:scsn_slave_nw_nwl|mcm_nw_nwsl:sl1|d_to_dll_0 --operation mode is normal Y2_d_to_dll_0 = !Y2_current_state_2 & (Y2_current_state_0 & L2_data_out_0 # !Y2_current_state_0 & (J1_reply_0)); --D1_jtgsnd_ser_t_5 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_5 --operation mode is normal D1_jtgsnd_ser_t_5_lut_out = D1_jtgsnd_ser_t_4; D1_jtgsnd_ser_t_5 = DFFEAS(D1_jtgsnd_ser_t_5_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_2, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_5 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_5 --operation mode is normal E1_jtgsnd_ser_t_5_lut_out = E1_jtgsnd_ser_t_4; E1_jtgsnd_ser_t_5 = DFFEAS(E1_jtgsnd_ser_t_5_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_2, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_5 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_5 --operation mode is normal E2_jtgsnd_ser_t_5_lut_out = E2_jtgsnd_ser_t_4; E2_jtgsnd_ser_t_5 = DFFEAS(E2_jtgsnd_ser_t_5_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_2, , , E2_jtgsnd_we_g_0); --J1_reply_0 is mcm_nw_apl:scsn_slave_nw_apl|reply_0 --operation mode is normal J1_reply_0 = N1_request_0 & (J1_a_0_dup_54 # J1_read_data_31 & !J1_ix34_ix30_nx12) # !N1_request_0 & J1_read_data_31 & (!J1_ix34_ix30_nx12); --J1_read_data_30 is mcm_nw_apl:scsn_slave_nw_apl|read_data_30 --operation mode is normal J1_read_data_30_lut_out = C1_bus_dout_30; J1_read_data_30 = DFFEAS(J1_read_data_30_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_29 is gio_devices:gio|bus_dout_29 --operation mode is normal C1_bus_dout_29_lut_out = C1_nx211 # C1_nx212 # C1_nx213; C1_bus_dout_29 = DFFEAS(C1_bus_dout_29_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx214 is gio_devices:gio|nx214 --operation mode is normal C1_nx214 = W2_q_b[12] & (C1_sel_5 # G1_bus_dout_28 & C1_ce_gen) # !W2_q_b[12] & G1_bus_dout_28 & (C1_ce_gen); --C1_nx215 is gio_devices:gio|nx215 --operation mode is normal C1_nx215 = B1_bus_dout_28 & (C1_ce_cp # E2_bus_dout_28 & C1_ce_ni_jtg_up) # !B1_bus_dout_28 & E2_bus_dout_28 & (C1_ce_ni_jtg_up); --C1_nx216 is gio_devices:gio|nx216 --operation mode is normal C1_nx216 = E1_bus_dout_28 & (C1_ce_ni_jtg_dn # D1_bus_dout_28 & C1_ce_dut_jtg) # !E1_bus_dout_28 & D1_bus_dout_28 & (C1_ce_dut_jtg); --G1_bus_dout_27 is general_config_notri:nic_notri|bus_dout_27 --operation mode is normal G1_bus_dout_27 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_7 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_27 is clkpre_counter:cp|bus_dout_27 --operation mode is normal B1_bus_dout_27 = B1_nx725 # B1_nx809 # B1_dout_ccnt_27 & B1_nx794; --E2_bus_dout_27 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_27 --operation mode is normal E2_bus_dout_27_lut_out = S3_dout_27; E2_bus_dout_27 = DFFEAS(E2_bus_dout_27_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_27 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_27 --operation mode is normal E1_bus_dout_27_lut_out = S2_dout_27; E1_bus_dout_27 = DFFEAS(E1_bus_dout_27_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_27 is jtag_master_1_notri:jtag_dut_notri|bus_dout_27 --operation mode is normal D1_bus_dout_27_lut_out = S1_dout_27; D1_bus_dout_27 = DFFEAS(D1_bus_dout_27_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_26 is clkpre_counter:cp|dout_ccnt_26 --operation mode is arithmetic B1_dout_ccnt_26_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx16; B1_dout_ccnt_26_lut_out = B1_dout_ccnt_26 $ (!B1_dout_ccnt_26_carry_eqn); B1_dout_ccnt_26 = DFFEAS(B1_dout_ccnt_26_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx22 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx22 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx22 = CARRY(B1_dout_ccnt_26 & (!B1_ccnt_cnt_3_cnt_i_Q_nx16)); --B1_nx726 is clkpre_counter:cp|nx726 --operation mode is normal B1_nx726 = B1_dout1pcnt_26 & (B1_nx795 # B1_dout3pcnt_26 & B1_nx796) # !B1_dout1pcnt_26 & B1_dout3pcnt_26 & (B1_nx796); --B1_nx810 is clkpre_counter:cp|nx810 --operation mode is normal B1_nx810 = B1_dout0pcnt_26 & (B1_nx798 # B1_dout2pcnt_26 & B1_nx797) # !B1_dout0pcnt_26 & B1_dout2pcnt_26 & B1_nx797; --S3_dout_26 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_26 --operation mode is normal S3_dout_26 = N1_request_46 & (S3_NI_P0_D_3) # !N1_request_46 & !N1_request_47 & (S3_nx241); --S2_dout_26 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_26 --operation mode is normal S2_dout_26 = N1_request_46 & (S2_NI_P0_D_3) # !N1_request_46 & !N1_request_47 & (S2_nx241); --S1_dout_26 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_26 --operation mode is normal S1_dout_26 = N1_request_46 & (S1_NI_P0_D_3) # !N1_request_46 & !N1_request_47 & (S1_nx241); --B1_dout1pcnt_25 is clkpre_counter:cp|dout1pcnt_25 --operation mode is arithmetic B1_dout1pcnt_25_carry_eqn = B1_pcnt1_cnt_6_cnt_i_Q_nx10; B1_dout1pcnt_25_lut_out = B1_dout1pcnt_25 $ (B1_dout1pcnt_25_carry_eqn); B1_dout1pcnt_25 = DFFEAS(B1_dout1pcnt_25_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_6_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_6_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_6_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_6_cnt_i_Q_nx10 # !B1_dout1pcnt_25); --B1_dout3pcnt_25 is clkpre_counter:cp|dout3pcnt_25 --operation mode is arithmetic B1_dout3pcnt_25_carry_eqn = B1_pcnt3_cnt_6_cnt_i_Q_nx10; B1_dout3pcnt_25_lut_out = B1_dout3pcnt_25 $ (B1_dout3pcnt_25_carry_eqn); B1_dout3pcnt_25 = DFFEAS(B1_dout3pcnt_25_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_6_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_6_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_6_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_6_cnt_i_Q_nx10 # !B1_dout3pcnt_25); --B1_dout0pcnt_25 is clkpre_counter:cp|dout0pcnt_25 --operation mode is arithmetic B1_dout0pcnt_25_carry_eqn = B1_pcnt0_cnt_6_cnt_i_Q_nx10; B1_dout0pcnt_25_lut_out = B1_dout0pcnt_25 $ (B1_dout0pcnt_25_carry_eqn); B1_dout0pcnt_25 = DFFEAS(B1_dout0pcnt_25_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_6_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_6_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_6_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_6_cnt_i_Q_nx10 # !B1_dout0pcnt_25); --B1_dout2pcnt_25 is clkpre_counter:cp|dout2pcnt_25 --operation mode is arithmetic B1_dout2pcnt_25_carry_eqn = B1_pcnt2_cnt_6_cnt_i_Q_nx10; B1_dout2pcnt_25_lut_out = B1_dout2pcnt_25 $ (B1_dout2pcnt_25_carry_eqn); B1_dout2pcnt_25 = DFFEAS(B1_dout2pcnt_25_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_6_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_6_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_6_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_6_cnt_i_Q_nx10 # !B1_dout2pcnt_25); --S3_nx242 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx242 --operation mode is normal S3_nx242 = N1_request_48 & (S3_NI_P3_D_9) # !N1_request_48 & S3_NI_P1_D_9; --S2_nx242 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx242 --operation mode is normal S2_nx242 = N1_request_48 & (S2_NI_P3_D_9) # !N1_request_48 & S2_NI_P1_D_9; --S1_nx242 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx242 --operation mode is normal S1_nx242 = N1_request_48 & (S1_NI_P3_D_9) # !N1_request_48 & S1_NI_P1_D_9; --P2_FUNC_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|FUNC_2 --operation mode is normal P2_FUNC_2_lut_out = P2_fc_1 & !P2_fc_0 & !P2_ix694_ix7_nx8; P2_FUNC_2 = DFFEAS(P2_FUNC_2_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_FUNC_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|FUNC_2 --operation mode is normal P4_FUNC_2_lut_out = P4_fc_1 & !P4_fc_0 & !P4_ix694_ix7_nx8; P4_FUNC_2 = DFFEAS(P4_FUNC_2_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_FUNC_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|FUNC_2 --operation mode is normal P1_FUNC_2_lut_out = P1_fc_1 & !P1_fc_0 & !P1_ix694_ix7_nx8; P1_FUNC_2 = DFFEAS(P1_FUNC_2_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_FUNC_2 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|FUNC_2 --operation mode is normal P3_FUNC_2_lut_out = P3_fc_1 & !P3_fc_0 & !P3_ix694_ix7_nx8; P3_FUNC_2 = DFFEAS(P3_FUNC_2_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --D1_jtgsnd_ser_t_4 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_4 --operation mode is normal D1_jtgsnd_ser_t_4_lut_out = D1_jtgsnd_ser_t_3; D1_jtgsnd_ser_t_4 = DFFEAS(D1_jtgsnd_ser_t_4_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_19, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_4 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_4 --operation mode is normal E1_jtgsnd_ser_t_4_lut_out = E1_jtgsnd_ser_t_3; E1_jtgsnd_ser_t_4 = DFFEAS(E1_jtgsnd_ser_t_4_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_19, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_4 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_4 --operation mode is normal E2_jtgsnd_ser_t_4_lut_out = E2_jtgsnd_ser_t_3; E2_jtgsnd_ser_t_4 = DFFEAS(E2_jtgsnd_ser_t_4_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_19, , , E2_jtgsnd_we_g_0); --J1_read_data_31 is mcm_nw_apl:scsn_slave_nw_apl|read_data_31 --operation mode is normal J1_read_data_31_lut_out = C1_bus_dout_31; J1_read_data_31 = DFFEAS(J1_read_data_31_lut_out, X1__clk0, VCC, , J1_nx397, , , , ); --C1_bus_dout_30 is gio_devices:gio|bus_dout_30 --operation mode is normal C1_bus_dout_30_lut_out = C1_nx208 # C1_nx209 # C1_nx210; C1_bus_dout_30 = DFFEAS(C1_bus_dout_30_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx211 is gio_devices:gio|nx211 --operation mode is normal C1_nx211 = W2_q_b[13] & (C1_sel_5 # G1_bus_dout_29 & C1_ce_gen) # !W2_q_b[13] & G1_bus_dout_29 & (C1_ce_gen); --C1_nx212 is gio_devices:gio|nx212 --operation mode is normal C1_nx212 = B1_bus_dout_29 & (C1_ce_cp # E2_bus_dout_29 & C1_ce_ni_jtg_up) # !B1_bus_dout_29 & E2_bus_dout_29 & (C1_ce_ni_jtg_up); --C1_nx213 is gio_devices:gio|nx213 --operation mode is normal C1_nx213 = E1_bus_dout_29 & (C1_ce_ni_jtg_dn # D1_bus_dout_29 & C1_ce_dut_jtg) # !E1_bus_dout_29 & D1_bus_dout_29 & (C1_ce_dut_jtg); --G1_bus_dout_28 is general_config_notri:nic_notri|bus_dout_28 --operation mode is normal G1_bus_dout_28 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_8 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_28 is clkpre_counter:cp|bus_dout_28 --operation mode is normal B1_bus_dout_28 = B1_nx724 # B1_nx808 # B1_dout_ccnt_28 & B1_nx794; --E2_bus_dout_28 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_28 --operation mode is normal E2_bus_dout_28_lut_out = S3_dout_28; E2_bus_dout_28 = DFFEAS(E2_bus_dout_28_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_28 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_28 --operation mode is normal E1_bus_dout_28_lut_out = S2_dout_28; E1_bus_dout_28 = DFFEAS(E1_bus_dout_28_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_28 is jtag_master_1_notri:jtag_dut_notri|bus_dout_28 --operation mode is normal D1_bus_dout_28_lut_out = S1_dout_28; D1_bus_dout_28 = DFFEAS(D1_bus_dout_28_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_27 is clkpre_counter:cp|dout_ccnt_27 --operation mode is arithmetic B1_dout_ccnt_27_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx22; B1_dout_ccnt_27_lut_out = B1_dout_ccnt_27 $ (B1_dout_ccnt_27_carry_eqn); B1_dout_ccnt_27 = DFFEAS(B1_dout_ccnt_27_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx28 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx28 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx28 = CARRY(!B1_ccnt_cnt_3_cnt_i_Q_nx22 # !B1_dout_ccnt_27); --B1_nx725 is clkpre_counter:cp|nx725 --operation mode is normal B1_nx725 = B1_dout1pcnt_27 & (B1_nx795 # B1_dout3pcnt_27 & B1_nx796) # !B1_dout1pcnt_27 & B1_dout3pcnt_27 & (B1_nx796); --B1_nx809 is clkpre_counter:cp|nx809 --operation mode is normal B1_nx809 = B1_dout0pcnt_27 & (B1_nx798 # B1_dout2pcnt_27 & B1_nx797) # !B1_dout0pcnt_27 & B1_dout2pcnt_27 & B1_nx797; --S3_dout_27 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_27 --operation mode is normal S3_dout_27 = N1_request_46 & S3_NI_P2_CLKout; --S2_dout_27 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_27 --operation mode is normal S2_dout_27 = N1_request_46 & S2_NI_P2_CLKout; --S1_dout_27 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_27 --operation mode is normal S1_dout_27 = N1_request_46 & S1_NI_P2_CLKout; --B1_dout1pcnt_26 is clkpre_counter:cp|dout1pcnt_26 --operation mode is arithmetic B1_dout1pcnt_26_carry_eqn = B1_pcnt1_cnt_6_cnt_i_Q_nx16; B1_dout1pcnt_26_lut_out = B1_dout1pcnt_26 $ (!B1_dout1pcnt_26_carry_eqn); B1_dout1pcnt_26 = DFFEAS(B1_dout1pcnt_26_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_6_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_6_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_6_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_26 & (!B1_pcnt1_cnt_6_cnt_i_Q_nx16)); --B1_dout3pcnt_26 is clkpre_counter:cp|dout3pcnt_26 --operation mode is arithmetic B1_dout3pcnt_26_carry_eqn = B1_pcnt3_cnt_6_cnt_i_Q_nx16; B1_dout3pcnt_26_lut_out = B1_dout3pcnt_26 $ (!B1_dout3pcnt_26_carry_eqn); B1_dout3pcnt_26 = DFFEAS(B1_dout3pcnt_26_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_6_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_6_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_6_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_26 & (!B1_pcnt3_cnt_6_cnt_i_Q_nx16)); --B1_dout0pcnt_26 is clkpre_counter:cp|dout0pcnt_26 --operation mode is arithmetic B1_dout0pcnt_26_carry_eqn = B1_pcnt0_cnt_6_cnt_i_Q_nx16; B1_dout0pcnt_26_lut_out = B1_dout0pcnt_26 $ (!B1_dout0pcnt_26_carry_eqn); B1_dout0pcnt_26 = DFFEAS(B1_dout0pcnt_26_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_6_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_6_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_6_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_26 & (!B1_pcnt0_cnt_6_cnt_i_Q_nx16)); --B1_dout2pcnt_26 is clkpre_counter:cp|dout2pcnt_26 --operation mode is arithmetic B1_dout2pcnt_26_carry_eqn = B1_pcnt2_cnt_6_cnt_i_Q_nx16; B1_dout2pcnt_26_lut_out = B1_dout2pcnt_26 $ (!B1_dout2pcnt_26_carry_eqn); B1_dout2pcnt_26 = DFFEAS(B1_dout2pcnt_26_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_6_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_6_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_6_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_26 & (!B1_pcnt2_cnt_6_cnt_i_Q_nx16)); --S3_nx241 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx241 --operation mode is normal S3_nx241 = N1_request_48 & (S3_NI_P3_STRB) # !N1_request_48 & S3_NI_P1_STRB; --S2_nx241 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx241 --operation mode is normal S2_nx241 = N1_request_48 & (S2_NI_P3_STRB) # !N1_request_48 & S2_NI_P1_STRB; --S1_nx241 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx241 --operation mode is normal S1_nx241 = N1_request_48 & (S1_NI_P3_STRB) # !N1_request_48 & S1_NI_P1_STRB; --D1_jtgsnd_ser_t_3 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_3 --operation mode is normal D1_jtgsnd_ser_t_3_lut_out = D1_jtgsnd_ser_t_2; D1_jtgsnd_ser_t_3 = DFFEAS(D1_jtgsnd_ser_t_3_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx796, N1_request_3, , , D1_jtgsnd_we_g_0); --E1_jtgsnd_ser_t_3 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_3 --operation mode is normal E1_jtgsnd_ser_t_3_lut_out = E1_jtgsnd_ser_t_2; E1_jtgsnd_ser_t_3 = DFFEAS(E1_jtgsnd_ser_t_3_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx816, N1_request_3, , , E1_jtgsnd_we_g_0); --E2_jtgsnd_ser_t_3 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_3 --operation mode is normal E2_jtgsnd_ser_t_3_lut_out = E2_jtgsnd_ser_t_2; E2_jtgsnd_ser_t_3 = DFFEAS(E2_jtgsnd_ser_t_3_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx816, N1_request_3, , , E2_jtgsnd_we_g_0); --C1_bus_dout_31 is gio_devices:gio|bus_dout_31 --operation mode is normal C1_bus_dout_31_lut_out = C1_nx205 # C1_nx206 # C1_nx207; C1_bus_dout_31 = DFFEAS(C1_bus_dout_31_lut_out, X1__clk0, VCC, , C1_bus_ack, , , , ); --C1_nx208 is gio_devices:gio|nx208 --operation mode is normal C1_nx208 = W2_q_b[14] & (C1_sel_5 # G1_bus_dout_30 & C1_ce_gen) # !W2_q_b[14] & G1_bus_dout_30 & (C1_ce_gen); --C1_nx209 is gio_devices:gio|nx209 --operation mode is normal C1_nx209 = B1_bus_dout_30 & (C1_ce_cp # E2_bus_dout_30 & C1_ce_ni_jtg_up) # !B1_bus_dout_30 & E2_bus_dout_30 & (C1_ce_ni_jtg_up); --C1_nx210 is gio_devices:gio|nx210 --operation mode is normal C1_nx210 = E1_bus_dout_30 & (C1_ce_ni_jtg_dn # D1_bus_dout_30 & C1_ce_dut_jtg) # !E1_bus_dout_30 & D1_bus_dout_30 & (C1_ce_dut_jtg); --G1_bus_dout_29 is general_config_notri:nic_notri|bus_dout_29 --operation mode is normal G1_bus_dout_29 = N1_request_44 & !N1_request_43 & G1_ni_xor_mask_9 & G1_NOT_ix69_ix30_nx10; --B1_bus_dout_29 is clkpre_counter:cp|bus_dout_29 --operation mode is normal B1_bus_dout_29 = B1_nx723 # B1_nx807 # B1_dout_ccnt_29 & B1_nx794; --E2_bus_dout_29 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_29 --operation mode is normal E2_bus_dout_29_lut_out = S3_dout_29; E2_bus_dout_29 = DFFEAS(E2_bus_dout_29_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_29 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_29 --operation mode is normal E1_bus_dout_29_lut_out = S2_dout_29; E1_bus_dout_29 = DFFEAS(E1_bus_dout_29_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_29 is jtag_master_1_notri:jtag_dut_notri|bus_dout_29 --operation mode is normal D1_bus_dout_29_lut_out = S1_dout_29; D1_bus_dout_29 = DFFEAS(D1_bus_dout_29_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_28 is clkpre_counter:cp|dout_ccnt_28 --operation mode is arithmetic B1_dout_ccnt_28_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx28; B1_dout_ccnt_28_lut_out = B1_dout_ccnt_28 $ (!B1_dout_ccnt_28_carry_eqn); B1_dout_ccnt_28 = DFFEAS(B1_dout_ccnt_28_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx32 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx32 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx32 = CARRY(B1_dout_ccnt_28 & (!B1_ccnt_cnt_3_cnt_i_Q_nx28)); --B1_nx724 is clkpre_counter:cp|nx724 --operation mode is normal B1_nx724 = B1_dout1pcnt_28 & (B1_nx795 # B1_dout3pcnt_28 & B1_nx796) # !B1_dout1pcnt_28 & B1_dout3pcnt_28 & (B1_nx796); --B1_nx808 is clkpre_counter:cp|nx808 --operation mode is normal B1_nx808 = B1_dout0pcnt_28 & (B1_nx798 # B1_dout2pcnt_28 & B1_nx797) # !B1_dout0pcnt_28 & B1_dout2pcnt_28 & B1_nx797; --S3_dout_28 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_28 --operation mode is normal S3_dout_28 = N1_request_46 & (S3_NI_P0_D_2) # !N1_request_46 & !N1_request_47 & (S3_nx240); --S2_dout_28 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_28 --operation mode is normal S2_dout_28 = N1_request_46 & (S2_NI_P0_D_2) # !N1_request_46 & !N1_request_47 & (S2_nx240); --S1_dout_28 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_28 --operation mode is normal S1_dout_28 = N1_request_46 & (S1_NI_P0_D_2) # !N1_request_46 & !N1_request_47 & (S1_nx240); --B1_dout1pcnt_27 is clkpre_counter:cp|dout1pcnt_27 --operation mode is normal B1_dout1pcnt_27_carry_eqn = B1_pcnt1_cnt_6_cnt_i_Q_nx21; B1_dout1pcnt_27_lut_out = B1_dout1pcnt_27 $ (B1_dout1pcnt_27_carry_eqn); B1_dout1pcnt_27 = DFFEAS(B1_dout1pcnt_27_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_27 is clkpre_counter:cp|dout3pcnt_27 --operation mode is normal B1_dout3pcnt_27_carry_eqn = B1_pcnt3_cnt_6_cnt_i_Q_nx21; B1_dout3pcnt_27_lut_out = B1_dout3pcnt_27 $ (B1_dout3pcnt_27_carry_eqn); B1_dout3pcnt_27 = DFFEAS(B1_dout3pcnt_27_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout0pcnt_27 is clkpre_counter:cp|dout0pcnt_27 --operation mode is normal B1_dout0pcnt_27_carry_eqn = B1_pcnt0_cnt_6_cnt_i_Q_nx21; B1_dout0pcnt_27_lut_out = B1_dout0pcnt_27 $ (B1_dout0pcnt_27_carry_eqn); B1_dout0pcnt_27 = DFFEAS(B1_dout0pcnt_27_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_27 is clkpre_counter:cp|dout2pcnt_27 --operation mode is normal B1_dout2pcnt_27_carry_eqn = B1_pcnt2_cnt_6_cnt_i_Q_nx21; B1_dout2pcnt_27_lut_out = B1_dout2pcnt_27 $ (B1_dout2pcnt_27_carry_eqn); B1_dout2pcnt_27 = DFFEAS(B1_dout2pcnt_27_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --D1_jtgsnd_ser_t_2 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_2 --operation mode is normal D1_jtgsnd_ser_t_2_lut_out = D1_jtgsnd_ser_t_1; D1_jtgsnd_ser_t_2 = DFFEAS(D1_jtgsnd_ser_t_2_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, N1_request_14, , , D1_jtgsnd_we_g_2); --E1_jtgsnd_ser_t_2 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_2 --operation mode is normal E1_jtgsnd_ser_t_2_lut_out = E1_jtgsnd_ser_t_1; E1_jtgsnd_ser_t_2 = DFFEAS(E1_jtgsnd_ser_t_2_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, N1_request_14, , , E1_jtgsnd_we_g_2); --E2_jtgsnd_ser_t_2 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_2 --operation mode is normal E2_jtgsnd_ser_t_2_lut_out = E2_jtgsnd_ser_t_1; E2_jtgsnd_ser_t_2 = DFFEAS(E2_jtgsnd_ser_t_2_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, N1_request_14, , , E2_jtgsnd_we_g_2); --C1_nx205 is gio_devices:gio|nx205 --operation mode is normal C1_nx205 = W2_q_b[15] & (C1_sel_5 # G1_bus_dout_31 & C1_ce_gen) # !W2_q_b[15] & G1_bus_dout_31 & (C1_ce_gen); --C1_nx206 is gio_devices:gio|nx206 --operation mode is normal C1_nx206 = B1_bus_dout_31 & (C1_ce_cp # E2_bus_dout_31 & C1_ce_ni_jtg_up) # !B1_bus_dout_31 & E2_bus_dout_31 & (C1_ce_ni_jtg_up); --C1_nx207 is gio_devices:gio|nx207 --operation mode is normal C1_nx207 = E1_bus_dout_31 & (C1_ce_ni_jtg_dn # D1_bus_dout_31 & C1_ce_dut_jtg) # !E1_bus_dout_31 & D1_bus_dout_31 & (C1_ce_dut_jtg); --G1_bus_dout_30 is general_config_notri:nic_notri|bus_dout_30 --operation mode is normal G1_bus_dout_30 = N1_request_44 & N1_request_43 & A1L32 & !G1_ix69_ix38_nx10; --B1_bus_dout_30 is clkpre_counter:cp|bus_dout_30 --operation mode is normal B1_bus_dout_30 = B1_nx722 # B1_nx806 # B1_dout_ccnt_30 & B1_nx794; --E2_bus_dout_30 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_30 --operation mode is normal E2_bus_dout_30_lut_out = S3_dout_30; E2_bus_dout_30 = DFFEAS(E2_bus_dout_30_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_30 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_30 --operation mode is normal E1_bus_dout_30_lut_out = S2_dout_30; E1_bus_dout_30 = DFFEAS(E1_bus_dout_30_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_30 is jtag_master_1_notri:jtag_dut_notri|bus_dout_30 --operation mode is normal D1_bus_dout_30_lut_out = S1_dout_30; D1_bus_dout_30 = DFFEAS(D1_bus_dout_30_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_29 is clkpre_counter:cp|dout_ccnt_29 --operation mode is arithmetic B1_dout_ccnt_29_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx32; B1_dout_ccnt_29_lut_out = B1_dout_ccnt_29 $ (B1_dout_ccnt_29_carry_eqn); B1_dout_ccnt_29 = DFFEAS(B1_dout_ccnt_29_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx36 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx36 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx36 = CARRY(!B1_ccnt_cnt_3_cnt_i_Q_nx32 # !B1_dout_ccnt_29); --B1_nx723 is clkpre_counter:cp|nx723 --operation mode is normal B1_nx723 = B1_dout1pcnt_29 & (B1_nx795 # B1_dout3pcnt_29 & B1_nx796) # !B1_dout1pcnt_29 & B1_dout3pcnt_29 & (B1_nx796); --B1_nx807 is clkpre_counter:cp|nx807 --operation mode is normal B1_nx807 = B1_dout0pcnt_29 & (B1_nx798 # B1_dout2pcnt_29 & B1_nx797) # !B1_dout0pcnt_29 & B1_dout2pcnt_29 & B1_nx797; --S3_dout_29 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_29 --operation mode is normal S3_dout_29 = N1_request_46 & (S3_NI_P2_PREout) # !N1_request_46 & !N1_request_47 & (S3_nx239); --S2_dout_29 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_29 --operation mode is normal S2_dout_29 = N1_request_46 & (S2_NI_P2_PREout) # !N1_request_46 & !N1_request_47 & (S2_nx239); --S1_dout_29 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_29 --operation mode is normal S1_dout_29 = N1_request_46 & (S1_NI_P2_PREout) # !N1_request_46 & !N1_request_47 & (S1_nx239); --B1_dout1pcnt_28 is clkpre_counter:cp|dout1pcnt_28 --operation mode is arithmetic B1_dout1pcnt_28_lut_out = B1_dout1pcnt_28 $ P2_FUNC_3; B1_dout1pcnt_28 = DFFEAS(B1_dout1pcnt_28_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_7_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt1_cnt_7_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt1_cnt_7_cnt_i_Q_nx10 = CARRY(B1_dout1pcnt_28 & P2_FUNC_3); --B1_dout3pcnt_28 is clkpre_counter:cp|dout3pcnt_28 --operation mode is arithmetic B1_dout3pcnt_28_lut_out = B1_dout3pcnt_28 $ P4_FUNC_3; B1_dout3pcnt_28 = DFFEAS(B1_dout3pcnt_28_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_7_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt3_cnt_7_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt3_cnt_7_cnt_i_Q_nx10 = CARRY(B1_dout3pcnt_28 & P4_FUNC_3); --B1_dout0pcnt_28 is clkpre_counter:cp|dout0pcnt_28 --operation mode is arithmetic B1_dout0pcnt_28_lut_out = B1_dout0pcnt_28 $ P1_FUNC_3; B1_dout0pcnt_28 = DFFEAS(B1_dout0pcnt_28_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_7_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt0_cnt_7_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt0_cnt_7_cnt_i_Q_nx10 = CARRY(B1_dout0pcnt_28 & P1_FUNC_3); --B1_dout2pcnt_28 is clkpre_counter:cp|dout2pcnt_28 --operation mode is arithmetic B1_dout2pcnt_28_lut_out = B1_dout2pcnt_28 $ P3_FUNC_3; B1_dout2pcnt_28 = DFFEAS(B1_dout2pcnt_28_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_7_cnt_i_Q_nx10 is clkpre_counter:cp|pcnt2_cnt_7_cnt_i_Q_nx10 --operation mode is arithmetic B1_pcnt2_cnt_7_cnt_i_Q_nx10 = CARRY(B1_dout2pcnt_28 & P3_FUNC_3); --S3_nx240 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx240 --operation mode is normal S3_nx240 = N1_request_48 & (S3_NI_P3_CLKout) # !N1_request_48 & S3_SER0_DOUT; --S2_nx240 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx240 --operation mode is normal S2_nx240 = N1_request_48 & (S2_NI_P3_CLKout) # !N1_request_48 & S2_SER0_DOUT; --S1_nx240 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx240 --operation mode is normal S1_nx240 = N1_request_48 & (S1_NI_P3_CLKout) # !N1_request_48 & S1_SER0_DOUT; --D1_jtgsnd_ser_t_1 is jtag_master_1_notri:jtag_dut_notri|jtgsnd_ser_t_1 --operation mode is normal D1_jtgsnd_ser_t_1_lut_out = N1_request_15 & C1_ce_dut_jtg & D1_nx246 & D1_nx252; D1_jtgsnd_ser_t_1 = DFFEAS(D1_jtgsnd_ser_t_1_lut_out, X1__clk0, VCC, , D1_jtgsnd_nx792, , , , ); --E1_jtgsnd_ser_t_1 is jtag_master_2_notri:jtag_ni_dn_notri|jtgsnd_ser_t_1 --operation mode is normal E1_jtgsnd_ser_t_1_lut_out = N1_request_15 & C1_ce_ni_jtg_dn & E1_nx241 & E1_nx248; E1_jtgsnd_ser_t_1 = DFFEAS(E1_jtgsnd_ser_t_1_lut_out, X1__clk0, VCC, , E1_jtgsnd_nx812, , , , ); --E2_jtgsnd_ser_t_1 is jtag_master_2_notri:jtag_ni_up_notri|jtgsnd_ser_t_1 --operation mode is normal E2_jtgsnd_ser_t_1_lut_out = N1_request_15 & C1_ce_ni_jtg_up & E2_nx241 & E2_nx248; E2_jtgsnd_ser_t_1 = DFFEAS(E2_jtgsnd_ser_t_1_lut_out, X1__clk0, VCC, , E2_jtgsnd_nx812, , , , ); --G1_bus_dout_31 is general_config_notri:nic_notri|bus_dout_31 --operation mode is normal G1_bus_dout_31 = A1L44 & (!G1_ix69_ix38_nx8 & G1_NOT_ix69_ix30_nx10 # !G1_ix69_ix32_nx12) # !A1L44 & (!G1_ix69_ix38_nx8 & G1_NOT_ix69_ix30_nx10); --B1_bus_dout_31 is clkpre_counter:cp|bus_dout_31 --operation mode is normal B1_bus_dout_31 = B1_nx721 # B1_nx805 # B1_dout_ccnt_31 & B1_nx794; --E2_bus_dout_31 is jtag_master_2_notri:jtag_ni_up_notri|bus_dout_31 --operation mode is normal E2_bus_dout_31_lut_out = S3_dout_31; E2_bus_dout_31 = DFFEAS(E2_bus_dout_31_lut_out, X1__clk0, VCC, , , , , E2_nx540, ); --E1_bus_dout_31 is jtag_master_2_notri:jtag_ni_dn_notri|bus_dout_31 --operation mode is normal E1_bus_dout_31_lut_out = S2_dout_31; E1_bus_dout_31 = DFFEAS(E1_bus_dout_31_lut_out, X1__clk0, VCC, , , , , E1_nx540, ); --D1_bus_dout_31 is jtag_master_1_notri:jtag_dut_notri|bus_dout_31 --operation mode is normal D1_bus_dout_31_lut_out = S1_dout_31; D1_bus_dout_31 = DFFEAS(D1_bus_dout_31_lut_out, X1__clk0, VCC, , , , , D1_nx540, ); --B1_dout_ccnt_30 is clkpre_counter:cp|dout_ccnt_30 --operation mode is arithmetic B1_dout_ccnt_30_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx36; B1_dout_ccnt_30_lut_out = B1_dout_ccnt_30 $ (!B1_dout_ccnt_30_carry_eqn); B1_dout_ccnt_30 = DFFEAS(B1_dout_ccnt_30_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_ccnt_cnt_3_cnt_i_Q_nx41 is clkpre_counter:cp|ccnt_cnt_3_cnt_i_Q_nx41 --operation mode is arithmetic B1_ccnt_cnt_3_cnt_i_Q_nx41 = CARRY(B1_dout_ccnt_30 & (!B1_ccnt_cnt_3_cnt_i_Q_nx36)); --B1_nx722 is clkpre_counter:cp|nx722 --operation mode is normal B1_nx722 = B1_dout1pcnt_30 & (B1_nx795 # B1_dout3pcnt_30 & B1_nx796) # !B1_dout1pcnt_30 & B1_dout3pcnt_30 & (B1_nx796); --B1_nx806 is clkpre_counter:cp|nx806 --operation mode is normal B1_nx806 = B1_dout0pcnt_30 & (B1_nx798 # B1_dout2pcnt_30 & B1_nx797) # !B1_dout0pcnt_30 & B1_dout2pcnt_30 & B1_nx797; --S3_dout_30 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_30 --operation mode is normal S3_dout_30 = N1_request_46 & (S3_NI_P0_D_1) # !N1_request_46 & !N1_request_47 & (S3_nx238); --S2_dout_30 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_30 --operation mode is normal S2_dout_30 = N1_request_46 & (S2_NI_P0_D_1) # !N1_request_46 & !N1_request_47 & (S2_nx238); --S1_dout_30 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_30 --operation mode is normal S1_dout_30 = N1_request_46 & (S1_NI_P0_D_1) # !N1_request_46 & !N1_request_47 & (S1_nx238); --B1_dout1pcnt_29 is clkpre_counter:cp|dout1pcnt_29 --operation mode is arithmetic B1_dout1pcnt_29_carry_eqn = B1_pcnt1_cnt_7_cnt_i_Q_nx10; B1_dout1pcnt_29_lut_out = B1_dout1pcnt_29 $ (B1_dout1pcnt_29_carry_eqn); B1_dout1pcnt_29 = DFFEAS(B1_dout1pcnt_29_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_7_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt1_cnt_7_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt1_cnt_7_cnt_i_Q_nx16 = CARRY(!B1_pcnt1_cnt_7_cnt_i_Q_nx10 # !B1_dout1pcnt_29); --B1_dout3pcnt_29 is clkpre_counter:cp|dout3pcnt_29 --operation mode is arithmetic B1_dout3pcnt_29_carry_eqn = B1_pcnt3_cnt_7_cnt_i_Q_nx10; B1_dout3pcnt_29_lut_out = B1_dout3pcnt_29 $ (B1_dout3pcnt_29_carry_eqn); B1_dout3pcnt_29 = DFFEAS(B1_dout3pcnt_29_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_7_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt3_cnt_7_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt3_cnt_7_cnt_i_Q_nx16 = CARRY(!B1_pcnt3_cnt_7_cnt_i_Q_nx10 # !B1_dout3pcnt_29); --B1_dout0pcnt_29 is clkpre_counter:cp|dout0pcnt_29 --operation mode is arithmetic B1_dout0pcnt_29_carry_eqn = B1_pcnt0_cnt_7_cnt_i_Q_nx10; B1_dout0pcnt_29_lut_out = B1_dout0pcnt_29 $ (B1_dout0pcnt_29_carry_eqn); B1_dout0pcnt_29 = DFFEAS(B1_dout0pcnt_29_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_7_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt0_cnt_7_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt0_cnt_7_cnt_i_Q_nx16 = CARRY(!B1_pcnt0_cnt_7_cnt_i_Q_nx10 # !B1_dout0pcnt_29); --B1_dout2pcnt_29 is clkpre_counter:cp|dout2pcnt_29 --operation mode is arithmetic B1_dout2pcnt_29_carry_eqn = B1_pcnt2_cnt_7_cnt_i_Q_nx10; B1_dout2pcnt_29_lut_out = B1_dout2pcnt_29 $ (B1_dout2pcnt_29_carry_eqn); B1_dout2pcnt_29 = DFFEAS(B1_dout2pcnt_29_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_7_cnt_i_Q_nx16 is clkpre_counter:cp|pcnt2_cnt_7_cnt_i_Q_nx16 --operation mode is arithmetic B1_pcnt2_cnt_7_cnt_i_Q_nx16 = CARRY(!B1_pcnt2_cnt_7_cnt_i_Q_nx10 # !B1_dout2pcnt_29); --S3_nx239 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx239 --operation mode is normal S3_nx239 = N1_request_48 & (S3_NI_P3_PREout) # !N1_request_48 & S3_NI_P1_PREout; --S2_nx239 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx239 --operation mode is normal S2_nx239 = N1_request_48 & (S2_NI_P3_PREout) # !N1_request_48 & S2_NI_P1_PREout; --S1_nx239 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx239 --operation mode is normal S1_nx239 = N1_request_48 & (S1_NI_P3_PREout) # !N1_request_48 & S1_NI_P1_PREout; --P2_FUNC_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt1_dec|FUNC_3 --operation mode is normal P2_FUNC_3_lut_out = P2_fc_1 & P2_fc_0 & !P2_ix694_ix7_nx8; P2_FUNC_3 = DFFEAS(P2_FUNC_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P4_FUNC_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt3_dec|FUNC_3 --operation mode is normal P4_FUNC_3_lut_out = P4_fc_1 & P4_fc_0 & !P4_ix694_ix7_nx8; P4_FUNC_3 = DFFEAS(P4_FUNC_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P1_FUNC_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt0_dec|FUNC_3 --operation mode is normal P1_FUNC_3_lut_out = P1_fc_1 & P1_fc_0 & !P1_ix694_ix7_nx8; P1_FUNC_3 = DFFEAS(P1_FUNC_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --P3_FUNC_3 is clkpre_counter:cp|pre_dec_unfolded0:pcnt2_dec|FUNC_3 --operation mode is normal P3_FUNC_3_lut_out = P3_fc_1 & P3_fc_0 & !P3_ix694_ix7_nx8; P3_FUNC_3 = DFFEAS(P3_FUNC_3_lut_out, X1__clk0, J1_chipRST_n, , , , , , ); --D1_nx246 is jtag_master_1_notri:jtag_dut_notri|nx246 --operation mode is normal D1_nx246 = !J1_rd_wr_oase & (!N1_request_43 & !N1_request_42 # !N1_request_41); --E1_nx241 is jtag_master_2_notri:jtag_ni_dn_notri|nx241 --operation mode is normal E1_nx241 = !J1_rd_wr_oase & (!N1_request_43 & !N1_request_42 # !N1_request_41); --E2_nx241 is jtag_master_2_notri:jtag_ni_up_notri|nx241 --operation mode is normal E2_nx241 = !J1_rd_wr_oase & (!N1_request_43 & !N1_request_42 # !N1_request_41); --B1_dout_ccnt_31 is clkpre_counter:cp|dout_ccnt_31 --operation mode is normal B1_dout_ccnt_31_carry_eqn = B1_ccnt_cnt_3_cnt_i_Q_nx41; B1_dout_ccnt_31_lut_out = B1_dout_ccnt_31 $ (B1_dout_ccnt_31_carry_eqn); B1_dout_ccnt_31 = DFFEAS(B1_dout_ccnt_31_lut_out, GLOBAL(DUT_CLK[3]), B1_NOT_ccnt_reset_cnt, , , , , , ); --B1_nx721 is clkpre_counter:cp|nx721 --operation mode is normal B1_nx721 = B1_dout1pcnt_31 & (B1_nx795 # B1_dout3pcnt_31 & B1_nx796) # !B1_dout1pcnt_31 & B1_dout3pcnt_31 & (B1_nx796); --B1_nx805 is clkpre_counter:cp|nx805 --operation mode is normal B1_nx805 = B1_dout0pcnt_31 & (B1_nx798 # B1_dout2pcnt_31 & B1_nx797) # !B1_dout0pcnt_31 & B1_dout2pcnt_31 & B1_nx797; --S3_dout_31 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|dout_31 --operation mode is normal S3_dout_31 = N1_request_46 & S3_NI_P2_STRB; --S2_dout_31 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|dout_31 --operation mode is normal S2_dout_31 = N1_request_46 & S2_NI_P2_STRB; --S1_dout_31 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|dout_31 --operation mode is normal S1_dout_31 = N1_request_46 & S1_NI_P2_STRB; --B1_dout1pcnt_30 is clkpre_counter:cp|dout1pcnt_30 --operation mode is arithmetic B1_dout1pcnt_30_carry_eqn = B1_pcnt1_cnt_7_cnt_i_Q_nx16; B1_dout1pcnt_30_lut_out = B1_dout1pcnt_30 $ (!B1_dout1pcnt_30_carry_eqn); B1_dout1pcnt_30 = DFFEAS(B1_dout1pcnt_30_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt1_cnt_7_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt1_cnt_7_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt1_cnt_7_cnt_i_Q_nx21 = CARRY(B1_dout1pcnt_30 & (!B1_pcnt1_cnt_7_cnt_i_Q_nx16)); --B1_dout3pcnt_30 is clkpre_counter:cp|dout3pcnt_30 --operation mode is arithmetic B1_dout3pcnt_30_carry_eqn = B1_pcnt3_cnt_7_cnt_i_Q_nx16; B1_dout3pcnt_30_lut_out = B1_dout3pcnt_30 $ (!B1_dout3pcnt_30_carry_eqn); B1_dout3pcnt_30 = DFFEAS(B1_dout3pcnt_30_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt3_cnt_7_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt3_cnt_7_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt3_cnt_7_cnt_i_Q_nx21 = CARRY(B1_dout3pcnt_30 & (!B1_pcnt3_cnt_7_cnt_i_Q_nx16)); --B1_dout0pcnt_30 is clkpre_counter:cp|dout0pcnt_30 --operation mode is arithmetic B1_dout0pcnt_30_carry_eqn = B1_pcnt0_cnt_7_cnt_i_Q_nx16; B1_dout0pcnt_30_lut_out = B1_dout0pcnt_30 $ (!B1_dout0pcnt_30_carry_eqn); B1_dout0pcnt_30 = DFFEAS(B1_dout0pcnt_30_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt0_cnt_7_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt0_cnt_7_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt0_cnt_7_cnt_i_Q_nx21 = CARRY(B1_dout0pcnt_30 & (!B1_pcnt0_cnt_7_cnt_i_Q_nx16)); --B1_dout2pcnt_30 is clkpre_counter:cp|dout2pcnt_30 --operation mode is arithmetic B1_dout2pcnt_30_carry_eqn = B1_pcnt2_cnt_7_cnt_i_Q_nx16; B1_dout2pcnt_30_lut_out = B1_dout2pcnt_30 $ (!B1_dout2pcnt_30_carry_eqn); B1_dout2pcnt_30 = DFFEAS(B1_dout2pcnt_30_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_pcnt2_cnt_7_cnt_i_Q_nx21 is clkpre_counter:cp|pcnt2_cnt_7_cnt_i_Q_nx21 --operation mode is arithmetic B1_pcnt2_cnt_7_cnt_i_Q_nx21 = CARRY(B1_dout2pcnt_30 & (!B1_pcnt2_cnt_7_cnt_i_Q_nx16)); --S3_nx238 is jtag_master_2_notri:jtag_ni_up_notri|jtag_recv_2:jtgrcv|nx238 --operation mode is normal S3_nx238 = N1_request_48 & (S3_NI_P3_CTRL) # !N1_request_48 & S3_NI_P1_CTRL; --S2_nx238 is jtag_master_2_notri:jtag_ni_dn_notri|jtag_recv_2:jtgrcv|nx238 --operation mode is normal S2_nx238 = N1_request_48 & (S2_NI_P3_CTRL) # !N1_request_48 & S2_NI_P1_CTRL; --S1_nx238 is jtag_master_1_notri:jtag_dut_notri|jtag_recv_2:jtgrcv|nx238 --operation mode is normal S1_nx238 = N1_request_48 & (S1_NI_P3_CTRL) # !N1_request_48 & S1_NI_P1_CTRL; --B1_dout1pcnt_31 is clkpre_counter:cp|dout1pcnt_31 --operation mode is normal B1_dout1pcnt_31_carry_eqn = B1_pcnt1_cnt_7_cnt_i_Q_nx21; B1_dout1pcnt_31_lut_out = B1_dout1pcnt_31 $ (B1_dout1pcnt_31_carry_eqn); B1_dout1pcnt_31 = DFFEAS(B1_dout1pcnt_31_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout3pcnt_31 is clkpre_counter:cp|dout3pcnt_31 --operation mode is normal B1_dout3pcnt_31_carry_eqn = B1_pcnt3_cnt_7_cnt_i_Q_nx21; B1_dout3pcnt_31_lut_out = B1_dout3pcnt_31 $ (B1_dout3pcnt_31_carry_eqn); B1_dout3pcnt_31 = DFFEAS(B1_dout3pcnt_31_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout0pcnt_31 is clkpre_counter:cp|dout0pcnt_31 --operation mode is normal B1_dout0pcnt_31_carry_eqn = B1_pcnt0_cnt_7_cnt_i_Q_nx21; B1_dout0pcnt_31_lut_out = B1_dout0pcnt_31 $ (B1_dout0pcnt_31_carry_eqn); B1_dout0pcnt_31 = DFFEAS(B1_dout0pcnt_31_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --B1_dout2pcnt_31 is clkpre_counter:cp|dout2pcnt_31 --operation mode is normal B1_dout2pcnt_31_carry_eqn = B1_pcnt2_cnt_7_cnt_i_Q_nx21; B1_dout2pcnt_31_lut_out = B1_dout2pcnt_31 $ (B1_dout2pcnt_31_carry_eqn); B1_dout2pcnt_31 = DFFEAS(B1_dout2pcnt_31_lut_out, X1__clk0, J1_chipRST_n, , , , , B1_sreset_pcnt, ); --~GND is ~GND --operation mode is normal ~GND = GND; --AD_SYNC_IN[0] is AD_SYNC_IN[0] --operation mode is input AD_SYNC_IN[0] = INPUT(); --PC_0_IN is PC_0_IN --operation mode is input PC_0_IN = INPUT(); --clk_osc_in is clk_osc_in --operation mode is input clk_osc_in = INPUT(); --AD_SYNC_IN[1] is AD_SYNC_IN[1] --operation mode is input AD_SYNC_IN[1] = INPUT(); --PC_1_IN is PC_1_IN --operation mode is input PC_1_IN = INPUT(); --NI_SER1_IN is NI_SER1_IN --operation mode is input NI_SER1_IN = INPUT(); --PC_SER1_IN is PC_SER1_IN --operation mode is input PC_SER1_IN = INPUT(); --CLK_gen is CLK_gen --operation mode is input CLK_gen = INPUT(); --WT_SER1_IN is WT_SER1_IN --operation mode is input WT_SER1_IN = INPUT(); --AD_SER0_IN is AD_SER0_IN --operation mode is input AD_SER0_IN = INPUT(); --DUT_SER0_IN is DUT_SER0_IN --operation mode is input DUT_SER0_IN = INPUT(); --NI_SER0_IN is NI_SER0_IN --operation mode is input NI_SER0_IN = INPUT(); --WT_SER0_IN is WT_SER0_IN --operation mode is input WT_SER0_IN = INPUT(); --PC_SER0_IN is PC_SER0_IN --operation mode is input PC_SER0_IN = INPUT(); --DUT_P4_STR is DUT_P4_STR --operation mode is input DUT_P4_STR = INPUT(); --DUT_P4_D[0] is DUT_P4_D[0] --operation mode is input DUT_P4_D[0] = INPUT(); --AD_SER1_IN is AD_SER1_IN --operation mode is input AD_SER1_IN = INPUT(); --DUT_OA_CTR is DUT_OA_CTR --operation mode is input DUT_OA_CTR = INPUT(); --DUT_CLK[0] is DUT_CLK[0] --operation mode is input DUT_CLK[0] = INPUT(); --DUT_SER1_IN is DUT_SER1_IN --operation mode is input DUT_SER1_IN = INPUT(); --NI_TDO_up is NI_TDO_up --operation mode is input NI_TDO_up = INPUT(); --NI_TDO_dn is NI_TDO_dn --operation mode is input NI_TDO_dn = INPUT(); --DUT_TDO is DUT_TDO --operation mode is input DUT_TDO = INPUT(); --DUT_P4_D[2] is DUT_P4_D[2] --operation mode is input DUT_P4_D[2] = INPUT(); --DUT_P4_D[1] is DUT_P4_D[1] --operation mode is input DUT_P4_D[1] = INPUT(); --DUT_PRE[1] is DUT_PRE[1] --operation mode is input DUT_PRE[1] = INPUT(); --DUT_PRE[3] is DUT_PRE[3] --operation mode is input DUT_PRE[3] = INPUT(); --DUT_PRE[0] is DUT_PRE[0] --operation mode is input DUT_PRE[0] = INPUT(); --DUT_PRE[2] is DUT_PRE[2] --operation mode is input DUT_PRE[2] = INPUT(); --DUT_P4_D[8] is DUT_P4_D[8] --operation mode is input DUT_P4_D[8] = INPUT(); --DUT_P4_D[9] is DUT_P4_D[9] --operation mode is input DUT_P4_D[9] = INPUT(); --DUT_P4_D[7] is DUT_P4_D[7] --operation mode is input DUT_P4_D[7] = INPUT(); --DUT_P4_D[3] is DUT_P4_D[3] --operation mode is input DUT_P4_D[3] = INPUT(); --DUT_P4_D[4] is DUT_P4_D[4] --operation mode is input DUT_P4_D[4] = INPUT(); --DUT_P4_D[5] is DUT_P4_D[5] --operation mode is input DUT_P4_D[5] = INPUT(); --DUT_P4_D[6] is DUT_P4_D[6] --operation mode is input DUT_P4_D[6] = INPUT(); --DUT_CLK[1] is DUT_CLK[1] --operation mode is input DUT_CLK[1] = INPUT(); --DUT_CLK[2] is DUT_CLK[2] --operation mode is input DUT_CLK[2] = INPUT(); --DUT_CLK[3] is DUT_CLK[3] --operation mode is input DUT_CLK[3] = INPUT(); --AD_SER0_OUT is AD_SER0_OUT --operation mode is output AD_SER0_OUT = OUTPUT(ix1486); --AD_SER1_OUT is AD_SER1_OUT --operation mode is output AD_SER1_OUT = OUTPUT(ix1487); --AD_SYNC_OUT[0] is AD_SYNC_OUT[0] --operation mode is output AD_SYNC_OUT[0] = OUTPUT(!B1_NOT_ctrl_ni); --AD_SYNC_OUT[1] is AD_SYNC_OUT[1] --operation mode is output AD_SYNC_OUT[1] = OUTPUT(B1_AD_SYNC_OUT); --clk_osc_out is clk_osc_out --operation mode is output clk_osc_out = OUTPUT(clk_osc_in); --DUT_EN_JTAG is DUT_EN_JTAG --operation mode is output DUT_EN_JTAG = OUTPUT(D1_EN1); --DUT_P4_CTR is DUT_P4_CTR --operation mode is output DUT_P4_CTR = OUTPUT(ix1477); --DUT_SER0_OUT is DUT_SER0_OUT --operation mode is output DUT_SER0_OUT = OUTPUT(ix1478); --DUT_SER1_OUT is DUT_SER1_OUT --operation mode is output DUT_SER1_OUT = OUTPUT(ix1479); --NI_CLK_dn is NI_CLK_dn --operation mode is output NI_CLK_dn = OUTPUT(X1__extclk0); --NI_CLK_up is NI_CLK_up --operation mode is output NI_CLK_up = OUTPUT(X1__clk0); --NI_EN_JTAG[0] is NI_EN_JTAG[0] --operation mode is output NI_EN_JTAG[0] = OUTPUT(E2_EN1); --NI_EN_JTAG[1] is NI_EN_JTAG[1] --operation mode is output NI_EN_JTAG[1] = OUTPUT(E2_EN2); --NI_EN_JTAG[2] is NI_EN_JTAG[2] --operation mode is output NI_EN_JTAG[2] = OUTPUT(E1_EN1); --NI_EN_JTAG[3] is NI_EN_JTAG[3] --operation mode is output NI_EN_JTAG[3] = OUTPUT(E1_EN2); --NI_IRQ_n is NI_IRQ_n --operation mode is output NI_IRQ_n = OUTPUT(!G1_NOT_ni_irq_n); --NI_PRE_dn is NI_PRE_dn --operation mode is output NI_PRE_dn = OUTPUT(B1_NI_PRE); --NI_PRE_up is NI_PRE_up --operation mode is output NI_PRE_up = OUTPUT(B1_NI_PRE); --NI_RST_n is NI_RST_n --operation mode is output NI_RST_n = OUTPUT(G1_ni_rst_n); --NI_SER0_OUT is NI_SER0_OUT --operation mode is output NI_SER0_OUT = OUTPUT(ix1484); --NI_SER1_OUT is NI_SER1_OUT --operation mode is output NI_SER1_OUT = OUTPUT(ix1485); --PC_0_OUT is PC_0_OUT --operation mode is output PC_0_OUT = OUTPUT(GND); --PC_1_OUT is PC_1_OUT --operation mode is output PC_1_OUT = OUTPUT(AD_SYNC_IN[1]); --PC_SER0_OUT is PC_SER0_OUT --operation mode is output PC_SER0_OUT = OUTPUT(ix1488); --PC_SER1_OUT is PC_SER1_OUT --operation mode is output PC_SER1_OUT = OUTPUT(ix1489); --WT_CLK is WT_CLK --operation mode is output WT_CLK = OUTPUT(ix1482); --WT_PRE is WT_PRE --operation mode is output WT_PRE = OUTPUT(ix1483); --WT_SER0_OUT is WT_SER0_OUT --operation mode is output WT_SER0_OUT = OUTPUT(ix1480); --WT_SER1_OUT is WT_SER1_OUT --operation mode is output WT_SER1_OUT = OUTPUT(ix1481); --A1L32 is DUT_IRQ_n~0 --operation mode is bidir A1L32 = DUT_IRQ_n; --DUT_IRQ_n is DUT_IRQ_n --operation mode is bidir DUT_IRQ_n_tri_out = TRI(!G1_nx229, G1_nx1566); DUT_IRQ_n = BIDIR(DUT_IRQ_n_tri_out); --A1L44 is DUT_RST_n~0 --operation mode is bidir A1L44 = DUT_RST_n; --DUT_RST_n is DUT_RST_n --operation mode is bidir DUT_RST_n_tri_out = TRI(G1_dut_rst_n_i, G1_nx1572); DUT_RST_n = BIDIR(DUT_RST_n_tri_out); --DUT_SEBD_0 is DUT_SEBD_0 --operation mode is bidir DUT_SEBD_0 = DUT_SEBD[0]; --DUT_SEBD[0] is DUT_SEBD[0] --operation mode is bidir DUT_SEBD[0]_tri_out = TRI(G1_sebd_out_0, G1_sebd_oe_0); DUT_SEBD[0] = BIDIR(DUT_SEBD[0]_tri_out); --DUT_SEBD_1 is DUT_SEBD_1 --operation mode is bidir DUT_SEBD_1 = DUT_SEBD[1]; --DUT_SEBD[1] is DUT_SEBD[1] --operation mode is bidir DUT_SEBD[1]_tri_out = TRI(G1_sebd_out_1, G1_sebd_oe_1); DUT_SEBD[1] = BIDIR(DUT_SEBD[1]_tri_out); --DUT_SEBD_2 is DUT_SEBD_2 --operation mode is bidir DUT_SEBD_2 = DUT_SEBD[2]; --DUT_SEBD[2] is DUT_SEBD[2] --operation mode is bidir DUT_SEBD[2]_tri_out = TRI(G1_sebd_out_2, G1_sebd_oe_2); DUT_SEBD[2] = BIDIR(DUT_SEBD[2]_tri_out); --A1L75 is DUT_TCK~0 --operation mode is bidir A1L75 = DUT_TCK; --DUT_TCK is DUT_TCK --operation mode is bidir DUT_TCK_tri_out = TRI(D1_nx179, D1_EN1); DUT_TCK = BIDIR(DUT_TCK_tri_out); --A1L95 is DUT_TDI~0 --operation mode is bidir A1L95 = DUT_TDI; --DUT_TDI is DUT_TDI --operation mode is bidir DUT_TDI_tri_out = TRI(D1_nx189, D1_EN1); DUT_TDI = BIDIR(DUT_TDI_tri_out); --A1L26 is DUT_TMS~0 --operation mode is bidir A1L26 = DUT_TMS; --DUT_TMS is DUT_TMS --operation mode is bidir DUT_TMS_tri_out = TRI(D1_nx185, D1_EN1); DUT_TMS = BIDIR(DUT_TMS_tri_out); --A1L241 is NI_TCK_dn~0 --operation mode is bidir A1L241 = NI_TCK_dn; --NI_TCK_dn is NI_TCK_dn --operation mode is bidir NI_TCK_dn_tri_out = TRI(E1_nx179, E1_EN1); NI_TCK_dn = BIDIR(NI_TCK_dn_tri_out); --A1L441 is NI_TCK_up~0 --operation mode is bidir A1L441 = NI_TCK_up; --NI_TCK_up is NI_TCK_up --operation mode is bidir NI_TCK_up_tri_out = TRI(E2_nx179, E2_EN1); NI_TCK_up = BIDIR(NI_TCK_up_tri_out); --A1L641 is NI_TDI_dn~0 --operation mode is bidir A1L641 = NI_TDI_dn; --NI_TDI_dn is NI_TDI_dn --operation mode is bidir NI_TDI_dn_tri_out = TRI(E1_nx189, E1_EN1); NI_TDI_dn = BIDIR(NI_TDI_dn_tri_out); --A1L841 is NI_TDI_up~0 --operation mode is bidir A1L841 = NI_TDI_up; --NI_TDI_up is NI_TDI_up --operation mode is bidir NI_TDI_up_tri_out = TRI(E2_nx189, E2_EN1); NI_TDI_up = BIDIR(NI_TDI_up_tri_out); --A1L251 is NI_TMS_dn~0 --operation mode is bidir A1L251 = NI_TMS_dn; --NI_TMS_dn is NI_TMS_dn --operation mode is bidir NI_TMS_dn_tri_out = TRI(E1_nx185, E1_EN1); NI_TMS_dn = BIDIR(NI_TMS_dn_tri_out); --A1L451 is NI_TMS_up~0 --operation mode is bidir A1L451 = NI_TMS_up; --NI_TMS_up is NI_TMS_up --operation mode is bidir NI_TMS_up_tri_out = TRI(E2_nx185, E2_EN1); NI_TMS_up = BIDIR(NI_TMS_up_tri_out); --G1L043 is general_config_notri:nic_notri|nx428~0 --operation mode is normal G1L043 = !G1_nx428; --N1L321 is mcm_nw_nwl:scsn_slave_nw_nwl|request_12~0 --operation mode is normal N1L321 = !N1_request_12; --N1L521 is mcm_nw_nwl:scsn_slave_nw_nwl|request_13~0 --operation mode is normal N1L521 = !N1_request_13; --N1L721 is mcm_nw_nwl:scsn_slave_nw_nwl|request_14~0 --operation mode is normal N1L721 = !N1_request_14; --N1L921 is mcm_nw_nwl:scsn_slave_nw_nwl|request_15~0 --operation mode is normal N1L921 = !N1_request_15; --N1L131 is mcm_nw_nwl:scsn_slave_nw_nwl|request_16~0 --operation mode is normal N1L131 = !N1_request_16; --N1L331 is mcm_nw_nwl:scsn_slave_nw_nwl|request_17~0 --operation mode is normal N1L331 = !N1_request_17; --N1L531 is mcm_nw_nwl:scsn_slave_nw_nwl|request_18~0 --operation mode is normal N1L531 = !N1_request_18; --N1L731 is mcm_nw_nwl:scsn_slave_nw_nwl|request_19~0 --operation mode is normal N1L731 = !N1_request_19; --N1L931 is mcm_nw_nwl:scsn_slave_nw_nwl|request_20~0 --operation mode is normal N1L931 = !N1_request_20; --N1L141 is mcm_nw_nwl:scsn_slave_nw_nwl|request_21~0 --operation mode is normal N1L141 = !N1_request_21;