# Copyright (C) 1991-2005 Altera Corporation # Any megafunction design, and related netlist (encrypted or decrypted), # support information, device programming or simulation file, and any other # associated documentation or information provided by Altera or a partner # under Altera's Megafunction Partnership Program may be used only # to program PLD devices (but not masked PLD devices) from Altera. Any # other use of such megafunction design, netlist, support information, # device programming or simulation file, or any other related documentation # or information is prohibited for any other purpose, including, but not # limited to modification, reverse engineering, de-compiling, or use with # any other silicon devices, unless such use is explicitly licensed under # a separate agreement with Altera or a megafunction partner. Title to the # intellectual property, including patents, copyrights, trademarks, trade # secrets, or maskworks, embodied in any such megafunction design, netlist, # support information, device programming or simulation file, or any other # related documentation or information provided by Altera or a megafunction # partner, remains with Altera, the megafunction partner, or their respective # licensors. No other licenses, including any licenses needed under any third # party's intellectual property, are provided herein. # The default values for assignments are stored in the file # top_assignment_defaults.qdf # If this file doesn't exist, and for assignments not listed, see file # assignment_defaults.qdf # Altera recommends that you do not modify this file. This # file is updated automatically by the Quartus II software # and any changes you make may be lost or overwritten. # Project-Wide Assignments # ======================== set_global_assignment -name SMART_RECOMPILE ON set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.0 SP1" set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:05:36 APRIL 15, 2004" set_global_assignment -name LAST_QUARTUS_VERSION 9.1 set_global_assignment -name VHDL_FILE ni_dpram.vhd set_global_assignment -name VHDL_FILE pll120.vhd set_global_assignment -name EDIF_FILE top.edf # Pin & Location Assignments # ========================== set_location_assignment PIN_1 -to pinrst_n set_location_assignment PIN_15 -to AD_SER0_IN set_location_assignment PIN_16 -to AD_SER0_OUT set_location_assignment PIN_17 -to AD_SER1_IN set_location_assignment PIN_18 -to AD_SER1_OUT set_location_assignment PIN_11 -to AD_SYNC_IN[0] set_location_assignment PIN_12 -to AD_SYNC_IN[1] set_location_assignment PIN_13 -to AD_SYNC_OUT[0] set_location_assignment PIN_14 -to AD_SYNC_OUT[1] set_location_assignment PIN_152 -to CLK_gen set_location_assignment PIN_156 -to clk_osc_out set_location_assignment PIN_23 -to clk_osc_in set_location_assignment PIN_5 -to NI_EN_JTAG[0] set_location_assignment PIN_4 -to NI_EN_JTAG[1] set_location_assignment PIN_3 -to NI_EN_JTAG[2] set_location_assignment PIN_2 -to NI_EN_JTAG[3] set_location_assignment PIN_50 -to DUT_EN_JTAG set_location_assignment PIN_94 -to DUT_CLK[0] set_location_assignment PIN_86 -to DUT_CLK[1] set_location_assignment PIN_113 -to DUT_CLK[2] set_location_assignment PIN_169 -to DUT_CLK[3] set_location_assignment PIN_58 -to DUT_IRQ_n set_location_assignment PIN_104 -to DUT_OA_CTR set_location_assignment PIN_163 -to DUT_P4_CTR set_location_assignment PIN_117 -to DUT_P4_D[0] set_location_assignment PIN_119 -to DUT_P4_D[1] set_location_assignment PIN_122 -to DUT_P4_D[2] set_location_assignment PIN_124 -to DUT_P4_D[3] set_location_assignment PIN_126 -to DUT_P4_D[4] set_location_assignment PIN_133 -to DUT_P4_D[5] set_location_assignment PIN_135 -to DUT_P4_D[6] set_location_assignment PIN_137 -to DUT_P4_D[7] set_location_assignment PIN_139 -to DUT_P4_D[8] set_location_assignment PIN_141 -to DUT_P4_D[9] set_location_assignment PIN_165 -to DUT_P4_STR set_location_assignment PIN_100 -to DUT_PRE[0] set_location_assignment PIN_98 -to DUT_PRE[1] set_location_assignment PIN_115 -to DUT_PRE[2] set_location_assignment PIN_167 -to DUT_PRE[3] set_location_assignment PIN_55 -to DUT_RST_n set_location_assignment PIN_54 -to DUT_SEBD[0] set_location_assignment PIN_53 -to DUT_SEBD[1] set_location_assignment PIN_59 -to DUT_SEBD[2] set_location_assignment PIN_84 -to DUT_SER0_IN set_location_assignment PIN_82 -to DUT_SER0_OUT set_location_assignment PIN_77 -to DUT_SER1_IN set_location_assignment PIN_75 -to DUT_SER1_OUT set_location_assignment PIN_57 -to DUT_TCK set_location_assignment PIN_60 -to DUT_TDI set_location_assignment PIN_56 -to DUT_TDO set_location_assignment PIN_49 -to DUT_TMS set_location_assignment PIN_61 -to NI_CLK_up set_location_assignment PIN_144 -to NI_CLK_dn set_location_assignment PIN_47 -to NI_IRQ_n set_location_assignment PIN_63 -to NI_PRE_up set_location_assignment PIN_174 -to NI_PRE_dn set_location_assignment PIN_46 -to NI_RST_n set_location_assignment PIN_178 -to NI_SER0_IN set_location_assignment PIN_65 -to NI_SER0_OUT set_location_assignment PIN_67 -to NI_SER1_IN set_location_assignment PIN_180 -to NI_SER1_OUT set_location_assignment PIN_45 -to NI_TCK_up set_location_assignment PIN_43 -to NI_TDI_up set_location_assignment PIN_42 -to NI_TDO_up set_location_assignment PIN_44 -to NI_TMS_up set_location_assignment PIN_8 -to NI_TCK_dn set_location_assignment PIN_6 -to NI_TDI_dn set_location_assignment PIN_153 -to NI_TDO_dn set_location_assignment PIN_7 -to NI_TMS_dn set_location_assignment PIN_188 -to PC_0_IN set_location_assignment PIN_207 -to PC_0_OUT set_location_assignment PIN_186 -to PC_1_IN set_location_assignment PIN_203 -to PC_1_OUT set_location_assignment PIN_184 -to PC_SER0_IN set_location_assignment PIN_201 -to PC_SER0_OUT set_location_assignment PIN_182 -to PC_SER1_IN set_location_assignment PIN_197 -to PC_SER1_OUT set_location_assignment PIN_235 -to TST_PAD[0] set_location_assignment PIN_236 -to TST_PAD[1] set_location_assignment PIN_238 -to TST_PAD[2] set_location_assignment PIN_237 -to TST_PAD[3] set_location_assignment PIN_226 -to WT_CLK set_location_assignment PIN_224 -to WT_PRE set_location_assignment PIN_217 -to WT_SER0_OUT set_location_assignment PIN_215 -to WT_SER1_OUT set_location_assignment PIN_234 -to WT_SER0_IN set_location_assignment PIN_240 -to WT_SER1_IN # Timing Assignments # ================== set_global_assignment -name INCLUDE_EXTERNAL_PIN_DELAYS_IN_FMAX_CALCULATIONS OFF # Analysis & Synthesis Assignments # ================================ set_global_assignment -name TOP_LEVEL_ENTITY top set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240 set_global_assignment -name EDA_DESIGN_ENTRY_SYNTHESIS_TOOL LeonardoSpectrum set_global_assignment -name FAMILY Cyclone # Fitter Assignments # ================== set_global_assignment -name DEVICE EP1C6Q240C6 set_global_assignment -name CYCLONE_CONFIGURATION_SCHEME "ACTIVE SERIAL" set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED" set_global_assignment -name OPTIMIZE_TIMING "NORMAL COMPILATION" set_global_assignment -name ROUTER_REGISTER_DUPLICATION ON set_global_assignment -name FITTER_EARLY_TIMING_ESTIMATE_MODE PESSIMISTIC set_global_assignment -name STRATIX_DEVICE_IO_STANDARD LVTTL set_instance_assignment -name IO_STANDARD LVCMOS -to CLK_gen set_instance_assignment -name IO_STANDARD LVCMOS -to clk_osc_in set_instance_assignment -name IO_STANDARD "2.5 V" -to clk_osc_out set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_RST_n set_instance_assignment -name IO_STANDARD "2.5 V" -to TST_PAD[0] set_instance_assignment -name IO_STANDARD "2.5 V" -to TST_PAD[1] set_instance_assignment -name IO_STANDARD "2.5 V" -to TST_PAD[2] set_instance_assignment -name IO_STANDARD "2.5 V" -to TST_PAD[3] set_instance_assignment -name IO_STANDARD LVCMOS -to NI_EN_JTAG[0] set_instance_assignment -name IO_STANDARD LVCMOS -to NI_EN_JTAG[1] set_instance_assignment -name IO_STANDARD LVCMOS -to NI_EN_JTAG[2] set_instance_assignment -name IO_STANDARD LVCMOS -to NI_EN_JTAG[3] set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_EN_JTAG set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_IRQ_n set_instance_assignment -name IO_STANDARD LVCMOS -to NI_RST_n set_instance_assignment -name IO_STANDARD LVCMOS -to NI_IRQ_n set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_TCK set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_TMS set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_TDI set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_TDO set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TCK_up set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TMS_up set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TDI_up set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TDO_up set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TCK_dn set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TMS_dn set_instance_assignment -name IO_STANDARD LVCMOS -to NI_TDI_dn set_instance_assignment -name IO_STANDARD "2.5 V" -to NI_TDO_dn set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_SEBD[0] set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_SEBD[1] set_instance_assignment -name IO_STANDARD LVCMOS -to DUT_SEBD[2] set_instance_assignment -name IO_STANDARD LVDS -to DUT_CLK[0] set_instance_assignment -name IO_STANDARD LVDS -to DUT_CLK[1] set_instance_assignment -name IO_STANDARD LVDS -to DUT_CLK[2] set_instance_assignment -name IO_STANDARD LVDS -to DUT_CLK[3] set_instance_assignment -name IO_STANDARD LVDS -to DUT_PRE[0] set_instance_assignment -name IO_STANDARD LVDS -to DUT_PRE[1] set_instance_assignment -name IO_STANDARD LVDS -to DUT_PRE[2] set_instance_assignment -name IO_STANDARD LVDS -to DUT_PRE[3] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[0] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[1] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[2] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[3] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[4] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[5] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[6] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[7] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[8] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_D[9] set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_STR set_instance_assignment -name IO_STANDARD LVDS -to DUT_OA_CTR set_instance_assignment -name IO_STANDARD LVDS -to DUT_P4_CTR set_instance_assignment -name IO_STANDARD LVDS -to DUT_SER0_IN set_instance_assignment -name IO_STANDARD LVDS -to DUT_SER0_OUT set_instance_assignment -name IO_STANDARD LVDS -to DUT_SER1_IN set_instance_assignment -name IO_STANDARD LVDS -to DUT_SER1_OUT set_instance_assignment -name IO_STANDARD LVDS -to NI_CLK_up set_instance_assignment -name IO_STANDARD LVDS -to NI_CLK_dn set_instance_assignment -name IO_STANDARD LVDS -to NI_PRE_up set_instance_assignment -name IO_STANDARD LVDS -to NI_PRE_dn set_instance_assignment -name IO_STANDARD LVDS -to NI_SER0_IN set_instance_assignment -name IO_STANDARD LVDS -to NI_SER0_OUT set_instance_assignment -name IO_STANDARD LVDS -to NI_SER1_IN set_instance_assignment -name IO_STANDARD LVDS -to NI_SER1_OUT set_instance_assignment -name IO_STANDARD LVDS -to PC_SER0_IN set_instance_assignment -name IO_STANDARD LVDS -to PC_SER0_OUT set_instance_assignment -name IO_STANDARD LVDS -to PC_SER1_IN set_instance_assignment -name IO_STANDARD LVDS -to PC_SER1_OUT set_instance_assignment -name IO_STANDARD LVDS -to PC_0_IN set_instance_assignment -name IO_STANDARD LVDS -to PC_0_OUT set_instance_assignment -name IO_STANDARD LVDS -to PC_1_IN set_instance_assignment -name IO_STANDARD LVDS -to PC_1_OUT set_instance_assignment -name IO_STANDARD LVDS -to WT_CLK set_instance_assignment -name IO_STANDARD LVDS -to WT_PRE set_instance_assignment -name IO_STANDARD LVDS -to WT_SER0_OUT set_instance_assignment -name IO_STANDARD LVDS -to WT_SER1_OUT set_instance_assignment -name IO_STANDARD LVDS -to WT_SER0_IN set_instance_assignment -name IO_STANDARD LVDS -to WT_SER1_IN set_global_assignment -name DEVICE_MIGRATION_LIST "EP1C6Q240C7,EP1C12Q240C7" # Assembler Assignments # ===================== set_global_assignment -name CYCLONE_CONFIGURATION_DEVICE EPCS4 # Simulator Assignments # ===================== # LogicLock Region Assignments # ============================ set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF # -------------------- # start CLOCK(dut_clk) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id dut_clk set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id dut_clk set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk set_global_assignment -name FMAX_REQUIREMENT "125 MHz" -section_id dut_clk # end CLOCK(dut_clk) # ------------------ # --------------------- # start CLOCK(dut_clk1) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id dut_clk1 set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id dut_clk1 set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk1 set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk1 set_global_assignment -name FMAX_REQUIREMENT "125 MHz" -section_id dut_clk1 # end CLOCK(dut_clk1) # ------------------- # --------------------- # start CLOCK(dut_clk2) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id dut_clk2 set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id dut_clk2 set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk2 set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk2 set_global_assignment -name FMAX_REQUIREMENT "125 MHz" -section_id dut_clk2 # end CLOCK(dut_clk2) # ------------------- # --------------------- # start CLOCK(dut_clk3) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id dut_clk3 set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id dut_clk3 set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk3 set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id dut_clk3 set_global_assignment -name FMAX_REQUIREMENT "125 MHz" -section_id dut_clk3 # end CLOCK(dut_clk3) # ------------------- # ----------------------- # start CLOCK(inputclock) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id inputclock set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id inputclock set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id inputclock set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id inputclock set_global_assignment -name FMAX_REQUIREMENT "65 MHz" -section_id inputclock # end CLOCK(inputclock) # --------------------- # ------------------- # start CLOCK(strobe) # Timing Assignments # ================== set_global_assignment -name DUTY_CYCLE 50 -section_id strobe set_global_assignment -name INVERT_BASE_CLOCK OFF -section_id strobe set_global_assignment -name MULTIPLY_BASE_CLOCK_PERIOD_BY 1 -section_id strobe set_global_assignment -name DIVIDE_BASE_CLOCK_PERIOD_BY 1 -section_id strobe set_global_assignment -name FMAX_REQUIREMENT "125 MHz" -section_id strobe # end CLOCK(strobe) # ----------------- # --------------------------------------------- # start EDA_TOOL_SETTINGS(eda_design_synthesis) # Analysis & Synthesis Assignments # ================================ set_global_assignment -name EDA_LMF_FILE "C:/Programme/q91/quartus/lmf/mentor.lmf" -section_id eda_design_synthesis # end EDA_TOOL_SETTINGS(eda_design_synthesis) # ------------------------------------------- # ---------------------- # start TIMEGROUP(ni_p4) # Timing Group Assignments # ======================== set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[0] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[1] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[2] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[3] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[4] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[5] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[6] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[7] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[8] -section_id ni_p4 set_global_assignment -name ASSIGNMENT_GROUP_MEMBER DUT_P4_D[9] -section_id ni_p4 # end TIMEGROUP(ni_p4) # -------------------- # ----------------- # start ENTITY(top) # Timing Assignments # ================== set_instance_assignment -name CLOCK_SETTINGS strobe -to DUT_P4_STR set_instance_assignment -name CLOCK_SETTINGS inputclock -to CLK_gen set_instance_assignment -name CLOCK_SETTINGS dut_clk -to DUT_CLK[0] set_instance_assignment -name CLOCK_SETTINGS dut_clk1 -to DUT_CLK[1] set_instance_assignment -name CLOCK_SETTINGS dut_clk2 -to DUT_CLK[2] set_instance_assignment -name CLOCK_SETTINGS dut_clk3 -to DUT_CLK[3] set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[0] -to "ni2dpm_12:ni_ni_neg|data_1p_0" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[0] -to "ni2dpm_12:ni_ni_pos|data_1p_0" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[1] -to "ni2dpm_12:ni_ni_neg|data_1p_1" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[1] -to "ni2dpm_12:ni_ni_pos|data_1p_1" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[2] -to "ni2dpm_12:ni_ni_neg|data_1p_2" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[2] -to "ni2dpm_12:ni_ni_pos|data_1p_2" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[3] -to "ni2dpm_12:ni_ni_neg|data_1p_3" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[3] -to "ni2dpm_12:ni_ni_pos|data_1p_3" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[4] -to "ni2dpm_12:ni_ni_neg|data_1p_4" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[4] -to "ni2dpm_12:ni_ni_pos|data_1p_4" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[5] -to "ni2dpm_12:ni_ni_neg|data_1p_5" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[5] -to "ni2dpm_12:ni_ni_pos|data_1p_5" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[6] -to "ni2dpm_12:ni_ni_neg|data_1p_6" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[6] -to "ni2dpm_12:ni_ni_pos|data_1p_6" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[7] -to "ni2dpm_12:ni_ni_neg|data_1p_7" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[7] -to "ni2dpm_12:ni_ni_pos|data_1p_7" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[8] -to "ni2dpm_12:ni_ni_neg|data_1p_8" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[8] -to "ni2dpm_12:ni_ni_pos|data_1p_8" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[9] -to "ni2dpm_12:ni_ni_neg|data_1p_9" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_P4_D[9] -to "ni2dpm_12:ni_ni_pos|data_1p_9" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[0] -to "ni2dpm_12:ni_ni_neg|data_1p_0" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[0] -to "ni2dpm_12:ni_ni_pos|data_1p_0" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[1] -to "ni2dpm_12:ni_ni_neg|data_1p_1" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[1] -to "ni2dpm_12:ni_ni_pos|data_1p_1" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[2] -to "ni2dpm_12:ni_ni_neg|data_1p_2" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[2] -to "ni2dpm_12:ni_ni_pos|data_1p_2" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[3] -to "ni2dpm_12:ni_ni_neg|data_1p_3" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[3] -to "ni2dpm_12:ni_ni_pos|data_1p_3" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[4] -to "ni2dpm_12:ni_ni_neg|data_1p_4" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[4] -to "ni2dpm_12:ni_ni_pos|data_1p_4" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[5] -to "ni2dpm_12:ni_ni_neg|data_1p_5" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[5] -to "ni2dpm_12:ni_ni_pos|data_1p_5" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[6] -to "ni2dpm_12:ni_ni_neg|data_1p_6" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[6] -to "ni2dpm_12:ni_ni_pos|data_1p_6" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[7] -to "ni2dpm_12:ni_ni_neg|data_1p_7" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[7] -to "ni2dpm_12:ni_ni_pos|data_1p_7" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[8] -to "ni2dpm_12:ni_ni_neg|data_1p_8" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[8] -to "ni2dpm_12:ni_ni_pos|data_1p_8" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[9] -to "ni2dpm_12:ni_ni_neg|data_1p_9" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_P4_D[9] -to "ni2dpm_12:ni_ni_pos|data_1p_9" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_OA_CTR -to "ni2dpm_12:ni_ni_neg|oa_ctrl_s" set_instance_assignment -name TSU_REQUIREMENT "0.5 ns" -from DUT_OA_CTR -to "ni2dpm_12:ni_ni_pos|oa_ctrl_s" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_OA_CTR -to "ni2dpm_12:ni_ni_pos|oa_ctrl_s" set_instance_assignment -name TH_REQUIREMENT "0.1 ns" -from DUT_OA_CTR -to "ni2dpm_12:ni_ni_neg|oa_ctrl_s" # end ENTITY(top) # --------------- set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"