#inc <conf_va.inc>

; ------------------------------------------------------------------
; --                                                              --
; --     Test program for the readout board                       --
; --     For the ALICE TR-Detector at LHC                         --
; --     Kirchhoff Institut für Physik                            --
; --     Univesity of Heidelberg                                  --
; --     Germany                                                  --
; --                                                              --
; --     03.09.2004  VA                                           --
; ------------------------------------------------------------------
;
; Switches set in the assembler:

; #def nsamples=21      - must be 21 for normal programs and 33 for MG tests

; CONST[12] - padrow number (0..15)

#def work0 = r0
#def work1 = r8
#def work2 = r2

#def endsig_tr= 0xAAAA    ; end signature for tracklet readout
#def endsig_rr= 0x0000    ; end signature for raw data readout

#ifdef cpu0
      #def clk_onoff = CPU0SS;
#endif
#ifdef cpu1
      #def clk_onoff = CPU1SS;
#endif
#ifdef cpu2
      #def clk_onoff = CPU2SS;
#endif
#ifdef cpu3
      #def clk_onoff = CPU3SS;
#endif

#def evntcnt_c   = 0xF000;
#def evntcnt_t   = 0xF001;
#def evntcnt_r   = 0xF002;


ORG 0x0;
        jmpr    cc_uncond, 0
        nop

; IRQ clr
ORG 0x100;
#ifdef cpu0
        nop
        nop
        mov cmd_ext_clr, r0
;        sgio r0, SMCMD      ; clear ready
        nop
#else
    #ifdef cpu1
            iext evntcnt_c
            lgio 0, evntcnt_c
            jmpr    cc_busy, 0;
            lpio    0x300, r1;
            add     r1, c1, r1;
            iext evntcnt_c;
            sgio    r1, evntcnt_c;
    #else
        #ifdef cpu2
            nop
            mov b1111_0101_0000, r1
            nop
            sgio r1, SMOFF      ; switch off all NI LVDS cells, clk_prepr, clk_ni
            nop
        #else
            nop
            nop
            nop
            nop
            nop
        #endif
    #endif
#endif

        jmpr cc_uncond, 0
        nop


ORG 0x200; -- put here the start address, store this value
;          -- as interrupt 2 start address
;          -- configure IRQ2 as high level
;          -- check if there are data for this CPU?
fit_pr:
                shl 8, c5, work1
                add work1, c12, work1
; -- some delay
                mov 32, work0
delay:          sub work0, c1, work0
                jmp cc_nzero, delay

;#ifdef cpu0
                mov 0xFE, work0
                or  work0, work1, work0
;#else
; now without tracklets, just write the end mark
		iext endsig_tr
		mov endsig_tr, work0
;#endif
send:           spio   work0 NODP             ; then send to the NI

#ifdef cpu0
                iext evntcnt_t
                lgio 0, evntcnt_t
                jmpr    cc_busy, 0;
                lpio    0x300, r1;
                add     r1, c1, r1;
                iext evntcnt_t;
                sgio    r1, evntcnt_t;
#endif
                jmpr   cc_uncond 0
                nop


ORG 0x400
; IRQ raw data read
#ifdef cpu0
        mov     cmd_CPU_done r0
        sgio    r0 SMCMD;
#endif
#ifdef cpu1
        iext evntcnt_r
        lgio 0, evntcnt_r
        jmpr    cc_busy, 0;
        lpio    0x300, r1;
        add     r1, c1, r1;
        iext evntcnt_r;
        sgio    r1, evntcnt_r;
#endif
#ifdef cpu2
        nop
        nop;
#endif
#ifdef cpu3
        nop
        nop;
#endif
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        nop;
        mov 0, work2
wfull:  add work1, work2, work0
        spio work0, NODP
        add work2, c1, work2
        cmp work2, nsamples
        jmp cc_ltu, wfull

        ; send end mark
        mov     endsig_rr work0
        spio    work0 NODP

        ; switch power off, here we use that LSB of endsig_rr is 0!
coff:   sgio    work0 clk_onoff ; each cpu stops its clock
        jmpr    cc_uncond 0
        nop