#inc <conf_va.inc>

; ------------------------------------------------------------------
; --                                                              --
; --     Test program for the readout board                       --
; --     For the ALICE TR-Detector at LHC                         --
; --     Kirchhoff Institut für Physik                            --
; --     Univesity of Heidelberg                                  --
; --     Germany                                                  --
; --                                                              --
; --     03.09.2004  VA                                           --
; ------------------------------------------------------------------
;
; Switches set in the assembler:

; #def nsamples=21      - must be 21 for normal programs and 33 for MG tests

; CONST[12] - padrow number (0..15)

#def endsig_tr= 0xAAAA    ; end signature for tracklet readout
#def endsig_rr= 0x0000    ; end signature for raw data readout

#ifdef cpu0
      #def clk_onoff = CPU0SS;
      #def dbank_bg  = 0xF000;
      #def psrg_ini  = 0xF03F;
#endif
#ifdef cpu1
      #def clk_onoff = CPU1SS;
      #def dbank_bg  = 0xF040;
      #def psrg_ini  = 0xF07F;
#endif
#ifdef cpu2
      #def clk_onoff = CPU2SS;
      #def dbank_bg  = 0xF080;
      #def psrg_ini  = 0xF0BF;
#endif
#ifdef cpu3
      #def clk_onoff = CPU3SS;
      #def dbank_bg  = 0xF0C0;
      #def psrg_ini  = 0xF0FF;
#endif

ORG 0x0;
        jmpr    cc_uncond, 0
        nop

; IRQ clr
ORG 0x100;
#ifdef cpu0
        nop
        nop
        mov cmd_ext_clr, r0
;        sgio r0, SMCMD      ; clear ready
        nop
#else
    #ifdef cpu1
            nop
            nop
            nop
            nop
            nop
    #else
        #ifdef cpu2
            nop
            mov b1111_0101_0000, r1
            nop
            sgio r1, SMOFF      ; switch off all NI LVDS cells, clk_prepr, clk_ni
            nop
        #else
            nop
            nop
            nop
            nop
            nop
        #endif
    #endif
#endif

        jmpr cc_uncond, 0
        nop


ORG 0x200; -- put here the start address, store this value
;          -- as interrupt 2 start address
;          -- configure IRQ2 as high level
;          -- check if there are data for this CPU?
fit_pr:
        iext    dbank_bg;
        mov     dbank_bg, r14;  start address in DBANK
        shl 8, c5, r8
        add r8, c13, r8 ; 0xAA55C040

; -- some delay
        mov 32, r0
delay:  sub r0, c1, r0
        jmp cc_nzero, delay

;       mov 0xFE, r0
        mov 0x00, r0
        or  r0, r8, r0

;        iext endsig_tr
;        mov endsig_tr, r0
;#endif
send:   spio   r0 NODP             ; then send to the NI
        sgio+  r0

#ifdef cpu0
;       iext evntcnt_t
;       lgio 0, evntcnt_t
;       jmpr    cc_busy, 0;
;       lpio    0x300, r1;
;       add     r1, c1, r1;
;       iext evntcnt_t;
;       sgio    r1, evntcnt_t;
#endif
        jmpr   cc_uncond 0
        nop

ORG 0x400
; IRQ raw data read
#ifdef cpu0
        mov     cmd_CPU_done r0
        sgio    r0 SMCMD;
#endif
#ifdef cpu1
;       iext evntcnt_r
;       lgio 0, evntcnt_r
;       jmpr    cc_busy, 0;
;       lpio    0x300, r1;
;       add     r1, c1, r1;
;       iext evntcnt_r;
;       sgio    r1, evntcnt_r;
        nop
        nop;
#endif
#ifdef cpu2
        nop
        nop;
#endif
#ifdef cpu3
        nop
        nop;
#endif
        iext    psrg_ini
        lgio    0, psrg_ini
        mov     b0100_0010_1111, r1;PSRG, inc after read, 16-bit
;       mov     b0110_0010_1111, r1;cnt , inc after read, 16-bit
        spio    r1, 0x201;
        jmpr    cc_busy, 0
        lpio    0x300, r1
        spio    r1, 0x200;      initial data

;       iext    dbank_bg;
;       mov     dbank_bg, r14;  start address in DBANK
        mov     0, r4; number of words
        iext    0xFFFF;
        mov     0xFFFF, r3; mask
wfull:  lpio    0x202, r1;      read from PSRG
        shl     8, r1, r1;      shift to 16..31
        shl     8, r1, r1
        lpio    0x202, r2;      read from PSRG
        and     r2, r3, r2;     take only bits 0..15
        or      r2, r1, r2;     merge with bits 16..31
        spio    r2, NODP;       store to NI
        sgio+   r2;             store to DBANK
        add     r4, c1, r4;     inc the number of words
        cmp     r4, nsamples;   check if ready
        jmp     cc_ltu, wfull

        ; store the next word as start for the next pretrigger
        lpio    0x202, r2
        jmpr    cc_busy, 0
        iext    psrg_ini
        sgio    r2, psrg_ini

        ; send end mark
        mov     endsig_rr r0
        spio    r0 NODP

        ; switch power off
coff:   mov     0, r0
        sgio    r0 clk_onoff ; each cpu stops its clock
        jmpr    cc_uncond 0
        nop