include chip_def.tcs

// clear the ni-input in FPGA
write fpga2, 0x4480, 0
// pretrigger
write fpga2, 0x4008, 1
wait 30;
// clear
write fpga2, 0x4008, 2
// number of 16-bit words
expect  fpga2, 0x4480, (2*(nchips*nwords*4+4+4)-1) | ( (2*(nchips*nwords*4+4+4)-1) << 12);
readseq fpga2, 0x4800, nchips*(nwords+1)*4+2+2;
// read from DBANK
//readseq dut, 0xF000, nwords;
//readseq dut, 0xF040, nwords;
//readseq dut, 0xF080, nwords;
//readseq dut, 0xF0C0, nwords;
// next start word for PSRG
read    dut, 0xF03F
read    dut, 0xF07F
read    dut, 0xF0BF
read    dut, 0xF0FF
// read from DBANK
//readseq ni1, 0xF000, nwords;
//readseq ni1, 0xF040, nwords;
//readseq ni1, 0xF080, nwords;
//readseq ni1, 0xF0C0, nwords;
// next start word for PSRG
read    ni1, 0xF03F
read    ni1, 0xF07F
read    ni1, 0xF0BF
read    ni1, 0xF0FF