/**************************************/
/* ALICE TRD                          */
/* Read-out board                     */
/* SCSN Configuration File            */
/*                                    */
/* 2004-09-21                         */
/*                                    */
/* for use with 17 chips               */
/*                                    */
/* Jan de Cuveland, Venelin Angelov   */
/**************************************/

// ----------------------------
//  define SCSN IDs for ring 0
// ----------------------------

reset

//    phys.pos.  logic. pos (scsn ring 0)
const chip0  = 6;
const chip1  = 5;
const chip2  = 4;
const chip3  = 3;
const chip4  = 9;
const chip5  = 7;
const chip6  = 8;
const chip7  = 2;
const chip8  =10;
const chip9  =17;
const chip10 =16;
const chip11 =15;
const chip12 =11;
const chip13 =12;
const chip14 =13;
const chip15 =14;
const chip16 = 1;

include cpu_adc.tcs

// switching the unused pre & clk & ni ports off
// column merger chips 2, 6, 10, 14
write chip0 , SMMODE, 0xE2
write chip1 , SMMODE, 0xE2
write chip3 , SMMODE, 0xE2

write chip4 , SMMODE, 0xE2
write chip5 , SMMODE, 0xE2
write chip7 , SMMODE, 0xE2

write chip8 , SMMODE, 0xE2
write chip9 , SMMODE, 0xE2
write chip11, SMMODE, 0xE2

write chip12, SMMODE, 0xE2
write chip13, SMMODE, 0xE2
write chip15, SMMODE, 0xE2

// column merger chips
write chip2 , SMMODE, 0xB0E2
write chip6 , SMMODE, 0xB0E2
write chip10, SMMODE, 0xB0E2
write chip14, SMMODE, 0xB0E2

// mask the ADCs with open inputs
write ADCMSK, 0x1FFFFF; // first enable all in all MCMs

write chip0 , ADCMSK, 0x0FFFFF
write chip3 , ADCMSK, 0x1FFFFC

write chip4 , ADCMSK, 0x0FFFFF
write chip7 , ADCMSK, 0x1FFFFC

write chip8 , ADCMSK, 0x0FFFFF
write chip11, ADCMSK, 0x1FFFFC

write chip12, ADCMSK, 0x0FFFFF
write chip15, ADCMSK, 0x1FFFFC

// switch some ADCs off
//write chip0 , ADCEN, 0x0;
//write chip1 , ADCEN, 0x0;
//write chip2 , ADCEN, 0x0;
//write chip3 , ADCEN, 0x0;

//write chip4 , ADCEN, 0x0;
//write chip5 , ADCEN, 0x0;
//write chip6 , ADCEN, 0x0;
//write chip7 , ADCEN, 0x0;

//write chip8 , ADCEN, 0x0;
//write chip9 , ADCEN, 0x0;
//write chip10, ADCEN, 0x0;
//write chip11, ADCEN, 0x0;

//write chip12, ADCEN, 0x0;
//write chip13, ADCEN, 0x0;
//write chip14, ADCEN, 0x0;
//write chip15, ADCEN, 0x0;


//write SMCMD, CMD_LP
//write ADCEN, 0